diff -uprN binutils-2.14.90.0.8/COPYING.NEWLIB binutils-2.15.90.0.1/COPYING.NEWLIB --- binutils-2.14.90.0.8/COPYING.NEWLIB 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/COPYING.NEWLIB 2004-03-03 12:24:33.000000000 -0800 @@ -670,14 +670,68 @@ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -(27) Red Hat Incorporated +(27) Konstantin Chuguev (--enable-newlib-iconv) + +Copyright (c) 1999, 2000 + Konstantin Chuguev. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: +1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. +2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +SUCH DAMAGE. + + iconv (Charset Conversion Library) v2.0 + +(27) Artem Bityuckiy (--enable-newlib-iconv) + +Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation. +Rights transferred to Franklin Electronic Publishers. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: +1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. +2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +SUCH DAMAGE. + +(28) Red Hat Incorporated Unless otherwise stated in each remaining newlib file, the remaining files in the newlib subdirectory default to the following copyright. It should be noted that Red Hat Incorporated now owns copyrights belonging to Cygnus Solutions and Cygnus Support. -Copyright (c) 1994, 1997, 2001, 2002 Red Hat Incorporated. +Copyright (c) 1994, 1997, 2001, 2002, 2003, 2004 Red Hat Incorporated. All rights reserved. Redistribution and use in source and binary forms, with or without diff -uprN binutils-2.14.90.0.8/ChangeLog binutils-2.15.90.0.1/ChangeLog --- binutils-2.14.90.0.8/ChangeLog 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/ChangeLog 2004-03-03 12:24:33.000000000 -0800 @@ -1,3 +1,94 @@ +2004-03-01 Richard Sandiford + + * configure.in (mips64*-*-linux*): Override mips*-*-linux* case + and disable libgcj. + * configure: Regenerated. + +2004-02-28 Nathanael Nerode + + PR bootstrap/7087 + * Makefile.tpl: Guard XFOO sed statements better. + * Makefile.tpl: Add dependency for configure-target-libada. + * Makefile.in: Regenerate (incidentally fixes broken + commit when libada-branch was merged). + +2004-02-28 Andrew Cagney + + * src-release (CVS_NAMES): Define. + (do-tar, do-tar): Prune $(CVS_NAMES). + +2004-02-23 Andrew Cagney + + * texinfo/texinfo.tex: Update from version 2003-02-03.16 to + 2004-02-19.09. + +2004-02-19 Nathanael Nerode + + PR bootstrap/11932 + * mkinstalldirs, install-sh: Import from automake CVS HEAD. + +2004-02-19 Andrew Cagney + + * config.guess: Update from version 2003-06-12 to 2004-02-16. + * config.sub: Update from version 2003-06-13 to 2004-02-16. + +2004-02-11 David Edelsohn + + * configure.in (powerpc-*-aix*): Add target-libada to noconfigdirs. + (rs6000-*-aix*): Same. + * configure: Regenerate. + +2004-02-11 Kelley Cook + + * configure.in (host): Add in missing $noconfigdirs to defines. + * configure: Regenerate. + +2004-02-10 Arnaud Charlet , + Nathanael Nerode + + PR ada/6637, PR ada/5911 + Merge with libada-branch: + * configure.in, Makefile.tpl, Makefile.def: Add target-libada, + with appropriate dependencies. Add --enable-libada configure switch. + * configure, Makefile.in: Regenerate. + +2004-02-05 Rainer Orth + + * configure.in: Don't pass --with-stabs on IRIX 5 either. + * configure: Regenerate. + +2004-02-02 Jeff Johnston + + * COPYING.NEWLIB: Update Red Hat license to 2004. + +2004-01-23 DJ Delorie + + * Makefile.def (target_modules) [libiberty]: Don't stage. + * Makefile.in: Rebuilt. + +2004-01-23 Jeff Johnston + + * COPYING.NEWLIB: Update to include copyrights for new + iconv code. + +2004-01-15 Andrew Cagney + + * src-release: Update copyright year. + (do-proto-toplev): Configure using i686-pc-linux-gnu. + (NEWLIB_SUPPORT_DIRS): Delete macro. + (newlib.tar.bz2): Delete rule. + +2004-01-14 Loren J. Rittle + + * Makefile.def (target_modules) [libtermcap, libiberty, zlib]: Stage. + * Makefile.tpl (configure-target-[+module+]): Support stage. + * Makefile.in: Rebuilt. + +2003-01-14 Maciej W. Rozycki + + * gettext.m4: Quote names of macros to be defined by AC_DEFUN + throughout. + 2004-01-04 Nathanael Nerode * configure.in: Use ./config.cache, not config.cache. diff -uprN binutils-2.14.90.0.8/Makefile.def binutils-2.15.90.0.1/Makefile.def --- binutils-2.14.90.0.8/Makefile.def 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/Makefile.def 2004-03-03 12:24:33.000000000 -0800 @@ -100,7 +100,7 @@ target_modules = { module= libstdc++-v3; target_modules = { module= newlib; }; target_modules = { module= libf2c; }; target_modules = { module= libobjc; }; -target_modules = { module= libtermcap; no_check=true; +target_modules = { module= libtermcap; no_check=true; stage=true; missing=mostlyclean; missing=clean; missing=distclean; @@ -112,10 +112,11 @@ target_modules = { module= gperf; }; target_modules = { module= examples; no_check=true; no_install=true; }; target_modules = { module= libffi; }; target_modules = { module= libjava; raw_cxx=true; }; -target_modules = { module= zlib; }; +target_modules = { module= zlib; stage=true; }; target_modules = { module= boehm-gc; }; target_modules = { module= qthreads; }; target_modules = { module= rda; }; +target_modules = { module= libada; }; // These are (some of) the make targets to be done in each subdirectory. // Not all; these are the ones which don't have special options. diff -uprN binutils-2.14.90.0.8/Makefile.in binutils-2.15.90.0.1/Makefile.in --- binutils-2.14.90.0.8/Makefile.in 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/Makefile.in 2004-03-03 12:24:33.000000000 -0800 @@ -516,15 +516,15 @@ EXTRA_GCC_FLAGS = \ 'BUILD_PREFIX_1=$(BUILD_PREFIX_1)' \ "GCC_FOR_TARGET=$(GCC_FOR_TARGET)" \ "CFLAGS_FOR_BUILD=$(CFLAGS_FOR_BUILD)" \ - "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s/.*=$$/XFOO=/`" + "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) @@ -611,7 +611,8 @@ configure-target: \ maybe-configure-target-zlib \ maybe-configure-target-boehm-gc \ maybe-configure-target-qthreads \ - maybe-configure-target-rda + maybe-configure-target-rda \ + maybe-configure-target-libada # The target built for a native build. .PHONY: all.normal @@ -700,7 +701,8 @@ all-target: \ maybe-all-target-zlib \ maybe-all-target-boehm-gc \ maybe-all-target-qthreads \ - maybe-all-target-rda + maybe-all-target-rda \ + maybe-all-target-libada # Do a target for all the subdirectories. A ``make do-X'' will do a # ``make X'' in all subdirectories (because, in general, there is a @@ -794,7 +796,8 @@ info-target: \ maybe-info-target-zlib \ maybe-info-target-boehm-gc \ maybe-info-target-qthreads \ - maybe-info-target-rda + maybe-info-target-rda \ + maybe-info-target-libada # GCC, the eternal special case .PHONY: maybe-info-gcc info-gcc @@ -2582,6 +2585,28 @@ info-target-rda: \ || exit 1 +.PHONY: maybe-info-target-libada info-target-libada +maybe-info-target-libada: + +info-target-libada: \ + configure-target-libada + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing info in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + info) \ + || exit 1 + + .PHONY: do-dvi do-dvi: dvi-host dvi-target @@ -2670,7 +2695,8 @@ dvi-target: \ maybe-dvi-target-zlib \ maybe-dvi-target-boehm-gc \ maybe-dvi-target-qthreads \ - maybe-dvi-target-rda + maybe-dvi-target-rda \ + maybe-dvi-target-libada # GCC, the eternal special case .PHONY: maybe-dvi-gcc dvi-gcc @@ -4458,6 +4484,28 @@ dvi-target-rda: \ || exit 1 +.PHONY: maybe-dvi-target-libada dvi-target-libada +maybe-dvi-target-libada: + +dvi-target-libada: \ + configure-target-libada + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing dvi in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + dvi) \ + || exit 1 + + .PHONY: do-TAGS do-TAGS: TAGS-host TAGS-target @@ -4546,7 +4594,8 @@ TAGS-target: \ maybe-TAGS-target-zlib \ maybe-TAGS-target-boehm-gc \ maybe-TAGS-target-qthreads \ - maybe-TAGS-target-rda + maybe-TAGS-target-rda \ + maybe-TAGS-target-libada # GCC, the eternal special case .PHONY: maybe-TAGS-gcc TAGS-gcc @@ -6334,6 +6383,28 @@ TAGS-target-rda: \ || exit 1 +.PHONY: maybe-TAGS-target-libada TAGS-target-libada +maybe-TAGS-target-libada: + +TAGS-target-libada: \ + configure-target-libada + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing TAGS in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + TAGS) \ + || exit 1 + + .PHONY: do-install-info do-install-info: install-info-host install-info-target @@ -6422,7 +6493,8 @@ install-info-target: \ maybe-install-info-target-zlib \ maybe-install-info-target-boehm-gc \ maybe-install-info-target-qthreads \ - maybe-install-info-target-rda + maybe-install-info-target-rda \ + maybe-install-info-target-libada # GCC, the eternal special case .PHONY: maybe-install-info-gcc install-info-gcc @@ -8291,6 +8363,29 @@ install-info-target-rda: \ || exit 1 +.PHONY: maybe-install-info-target-libada install-info-target-libada +maybe-install-info-target-libada: + +install-info-target-libada: \ + configure-target-libada \ + info-target-libada + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing install-info in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + install-info) \ + || exit 1 + + .PHONY: do-installcheck do-installcheck: installcheck-host installcheck-target @@ -8379,7 +8474,8 @@ installcheck-target: \ maybe-installcheck-target-zlib \ maybe-installcheck-target-boehm-gc \ maybe-installcheck-target-qthreads \ - maybe-installcheck-target-rda + maybe-installcheck-target-rda \ + maybe-installcheck-target-libada # GCC, the eternal special case .PHONY: maybe-installcheck-gcc installcheck-gcc @@ -10167,6 +10263,28 @@ installcheck-target-rda: \ || exit 1 +.PHONY: maybe-installcheck-target-libada installcheck-target-libada +maybe-installcheck-target-libada: + +installcheck-target-libada: \ + configure-target-libada + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing installcheck in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + installcheck) \ + || exit 1 + + .PHONY: do-mostlyclean do-mostlyclean: mostlyclean-host mostlyclean-target @@ -10255,7 +10373,8 @@ mostlyclean-target: \ maybe-mostlyclean-target-zlib \ maybe-mostlyclean-target-boehm-gc \ maybe-mostlyclean-target-qthreads \ - maybe-mostlyclean-target-rda + maybe-mostlyclean-target-rda \ + maybe-mostlyclean-target-libada # GCC, the eternal special case .PHONY: maybe-mostlyclean-gcc mostlyclean-gcc @@ -11920,6 +12039,27 @@ mostlyclean-target-rda: || exit 1 +.PHONY: maybe-mostlyclean-target-libada mostlyclean-target-libada +maybe-mostlyclean-target-libada: + +mostlyclean-target-libada: + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing mostlyclean in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + mostlyclean) \ + || exit 1 + + .PHONY: do-clean do-clean: clean-host clean-target @@ -12008,7 +12148,8 @@ clean-target: \ maybe-clean-target-zlib \ maybe-clean-target-boehm-gc \ maybe-clean-target-qthreads \ - maybe-clean-target-rda + maybe-clean-target-rda \ + maybe-clean-target-libada # GCC, the eternal special case .PHONY: maybe-clean-gcc clean-gcc @@ -13687,6 +13828,27 @@ clean-target-rda: || exit 1 +.PHONY: maybe-clean-target-libada clean-target-libada +maybe-clean-target-libada: + +clean-target-libada: + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing clean in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + clean) \ + || exit 1 + + .PHONY: do-distclean do-distclean: distclean-host distclean-target @@ -13775,7 +13937,8 @@ distclean-target: \ maybe-distclean-target-zlib \ maybe-distclean-target-boehm-gc \ maybe-distclean-target-qthreads \ - maybe-distclean-target-rda + maybe-distclean-target-rda \ + maybe-distclean-target-libada # GCC, the eternal special case .PHONY: maybe-distclean-gcc distclean-gcc @@ -15454,6 +15617,27 @@ distclean-target-rda: || exit 1 +.PHONY: maybe-distclean-target-libada distclean-target-libada +maybe-distclean-target-libada: + +distclean-target-libada: + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing distclean in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + distclean) \ + || exit 1 + + .PHONY: do-maintainer-clean do-maintainer-clean: maintainer-clean-host maintainer-clean-target @@ -15542,7 +15726,8 @@ maintainer-clean-target: \ maybe-maintainer-clean-target-zlib \ maybe-maintainer-clean-target-boehm-gc \ maybe-maintainer-clean-target-qthreads \ - maybe-maintainer-clean-target-rda + maybe-maintainer-clean-target-rda \ + maybe-maintainer-clean-target-libada # GCC, the eternal special case .PHONY: maybe-maintainer-clean-gcc maintainer-clean-gcc @@ -17221,6 +17406,27 @@ maintainer-clean-target-rda: || exit 1 +.PHONY: maybe-maintainer-clean-target-libada maintainer-clean-target-libada +maybe-maintainer-clean-target-libada: + +maintainer-clean-target-libada: + @[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libada" ; \ + for flag in $(EXTRA_TARGET_FLAGS); do \ + eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ + done; \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ + "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ + "RANLIB=$${RANLIB}" \ + "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" \ + maintainer-clean) \ + || exit 1 + + # Here are the targets which correspond to the do-X targets. @@ -17363,7 +17569,8 @@ do-check: maybe-check-gcc \ maybe-check-target-zlib \ maybe-check-target-boehm-gc \ maybe-check-target-qthreads \ - maybe-check-target-rda + maybe-check-target-rda \ + maybe-check-target-libada # Automated reporting of test results. @@ -17542,7 +17749,8 @@ install-target: \ maybe-install-target-zlib \ maybe-install-target-boehm-gc \ maybe-install-target-qthreads \ - maybe-install-target-rda + maybe-install-target-rda \ + maybe-install-target-libada uninstall: @echo "the uninstall target is not supported in this tree" @@ -21986,30 +22194,8 @@ configure-target-libstdc++-v3: $(TARGET_ *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libstdc++-v3 "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libstdc++-v3"; \ libsrcdir="$$s/libstdc++-v3"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22088,30 +22274,8 @@ configure-target-newlib: $(TARGET_SUBDIR *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/newlib "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/newlib"; \ libsrcdir="$$s/newlib"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22190,30 +22354,8 @@ configure-target-libf2c: $(TARGET_SUBDIR *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libf2c "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libf2c"; \ libsrcdir="$$s/libf2c"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22292,30 +22434,8 @@ configure-target-libobjc: $(TARGET_SUBDI *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libobjc "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libobjc"; \ libsrcdir="$$s/libobjc"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22492,30 +22612,8 @@ configure-target-winsup: $(TARGET_SUBDIR *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/winsup "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/winsup"; \ libsrcdir="$$s/winsup"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22594,30 +22692,8 @@ configure-target-libgloss: $(TARGET_SUBD *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libgloss "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libgloss"; \ libsrcdir="$$s/libgloss"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22692,30 +22768,8 @@ configure-target-libiberty: $(TARGET_SUB *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libiberty "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libiberty"; \ libsrcdir="$$s/libiberty"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22794,30 +22848,8 @@ configure-target-gperf: $(TARGET_SUBDIR) *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/gperf "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/gperf"; \ libsrcdir="$$s/gperf"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22896,30 +22928,8 @@ configure-target-examples: $(TARGET_SUBD *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/examples "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/examples"; \ libsrcdir="$$s/examples"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -22990,30 +23000,8 @@ configure-target-libffi: $(TARGET_SUBDIR *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libffi "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libffi"; \ libsrcdir="$$s/libffi"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -23093,30 +23081,8 @@ configure-target-libjava: $(TARGET_SUBDI *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/libjava "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/libjava"; \ libsrcdir="$$s/libjava"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -23297,30 +23263,8 @@ configure-target-boehm-gc: $(TARGET_SUBD *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/boehm-gc "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/boehm-gc"; \ libsrcdir="$$s/boehm-gc"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -23399,30 +23343,8 @@ configure-target-qthreads: $(TARGET_SUBD *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/qthreads "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/qthreads"; \ libsrcdir="$$s/qthreads"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -23501,30 +23423,8 @@ configure-target-rda: $(TARGET_SUBDIR)/r *) topdir="../../$(srcdir)" ;; \ esac ;; \ esac; \ - if [ "$(srcdir)" = "." ] ; then \ - if [ "$(TARGET_SUBDIR)" != "." ] ; then \ - if $(SHELL) $$s/symlink-tree $${topdir}/rda "no-such-file" ; then \ - if [ -f Makefile ]; then \ - if $(MAKE) distclean; then \ - true; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - else \ - exit 1; \ - fi; \ - else \ - true; \ - fi; \ - srcdiroption="--srcdir=."; \ - libsrcdir="."; \ - else \ srcdiroption="--srcdir=$${topdir}/rda"; \ libsrcdir="$$s/rda"; \ - fi; \ rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -23562,6 +23462,86 @@ install-target-rda: installdirs $(MAKE) $(TARGET_FLAGS_TO_PASS) install) +.PHONY: configure-target-libada maybe-configure-target-libada +maybe-configure-target-libada: + +# There's only one multilib.out. Cleverer subdirs shouldn't need it copied. +$(TARGET_SUBDIR)/libada/multilib.out: multilib.out + $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada ; \ + rm -f $(TARGET_SUBDIR)/libada/Makefile || : ; \ + cp multilib.out $(TARGET_SUBDIR)/libada/multilib.out + +configure-target-libada: $(TARGET_SUBDIR)/libada/multilib.out + @test ! -f $(TARGET_SUBDIR)/libada/Makefile || exit 0; \ + $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada ; \ + r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + AR="$(AR_FOR_TARGET)"; export AR; \ + AS="$(AS_FOR_TARGET)"; export AS; \ + CC="$(CC_FOR_TARGET)"; export CC; \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ + CPPFLAGS="$(CFLAGS_FOR_TARGET)"; export CPPFLAGS; \ + CXX="$(CXX_FOR_TARGET)"; export CXX; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + GCJ="$(GCJ_FOR_TARGET)"; export GCJ; \ + DLLTOOL="$(DLLTOOL_FOR_TARGET)"; export DLLTOOL; \ + LD="$(LD_FOR_TARGET)"; export LD; \ + LDFLAGS="$(LDFLAGS_FOR_TARGET)"; export LDFLAGS; \ + NM="$(NM_FOR_TARGET)"; export NM; \ + RANLIB="$(RANLIB_FOR_TARGET)"; export RANLIB; \ + WINDRES="$(WINDRES_FOR_TARGET)"; export WINDRES; \ + echo Configuring in $(TARGET_SUBDIR)/libada; \ + cd "$(TARGET_SUBDIR)/libada" || exit 1; \ + case $(srcdir) in \ + /* | [A-Za-z]:[\\/]*) \ + topdir=$(srcdir) ;; \ + *) \ + case "$(TARGET_SUBDIR)" in \ + .) topdir="../$(srcdir)" ;; \ + *) topdir="../../$(srcdir)" ;; \ + esac ;; \ + esac; \ + srcdiroption="--srcdir=$${topdir}/libada"; \ + libsrcdir="$$s/libada"; \ + rm -f no-such-file || : ; \ + CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ + $(TARGET_CONFIGARGS) $${srcdiroption} \ + --with-target-subdir="$(TARGET_SUBDIR)" \ + || exit 1 + +.PHONY: all-target-libada maybe-all-target-libada +maybe-all-target-libada: +all-target-libada: configure-target-libada + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(TARGET_FLAGS_TO_PASS) all) + +.PHONY: check-target-libada maybe-check-target-libada +maybe-check-target-libada: + +check-target-libada: + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(TARGET_FLAGS_TO_PASS) check) + + +.PHONY: install-target-libada maybe-install-target-libada +maybe-install-target-libada: + +install-target-libada: installdirs + @r=`${PWD_COMMAND}`; export r; \ + s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + $(SET_LIB_PATH) \ + (cd $(TARGET_SUBDIR)/libada && \ + $(MAKE) $(TARGET_FLAGS_TO_PASS) install) + + # ---------- # GCC module @@ -23857,6 +23837,7 @@ ALL_GCC_CXX = $(ALL_GCC_C) maybe-all-tar configure-target-boehm-gc: $(ALL_GCC_C) maybe-configure-target-qthreads configure-target-fastjar: maybe-configure-target-zlib all-target-fastjar: maybe-all-target-zlib maybe-all-target-libiberty +configure-target-libada: $(ALL_GCC_C) configure-target-libf2c: $(ALL_GCC_C) all-target-libf2c: maybe-all-target-libiberty configure-target-libffi: $(ALL_GCC_C) diff -uprN binutils-2.14.90.0.8/Makefile.tpl binutils-2.15.90.0.1/Makefile.tpl --- binutils-2.14.90.0.8/Makefile.tpl 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/Makefile.tpl 2004-03-03 12:24:33.000000000 -0800 @@ -459,15 +459,15 @@ EXTRA_GCC_FLAGS = \ 'BUILD_PREFIX_1=$(BUILD_PREFIX_1)' \ "GCC_FOR_TARGET=$(GCC_FOR_TARGET)" \ "CFLAGS_FOR_BUILD=$(CFLAGS_FOR_BUILD)" \ - "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s/.*=$$/XFOO=/`" \ - "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s/.*=$$/XFOO=/`" + "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'STMP_FIXPROTO=$(STMP_FIXPROTO)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIMITS_H_TEST=$(LIMITS_H_TEST)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_CFLAGS=$(LIBGCC2_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_DEBUG_CFLAGS=$(LIBGCC2_DEBUG_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'LIBGCC2_INCLUDES=$(LIBGCC2_INCLUDES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'STAGE1_CFLAGS=$(STAGE1_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'BOOT_CFLAGS=$(BOOT_CFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ + "`echo 'BOOT_ADAFLAGS=$(BOOT_ADAFLAGS)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) @@ -983,7 +983,7 @@ ENDIF raw_cxx +] .) topdir="../$(srcdir)" ;; \ *) topdir="../../$(srcdir)" ;; \ esac ;; \ - esac; \ + esac; \[+ IF stage +] if [ "$(srcdir)" = "." ] ; then \ if [ "$(TARGET_SUBDIR)" != "." ] ; then \ if $(SHELL) $$s/symlink-tree $${topdir}/[+module+] "no-such-file" ; then \ @@ -1004,10 +1004,10 @@ ENDIF raw_cxx +] fi; \ srcdiroption="--srcdir=."; \ libsrcdir="."; \ - else \ + else \[+ ENDIF stage +] srcdiroption="--srcdir=$${topdir}/[+module+]"; \ - libsrcdir="$$s/[+module+]"; \ - fi; \ + libsrcdir="$$s/[+module+]"; \[+ IF stage +] + fi; \[+ ENDIF stage +] rm -f no-such-file || : ; \ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) $${srcdiroption} \ @@ -1354,6 +1354,7 @@ ALL_GCC_CXX = $(ALL_GCC_C) maybe-all-tar configure-target-boehm-gc: $(ALL_GCC_C) maybe-configure-target-qthreads configure-target-fastjar: maybe-configure-target-zlib all-target-fastjar: maybe-all-target-zlib maybe-all-target-libiberty +configure-target-libada: $(ALL_GCC_C) configure-target-libf2c: $(ALL_GCC_C) all-target-libf2c: maybe-all-target-libiberty configure-target-libffi: $(ALL_GCC_C) diff -uprN binutils-2.14.90.0.8/bfd/ChangeLog binutils-2.15.90.0.1/bfd/ChangeLog --- binutils-2.14.90.0.8/bfd/ChangeLog 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/ChangeLog 2004-03-03 12:24:33.000000000 -0800 @@ -1,3 +1,288 @@ +2003-03-03 Andrew Stubbs + + * archures.c: Add bfd_mach_sh4_nommu_nofpu. + * cpu-sh.c: Ditto. + * elf32-sh.c: Ditto. + * bfd-in2.h: Regenerate. + +2004-03-02 Alexandre Oliva + + * elf32-frv.c (struct frv_pic_relocs_info): Added fixups and + dynrelocs. + (_frv_count_got_plt_entries): Initialize them. + (frv_pic_relocs_info_find): Add insert argument. Adjust all + callers. + (frv_pic_relocs_info_for_global): Likewise. + (frv_pic_relocs_info_for_local): Likewise. + (frv_pic_merge_early_relocs_info): New. + (_frv_resolve_final_relocs_info): Use it in case one entry maps to + another. + (_frv_add_dyn_reloc): Add entry argument. Adjust all callers. + Check that we don't exceed the allocated count for entry. + (_frv_add_rofixup): Likewise. + (_frv_emit_got_relocs_plt_entries): Adjust for coding standards. + (elf32_frv_finish_dynamic_sections): Improve error message in case + we emit too few rofixup entries. + +2004-03-01 Richard Sandiford + + * archures.c (bfd_mach_fr450): New. + * bfd-in2.h: Regenerate. + * cpu-frv.c (arch_info_450): New bfd_arch_info_type. + (arch_info_500): Link to it. + * elf32-frv.c (elf32_frv_machine, frv_elf_merge_private_bfd_data) + (frv_elf_print_private_bfd_data): Handle fr405 and fr450 header flags. + (frv_elf_arch_extension_p): New function. + (frv_elf_merge_private_bfd_data): Use it. + +2004-02-28 H.J. Lu + + * elf-bfd.h (_bfd_elf_link_add_archive_symbols): New prototype. + + * elflink.h (is_global_data_symbol_definition): Moved to + elflink.c. + (elf_link_is_defined_archive_symbol): Likewise. + (elf_link_add_archive_symbols): Likewise. Renamed to + _bfd_elf_link_add_archive_symbols. + + * elflink.c (elf_link_is_defined_archive_symbol): Get the size + of ELF symbol table entry from backend. + (_bfd_elf_link_add_archive_symbols): Call bfd_link_add_symbols + instead of elf_link_add_object_symbols. + +2004-02-27 Alexandre Oliva + + * elf-bfd.h (struct elf_backend_data): Added + elf_backend_can_make_relative_eh_frame, + elf_backend_can_make_lsda_relative_eh_frame and + elf_backend_encode_eh_address. + (_bfd_elf_encode_eh_address): Declare. + (_bfd_elf_can_make_relative): Declare. + * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Use new + hooks to decide whether to attempt to make_relative and + make_lsda_relative. + (_bfd_elf_write_section_eh_frame_hdr): Call encode_eh_address. + (_bfd_elf_can_make_relative): New. + (_bfd_elf_encode_eh_address): New. + * elf32-frv.c (frv_elf_use_relative_eh_frame): New. + (frv_elf_encode_eh_address): New. + (elf_backend_can_make_relative_eh_frame): Define. + (elf_backend_can_make_lsda_relative_eh_frame): Define. + (elf_backend_encode_eh_address): Define. + * elfxx-target.h + (elf_backend_can_make_relative_eh_frame): Define. + (elf_backend_can_make_lsda_relative_eh_frame): Define. + (elf_backend_encode_eh_address): Define. + (elfNN_bed): Add them. + +2004-02-27 Alexandre Oliva + + * elf32-frv.c (elf32_frv_howto_table) : Set + complain_on_overflow to signed. + +2004-02-27 H.J. Lu + + * elflink.h (sort_symbol): New. + (elf_link_add_object_symbols): Use a sorted symbol array for + weakdef. + +2004-02-27 Jakub Jelinek + + * elf32-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL + for pc relative relocs. + (elf_s390_relocate_section): Likewise. + * elf64-s390.c (allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL + for pc relative relocs. + (elf_s390_relocate_section): Likewise. + +2004-02-26 H.J. Lu + + * elfxx-ia64.c (elfNN_ia64_check_relocs): Fix call to + count_dyn_reloc. + +2004-02-25 H.J. Lu + + * elfxx-ia64.c (elfNN_ia64_dyn_reloc_entry): Add the reltext. + field to track if a relocation is against readonly section. + (count_dyn_reloc): Take a new argument for rent->reltext. + (elfNN_ia64_check_relocs): Adjust call to count_dyn_reloc. + (get_reloc_section): Don't set ia64_info->reltext here. + (allocate_dynrel_entries): Set ia64_info->reltext here. + +2004-02-24 Alexandre Oliva + + * elf32-frv.c (FRV_SYM_LOCAL): Weak undefined doesn't imply local. + (_frv_emit_got_relocs_plt_entries): Decay relocation to protected + function's descriptor to symbol+offset, and map local undefweak + symbol to NULL function descriptor. + (elf32_frv_relocate_section): Likewise. + +2004-02-23 Mark Kettenis + + * libaout.h (enum machine_type): Add M_SPARC64_NETBSD and + M_X86_64_NETBSD. + * netbsd-core.c (M_SPARC64_OPENBSD): Define. + (netbsd_core_file_p): Set architecture from machine ID for + selected machines. + +2004-02-23 Jakub Jelinek + + * elflink.h (size_dynamic_sections): If not adding DT_FLAGS and + DF_BIND_NOW is set in info->flags, create DT_BIND_NOW dynamic entry. + +2004-02-21 H.J. Lu + + * elflink.c (_bfd_elf_merge_symbol): Properly handle undefined + symbols with non-default visibility. + +2004-02-21 Danny Smith + + * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Clear + IMAGE_SCN_MEM_WRITE on known sections only. + +2004-02-20 Jakub Jelinek + + * elf32-ppc.c (allocate_dynrelocs): Create dynsym for undef weak + symbols used in PIE relocs. + +2004-02-19 Jakub Jelinek + + * elf32-sparc.c (elf32_sparc_finish_dynamic_sections): Clear + .plt sh_entsize. + +2004-02-18 Daniel Jacobowitz + + * configure.in: Update version to 2.15.90. + * configure: Regenerate. + +2004-02-17 Daniel Jacobowitz + Richard Sandiford + + * elfxx-mips.c (mips_elf_calculate_relocation): Use + _bfd_elf_symbol_refs_local_p to decide whether to decay + a GOT_PAGE/GOT_OFST pair to GOT_DISP/addend. + (_bfd_mips_elf_check_relocs): Add a global GOT entry for GOT_PAGE + relocs if the symbol wasn't defined by a regular object file. + Don't check the symbol's dynindx. + +2004-02-16 Andrew Cagney + + * bfd-in.h (file_ptr, ufile_ptr): Configure type using + @bfd_file_ptr@. + * bfd-in2.h: Re-generate. + +2004-02-14 Andrew Cagney + + * configure.host (HDEFINES): When hppa*-*-hpux*, define + _LARGEFILE64_SOURCE. + +2004-02-13 Andrew Cagney + + * elf.c (vma_page_aligned_bias): New function. + (assign_file_positions_except_relocs) + (assign_file_positions_for_segments): Replace broken modulo + arithmetic with call to vma_page_aligned_bias. + +2004-02-11 Andrew Cagney + + * bfd-in.h: Update copyright. + (bfd_tell): Change return type to file_ptr. + * bfd-in2.h: Re-generate. + * cache.c: Update copyright. + (bfd_cache_lookup_worker): Use real_fseek, do not cast offset + parameter. + (close_one): Use real_ftell. + * bfdio.c: Update copyright. + (real_ftell, real_fseek): New functions. + (bfd_tell): Use real_fseek and real_ftell, change return type to + file_ptr. + (bfd_seek): Use real_ftell and real_fseek, change type of + file_position to a file_ptr. + * libbfd-in.h: Update copyright. + (real_ftell, real_fseek): Declare. + * libbfd.h: Re-generate. + + * configure.in (AC_CHECK_FUNCS): Check for ftello, ftello64, + fseeko and fseeko64. Determine bfd_file_ptr. + * configure: Re-generate. + * config.in: Re-generate. + +2004-02-09 Anil Paranjpe + + * coff-h8300.c: Added comments about relaxation for ldc.w and stc.w. + * elf32-h8300.c: Likewise. + +2004-02-09 Christian Vogel + Nick Clifton + + * elf64-alpha.c (elf64_alpha_calc_got_offsets_for_symbol): Catch + GOT entries with no associated GOT subsection. + +2004-02-09 Richard Sandiford + + * bfd-elf.h (elf_backend_name_local_section_symbols): New hook. + * elf.c (swap_out_syms): Use it to decide whether local section + symbols should be named. + * elfxx-target.h (elf_backend_name_local_section_symbols): New macro. + * elfxx-mips.h (_bfd_mips_elf_name_local_section_symbols): Declare. + (elf_backend_name_local_section_symbols): Define. + * elfxx-mips.c (_bfd_mips_elf_name_local_section_symbols): New. + +2004-01-30 H.J. Lu + + * elfxx-ia64.c (elfNN_ia64_relax_brl): New function. + (elfNN_ia64_relax_section): Optimize brl to br during the relax + finalize pass. + +2004-01-30 Alexandre Oliva + + * elf32-frv.c (elf32_frv_always_size_sections): Initialize pointer + to bfd_link_hash_entry passed by reference to + _bfd_generic_link_add_one_symbol. + +2004-01-25 H.J. Lu + + * elfxx-ia64.c (elfNN_ia64_relocate_section): Disallow imm + relocations against dynamic symbols. + +2004-01-23 Daniel Jacobowitz + + * elf32-arm.h (elf32_arm_check_relocs): Revert part of 2004-01-13 + change. + +2004-01-21 Tom Rix + + * reloc.c: New 5 bit reloc, BFD_RELOC_M68HC12_5B, for m68hc12 movb/movw. + * bfd-in2.h, libbfd.h: Rebuilt. + +2004-01-20 Danny Smith + + * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Don't remove + IMAGE_SCN_MEM_WRITE flag from .text section if WP_TEXT + flag has been cleared. + +2004-01-19 Kazu Hirata + + * coff-h8300.c: Add and adjust comments about relaxation. + * elf32-h8300.c: Likewise. + +2004-01-16 Kazu Hirata + + * coff-h8300.c: Fix comment typos. + * elf32-h8300.c: Likewise. + +2004-01-16 Kazu Hirata + + * coff-h8300.c: Add comments about relaxation. + * elf32-h8300.c: Likewise. + +2004-01-14 Maciej W. Rozycki + + * acinclude.m4: Quote names of macros to be defined by AC_DEFUN + throughout. + * aclocal.m4: Regenerate. + * configure: Regenerate. + 2004-01-13 Ian Lance Taylor * elf64-mips.c (mips_elf64_slurp_one_reloc_table): Call diff -uprN binutils-2.14.90.0.8/bfd/acinclude.m4 binutils-2.15.90.0.1/bfd/acinclude.m4 --- binutils-2.14.90.0.8/bfd/acinclude.m4 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/acinclude.m4 2004-03-03 12:24:33.000000000 -0800 @@ -1,7 +1,7 @@ sinclude(../config/accross.m4) dnl See whether we need to use fopen-bin.h rather than fopen-same.h. -AC_DEFUN(BFD_BINARY_FOPEN, +AC_DEFUN([BFD_BINARY_FOPEN], [AC_REQUIRE([AC_CANONICAL_SYSTEM]) case "${host}" in changequote(,)dnl @@ -11,7 +11,7 @@ changequote([,])dnl esac])dnl dnl Get a default for CC_FOR_BUILD to put into Makefile. -AC_DEFUN(BFD_CC_FOR_BUILD, +AC_DEFUN([BFD_CC_FOR_BUILD], [# Put a plausible default for CC_FOR_BUILD in Makefile. if test -z "$CC_FOR_BUILD"; then if test "x$cross_compiling" = "xno"; then @@ -44,7 +44,7 @@ fi AC_SUBST(EXEEXT_FOR_BUILD)])dnl dnl See whether we need a declaration for a function. -AC_DEFUN(BFD_NEED_DECLARATION, +AC_DEFUN([BFD_NEED_DECLARATION], [AC_MSG_CHECKING([whether $1 must be declared]) AC_CACHE_VAL(bfd_cv_decl_needed_$1, [AC_TRY_COMPILE([ @@ -73,7 +73,7 @@ fi dnl Check for existence of a type $1 in sys/procfs.h -AC_DEFUN(BFD_HAVE_SYS_PROCFS_TYPE, +AC_DEFUN([BFD_HAVE_SYS_PROCFS_TYPE], [AC_MSG_CHECKING([for $1 in sys/procfs.h]) AC_CACHE_VAL(bfd_cv_have_sys_procfs_type_$1, [AC_TRY_COMPILE([ @@ -93,7 +93,7 @@ AC_DEFUN(BFD_HAVE_SYS_PROCFS_TYPE, dnl Check for existence of member $2 in type $1 in sys/procfs.h -AC_DEFUN(BFD_HAVE_SYS_PROCFS_TYPE_MEMBER, +AC_DEFUN([BFD_HAVE_SYS_PROCFS_TYPE_MEMBER], [AC_MSG_CHECKING([for $1.$2 in sys/procfs.h]) AC_CACHE_VAL(bfd_cv_have_sys_procfs_type_member_$1_$2, [AC_TRY_COMPILE([ diff -uprN binutils-2.14.90.0.8/bfd/archures.c binutils-2.15.90.0.1/bfd/archures.c --- binutils-2.14.90.0.8/bfd/archures.c 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/archures.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,6 +1,6 @@ /* BFD library support routines for architectures. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Hacked by John Gilmore and Steve Chamberlain of Cygnus Support. @@ -230,6 +230,7 @@ DESCRIPTION .#define bfd_mach_sh3e 0x3e .#define bfd_mach_sh4 0x40 .#define bfd_mach_sh4_nofpu 0x41 +.#define bfd_mach_sh4_nommu_nofpu 0x42 .#define bfd_mach_sh4a 0x4a .#define bfd_mach_sh4a_nofpu 0x4b .#define bfd_mach_sh4al_dsp 0x4d @@ -285,6 +286,7 @@ DESCRIPTION .#define bfd_mach_frvsimple 2 .#define bfd_mach_fr300 300 .#define bfd_mach_fr400 400 +.#define bfd_mach_fr450 450 .#define bfd_mach_frvtomcat 499 {* fr500 prototype *} .#define bfd_mach_fr500 500 .#define bfd_mach_fr550 550 diff -uprN binutils-2.14.90.0.8/bfd/bfd-in.h binutils-2.15.90.0.1/bfd/bfd-in.h --- binutils-2.14.90.0.8/bfd/bfd-in.h 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/bfd-in.h 2004-03-03 12:24:33.000000000 -0800 @@ -1,7 +1,7 @@ /* Main header file for the bfd library -- portable access to object files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Cygnus Support. @@ -160,16 +160,10 @@ typedef unsigned long bfd_size_type; #endif /* not BFD64 */ -/* A pointer to a position in a file. */ -/* FIXME: This should be using off_t from . - For now, try to avoid breaking stuff by not including here. - This will break on systems with 64-bit file offsets (e.g. 4.4BSD). - Probably the best long-term answer is to avoid using file_ptr AND off_t - in this header file, and to handle this in the BFD implementation - rather than in its interface. */ -/* typedef off_t file_ptr; */ -typedef bfd_signed_vma file_ptr; -typedef bfd_vma ufile_ptr; +/* An offset into a file. BFD always uses the largest possible offset + based on the build time availability of fseek, fseeko, or fseeko64. */ +typedef @bfd_file_ptr@ file_ptr; +typedef unsigned @bfd_file_ptr@ ufile_ptr; extern void bfd_sprintf_vma (bfd *, char *, bfd_vma); extern void bfd_fprintf_vma (bfd *, void *, bfd_vma); @@ -456,7 +450,7 @@ extern void bfd_hash_traverse extern bfd_size_type bfd_bread (void *, bfd_size_type, bfd *); extern bfd_size_type bfd_bwrite (const void *, bfd_size_type, bfd *); extern int bfd_seek (bfd *, file_ptr, int); -extern ufile_ptr bfd_tell (bfd *); +extern file_ptr bfd_tell (bfd *); extern int bfd_flush (bfd *); extern int bfd_stat (bfd *, struct stat *); diff -uprN binutils-2.14.90.0.8/bfd/bfd-in2.h binutils-2.15.90.0.1/bfd/bfd-in2.h --- binutils-2.14.90.0.8/bfd/bfd-in2.h 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/bfd-in2.h 2004-03-03 12:24:33.000000000 -0800 @@ -8,7 +8,7 @@ /* Main header file for the bfd library -- portable access to object files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Cygnus Support. @@ -167,16 +167,10 @@ typedef unsigned long bfd_size_type; #endif /* not BFD64 */ -/* A pointer to a position in a file. */ -/* FIXME: This should be using off_t from . - For now, try to avoid breaking stuff by not including here. - This will break on systems with 64-bit file offsets (e.g. 4.4BSD). - Probably the best long-term answer is to avoid using file_ptr AND off_t - in this header file, and to handle this in the BFD implementation - rather than in its interface. */ -/* typedef off_t file_ptr; */ -typedef bfd_signed_vma file_ptr; -typedef bfd_vma ufile_ptr; +/* An offset into a file. BFD always uses the largest possible offset + based on the build time availability of fseek, fseeko, or fseeko64. */ +typedef @bfd_file_ptr@ file_ptr; +typedef unsigned @bfd_file_ptr@ ufile_ptr; extern void bfd_sprintf_vma (bfd *, char *, bfd_vma); extern void bfd_fprintf_vma (bfd *, void *, bfd_vma); @@ -463,7 +457,7 @@ extern void bfd_hash_traverse extern bfd_size_type bfd_bread (void *, bfd_size_type, bfd *); extern bfd_size_type bfd_bwrite (const void *, bfd_size_type, bfd *); extern int bfd_seek (bfd *, file_ptr, int); -extern ufile_ptr bfd_tell (bfd *); +extern file_ptr bfd_tell (bfd *); extern int bfd_flush (bfd *); extern int bfd_stat (bfd *, struct stat *); @@ -1668,6 +1662,7 @@ enum bfd_architecture #define bfd_mach_sh3e 0x3e #define bfd_mach_sh4 0x40 #define bfd_mach_sh4_nofpu 0x41 +#define bfd_mach_sh4_nommu_nofpu 0x42 #define bfd_mach_sh4a 0x4a #define bfd_mach_sh4a_nofpu 0x4b #define bfd_mach_sh4al_dsp 0x4d @@ -1723,6 +1718,7 @@ enum bfd_architecture #define bfd_mach_frvsimple 2 #define bfd_mach_fr300 300 #define bfd_mach_fr400 400 +#define bfd_mach_fr450 450 #define bfd_mach_frvtomcat 499 /* fr500 prototype */ #define bfd_mach_fr500 500 #define bfd_mach_fr550 550 @@ -3377,6 +3373,10 @@ value and a 8-bit page number. The symb to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ BFD_RELOC_M68HC11_24, +/* Motorola 68HC12 reloc. +This is the 5 bits of a value. */ + BFD_RELOC_M68HC12_5B, + /* These relocs are only used within the CRIS assembler. They are not (at present) written to any object files. */ BFD_RELOC_CRIS_BDISP8, diff -uprN binutils-2.14.90.0.8/bfd/bfdio.c binutils-2.15.90.0.1/bfd/bfdio.c --- binutils-2.14.90.0.8/bfd/bfdio.c 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/bfdio.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,6 +1,8 @@ /* Low-level I/O routines for BFDs. - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + + Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -36,6 +38,30 @@ Foundation, Inc., 59 Temple Place - Suit #define S_IXOTH 0001 /* Execute by others. */ #endif +file_ptr +real_ftell (FILE *file) +{ +#if defined (HAVE_FTELLO64) + return ftello64 (file); +#elif defined (HAVE_FTELLO) + return ftello (file); +#else + return ftell (file); +#endif +} + +int +real_fseek (FILE *file, file_ptr offset, int whence) +{ +#if defined (HAVE_FSEEKO64) + return fseeko64 (file, offset, whence); +#elif defined (HAVE_FSEEKO) + return fseeko (file, offset, whence); +#else + return fseek (file, offset, whence); +#endif +} + /* Note that archive entries don't have streams; they share their parent's. This allows someone to play with the iostream behind BFD's back. @@ -162,7 +188,7 @@ bfd_bwrite (const void *ptr, bfd_size_ty return nwrote; } -bfd_vma +file_ptr bfd_tell (bfd *abfd) { file_ptr ptr; @@ -170,7 +196,7 @@ bfd_tell (bfd *abfd) if ((abfd->flags & BFD_IN_MEMORY) != 0) return abfd->where; - ptr = ftell (bfd_cache_lookup (abfd)); + ptr = real_ftell (bfd_cache_lookup (abfd)); if (abfd->my_archive) ptr -= abfd->origin; @@ -217,7 +243,7 @@ bfd_seek (bfd *abfd, file_ptr position, { int result; FILE *f; - long file_position; + file_ptr file_position; /* For the time being, a BFD may not seek to it's end. The problem is that we don't easily have a way to recognize the end of an element in an archive. */ @@ -278,7 +304,7 @@ bfd_seek (bfd *abfd, file_ptr position, tripping the abort, we can probably safely disable this code, so that the real optimizations happen. */ file_ptr where_am_i_now; - where_am_i_now = ftell (bfd_cache_lookup (abfd)); + where_am_i_now = real_ftell (bfd_cache_lookup (abfd)); if (abfd->my_archive) where_am_i_now -= abfd->origin; if (where_am_i_now != abfd->where) @@ -307,7 +333,7 @@ bfd_seek (bfd *abfd, file_ptr position, if (direction == SEEK_SET && abfd->my_archive != NULL) file_position += abfd->origin; - result = fseek (f, file_position, direction); + result = real_fseek (f, file_position, direction); if (result != 0) { int hold_errno = errno; diff -uprN binutils-2.14.90.0.8/bfd/cache.c binutils-2.15.90.0.1/bfd/cache.c --- binutils-2.14.90.0.8/bfd/cache.c 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/cache.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,6 +1,8 @@ /* BFD library -- caching of file descriptors. - Copyright 1990, 1991, 1992, 1993, 1994, 1996, 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + + Copyright 1990, 1991, 1992, 1993, 1994, 1996, 2000, 2001, 2002, + 2003, 2004 Free Software Foundation, Inc. + Hacked by Steve Chamberlain of Cygnus Support (steve@cygnus.com). This file is part of BFD, the Binary File Descriptor library. @@ -155,7 +157,7 @@ close_one (void) return TRUE; } - kill->where = ftell ((FILE *) kill->iostream); + kill->where = real_ftell ((FILE *) kill->iostream); return bfd_cache_delete (kill); } @@ -356,7 +358,7 @@ bfd_cache_lookup_worker (bfd *abfd) return NULL; if (abfd->where != (unsigned long) abfd->where) return NULL; - if (fseek ((FILE *) abfd->iostream, (long) abfd->where, SEEK_SET) != 0) + if (real_fseek ((FILE *) abfd->iostream, abfd->where, SEEK_SET) != 0) return NULL; } diff -uprN binutils-2.14.90.0.8/bfd/coff-h8300.c binutils-2.15.90.0.1/bfd/coff-h8300.c --- binutils-2.14.90.0.8/bfd/coff-h8300.c 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/coff-h8300.c 2004-03-03 12:24:33.000000000 -0800 @@ -265,8 +265,8 @@ static reloc_howto_type howto_table[] = the function vector's entry in the jsr instruction. */ HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), - /* Internal reloc for relaxing. This is created when a 16bit pc-relative - branch is turned into an 8bit pc-relative branch. */ + /* Internal reloc for relaxing. This is created when a 16-bit pc-relative + branch is turned into an 8-bit pc-relative branch. */ HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), @@ -458,8 +458,8 @@ h8300_reloc16_estimate (bfd *abfd, asect /* Only examine the relocs which might be relaxable. */ switch (reloc->howto->type) { - /* This is the 16/24 bit absolute branch which could become an 8 bit - pc-relative branch. */ + /* This is the 16-/24-bit absolute branch which could become an + 8-bit pc-relative branch. */ case R_JMP1: case R_JMPL1: /* Get the address of the target of this branch. */ @@ -547,7 +547,7 @@ h8300_reloc16_estimate (bfd *abfd, asect } break; - /* This is the 16 bit pc-relative branch which could become an 8 bit + /* This is the 16-bit pc-relative branch which could become an 8-bit pc-relative branch. */ case R_PCRWORD: /* Get the address of the target of this branch, add one to the value @@ -575,8 +575,8 @@ h8300_reloc16_estimate (bfd *abfd, asect } break; - /* This is a 16 bit absolute address in a mov.b insn, which can - become an 8 bit absolute address if it's in the right range. */ + /* This is a 16-bit absolute address in a mov.b insn, which can + become an 8-bit absolute address if it's in the right range. */ case R_MOV16B1: /* Get the address of the data referenced by this mov.b insn. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -595,9 +595,9 @@ h8300_reloc16_estimate (bfd *abfd, asect } break; - /* Similarly for a 24 bit absolute address in a mov.b. Note that - if we can't relax this into an 8 bit absolute, we'll fall through - and try to relax it into a 16bit absolute. */ + /* Similarly for a 24-bit absolute address in a mov.b. Note that + if we can't relax this into an 8-bit absolute, we'll fall through + and try to relax it into a 16-bit absolute. */ case R_MOV24B1: /* Get the address of the data referenced by this mov.b insn. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -616,11 +616,11 @@ h8300_reloc16_estimate (bfd *abfd, asect break; } - /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit + /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit reloc. */ - /* This is a 24/32 bit absolute address in a mov insn, which can - become an 16 bit absolute address if it's in the right range. */ + /* This is a 24-/32-bit absolute address in a mov insn, which can + become an 16-bit absolute address if it's in the right range. */ case R_MOVL1: /* Get the address of the data referenced by this mov insn. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -670,7 +670,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st switch (reloc->howto->type) { - /* Generic 8bit pc-relative relocation. */ + /* Generic 8-bit pc-relative relocation. */ case R_PCRBYTE: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -700,7 +700,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st /* All done. */ break; - /* Generic 16bit pc-relative relocation. */ + /* Generic 16-bit pc-relative relocation. */ case R_PCRWORD: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -731,7 +731,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st /* All done. */ break; - /* Generic 8bit absolute relocation. */ + /* Generic 8-bit absolute relocation. */ case R_RELBYTE: /* Get the address of the object referenced by this insn. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -743,7 +743,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st /* All done. */ break; - /* Various simple 16bit absolute relocations. */ + /* Various simple 16-bit absolute relocations. */ case R_MOV16B1: case R_JMP1: case R_RELWORD: @@ -753,7 +753,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st src_address += 2; break; - /* Various simple 24/32bit absolute relocations. */ + /* Various simple 24-/32-bit absolute relocations. */ case R_MOV24B1: case R_MOVL1: case R_RELLONG: @@ -764,7 +764,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st src_address += 4; break; - /* Another 24/32bit absolute relocation. */ + /* Another 24-/32-bit absolute relocation. */ case R_JMPL1: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -776,8 +776,15 @@ h8300_reloc16_extra_cases (bfd *abfd, st src_address += 4; break; - /* A 16bit absolute relocation that was formerly a 24/32bit - absolute relocation. */ + /* This is a 24-/32-bit absolute address in one of the following + instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", "bixor", + "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", + "stc.w" and "mov.[bwl]" + + We may relax this into an 16-bit absolute address if it's in + the right range. */ case R_MOVL2: value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); value = bfd_h8300_pad_address (abfd, value); @@ -785,11 +792,12 @@ h8300_reloc16_extra_cases (bfd *abfd, st /* Sanity check. */ if (value <= 0x7fff || value >= 0xffff8000u) { - /* Insert the 16bit value into the proper location. */ + /* Insert the 16-bit value into the proper location. */ bfd_put_16 (abfd, value, data + dst_address); - /* Fix the opcode. For all the move insns, we simply - need to turn off bit 0x20 in the previous byte. */ + /* Fix the opcode. For all the instructions that belong to + this relaxation, we simply need to turn off bit 0x20 in + the previous byte. */ data[dst_address - 1] &= ~0x20; dst_address += 2; src_address += 4; @@ -804,7 +812,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st } break; - /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */ + /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ case R_JMP2: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -834,7 +842,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st bfd_put_8 (abfd, 0x55, data + dst_address - 1); break; case 0x5a: - /* jmp ->bra */ + /* jmp -> bra */ bfd_put_8 (abfd, 0x40, data + dst_address - 1); break; @@ -842,7 +850,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st abort (); } - /* Write out the 8bit value. */ + /* Write out the 8-bit value. */ bfd_put_8 (abfd, gap, data + dst_address); dst_address += 1; @@ -850,7 +858,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st break; - /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */ + /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ case R_PCRWORD_B: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -877,12 +885,15 @@ h8300_reloc16_extra_cases (bfd *abfd, st { case 0x58: /* bCC:16 -> bCC:8 */ - /* Get the condition code from the original insn. */ + /* Get the second byte of the original insn, which contains + the condition code. */ tmp = data[dst_address - 1]; + + /* Compute the fisrt byte of the relaxed instruction. The + original sequence 0x58 0xX0 is relaxed to 0x4X, where X + represents the condition code. */ tmp &= 0xf0; tmp >>= 4; - - /* Now or in the high nibble of the opcode. */ tmp |= 0x40; /* Write it. */ @@ -901,13 +912,13 @@ h8300_reloc16_extra_cases (bfd *abfd, st /* Output the target. */ bfd_put_8 (abfd, gap, data + dst_address - 1); - /* We don't advance dst_address -- the 8bit reloc is applied at + /* We don't advance dst_address -- the 8-bit reloc is applied at dst_address - 1, so the next insn should begin at dst_address. */ src_address += 2; break; - /* Similarly for a 24bit absolute that is now 8 bits. */ + /* Similarly for a 24-bit absolute that is now 8 bits. */ case R_JMPL2: /* Get the address of the target of this branch. */ value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); @@ -940,15 +951,26 @@ h8300_reloc16_extra_cases (bfd *abfd, st break; - /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */ + /* This is a 16-bit absolute address in one of the following + instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", "bixor", + "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and + "mov.b" + + We may relax this into an 8-bit absolute address if it's in + the right range. */ case R_MOV16B2: value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - /* Sanity check. */ + /* All instructions with R_H8_DIR16B2 start with 0x6a. */ if (data[dst_address - 2] != 0x6a) abort (); temp_code = data[src_address - 1]; + + /* If this is a mov.b instruction, clear the lower nibble, which + contains the source/destination register number. */ if ((temp_code & 0x10) != 0x10) temp_code &= 0xf0; @@ -956,15 +978,23 @@ h8300_reloc16_extra_cases (bfd *abfd, st switch (temp_code) { case 0x00: + /* This is mov.b @aa:16,Rd. */ data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; break; case 0x80: + /* This is mov.b Rs,@aa:16. */ data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; break; case 0x18: + /* This is a bit-maniputation instruction that stores one + bit into memory, one of "bclr", "bist", "bnot", "bset", + and "bst". */ data[dst_address - 2] = 0x7f; break; case 0x10: + /* This is a bit-maniputation instruction that loads one bit + from memory, one of "band", "biand", "bild", "bior", + "bixor", "bld", "bor", "btst", and "bxor". */ data[dst_address - 2] = 0x7e; break; default: @@ -975,15 +1005,26 @@ h8300_reloc16_extra_cases (bfd *abfd, st src_address += 2; break; - /* Similarly for a 24bit mov.b */ + /* This is a 24-bit absolute address in one of the following + instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", "bixor", + "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and + "mov.b" + + We may relax this into an 8-bit absolute address if it's in + the right range. */ case R_MOV24B2: value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); - /* Sanity check. */ + /* All instructions with R_MOV24B2 start with 0x6a. */ if (data[dst_address - 2] != 0x6a) abort (); temp_code = data[src_address - 1]; + + /* If this is a mov.b instruction, clear the lower nibble, which + contains the source/destination register number. */ if ((temp_code & 0x30) != 0x30) temp_code &= 0xf0; @@ -991,15 +1032,23 @@ h8300_reloc16_extra_cases (bfd *abfd, st switch (temp_code) { case 0x20: + /* This is mov.b @aa:24/32,Rd. */ data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; break; case 0xa0: + /* This is mov.b Rs,@aa:24/32. */ data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; break; case 0x38: + /* This is a bit-maniputation instruction that stores one + bit into memory, one of "bclr", "bist", "bnot", "bset", + and "bst". */ data[dst_address - 2] = 0x7f; break; case 0x30: + /* This is a bit-maniputation instruction that loads one bit + from memory, one of "band", "biand", "bild", "bior", + "bixor", "bld", "bor", "btst", and "bxor". */ data[dst_address - 2] = 0x7e; break; default: @@ -1046,7 +1095,7 @@ h8300_reloc16_extra_cases (bfd *abfd, st src_address += 4; break; - /* An 8bit memory indirect instruction (jmp/jsr). + /* An 8-bit memory indirect instruction (jmp/jsr). There's several things that need to be done to handle this relocation. diff -uprN binutils-2.14.90.0.8/bfd/config.in binutils-2.15.90.0.1/bfd/config.in --- binutils-2.14.90.0.8/bfd/config.in 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/config.in 2004-03-03 12:24:33.000000000 -0800 @@ -61,6 +61,18 @@ /* Define if you have the fdopen function. */ #undef HAVE_FDOPEN +/* Define if you have the fseeko function. */ +#undef HAVE_FSEEKO + +/* Define if you have the fseeko64 function. */ +#undef HAVE_FSEEKO64 + +/* Define if you have the ftello function. */ +#undef HAVE_FTELLO + +/* Define if you have the ftello64 function. */ +#undef HAVE_FTELLO64 + /* Define if you have the getcwd function. */ #undef HAVE_GETCWD @@ -190,6 +202,12 @@ /* Define as 1 if you have gettext and don't want to use GNU gettext. */ #undef HAVE_GETTEXT +/* The number of bytes in type long long */ +#undef SIZEOF_LONG_LONG + +/* The number of bytes in type long */ +#undef SIZEOF_LONG + /* Use b modifier when opening binary files? */ #undef USE_BINARY_FOPEN @@ -262,6 +280,9 @@ /* Name of host specific header file to include in trad-core.c. */ #undef TRAD_HEADER +/* The number of bytes in type off_t */ +#undef SIZEOF_OFF_T + /* Use mmap if it's available? */ #undef USE_MMAP diff -uprN binutils-2.14.90.0.8/bfd/configure binutils-2.15.90.0.1/bfd/configure --- binutils-2.14.90.0.8/bfd/configure 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/configure 2004-03-03 12:24:33.000000000 -0800 @@ -919,7 +919,7 @@ fi PACKAGE=bfd -VERSION=2.14.90.0.8 +VERSION=2.15.90.0.1 if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; } @@ -6621,6 +6621,124 @@ esac +# Determine the host dependant file_ptr a.k.a. off_t type. In order +# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and +# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long. +# Hopefully a reasonable assumption since fseeko et.al. should be +# upward compatible. +for ac_func in ftello ftello64 fseeko fseeko64 +do +echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 +echo "configure:6633: checking for $ac_func" >&5 +if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + cat > conftest.$ac_ext < +/* Override any gcc2 internal prototype to avoid an error. */ +/* We use char because int might match the return type of a gcc2 + builtin and then its argument prototype would still apply. */ +char $ac_func(); + +int main() { + +/* The GNU C library defines this for functions which it implements + to always fail with ENOSYS. Some functions are actually named + something starting with __ and the normal name is an alias. */ +#if defined (__stub_$ac_func) || defined (__stub___$ac_func) +choke me +#else +$ac_func(); +#endif + +; return 0; } +EOF +if { (eval echo configure:6661: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then + rm -rf conftest* + eval "ac_cv_func_$ac_func=yes" +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 + rm -rf conftest* + eval "ac_cv_func_$ac_func=no" +fi +rm -f conftest* +fi + +if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then + echo "$ac_t""yes" 1>&6 + ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` + cat >> confdefs.h <&6 +fi +done + +echo $ac_n "checking file_ptr type""... $ac_c" 1>&6 +echo "configure:6686: checking file_ptr type" >&5 +bfd_file_ptr="long" +bfd_ufile_ptr="unsigned long" +if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then + echo $ac_n "checking size of off_t""... $ac_c" 1>&6 +echo "configure:6691: checking size of off_t" >&5 +if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then + echo $ac_n "(cached) $ac_c" 1>&6 +else + for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence. + cat > conftest.$ac_ext < + + +int main() { +switch (0) case 0: case (sizeof (off_t) == $ac_size):; +; return 0; } +EOF +if { (eval echo configure:6707: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + rm -rf conftest* + ac_cv_sizeof_off_t=$ac_size +else + echo "configure: failed program was:" >&5 + cat conftest.$ac_ext >&5 +fi +rm -f conftest* + if test x$ac_cv_sizeof_off_t != x ; then break; fi +done + +fi + +if test x$ac_cv_sizeof_off_t = x ; then + { echo "configure: error: cannot determine a size for off_t" 1>&2; exit 1; } +fi +echo "$ac_t""$ac_cv_sizeof_off_t" 1>&6 +cat >> confdefs.h <&6 + + + + tdefaults="" test -n "${defvec}" && tdefaults="${tdefaults} -DDEFAULT_VECTOR=${defvec}" test -n "${selvecs}" && tdefaults="${tdefaults} -DSELECT_VECS='${selvecs}'" @@ -6633,17 +6751,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:6637: checking for $ac_hdr" >&5 +echo "configure:6755: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:6647: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:6765: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -6672,12 +6790,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6676: checking for $ac_func" >&5 +echo "configure:6794: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6822: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -6725,7 +6843,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:6729: checking for working mmap" >&5 +echo "configure:6847: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -6733,7 +6851,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:7008: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -6911,12 +7029,12 @@ fi for ac_func in madvise mprotect do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6915: checking for $ac_func" >&5 +echo "configure:7033: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:7061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -7189,6 +7307,8 @@ s%@all_backends@%$all_backends%g s%@bfd_backends@%$bfd_backends%g s%@bfd_machines@%$bfd_machines%g s%@bfd_default_target_size@%$bfd_default_target_size%g +s%@bfd_file_ptr@%$bfd_file_ptr%g +s%@bfd_ufile_ptr@%$bfd_ufile_ptr%g s%@tdefaults@%$tdefaults%g CEOF diff -uprN binutils-2.14.90.0.8/bfd/configure.host binutils-2.15.90.0.1/bfd/configure.host --- binutils-2.14.90.0.8/bfd/configure.host 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/configure.host 2004-03-03 12:24:33.000000000 -0800 @@ -19,7 +19,11 @@ HOST_U_64BIT_TYPE= case "${host}" in -hppa*-*-hpux*) HDEFINES=-DHOST_HPPAHPUX ;; +hppa*-*-hpux*) # HP/UX's ftello64 et.al. declarations are only + # visible when _LARGEFILE64_SOURCE is defined. + # Without those declarations, real_ftell et.al. + # get mis-compiled. + HDEFINES="-DHOST_HPPAHPUX -D_LARGEFILE64_SOURCE" ;; hppa*-*-hiux*) HDEFINES=-DHOST_HPPAHPUX ;; hppa*-*-mpeix*) HDEFINES=-DHOST_HPPAMPEIX ;; hppa*-*-bsd*) HDEFINES=-DHOST_HPPABSD ;; diff -uprN binutils-2.14.90.0.8/bfd/configure.in binutils-2.15.90.0.1/bfd/configure.in --- binutils-2.14.90.0.8/bfd/configure.in 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/configure.in 2004-03-03 12:24:33.000000000 -0800 @@ -7,7 +7,7 @@ AC_INIT(libbfd.c) AC_CANONICAL_SYSTEM AC_ISC_POSIX -AM_INIT_AUTOMAKE(bfd, 2.14.90.0.8) +AM_INIT_AUTOMAKE(bfd, 2.15.90.0.1) # Uncomment the next line to remove the date from the reported bfd version #is_release=y @@ -917,6 +917,31 @@ AC_SUBST(bfd_backends) AC_SUBST(bfd_machines) AC_SUBST(bfd_default_target_size) +# Determine the host dependant file_ptr a.k.a. off_t type. In order +# prefer: off64_t - if ftello64 and fseeko64, off_t - if ftello and +# fseeko, long. This assumes that sizeof off_t is .ge. sizeof long. +# Hopefully a reasonable assumption since fseeko et.al. should be +# upward compatible. +AC_CHECK_FUNCS(ftello ftello64 fseeko fseeko64) +AC_MSG_CHECKING([file_ptr type]) +bfd_file_ptr="long" +bfd_ufile_ptr="unsigned long" +if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then + AC_COMPILE_CHECK_SIZEOF(off_t) + if test "x${ac_cv_sizeof_off_t}" = "x8"; then + bfd_file_ptr=BFD_HOST_64_BIT + bfd_ufile_ptr=BFD_HOST_U_64_BIT + fi +fi +if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes; then + bfd_file_ptr=BFD_HOST_64_BIT + bfd_ufile_ptr=BFD_HOST_U_64_BIT +fi +AC_MSG_RESULT($bfd_file_ptr) +AC_SUBST(bfd_file_ptr) +AC_SUBST(bfd_ufile_ptr) + + tdefaults="" test -n "${defvec}" && tdefaults="${tdefaults} -DDEFAULT_VECTOR=${defvec}" test -n "${selvecs}" && tdefaults="${tdefaults} -DSELECT_VECS='${selvecs}'" diff -uprN binutils-2.14.90.0.8/bfd/cpu-frv.c binutils-2.15.90.0.1/bfd/cpu-frv.c --- binutils-2.14.90.0.8/bfd/cpu-frv.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/cpu-frv.c 2004-03-03 12:24:33.000000000 -0800 @@ -43,8 +43,11 @@ static const bfd_arch_info_type arch_inf static const bfd_arch_info_type arch_info_400 = FRV_ARCH (bfd_mach_fr400, "fr400", FALSE, &arch_info_300); +static const bfd_arch_info_type arch_info_450 + = FRV_ARCH (bfd_mach_fr450, "fr450", FALSE, &arch_info_400); + static const bfd_arch_info_type arch_info_500 - = FRV_ARCH (bfd_mach_fr500, "fr500", FALSE, &arch_info_400); + = FRV_ARCH (bfd_mach_fr500, "fr500", FALSE, &arch_info_450); static const bfd_arch_info_type arch_info_550 = FRV_ARCH (bfd_mach_fr550, "fr550", FALSE, &arch_info_500); diff -uprN binutils-2.14.90.0.8/bfd/cpu-sh.c binutils-2.15.90.0.1/bfd/cpu-sh.c --- binutils-2.14.90.0.8/bfd/cpu-sh.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/cpu-sh.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,5 +1,5 @@ /* BFD library support routines for the Renesas / SuperH SH architecture. - Copyright 1993, 1994, 1997, 1998, 2000, 2001, 2002, 2003 + Copyright 1993, 1994, 1997, 1998, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Hacked by Steve Chamberlain of Cygnus Support. @@ -34,7 +34,8 @@ #define SH4A_NEXT &arch_info_struct[8] #define SH4AL_DSP_NEXT &arch_info_struct[9] #define SH4_NOFPU_NEXT &arch_info_struct[10] -#define SH4A_NOFPU_NEXT &arch_info_struct[11] +#define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[11] +#define SH4A_NOFPU_NEXT &arch_info_struct[12] #define SH64_NEXT NULL static const bfd_arch_info_type arch_info_struct[] = @@ -184,6 +185,20 @@ static const bfd_arch_info_type arch_inf 32, /* 32 bits in an address */ 8, /* 8 bits in a byte */ bfd_arch_sh, + bfd_mach_sh4_nommu_nofpu, + "sh", /* arch_name */ + "sh4-nommu-nofpu", /* printable name */ + 1, + FALSE, /* not the default */ + bfd_default_compatible, + bfd_default_scan, + SH4_NOMMU_NOFPU_NEXT + }, + { + 32, /* 32 bits in a word */ + 32, /* 32 bits in an address */ + 8, /* 8 bits in a byte */ + bfd_arch_sh, bfd_mach_sh4a_nofpu, "sh", /* arch_name */ "sh4a-nofpu", /* printable name */ diff -uprN binutils-2.14.90.0.8/bfd/elf-bfd.h binutils-2.15.90.0.1/bfd/elf-bfd.h --- binutils-2.14.90.0.8/bfd/elf-bfd.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf-bfd.h 2004-03-03 12:24:33.000000000 -0800 @@ -576,6 +576,11 @@ struct elf_backend_data int (*elf_backend_get_symbol_type) (Elf_Internal_Sym *, int); + /* Return true if local section symbols should have a non-null st_name. + NULL implies false. */ + bfd_boolean (*elf_backend_name_local_section_symbols) + (bfd *); + /* A function to do additional processing on the ELF section header just before writing it out. This is used to set the flags and type fields for some sections, or to actually write out data for @@ -855,6 +860,24 @@ struct elf_backend_data bfd_boolean (*elf_backend_ignore_discarded_relocs) (asection *); + /* These functions tell elf-eh-frame whether to attempt to turn + absolute or lsda encodings into pc-relative ones. The default + definition enables these transformations. */ + bfd_boolean (*elf_backend_can_make_relative_eh_frame) + (bfd *, struct bfd_link_info *, asection *); + bfd_boolean (*elf_backend_can_make_lsda_relative_eh_frame) + (bfd *, struct bfd_link_info *, asection *); + + /* This function returns an encoding after computing the encoded + value (and storing it in ENCODED) for the given OFFSET into OSEC, + to be stored in at LOC_OFFSET into the LOC_SEC input section. + The default definition chooses a 32-bit PC-relative encoding. */ + bfd_byte (*elf_backend_encode_eh_address) + (bfd *abfd, struct bfd_link_info *info, + asection *osec, bfd_vma offset, + asection *loc_sec, bfd_vma loc_offset, + bfd_vma *encoded); + /* This function, if defined, may write out the given section. Returns TRUE if it did so and FALSE if the caller should. */ bfd_boolean (*elf_backend_write_section) @@ -1296,6 +1319,12 @@ extern void _bfd_elf_sprintf_vma extern void _bfd_elf_fprintf_vma (bfd *, void *, bfd_vma); +extern bfd_byte _bfd_elf_encode_eh_address + (bfd *abfd, struct bfd_link_info *info, asection *osec, bfd_vma offset, + asection *loc_sec, bfd_vma loc_offset, bfd_vma *encoded); +extern bfd_boolean _bfd_elf_can_make_relative + (bfd *input_bfd, struct bfd_link_info *info, asection *eh_frame_section); + extern enum elf_reloc_type_class _bfd_elf_reloc_type_class (const Elf_Internal_Rela *); extern bfd_vma _bfd_elf_rela_local_sym @@ -1518,6 +1547,9 @@ extern bfd_boolean _bfd_elf_dynamic_symb extern bfd_boolean _bfd_elf_symbol_refs_local_p (struct elf_link_hash_entry *, struct bfd_link_info *, bfd_boolean); +extern bfd_boolean _bfd_elf_link_add_archive_symbols + (bfd *, struct bfd_link_info *); + extern const bfd_target *bfd_elf32_object_p (bfd *); extern const bfd_target *bfd_elf32_core_file_p diff -uprN binutils-2.14.90.0.8/bfd/elf-eh-frame.c binutils-2.15.90.0.1/bfd/elf-eh-frame.c --- binutils-2.14.90.0.8/bfd/elf-eh-frame.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf-eh-frame.c 2004-03-03 12:24:33.000000000 -0800 @@ -518,10 +518,16 @@ _bfd_elf_discard_section_eh_frame /* For shared libraries, try to get rid of as many RELATIVE relocs as possible. */ if (info->shared + && (get_elf_backend_data (abfd) + ->elf_backend_can_make_relative_eh_frame + (abfd, info, sec)) && (cie.fde_encoding & 0xf0) == DW_EH_PE_absptr) cie.make_relative = 1; if (info->shared + && (get_elf_backend_data (abfd) + ->elf_backend_can_make_lsda_relative_eh_frame + (abfd, info, sec)) && (cie.lsda_encoding & 0xf0) == DW_EH_PE_absptr) cie.make_lsda_relative = 1; @@ -1120,6 +1126,7 @@ _bfd_elf_write_section_eh_frame_hdr (bfd asection *eh_frame_sec; bfd_size_type size; bfd_boolean retval; + bfd_vma encoded_eh_frame; htab = elf_hash_table (info); hdr_info = &htab->eh_info; @@ -1143,7 +1150,10 @@ _bfd_elf_write_section_eh_frame_hdr (bfd memset (contents, 0, EH_FRAME_HDR_SIZE); contents[0] = 1; /* Version. */ - contents[1] = DW_EH_PE_pcrel | DW_EH_PE_sdata4; /* .eh_frame offset. */ + contents[1] = get_elf_backend_data (abfd)->elf_backend_encode_eh_address + (abfd, info, eh_frame_sec, 0, sec, 4, + &encoded_eh_frame); /* .eh_frame offset. */ + if (hdr_info->array && hdr_info->array_count == hdr_info->fde_count) { contents[2] = DW_EH_PE_udata4; /* FDE count encoding. */ @@ -1154,8 +1164,8 @@ _bfd_elf_write_section_eh_frame_hdr (bfd contents[2] = DW_EH_PE_omit; contents[3] = DW_EH_PE_omit; } - bfd_put_32 (abfd, eh_frame_sec->vma - sec->output_section->vma - 4, - contents + 4); + bfd_put_32 (abfd, encoded_eh_frame, contents + 4); + if (contents[2] != DW_EH_PE_omit) { unsigned int i; @@ -1181,3 +1191,29 @@ _bfd_elf_write_section_eh_frame_hdr (bfd free (contents); return retval; } + +/* Decide whether we can use a PC-relative encoding within the given + EH frame section. This is the default implementation. */ + +bfd_boolean +_bfd_elf_can_make_relative (bfd *input_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *eh_frame_section ATTRIBUTE_UNUSED) +{ + return TRUE; +} + +/* Select an encoding for the given address. Preference is given to + PC-relative addressing modes. */ + +bfd_byte +_bfd_elf_encode_eh_address (bfd *abfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *osec, bfd_vma offset, + asection *loc_sec, bfd_vma loc_offset, + bfd_vma *encoded) +{ + *encoded = osec->vma + offset - + (loc_sec->output_section->vma + loc_sec->output_offset + loc_offset); + return DW_EH_PE_pcrel | DW_EH_PE_sdata4; +} diff -uprN binutils-2.14.90.0.8/bfd/elf.c binutils-2.15.90.0.1/bfd/elf.c --- binutils-2.14.90.0.8/bfd/elf.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,6 +1,7 @@ /* ELF executable support for BFD. - Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003 Free Software Foundation, Inc. + + Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, + 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -3571,6 +3572,35 @@ elf_sort_sections (const void *arg1, con return sec1->target_index - sec2->target_index; } +/* Ian Lance Taylor writes: + + We shouldn't be using % with a negative signed number. That's just + not good. We have to make sure either that the number is not + negative, or that the number has an unsigned type. When the types + are all the same size they wind up as unsigned. When file_ptr is a + larger signed type, the arithmetic winds up as signed long long, + which is wrong. + + What we're trying to say here is something like ``increase OFF by + the least amount that will cause it to be equal to the VMA modulo + the page size.'' */ +/* In other words, something like: + + vma_offset = m->sections[0]->vma % bed->maxpagesize; + off_offset = off % bed->maxpagesize; + if (vma_offset < off_offset) + adjustment = vma_offset + bed->maxpagesize - off_offset; + else + adjustment = vma_offset - off_offset; + + which can can be collapsed into the expression below. */ + +static file_ptr +vma_page_aligned_bias (bfd_vma vma, ufile_ptr off, bfd_vma maxpagesize) +{ + return ((vma - off) % maxpagesize); +} + /* Assign file positions to the sections based on the mapping from sections to segments. This function also sets up some fields in the file header, and writes out the program headers. */ @@ -3698,7 +3728,8 @@ assign_file_positions_for_segments (bfd && (m->sections[0]->flags & SEC_ALLOC) != 0) { if ((abfd->flags & D_PAGED) != 0) - off += (m->sections[0]->vma - off) % bed->maxpagesize; + off += vma_page_aligned_bias (m->sections[0]->vma, off, + bed->maxpagesize); else { bfd_size_type align; @@ -3713,7 +3744,8 @@ assign_file_positions_for_segments (bfd align = secalign; } - off += (m->sections[0]->vma - off) % (1 << align); + off += vma_page_aligned_bias (m->sections[0]->vma, off, + 1 << align); } } @@ -3875,9 +3907,11 @@ assign_file_positions_for_segments (bfd not have the SEC_LOAD case just above, and then this was necessary, but now I'm not sure. */ if ((abfd->flags & D_PAGED) != 0) - adjust = (sec->vma - voff) % bed->maxpagesize; + adjust = vma_page_aligned_bias (sec->vma, voff, + bed->maxpagesize); else - adjust = (sec->vma - voff) % align; + adjust = vma_page_aligned_bias (sec->vma, voff, + align); } else adjust = 0; @@ -4211,9 +4245,11 @@ assign_file_positions_except_relocs (bfd ? "*unknown*" : hdr->bfd_section->name))); if ((abfd->flags & D_PAGED) != 0) - off += (hdr->sh_addr - off) % bed->maxpagesize; + off += vma_page_aligned_bias (hdr->sh_addr, off, + bed->maxpagesize); else - off += (hdr->sh_addr - off) % hdr->sh_addralign; + off += vma_page_aligned_bias (hdr->sh_addr, off, + hdr->sh_addralign); off = _bfd_elf_assign_file_position_for_section (hdr, off, FALSE); } @@ -5261,6 +5297,7 @@ swap_out_syms (bfd *abfd, char *outbound_shndx; int idx; bfd_size_type amt; + bfd_boolean name_local_sections; if (!elf_map_symbols (abfd)) return FALSE; @@ -5326,6 +5363,10 @@ swap_out_syms (bfd *abfd, outbound_shndx += sizeof (Elf_External_Sym_Shndx); } + name_local_sections + = (bed->elf_backend_name_local_section_symbols + && bed->elf_backend_name_local_section_symbols (abfd)); + syms = bfd_get_outsymbols (abfd); for (idx = 0; idx < symcount; idx++) { @@ -5335,7 +5376,8 @@ swap_out_syms (bfd *abfd, flagword flags = syms[idx]->flags; int type; - if ((flags & (BSF_SECTION_SYM | BSF_GLOBAL)) == BSF_SECTION_SYM) + if (!name_local_sections + && (flags & (BSF_SECTION_SYM | BSF_GLOBAL)) == BSF_SECTION_SYM) { /* Local section symbols have no name. */ sym.st_name = 0; diff -uprN binutils-2.14.90.0.8/bfd/elf32-arm.h binutils-2.15.90.0.1/bfd/elf32-arm.h --- binutils-2.14.90.0.8/bfd/elf32-arm.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-arm.h 2004-03-03 12:24:33.000000000 -0800 @@ -2945,10 +2945,11 @@ elf32_arm_check_relocs (abfd, info, sec, symbol local. */ if (ELF32_R_TYPE (rel->r_info) == R_ARM_PC24 || ELF32_R_TYPE (rel->r_info) == R_ARM_PLT32) - { - h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT; - h->plt.refcount += 1; - } + h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT; + + /* If we create a PLT entry, this relocation will reference + it, even if it's an ABS32 relocation. */ + h->plt.refcount += 1; } /* If we are creating a shared library, and this is a reloc diff -uprN binutils-2.14.90.0.8/bfd/elf32-frv.c binutils-2.15.90.0.1/bfd/elf32-frv.c --- binutils-2.14.90.0.8/bfd/elf32-frv.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-frv.c 2004-03-03 12:24:33.000000000 -0800 @@ -22,6 +22,7 @@ Foundation, Inc., 59 Temple Place - Suit #include "libbfd.h" #include "elf-bfd.h" #include "elf/frv.h" +#include "elf/dwarf2.h" #include "hashtab.h" /* Forward declarations. */ @@ -117,7 +118,7 @@ static reloc_howto_type elf32_frv_howto_ 16, /* bitsize */ TRUE, /* pc_relative */ 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ + complain_overflow_signed, /* complain_on_overflow */ bfd_elf_generic_reloc, /* special_function */ "R_FRV_LABEL16", /* name */ FALSE, /* partial_inplace */ @@ -659,7 +660,6 @@ frv_elf_link_hash_table_create (bfd *abf #define FRV_SYM_LOCAL(INFO, H) \ (_bfd_elf_symbol_refs_local_p ((H), (INFO), 1) \ || ! elf_hash_table (INFO)->dynamic_sections_created \ - || (H)->root.type == bfd_link_hash_undefweak \ || (/* The condition below is an ugly hack to get .scommon data to be regarded as local. For some reason the ELF_LINK_HASH_DEF_REGULAR bit is not set on such common @@ -748,6 +748,10 @@ struct frv_pic_relocs_info relocations referencing the symbol. */ unsigned relocs32, relocsfd, relocsfdv; + /* The number of .rofixups entries and dynamic relocations allocated + for this symbol, minus any that might have already been used. */ + unsigned fixups, dynrelocs; + /* The offsets of the GOT entries assigned to symbol+addend, to the function descriptor's address, and to a function descriptor, respectively. Should be zero if unassigned. The offsets are @@ -789,10 +793,14 @@ frv_pic_relocs_info_eq (const void *entr static struct frv_pic_relocs_info * frv_pic_relocs_info_find (struct htab *ht, bfd *abfd, - const struct frv_pic_relocs_info *entry) + const struct frv_pic_relocs_info *entry, + enum insert_option insert) { struct frv_pic_relocs_info **loc = - (struct frv_pic_relocs_info **) htab_find_slot (ht, entry, INSERT); + (struct frv_pic_relocs_info **) htab_find_slot (ht, entry, insert); + + if (! loc) + return NULL; if (*loc) return *loc; @@ -818,7 +826,8 @@ inline static struct frv_pic_relocs_info frv_pic_relocs_info_for_global (struct htab *ht, bfd *abfd, struct elf_link_hash_entry *h, - bfd_vma addend) + bfd_vma addend, + enum insert_option insert) { struct frv_pic_relocs_info entry; @@ -826,7 +835,7 @@ frv_pic_relocs_info_for_global (struct h entry.d.h = h; entry.addend = addend; - return frv_pic_relocs_info_find (ht, abfd, &entry); + return frv_pic_relocs_info_find (ht, abfd, &entry, insert); } /* Obtain the address of the entry in HT associated with the SYMNDXth @@ -836,7 +845,8 @@ inline static struct frv_pic_relocs_info frv_pic_relocs_info_for_local (struct htab *ht, bfd *abfd, long symndx, - bfd_vma addend) + bfd_vma addend, + enum insert_option insert) { struct frv_pic_relocs_info entry; @@ -844,7 +854,59 @@ frv_pic_relocs_info_for_local (struct ht entry.d.abfd = abfd; entry.addend = addend; - return frv_pic_relocs_info_find (ht, abfd, &entry); + return frv_pic_relocs_info_find (ht, abfd, &entry, insert); +} + +/* Merge fields set by check_relocs() of two entries that end up being + mapped to the same (presumably global) symbol. */ + +inline static void +frv_pic_merge_early_relocs_info (struct frv_pic_relocs_info *e2, + struct frv_pic_relocs_info const *e1) +{ + e2->got12 |= e1->got12; + e2->gotlos |= e1->gotlos; + e2->gothilo |= e1->gothilo; + e2->fd |= e1->fd; + e2->fdgot12 |= e1->fdgot12; + e2->fdgotlos |= e1->fdgotlos; + e2->fdgothilo |= e1->fdgothilo; + e2->fdgoff12 |= e1->fdgoff12; + e2->fdgofflos |= e1->fdgofflos; + e2->fdgoffhilo |= e1->fdgoffhilo; + e2->gotoff |= e1->gotoff; + e2->call |= e1->call; + e2->sym |= e1->sym; + +#if 0 + /* These are set in _frv_count_got_plt_entries() or later, and this + function is only called in _frv_resolve_final_relocs_info(), that + runs just before it, so we don't have to worry about the fields + below. */ + + e2->plt |= e1->plt; + e2->privfd |= e1->privfd; + e2->lazyplt |= e1->lazyplt; + e2->done |= e1->done; + + e2->relocs32 += e1->relocs32; + e2->relocsfd += e1->relocsfd; + e2->relocsfdv += e1->relocsfdv; + e2->fixups += e1->fixups; + e2->dynrelocs += e1->dynrelocs; + + if (abs (e1->got_entry) < abs (e2->got_entry)) + e2->got_entry = e1->got_entry; + if (abs (e1->fdgot_entry) < abs (e2->fdgot_entry)) + e2->fdgot_entry = e1->fdgot_entry; + if (abs (e1->fd_entry) < abs (e2->fd_entry)) + e2->fd_entry = e1->fd_entry; + + if (e1->plt_entry < e2->plt_entry) + e2->plt_entry = e1->plt_entry; + if (e1->lzplt_entry < e2->lzplt_entry) + e2->lzplt_entry = e1->lzplt_entry; +#endif } /* Every block of 65535 lazy PLT entries shares a single call to the @@ -859,7 +921,8 @@ frv_pic_relocs_info_for_local (struct ht inline static bfd_vma _frv_add_dyn_reloc (bfd *output_bfd, asection *sreloc, bfd_vma offset, - int reloc_type, long dynindx, bfd_vma addend) + int reloc_type, long dynindx, bfd_vma addend, + struct frv_pic_relocs_info *entry) { Elf_Internal_Rela outrel; bfd_vma reloc_offset; @@ -874,13 +937,17 @@ _frv_add_dyn_reloc (bfd *output_bfd, ase sreloc->contents + reloc_offset); sreloc->reloc_count++; + BFD_ASSERT (entry->dynrelocs > 0); + entry->dynrelocs--; + return reloc_offset; } /* Add a fixup to the ROFIXUP section. */ static bfd_vma -_frv_add_rofixup (bfd *output_bfd, asection *rofixup, bfd_vma offset) +_frv_add_rofixup (bfd *output_bfd, asection *rofixup, bfd_vma offset, + struct frv_pic_relocs_info *entry) { bfd_vma fixup_offset; @@ -894,7 +961,13 @@ _frv_add_rofixup (bfd *output_bfd, asect bfd_put_32 (output_bfd, offset, rofixup->contents + fixup_offset); } rofixup->reloc_count++; - + + if (entry) + { + BFD_ASSERT (entry->fixups > 0); + entry->fixups--; + } + return fixup_offset; } @@ -999,13 +1072,13 @@ _frv_emit_got_relocs_plt_entries (struct { if (sec) ad += sec->output_section->vma; - if (entry->symndx != -1 || - entry->d.h->root.type != bfd_link_hash_undefweak) + if (entry->symndx != -1 + || entry->d.h->root.type != bfd_link_hash_undefweak) _frv_add_rofixup (output_bfd, frv_gotfixup_section (info), frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset + frv_got_initial_offset (info) - + entry->got_entry); + + entry->got_entry, entry); } else _frv_add_dyn_reloc (output_bfd, frv_gotrel_section (info), @@ -1016,7 +1089,7 @@ _frv_emit_got_relocs_plt_entries (struct + entry->got_entry) + frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset, - R_FRV_32, idx, ad); + R_FRV_32, idx, ad, entry); bfd_put_32 (output_bfd, ad, frv_got_section (info)->contents @@ -1029,65 +1102,79 @@ _frv_emit_got_relocs_plt_entries (struct if (entry->fdgot_entry) { int reloc, idx; - bfd_vma ad; + bfd_vma ad = 0; - /* If the symbol is dynamic and there may be dynamic symbol - resolution because we are or are linked with a shared - library, emit a FUNCDESC relocation such that the dynamic - linker will allocate the function descriptor. */ - if (entry->symndx == -1 && ! FRV_FUNCDESC_LOCAL (info, entry->d.h)) - { - reloc = R_FRV_FUNCDESC; - idx = dynindx; - ad = addend; - if (ad) - return FALSE; - } - else - { - /* Otherwise, we know we have a private function descriptor, - so reference it directly. */ - if (elf_hash_table (info)->dynamic_sections_created) - BFD_ASSERT (entry->privfd); - reloc = R_FRV_32; - idx = elf_section_data (frv_got_section (info)->output_section) - ->dynindx; - ad = frv_got_section (info)->output_offset + - frv_got_initial_offset (info) + entry->fd_entry; - } - - /* If there is room for dynamic symbol resolution, emit the - dynamic relocation. However, if we're linking an executable - at a fixed location, we won't have emitted a dynamic symbol - entry for the got section, so idx will be zero, which means - we can and should compute the address of the private - descriptor ourselves. */ - if (info->executable && !info->pie - && (entry->symndx != -1 || FRV_FUNCDESC_LOCAL (info, entry->d.h))) - { - if (entry->symndx == -1 - && entry->d.h->root.type == bfd_link_hash_undefweak) - ad = 0; + if (! (entry->symndx == -1 + && entry->d.h->root.type == bfd_link_hash_undefweak + && FRV_SYM_LOCAL (info, entry->d.h))) + { + /* If the symbol is dynamic and there may be dynamic symbol + resolution because we are, or are linked with, a shared + library, emit a FUNCDESC relocation such that the dynamic + linker will allocate the function descriptor. If the + symbol needs a non-local function descriptor but binds + locally (e.g., its visibility is protected, emit a + dynamic relocation decayed to section+offset. */ + if (entry->symndx == -1 && ! FRV_FUNCDESC_LOCAL (info, entry->d.h) + && FRV_SYM_LOCAL (info, entry->d.h) + && !(info->executable && !info->pie)) + { + reloc = R_FRV_FUNCDESC; + idx = elf_section_data (entry->d.h->root.u.def.section + ->output_section)->dynindx; + ad = entry->d.h->root.u.def.section->output_offset + + entry->d.h->root.u.def.value; + } + else if (entry->symndx == -1 + && ! FRV_FUNCDESC_LOCAL (info, entry->d.h)) + { + reloc = R_FRV_FUNCDESC; + idx = dynindx; + ad = addend; + if (ad) + return FALSE; + } else { + /* Otherwise, we know we have a private function descriptor, + so reference it directly. */ + if (elf_hash_table (info)->dynamic_sections_created) + BFD_ASSERT (entry->privfd); + reloc = R_FRV_32; + idx = elf_section_data (frv_got_section (info) + ->output_section)->dynindx; + ad = frv_got_section (info)->output_offset + + frv_got_initial_offset (info) + entry->fd_entry; + } + + /* If there is room for dynamic symbol resolution, emit the + dynamic relocation. However, if we're linking an + executable at a fixed location, we won't have emitted a + dynamic symbol entry for the got section, so idx will be + zero, which means we can and should compute the address + of the private descriptor ourselves. */ + if (info->executable && !info->pie + && (entry->symndx != -1 + || FRV_FUNCDESC_LOCAL (info, entry->d.h))) + { ad += frv_got_section (info)->output_section->vma; _frv_add_rofixup (output_bfd, frv_gotfixup_section (info), frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset + frv_got_initial_offset (info) - + entry->fdgot_entry); + + entry->fdgot_entry, entry); } + else + _frv_add_dyn_reloc (output_bfd, frv_gotrel_section (info), + _bfd_elf_section_offset + (output_bfd, info, + frv_got_section (info), + frv_got_initial_offset (info) + + entry->fdgot_entry) + + frv_got_section (info)->output_section->vma + + frv_got_section (info)->output_offset, + reloc, idx, ad, entry); } - else - _frv_add_dyn_reloc (output_bfd, frv_gotrel_section (info), - _bfd_elf_section_offset - (output_bfd, info, - frv_got_section (info), - frv_got_initial_offset (info) - + entry->fdgot_entry) - + frv_got_section (info)->output_section->vma - + frv_got_section (info)->output_offset, - reloc, idx, ad); bfd_put_32 (output_bfd, ad, frv_got_section (info)->contents @@ -1128,19 +1215,19 @@ _frv_emit_got_relocs_plt_entries (struct if (sec) ad += sec->output_section->vma; ofst = 0; - if (entry->symndx != -1 || - entry->d.h->root.type != bfd_link_hash_undefweak) + if (entry->symndx != -1 + || entry->d.h->root.type != bfd_link_hash_undefweak) { _frv_add_rofixup (output_bfd, frv_gotfixup_section (info), frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset + frv_got_initial_offset (info) - + entry->fd_entry); + + entry->fd_entry, entry); _frv_add_rofixup (output_bfd, frv_gotfixup_section (info), frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset + frv_got_initial_offset (info) - + entry->fd_entry + 4); + + entry->fd_entry + 4, entry); } } else @@ -1156,7 +1243,7 @@ _frv_emit_got_relocs_plt_entries (struct + entry->fd_entry) + frv_got_section (info)->output_section->vma + frv_got_section (info)->output_offset, - R_FRV_FUNCDESC_VALUE, idx, ad); + R_FRV_FUNCDESC_VALUE, idx, ad, entry); } /* If we've omitted the dynamic relocation, just emit the fixed @@ -1908,14 +1995,14 @@ elf32_frv_relocate_section (output_bfd, if (h != NULL) picrel = frv_pic_relocs_info_for_global (frv_relocs_info (info), input_bfd, h, - orig_addend); + orig_addend, INSERT); else /* In order to find the entry we created before, we must use the original addend, not the one that may have been modified by _bfd_elf_rela_local_sym(). */ picrel = frv_pic_relocs_info_for_local (frv_relocs_info (info), input_bfd, r_symndx, - orig_addend); + orig_addend, INSERT); if (! picrel) return FALSE; @@ -2005,88 +2092,104 @@ elf32_frv_relocate_section (output_bfd, int dynindx; bfd_vma addend = rel->r_addend; - /* If the symbol is dynamic and there may be dynamic - symbol resolution because we are or are linked with a - shared library, emit a FUNCDESC relocation such that - the dynamic linker will allocate the function - descriptor. */ - if (h && ! FRV_FUNCDESC_LOCAL (info, h)) + if (! (h && h->root.type == bfd_link_hash_undefweak + && FRV_SYM_LOCAL (info, h))) { - if (addend) + /* If the symbol is dynamic and there may be dynamic + symbol resolution because we are or are linked with a + shared library, emit a FUNCDESC relocation such that + the dynamic linker will allocate the function + descriptor. If the symbol needs a non-local function + descriptor but binds locally (e.g., its visibility is + protected, emit a dynamic relocation decayed to + section+offset. */ + if (h && ! FRV_FUNCDESC_LOCAL (info, h) + && FRV_SYM_LOCAL (info, h) + && !(info->executable && !info->pie)) { - info->callbacks->warning - (info, _("R_FRV_FUNCDESC references dynamic symbol with nonzero addend"), - name, input_bfd, input_section, rel->r_offset); - return FALSE; + dynindx = elf_section_data (h->root.u.def.section + ->output_section)->dynindx; + addend += h->root.u.def.section->output_offset + + h->root.u.def.value; + } + else if (h && ! FRV_FUNCDESC_LOCAL (info, h)) + { + if (addend) + { + info->callbacks->warning + (info, _("R_FRV_FUNCDESC references dynamic symbol with nonzero addend"), + name, input_bfd, input_section, rel->r_offset); + return FALSE; + } + dynindx = h->dynindx; + } + else + { + /* Otherwise, we know we have a private function + descriptor, so reference it directly. */ + BFD_ASSERT (picrel->privfd); + r_type = R_FRV_32; + dynindx = elf_section_data (frv_got_section (info) + ->output_section)->dynindx; + addend = frv_got_section (info)->output_offset + + frv_got_initial_offset (info) + + picrel->fd_entry; } - dynindx = h->dynindx; - } - else - { - /* Otherwise, we know we have a private function - descriptor, so reference it directly. */ - BFD_ASSERT (picrel->privfd); - r_type = R_FRV_32; - dynindx = elf_section_data (frv_got_section - (info)->output_section)->dynindx; - addend = frv_got_section (info)->output_offset - + frv_got_initial_offset (info) - + picrel->fd_entry; - } - /* If there is room for dynamic symbol resolution, emit - the dynamic relocation. However, if we're linking an - executable at a fixed location, we won't have emitted a - dynamic symbol entry for the got section, so idx will - be zero, which means we can and should compute the - address of the private descriptor ourselves. */ - if (info->executable && !info->pie - && (!h || FRV_FUNCDESC_LOCAL (info, h))) - { - addend += frv_got_section (info)->output_section->vma; - if ((bfd_get_section_flags (output_bfd, - input_section->output_section) - & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD)) + /* If there is room for dynamic symbol resolution, emit + the dynamic relocation. However, if we're linking an + executable at a fixed location, we won't have emitted a + dynamic symbol entry for the got section, so idx will + be zero, which means we can and should compute the + address of the private descriptor ourselves. */ + if (info->executable && !info->pie + && (!h || FRV_FUNCDESC_LOCAL (info, h))) + { + addend += frv_got_section (info)->output_section->vma; + if ((bfd_get_section_flags (output_bfd, + input_section->output_section) + & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD)) + { + if (_frv_osec_readonly_p (output_bfd, + input_section->output_section)) + { + info->callbacks->warning + (info, + _("cannot emit fixups in read-only section"), + name, input_bfd, input_section, rel->r_offset); + return FALSE; + } + _frv_add_rofixup (output_bfd, + frv_gotfixup_section (info), + _bfd_elf_section_offset + (output_bfd, info, + input_section, rel->r_offset) + + input_section->output_section->vma + + input_section->output_offset, + picrel); + } + } + else if ((bfd_get_section_flags (output_bfd, + input_section->output_section) + & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD)) { if (_frv_osec_readonly_p (output_bfd, input_section->output_section)) { info->callbacks->warning (info, - _("cannot emit fixups in read-only section"), + _("cannot emit dynamic relocations in read-only section"), name, input_bfd, input_section, rel->r_offset); return FALSE; } - if (! h || h->root.type != bfd_link_hash_undefweak) - _frv_add_rofixup (output_bfd, - frv_gotfixup_section (info), + _frv_add_dyn_reloc (output_bfd, frv_gotrel_section (info), _bfd_elf_section_offset (output_bfd, info, input_section, rel->r_offset) + input_section->output_section->vma - + input_section->output_offset); - } - } - else if ((bfd_get_section_flags (output_bfd, - input_section->output_section) - & (SEC_ALLOC | SEC_LOAD)) == (SEC_ALLOC | SEC_LOAD)) - { - if (_frv_osec_readonly_p (output_bfd, - input_section->output_section)) - { - info->callbacks->warning - (info, - _("cannot emit dynamic relocations in read-only section"), - name, input_bfd, input_section, rel->r_offset); - return FALSE; + + input_section->output_offset, + r_type, dynindx, addend, picrel); } - _frv_add_dyn_reloc (output_bfd, frv_gotrel_section (info), - _bfd_elf_section_offset - (output_bfd, info, - input_section, rel->r_offset) - + input_section->output_section->vma - + input_section->output_offset, - r_type, dynindx, addend); } /* We want the addend in-place because dynamic @@ -2163,7 +2266,8 @@ elf32_frv_relocate_section (output_bfd, (output_bfd, info, input_section, rel->r_offset) + input_section->output_section->vma - + input_section->output_offset); + + input_section->output_offset, + picrel); if (r_type == R_FRV_FUNCDESC_VALUE) _frv_add_rofixup (output_bfd, @@ -2172,7 +2276,7 @@ elf32_frv_relocate_section (output_bfd, (output_bfd, info, input_section, rel->r_offset) + input_section->output_section->vma - + input_section->output_offset + 4); + + input_section->output_offset + 4, picrel); } } } @@ -2197,7 +2301,7 @@ elf32_frv_relocate_section (output_bfd, input_section, rel->r_offset) + input_section->output_section->vma + input_section->output_offset, - r_type, dynindx, addend); + r_type, dynindx, addend, picrel); } /* We want the addend in-place because dynamic relocations are REL. Setting relocation to it @@ -2777,6 +2881,7 @@ _frv_count_got_plt_entries (void **entry { struct frv_pic_relocs_info *entry = *entryp; struct _frv_dynamic_got_info *dinfo = dinfo_; + unsigned relocs = 0, fixups = 0; /* Allocate space for a GOT entry pointing to the symbol. */ if (entry->got12) @@ -2833,27 +2938,33 @@ _frv_count_got_plt_entries (void **entry dinfo->lzplt += 8; if (!dinfo->info->executable || dinfo->info->pie) - dinfo->relocs += entry->relocs32 + entry->relocsfd + entry->relocsfdv; + relocs = entry->relocs32 + entry->relocsfd + entry->relocsfdv; else { if (entry->symndx != -1 || FRV_SYM_LOCAL (dinfo->info, entry->d.h)) { if (entry->symndx != -1 - || entry->d.h->root.type != bfd_link_hash_undefweak) - dinfo->fixups += entry->relocs32 + 2 * entry->relocsfdv; + || entry->d.h->root.type != bfd_link_hash_undefweak) + fixups += entry->relocs32 + 2 * entry->relocsfdv; } else - dinfo->relocs += entry->relocs32 + entry->relocsfdv; + relocs += entry->relocs32 + entry->relocsfdv; + if (entry->symndx != -1 || FRV_FUNCDESC_LOCAL (dinfo->info, entry->d.h)) { if (entry->symndx != -1 || entry->d.h->root.type != bfd_link_hash_undefweak) - dinfo->fixups += entry->relocsfd; + fixups += entry->relocsfd; } else - dinfo->relocs += entry->relocsfd; + relocs += entry->relocsfd; } + entry->dynrelocs += relocs; + entry->fixups += fixups; + dinfo->relocs += relocs; + dinfo->fixups += fixups; + return 1; } @@ -3181,6 +3292,7 @@ _frv_resolve_final_relocs_info (void **e if (entry->symndx == -1) { struct elf_link_hash_entry *h = entry->d.h; + struct frv_pic_relocs_info *oentry; while (h->root.type == bfd_link_hash_indirect || h->root.type == bfd_link_hash_warning) @@ -3189,6 +3301,17 @@ _frv_resolve_final_relocs_info (void **e if (entry->d.h == h) return 1; + oentry = frv_pic_relocs_info_for_global (*htab, 0, h, entry->addend, + NO_INSERT); + + if (oentry) + { + /* Merge the two entries. */ + frv_pic_merge_early_relocs_info (oentry, entry); + htab_clear_slot (*htab, entryp); + return 1; + } + entry->d.h = h; /* If we can't find this entry with the new bfd hash, re-insert @@ -3454,7 +3577,7 @@ elf32_frv_always_size_sections (bfd *out || h->type != STT_OBJECT || !(h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)) { - struct bfd_link_hash_entry *bh; + struct bfd_link_hash_entry *bh = NULL; if (!(_bfd_generic_link_add_one_symbol (info, output_bfd, "__stacksize", @@ -3552,13 +3675,22 @@ elf32_frv_finish_dynamic_sections (bfd * + hgot->root.u.def.section->output_offset; _frv_add_rofixup (output_bfd, frv_gotfixup_section (info), - got_value); + got_value, 0); } if (frv_gotfixup_section (info)->_raw_size != (frv_gotfixup_section (info)->reloc_count * 4)) { - if (!elf_hash_table (info)->dynamic_sections_created) + if (frv_gotfixup_section (info)->_raw_size + < frv_gotfixup_section (info)->reloc_count * 4) + { + info->callbacks->warning + (info, "LINKER BUG: .rofixup section size mismatch", + ".rofixup", NULL, NULL, 0); + abort (); + return FALSE; + } + else if (!elf_hash_table (info)->dynamic_sections_created) { info->callbacks->warning (info, "no dynamic sections, missing -melf32frvfd?", @@ -3672,6 +3804,57 @@ elf32_frv_finish_dynamic_symbol (bfd *ou return TRUE; } +/* Decide whether to attempt to turn absptr or lsda encodings in + shared libraries into pcrel within the given input section. */ + +static bfd_boolean +frv_elf_use_relative_eh_frame (bfd *input_bfd, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *eh_frame_section ATTRIBUTE_UNUSED) +{ + /* We can't use PC-relative encodings in FDPIC binaries, in general. */ + if (elf_elfheader (input_bfd)->e_flags & EF_FRV_FDPIC) + return FALSE; + + return TRUE; +} + +/* Adjust the contents of an eh_frame_hdr section before they're output. */ + +static bfd_byte +frv_elf_encode_eh_address (bfd *abfd, + struct bfd_link_info *info, + asection *osec, bfd_vma offset, + asection *loc_sec, bfd_vma loc_offset, + bfd_vma *encoded) +{ + struct elf_link_hash_entry *h; + + /* Non-FDPIC binaries can use PC-relative encodings. */ + if (! (elf_elfheader (abfd)->e_flags & EF_FRV_FDPIC)) + return _bfd_elf_encode_eh_address (abfd, info, osec, offset, + loc_sec, loc_offset, encoded); + + h = elf_hash_table (info)->hgot; + BFD_ASSERT (h && h->root.type == bfd_link_hash_defined); + + if (! h || (_frv_osec_to_segment (abfd, osec) + == _frv_osec_to_segment (abfd, loc_sec->output_section))) + return _bfd_elf_encode_eh_address (abfd, info, osec, offset, + loc_sec, loc_offset, encoded); + + BFD_ASSERT (_frv_osec_to_segment (abfd, osec) + == _frv_osec_to_segment (abfd, + h->root.u.def.section->output_section)); + + *encoded = osec->vma + offset + - (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + + return DW_EH_PE_datarel | DW_EH_PE_sdata4; +} + /* Look through the relocs for a section during the first phase. Besides handling virtual table relocs for gc, we have to deal with @@ -3851,12 +4034,12 @@ elf32_frv_check_relocs (abfd, info, sec, picrel = frv_pic_relocs_info_for_global (frv_relocs_info (info), abfd, h, - rel->r_addend); + rel->r_addend, INSERT); } else picrel = frv_pic_relocs_info_for_local (frv_relocs_info (info), abfd, r_symndx, - rel->r_addend); + rel->r_addend, INSERT); if (! picrel) return FALSE; break; @@ -3952,6 +4135,8 @@ elf32_frv_machine (abfd) default: break; case EF_FRV_CPU_FR550: return bfd_mach_fr550; case EF_FRV_CPU_FR500: return bfd_mach_fr500; + case EF_FRV_CPU_FR450: return bfd_mach_fr450; + case EF_FRV_CPU_FR405: return bfd_mach_fr400; case EF_FRV_CPU_FR400: return bfd_mach_fr400; case EF_FRV_CPU_FR300: return bfd_mach_fr300; case EF_FRV_CPU_SIMPLE: return bfd_mach_frvsimple; @@ -4002,6 +4187,33 @@ frv_elf_copy_private_bfd_data (ibfd, obf return TRUE; } +/* Return true if the architecture described by elf header flag + EXTENSION is an extension of the architecture described by BASE. */ + +static bfd_boolean +frv_elf_arch_extension_p (flagword base, flagword extension) +{ + if (base == extension) + return TRUE; + + /* CPU_GENERIC code can be merged with code for a specific + architecture, in which case the result is marked as being + for the specific architecture. Everything is therefore + an extension of CPU_GENERIC. */ + if (base == EF_FRV_CPU_GENERIC) + return TRUE; + + if (extension == EF_FRV_CPU_FR450) + if (base == EF_FRV_CPU_FR400 || base == EF_FRV_CPU_FR405) + return TRUE; + + if (extension == EF_FRV_CPU_FR405) + if (base == EF_FRV_CPU_FR400) + return TRUE; + + return FALSE; +} + /* Merge backend specific data from an object file to the output object file when linking. */ @@ -4186,13 +4398,10 @@ frv_elf_merge_private_bfd_data (ibfd, ob the generic cpu). */ new_partial = (new_flags & EF_FRV_CPU_MASK); old_partial = (old_flags & EF_FRV_CPU_MASK); - if (new_partial == old_partial) - ; - - else if (new_partial == EF_FRV_CPU_GENERIC) + if (frv_elf_arch_extension_p (new_partial, old_partial)) ; - else if (old_partial == EF_FRV_CPU_GENERIC) + else if (frv_elf_arch_extension_p (old_partial, new_partial)) old_flags = (old_flags & ~EF_FRV_CPU_MASK) | new_partial; else @@ -4204,6 +4413,8 @@ frv_elf_merge_private_bfd_data (ibfd, ob case EF_FRV_CPU_SIMPLE: strcat (new_opt, " -mcpu=simple"); break; case EF_FRV_CPU_FR550: strcat (new_opt, " -mcpu=fr550"); break; case EF_FRV_CPU_FR500: strcat (new_opt, " -mcpu=fr500"); break; + case EF_FRV_CPU_FR450: strcat (new_opt, " -mcpu=fr450"); break; + case EF_FRV_CPU_FR405: strcat (new_opt, " -mcpu=fr405"); break; case EF_FRV_CPU_FR400: strcat (new_opt, " -mcpu=fr400"); break; case EF_FRV_CPU_FR300: strcat (new_opt, " -mcpu=fr300"); break; case EF_FRV_CPU_TOMCAT: strcat (new_opt, " -mcpu=tomcat"); break; @@ -4216,6 +4427,8 @@ frv_elf_merge_private_bfd_data (ibfd, ob case EF_FRV_CPU_SIMPLE: strcat (old_opt, " -mcpu=simple"); break; case EF_FRV_CPU_FR550: strcat (old_opt, " -mcpu=fr550"); break; case EF_FRV_CPU_FR500: strcat (old_opt, " -mcpu=fr500"); break; + case EF_FRV_CPU_FR450: strcat (old_opt, " -mcpu=fr450"); break; + case EF_FRV_CPU_FR405: strcat (old_opt, " -mcpu=fr405"); break; case EF_FRV_CPU_FR400: strcat (old_opt, " -mcpu=fr400"); break; case EF_FRV_CPU_FR300: strcat (old_opt, " -mcpu=fr300"); break; case EF_FRV_CPU_TOMCAT: strcat (old_opt, " -mcpu=tomcat"); break; @@ -4283,6 +4496,8 @@ frv_elf_print_private_bfd_data (abfd, pt case EF_FRV_CPU_SIMPLE: fprintf (file, " -mcpu=simple"); break; case EF_FRV_CPU_FR550: fprintf (file, " -mcpu=fr550"); break; case EF_FRV_CPU_FR500: fprintf (file, " -mcpu=fr500"); break; + case EF_FRV_CPU_FR450: fprintf (file, " -mcpu=fr450"); break; + case EF_FRV_CPU_FR405: fprintf (file, " -mcpu=fr405"); break; case EF_FRV_CPU_FR400: fprintf (file, " -mcpu=fr400"); break; case EF_FRV_CPU_FR300: fprintf (file, " -mcpu=fr300"); break; case EF_FRV_CPU_TOMCAT: fprintf (file, " -mcpu=tomcat"); break; @@ -4391,6 +4606,12 @@ frv_elf_print_private_bfd_data (abfd, pt #define elf_backend_want_plt_sym 0 #define elf_backend_plt_header_size 0 +#define elf_backend_can_make_relative_eh_frame \ + frv_elf_use_relative_eh_frame +#define elf_backend_can_make_lsda_relative_eh_frame \ + frv_elf_use_relative_eh_frame +#define elf_backend_encode_eh_address frv_elf_encode_eh_address + #define elf_backend_may_use_rel_p 1 #define elf_backend_may_use_rela_p 1 /* We use REL for dynamic relocations only. */ diff -uprN binutils-2.14.90.0.8/bfd/elf32-h8300.c binutils-2.15.90.0.1/bfd/elf32-h8300.c --- binutils-2.14.90.0.8/bfd/elf32-h8300.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-h8300.c 2004-03-03 12:24:33.000000000 -0800 @@ -348,7 +348,7 @@ elf32_h8_final_link_relocate (unsigned l value += addend; /* HIT_DATA is the address for the first byte for the relocated - value. Subtract 1 so that we can manipulate the data in 32bit + value. Subtract 1 so that we can manipulate the data in 32-bit hunks. */ hit_data--; @@ -358,7 +358,7 @@ elf32_h8_final_link_relocate (unsigned l /* Retrieve the type byte for value from the section contents. */ value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); - /* Now scribble it out in one 32bit hunk. */ + /* Now scribble it out in one 32-bit hunk. */ bfd_put_32 (input_bfd, value, hit_data); return bfd_reloc_ok; @@ -659,9 +659,16 @@ elf32_h8_merge_private_bfd_data (bfd *ib bCC:16 -> bCC:8 2 bytes bsr:16 -> bsr:8 2 bytes + bset:16 -> bset:8 2 bytes + bset:24/32 -> bset:8 4 bytes + (also applicable to other bit manipulation instructions) + mov.b:16 -> mov.b:8 2 bytes mov.b:24/32 -> mov.b:8 4 bytes + bset:24/32 -> bset:16 2 bytes + (also applicable to other bit manipulation instructions) + mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes */ static bfd_boolean @@ -804,7 +811,7 @@ elf32_h8_relax_section (bfd *abfd, asect the linker is run. */ switch (ELF32_R_TYPE (irel->r_info)) { - /* Try to turn a 24 bit absolute branch/call into an 8 bit + /* Try to turn a 24-bit absolute branch/call into an 8-bit pc-relative branch/call. */ case R_H8_DIR24R8: { @@ -915,8 +922,10 @@ elf32_h8_relax_section (bfd *abfd, asect } if (code == 0x5e) + /* This is jsr. */ bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1); else if (code == 0x5a) + /* This is jmp. */ bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1); else abort (); @@ -937,7 +946,7 @@ elf32_h8_relax_section (bfd *abfd, asect break; } - /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative + /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative branch. */ case R_H8_PCREL16: { @@ -971,14 +980,21 @@ elf32_h8_relax_section (bfd *abfd, asect if (code == 0x58) { /* bCC:16 -> bCC:8 */ - /* Get the condition code from the original insn. */ + /* Get the second byte of the original insn, which + contains the condition code. */ code = bfd_get_8 (abfd, contents + irel->r_offset - 1); + + /* Compute the fisrt byte of the relaxed + instruction. The original sequence 0x58 0xX0 + is relaxed to 0x4X, where X represents the + condition code. */ code &= 0xf0; code >>= 4; code |= 0x40; bfd_put_8 (abfd, code, contents + irel->r_offset - 2); } else if (code == 0x5c) + /* This is bsr. */ bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2); else abort (); @@ -1000,8 +1016,15 @@ elf32_h8_relax_section (bfd *abfd, asect break; } - /* This is a 16 bit absolute address in a "mov.b" insn, which may - become an 8 bit absolute address if its in the right range. */ + /* This is a 16-bit absolute address in one of the following + instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", "bixor", + "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and + "mov.b" + + We may relax this into an 8-bit absolute address if it's in + the right range. */ case R_H8_DIR16A8: { bfd_vma value; @@ -1021,28 +1044,41 @@ elf32_h8_relax_section (bfd *abfd, asect /* Get the opcode. */ code = bfd_get_8 (abfd, contents + irel->r_offset - 2); - /* Sanity check. */ + /* All instructions with R_H8_DIR16A8 start with + 0x6a. */ if (code != 0x6a) abort (); temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1); + /* If this is a mov.b instruction, clear the lower + nibble, which contains the source/destination + register number. */ if ((temp_code & 0x10) != 0x10) temp_code &= 0xf0; switch (temp_code) { case 0x00: + /* This is mov.b @aa:16,Rd. */ bfd_put_8 (abfd, (code & 0xf) | 0x20, contents + irel->r_offset - 2); break; case 0x80: + /* This is mov.b Rs,@aa:16. */ bfd_put_8 (abfd, (code & 0xf) | 0x30, contents + irel->r_offset - 2); break; case 0x18: + /* This is a bit-maniputation instruction that + stores one bit into memory, one of "bclr", + "bist", "bnot", "bset", and "bst". */ bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2); break; case 0x10: + /* This is a bit-maniputation instruction that + loads one bit from memory, one of "band", + "biand", "bild", "bior", "bixor", "bld", "bor", + "btst", and "bxor". */ bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2); break; default: @@ -1068,8 +1104,15 @@ elf32_h8_relax_section (bfd *abfd, asect break; } - /* This is a 24 bit absolute address in a "mov.b" insn, which may - become an 8 bit absolute address if its in the right range. */ + /* This is a 24-bit absolute address in one of the following + instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", "bixor", + "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and + "mov.b" + + We may relax this into an 8-bit absolute address if it's in + the right range. */ case R_H8_DIR24A8: { bfd_vma value; @@ -1089,29 +1132,42 @@ elf32_h8_relax_section (bfd *abfd, asect /* Get the opcode. */ code = bfd_get_8 (abfd, contents + irel->r_offset - 2); - /* Sanity check. */ + /* All instructions with R_H8_DIR24A8 start with + 0x6a. */ if (code != 0x6a) abort (); temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1); + /* If this is a mov.b instruction, clear the lower + nibble, which contains the source/destination + register number. */ if ((temp_code & 0x30) != 0x30) temp_code &= 0xf0; switch (temp_code) { case 0x20: + /* This is mov.b @aa:24/32,Rd. */ bfd_put_8 (abfd, (code & 0xf) | 0x20, contents + irel->r_offset - 2); break; case 0xa0: + /* This is mov.b Rs,@aa:24/32. */ bfd_put_8 (abfd, (code & 0xf) | 0x30, contents + irel->r_offset - 2); break; case 0x38: + /* This is a bit-maniputation instruction that + stores one bit into memory, one of "bclr", + "bist", "bnot", "bset", and "bst". */ bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2); break; case 0x30: + /* This is a bit-maniputation instruction that + loads one bit from memory, one of "band", + "biand", "bild", "bior", "bixor", "bld", "bor", + "btst", and "bxor". */ bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2); break; default: @@ -1135,10 +1191,17 @@ elf32_h8_relax_section (bfd *abfd, asect } } - /* Fall through. */ + /* Fall through. */ + + /* This is a 24-/32-bit absolute address in one of the + following instructions: + + "band", "bclr", "biand", "bild", "bior", "bist", + "bixor", "bld", "bnot", "bor", "bset", "bst", "btst", + "bxor", "ldc.w", "stc.w" and "mov.[bwl]" - /* This is a 24/32bit absolute address in a "mov" insn, which may - become a 16-bit absolute address if it is in the right range. */ + We may relax this into an 16-bit absolute address if it's + in the right range. */ case R_H8_DIR32A16: { bfd_vma value; @@ -1157,7 +1220,9 @@ elf32_h8_relax_section (bfd *abfd, asect /* Get the opcode. */ code = bfd_get_8 (abfd, contents + irel->r_offset - 1); - /* We just need to turn off bit 0x20. */ + /* Fix the opcode. For all the instructions that + belong to this relaxation, we simply need to turn + off bit 0x20 in the previous byte. */ code &= ~0x20; bfd_put_8 (abfd, code, contents + irel->r_offset - 1); diff -uprN binutils-2.14.90.0.8/bfd/elf32-ppc.c binutils-2.15.90.0.1/bfd/elf32-ppc.c --- binutils-2.14.90.0.8/bfd/elf32-ppc.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-ppc.c 2004-03-03 12:24:33.000000000 -0800 @@ -3189,6 +3189,18 @@ allocate_dynrelocs (struct elf_link_hash if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT && h->root.type == bfd_link_hash_undefweak) eh->dyn_relocs = NULL; + + /* Make sure undefined weak symbols are output as a dynamic symbol + in PIEs. */ + if (info->pie + && eh->dyn_relocs != NULL + && h->dynindx == -1 + && h->root.type == bfd_link_hash_undefweak + && (h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) == 0) + { + if (! bfd_elf32_link_record_dynamic_symbol (info, h)) + return FALSE; + } } else if (ELIMINATE_COPY_RELOCS) { diff -uprN binutils-2.14.90.0.8/bfd/elf32-s390.c binutils-2.15.90.0.1/bfd/elf32-s390.c --- binutils-2.14.90.0.8/bfd/elf32-s390.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-s390.c 2004-03-03 12:24:33.000000000 -0800 @@ -1884,9 +1884,7 @@ allocate_dynrelocs (h, inf) if (info->shared) { - if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0 - && ((h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0 - || info->symbolic)) + if (SYMBOL_REFERENCES_LOCAL (info, h)) { struct elf_s390_dyn_relocs **pp; @@ -2562,10 +2560,7 @@ elf_s390_relocate_section (output_bfd, i && r_type != R_390_PC32DBL && r_type != R_390_PC32) || (h != NULL - && h->dynindx != -1 - && (! info->symbolic - || (h->elf_link_hash_flags - & ELF_LINK_HASH_DEF_REGULAR) == 0)))) + && !SYMBOL_REFERENCES_LOCAL (info, h)))) || (ELIMINATE_COPY_RELOCS && !info->shared && h != NULL diff -uprN binutils-2.14.90.0.8/bfd/elf32-sh.c binutils-2.15.90.0.1/bfd/elf32-sh.c --- binutils-2.14.90.0.8/bfd/elf32-sh.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-sh.c 2004-03-03 12:24:33.000000000 -0800 @@ -1,5 +1,5 @@ /* Renesas / SuperH SH specific support for 32-bit ELF - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Ian Lance Taylor, Cygnus Support. @@ -6876,6 +6876,9 @@ sh_elf_set_mach_from_flags (bfd *abfd) case EF_SH4AL_DSP: bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4al_dsp); break; + case EF_SH4_NOMMU_NOFPU: + bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4_nommu_nofpu); + break; default: return FALSE; } diff -uprN binutils-2.14.90.0.8/bfd/elf32-sparc.c binutils-2.15.90.0.1/bfd/elf32-sparc.c --- binutils-2.14.90.0.8/bfd/elf32-sparc.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf32-sparc.c 2004-03-03 12:24:33.000000000 -0800 @@ -3283,8 +3283,7 @@ elf32_sparc_finish_dynamic_sections (out splt->contents + splt->_raw_size - 4); } - elf_section_data (splt->output_section)->this_hdr.sh_entsize = - PLT_ENTRY_SIZE; + elf_section_data (splt->output_section)->this_hdr.sh_entsize = 0; } /* Set the first entry in the global offset table to the address of diff -uprN binutils-2.14.90.0.8/bfd/elf64-alpha.c binutils-2.15.90.0.1/bfd/elf64-alpha.c --- binutils-2.14.90.0.8/bfd/elf64-alpha.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf64-alpha.c 2004-03-03 12:24:33.000000000 -0800 @@ -3547,6 +3547,7 @@ elf64_alpha_calc_got_offsets_for_symbol struct alpha_elf_link_hash_entry *h; PTR arg ATTRIBUTE_UNUSED; { + bfd_boolean result = TRUE; struct alpha_elf_got_entry *gotent; if (h->root.root.type == bfd_link_hash_warning) @@ -3555,14 +3556,23 @@ elf64_alpha_calc_got_offsets_for_symbol for (gotent = h->got_entries; gotent; gotent = gotent->next) if (gotent->use_count > 0) { - bfd_size_type *plge - = &alpha_elf_tdata (gotent->gotobj)->got->_raw_size; + struct alpha_elf_obj_tdata *td; + bfd_size_type *plge; + td = alpha_elf_tdata (gotent->gotobj); + if (td == NULL) + { + _bfd_error_handler (_("Symbol %s has no GOT subsection for offset 0x%x"), + h->root.root.root.string, gotent->got_offset); + result = FALSE; + continue; + } + plge = &td->got->_raw_size; gotent->got_offset = *plge; *plge += alpha_got_entry_size (gotent->reloc_type); } - return TRUE; + return result; } static void diff -uprN binutils-2.14.90.0.8/bfd/elf64-s390.c binutils-2.15.90.0.1/bfd/elf64-s390.c --- binutils-2.14.90.0.8/bfd/elf64-s390.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elf64-s390.c 2004-03-03 12:24:33.000000000 -0800 @@ -1855,9 +1855,7 @@ allocate_dynrelocs (h, inf) if (info->shared) { - if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) != 0 - && ((h->elf_link_hash_flags & ELF_LINK_FORCED_LOCAL) != 0 - || info->symbolic)) + if (SYMBOL_REFERENCES_LOCAL (info, h)) { struct elf_s390_dyn_relocs **pp; @@ -2540,10 +2538,7 @@ elf_s390_relocate_section (output_bfd, i && r_type != R_390_PC32DBL && r_type != R_390_PC64) || (h != NULL - && h->dynindx != -1 - && (! info->symbolic - || (h->elf_link_hash_flags - & ELF_LINK_HASH_DEF_REGULAR) == 0)))) + && !SYMBOL_REFERENCES_LOCAL (info, h)))) || (ELIMINATE_COPY_RELOCS && !info->shared && h != NULL diff -uprN binutils-2.14.90.0.8/bfd/elflink.c binutils-2.15.90.0.1/bfd/elflink.c --- binutils-2.14.90.0.8/bfd/elflink.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elflink.c 2004-03-03 12:24:33.000000000 -0800 @@ -843,8 +843,26 @@ _bfd_elf_merge_symbol (bfd *abfd, object, we remove the old definition. */ if ((*sym_hash)->root.type == bfd_link_hash_indirect) h = *sym_hash; - h->root.type = bfd_link_hash_new; - h->root.u.undef.abfd = NULL; + + if ((h->root.und_next || info->hash->undefs_tail == &h->root) + && bfd_is_und_section (sec)) + { + /* If the new symbol is undefined and the old symbol was + also undefined before, we need to make sure + _bfd_generic_link_add_one_symbol doesn't mess + up the linker hash table undefs list. Since the old + definition came from a dynamic object, it is still on the + undefs list. */ + h->root.type = bfd_link_hash_undefined; + /* FIXME: What if the new symbol is weak undefined? */ + h->root.u.undef.abfd = abfd; + } + else + { + h->root.type = bfd_link_hash_new; + h->root.u.undef.abfd = NULL; + } + if (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_DYNAMIC) { h->elf_link_hash_flags &= ~ELF_LINK_HASH_DEF_DYNAMIC; @@ -2546,3 +2564,348 @@ _bfd_elf_tls_setup (bfd *obfd, struct bf return tls; } + +/* Return TRUE iff this is a non-common, definition of a non-function symbol. */ +static bfd_boolean +is_global_data_symbol_definition (bfd *abfd ATTRIBUTE_UNUSED, + Elf_Internal_Sym *sym) +{ + /* Local symbols do not count, but target specific ones might. */ + if (ELF_ST_BIND (sym->st_info) != STB_GLOBAL + && ELF_ST_BIND (sym->st_info) < STB_LOOS) + return FALSE; + + /* Function symbols do not count. */ + if (ELF_ST_TYPE (sym->st_info) == STT_FUNC) + return FALSE; + + /* If the section is undefined, then so is the symbol. */ + if (sym->st_shndx == SHN_UNDEF) + return FALSE; + + /* If the symbol is defined in the common section, then + it is a common definition and so does not count. */ + if (sym->st_shndx == SHN_COMMON) + return FALSE; + + /* If the symbol is in a target specific section then we + must rely upon the backend to tell us what it is. */ + if (sym->st_shndx >= SHN_LORESERVE && sym->st_shndx < SHN_ABS) + /* FIXME - this function is not coded yet: + + return _bfd_is_global_symbol_definition (abfd, sym); + + Instead for now assume that the definition is not global, + Even if this is wrong, at least the linker will behave + in the same way that it used to do. */ + return FALSE; + + return TRUE; +} + +/* Search the symbol table of the archive element of the archive ABFD + whose archive map contains a mention of SYMDEF, and determine if + the symbol is defined in this element. */ +static bfd_boolean +elf_link_is_defined_archive_symbol (bfd * abfd, carsym * symdef) +{ + Elf_Internal_Shdr * hdr; + bfd_size_type symcount; + bfd_size_type extsymcount; + bfd_size_type extsymoff; + Elf_Internal_Sym *isymbuf; + Elf_Internal_Sym *isym; + Elf_Internal_Sym *isymend; + bfd_boolean result; + + abfd = _bfd_get_elt_at_filepos (abfd, symdef->file_offset); + if (abfd == NULL) + return FALSE; + + if (! bfd_check_format (abfd, bfd_object)) + return FALSE; + + /* If we have already included the element containing this symbol in the + link then we do not need to include it again. Just claim that any symbol + it contains is not a definition, so that our caller will not decide to + (re)include this element. */ + if (abfd->archive_pass) + return FALSE; + + /* Select the appropriate symbol table. */ + if ((abfd->flags & DYNAMIC) == 0 || elf_dynsymtab (abfd) == 0) + hdr = &elf_tdata (abfd)->symtab_hdr; + else + hdr = &elf_tdata (abfd)->dynsymtab_hdr; + + symcount = hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym; + + /* The sh_info field of the symtab header tells us where the + external symbols start. We don't care about the local symbols. */ + if (elf_bad_symtab (abfd)) + { + extsymcount = symcount; + extsymoff = 0; + } + else + { + extsymcount = symcount - hdr->sh_info; + extsymoff = hdr->sh_info; + } + + if (extsymcount == 0) + return FALSE; + + /* Read in the symbol table. */ + isymbuf = bfd_elf_get_elf_syms (abfd, hdr, extsymcount, extsymoff, + NULL, NULL, NULL); + if (isymbuf == NULL) + return FALSE; + + /* Scan the symbol table looking for SYMDEF. */ + result = FALSE; + for (isym = isymbuf, isymend = isymbuf + extsymcount; isym < isymend; isym++) + { + const char *name; + + name = bfd_elf_string_from_elf_section (abfd, hdr->sh_link, + isym->st_name); + if (name == NULL) + break; + + if (strcmp (name, symdef->name) == 0) + { + result = is_global_data_symbol_definition (abfd, isym); + break; + } + } + + free (isymbuf); + + return result; +} + +/* Add symbols from an ELF archive file to the linker hash table. We + don't use _bfd_generic_link_add_archive_symbols because of a + problem which arises on UnixWare. The UnixWare libc.so is an + archive which includes an entry libc.so.1 which defines a bunch of + symbols. The libc.so archive also includes a number of other + object files, which also define symbols, some of which are the same + as those defined in libc.so.1. Correct linking requires that we + consider each object file in turn, and include it if it defines any + symbols we need. _bfd_generic_link_add_archive_symbols does not do + this; it looks through the list of undefined symbols, and includes + any object file which defines them. When this algorithm is used on + UnixWare, it winds up pulling in libc.so.1 early and defining a + bunch of symbols. This means that some of the other objects in the + archive are not included in the link, which is incorrect since they + precede libc.so.1 in the archive. + + Fortunately, ELF archive handling is simpler than that done by + _bfd_generic_link_add_archive_symbols, which has to allow for a.out + oddities. In ELF, if we find a symbol in the archive map, and the + symbol is currently undefined, we know that we must pull in that + object file. + + Unfortunately, we do have to make multiple passes over the symbol + table until nothing further is resolved. */ + +bfd_boolean +_bfd_elf_link_add_archive_symbols (bfd *abfd, + struct bfd_link_info *info) +{ + symindex c; + bfd_boolean *defined = NULL; + bfd_boolean *included = NULL; + carsym *symdefs; + bfd_boolean loop; + bfd_size_type amt; + + if (! bfd_has_map (abfd)) + { + /* An empty archive is a special case. */ + if (bfd_openr_next_archived_file (abfd, NULL) == NULL) + return TRUE; + bfd_set_error (bfd_error_no_armap); + return FALSE; + } + + /* Keep track of all symbols we know to be already defined, and all + files we know to be already included. This is to speed up the + second and subsequent passes. */ + c = bfd_ardata (abfd)->symdef_count; + if (c == 0) + return TRUE; + amt = c; + amt *= sizeof (bfd_boolean); + defined = bfd_zmalloc (amt); + included = bfd_zmalloc (amt); + if (defined == NULL || included == NULL) + goto error_return; + + symdefs = bfd_ardata (abfd)->symdefs; + + do + { + file_ptr last; + symindex i; + carsym *symdef; + carsym *symdefend; + + loop = FALSE; + last = -1; + + symdef = symdefs; + symdefend = symdef + c; + for (i = 0; symdef < symdefend; symdef++, i++) + { + struct elf_link_hash_entry *h; + bfd *element; + struct bfd_link_hash_entry *undefs_tail; + symindex mark; + + if (defined[i] || included[i]) + continue; + if (symdef->file_offset == last) + { + included[i] = TRUE; + continue; + } + + h = elf_link_hash_lookup (elf_hash_table (info), symdef->name, + FALSE, FALSE, FALSE); + + if (h == NULL) + { + char *p, *copy; + size_t len, first; + + /* If this is a default version (the name contains @@), + look up the symbol again with only one `@' as well + as without the version. The effect is that references + to the symbol with and without the version will be + matched by the default symbol in the archive. */ + + p = strchr (symdef->name, ELF_VER_CHR); + if (p == NULL || p[1] != ELF_VER_CHR) + continue; + + /* First check with only one `@'. */ + len = strlen (symdef->name); + copy = bfd_alloc (abfd, len); + if (copy == NULL) + goto error_return; + first = p - symdef->name + 1; + memcpy (copy, symdef->name, first); + memcpy (copy + first, symdef->name + first + 1, len - first); + + h = elf_link_hash_lookup (elf_hash_table (info), copy, + FALSE, FALSE, FALSE); + + if (h == NULL) + { + /* We also need to check references to the symbol + without the version. */ + + copy[first - 1] = '\0'; + h = elf_link_hash_lookup (elf_hash_table (info), + copy, FALSE, FALSE, FALSE); + } + + bfd_release (abfd, copy); + } + + if (h == NULL) + continue; + + if (h->root.type == bfd_link_hash_common) + { + /* We currently have a common symbol. The archive map contains + a reference to this symbol, so we may want to include it. We + only want to include it however, if this archive element + contains a definition of the symbol, not just another common + declaration of it. + + Unfortunately some archivers (including GNU ar) will put + declarations of common symbols into their archive maps, as + well as real definitions, so we cannot just go by the archive + map alone. Instead we must read in the element's symbol + table and check that to see what kind of symbol definition + this is. */ + if (! elf_link_is_defined_archive_symbol (abfd, symdef)) + continue; + } + else if (h->root.type != bfd_link_hash_undefined) + { + if (h->root.type != bfd_link_hash_undefweak) + defined[i] = TRUE; + continue; + } + + /* We need to include this archive member. */ + element = _bfd_get_elt_at_filepos (abfd, symdef->file_offset); + if (element == NULL) + goto error_return; + + if (! bfd_check_format (element, bfd_object)) + goto error_return; + + /* Doublecheck that we have not included this object + already--it should be impossible, but there may be + something wrong with the archive. */ + if (element->archive_pass != 0) + { + bfd_set_error (bfd_error_bad_value); + goto error_return; + } + element->archive_pass = 1; + + undefs_tail = info->hash->undefs_tail; + + if (! (*info->callbacks->add_archive_element) (info, element, + symdef->name)) + goto error_return; + if (! bfd_link_add_symbols (element, info)) + goto error_return; + + /* If there are any new undefined symbols, we need to make + another pass through the archive in order to see whether + they can be defined. FIXME: This isn't perfect, because + common symbols wind up on undefs_tail and because an + undefined symbol which is defined later on in this pass + does not require another pass. This isn't a bug, but it + does make the code less efficient than it could be. */ + if (undefs_tail != info->hash->undefs_tail) + loop = TRUE; + + /* Look backward to mark all symbols from this object file + which we have already seen in this pass. */ + mark = i; + do + { + included[mark] = TRUE; + if (mark == 0) + break; + --mark; + } + while (symdefs[mark].file_offset == symdef->file_offset); + + /* We mark subsequent symbols from this object file as we go + on through the loop. */ + last = symdef->file_offset; + } + } + while (loop); + + free (defined); + free (included); + + return TRUE; + + error_return: + if (defined != NULL) + free (defined); + if (included != NULL) + free (included); + return FALSE; +} diff -uprN binutils-2.14.90.0.8/bfd/elflink.h binutils-2.15.90.0.1/bfd/elflink.h --- binutils-2.14.90.0.8/bfd/elflink.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elflink.h 2004-03-03 12:24:33.000000000 -0800 @@ -23,8 +23,6 @@ #include "safe-ctype.h" static bfd_boolean elf_link_add_object_symbols (bfd *, struct bfd_link_info *); -static bfd_boolean elf_link_add_archive_symbols (bfd *, - struct bfd_link_info *); static bfd_boolean elf_finalize_dynstr (bfd *, struct bfd_link_info *); static bfd_boolean elf_collect_hash_codes (struct elf_link_hash_entry *, void *); @@ -41,355 +39,33 @@ elf_bfd_link_add_symbols (bfd *abfd, str case bfd_object: return elf_link_add_object_symbols (abfd, info); case bfd_archive: - return elf_link_add_archive_symbols (abfd, info); + return _bfd_elf_link_add_archive_symbols (abfd, info); default: bfd_set_error (bfd_error_wrong_format); return FALSE; } } -/* Return TRUE iff this is a non-common, definition of a non-function symbol. */ -static bfd_boolean -is_global_data_symbol_definition (bfd *abfd ATTRIBUTE_UNUSED, - Elf_Internal_Sym *sym) +/* Sort symbol by value and section. */ +static int +sort_symbol (const void *arg1, const void *arg2) { - /* Local symbols do not count, but target specific ones might. */ - if (ELF_ST_BIND (sym->st_info) != STB_GLOBAL - && ELF_ST_BIND (sym->st_info) < STB_LOOS) - return FALSE; - - /* Function symbols do not count. */ - if (ELF_ST_TYPE (sym->st_info) == STT_FUNC) - return FALSE; - - /* If the section is undefined, then so is the symbol. */ - if (sym->st_shndx == SHN_UNDEF) - return FALSE; - - /* If the symbol is defined in the common section, then - it is a common definition and so does not count. */ - if (sym->st_shndx == SHN_COMMON) - return FALSE; - - /* If the symbol is in a target specific section then we - must rely upon the backend to tell us what it is. */ - if (sym->st_shndx >= SHN_LORESERVE && sym->st_shndx < SHN_ABS) - /* FIXME - this function is not coded yet: - - return _bfd_is_global_symbol_definition (abfd, sym); - - Instead for now assume that the definition is not global, - Even if this is wrong, at least the linker will behave - in the same way that it used to do. */ - return FALSE; + const struct elf_link_hash_entry *h1 + = *(const struct elf_link_hash_entry **) arg1; + const struct elf_link_hash_entry *h2 + = *(const struct elf_link_hash_entry **) arg2; + bfd_signed_vma vdiff = h1->root.u.def.value - h2->root.u.def.value; - return TRUE; -} - -/* Search the symbol table of the archive element of the archive ABFD - whose archive map contains a mention of SYMDEF, and determine if - the symbol is defined in this element. */ -static bfd_boolean -elf_link_is_defined_archive_symbol (bfd * abfd, carsym * symdef) -{ - Elf_Internal_Shdr * hdr; - bfd_size_type symcount; - bfd_size_type extsymcount; - bfd_size_type extsymoff; - Elf_Internal_Sym *isymbuf; - Elf_Internal_Sym *isym; - Elf_Internal_Sym *isymend; - bfd_boolean result; - - abfd = _bfd_get_elt_at_filepos (abfd, symdef->file_offset); - if (abfd == NULL) - return FALSE; - - if (! bfd_check_format (abfd, bfd_object)) - return FALSE; - - /* If we have already included the element containing this symbol in the - link then we do not need to include it again. Just claim that any symbol - it contains is not a definition, so that our caller will not decide to - (re)include this element. */ - if (abfd->archive_pass) - return FALSE; - - /* Select the appropriate symbol table. */ - if ((abfd->flags & DYNAMIC) == 0 || elf_dynsymtab (abfd) == 0) - hdr = &elf_tdata (abfd)->symtab_hdr; - else - hdr = &elf_tdata (abfd)->dynsymtab_hdr; - - symcount = hdr->sh_size / sizeof (Elf_External_Sym); - - /* The sh_info field of the symtab header tells us where the - external symbols start. We don't care about the local symbols. */ - if (elf_bad_symtab (abfd)) - { - extsymcount = symcount; - extsymoff = 0; - } + if (vdiff) + return vdiff > 0 ? 1 : -1; else { - extsymcount = symcount - hdr->sh_info; - extsymoff = hdr->sh_info; - } - - if (extsymcount == 0) - return FALSE; - - /* Read in the symbol table. */ - isymbuf = bfd_elf_get_elf_syms (abfd, hdr, extsymcount, extsymoff, - NULL, NULL, NULL); - if (isymbuf == NULL) - return FALSE; - - /* Scan the symbol table looking for SYMDEF. */ - result = FALSE; - for (isym = isymbuf, isymend = isymbuf + extsymcount; isym < isymend; isym++) - { - const char *name; - - name = bfd_elf_string_from_elf_section (abfd, hdr->sh_link, - isym->st_name); - if (name == NULL) - break; - - if (strcmp (name, symdef->name) == 0) - { - result = is_global_data_symbol_definition (abfd, isym); - break; - } - } - - free (isymbuf); - - return result; -} - -/* Add symbols from an ELF archive file to the linker hash table. We - don't use _bfd_generic_link_add_archive_symbols because of a - problem which arises on UnixWare. The UnixWare libc.so is an - archive which includes an entry libc.so.1 which defines a bunch of - symbols. The libc.so archive also includes a number of other - object files, which also define symbols, some of which are the same - as those defined in libc.so.1. Correct linking requires that we - consider each object file in turn, and include it if it defines any - symbols we need. _bfd_generic_link_add_archive_symbols does not do - this; it looks through the list of undefined symbols, and includes - any object file which defines them. When this algorithm is used on - UnixWare, it winds up pulling in libc.so.1 early and defining a - bunch of symbols. This means that some of the other objects in the - archive are not included in the link, which is incorrect since they - precede libc.so.1 in the archive. - - Fortunately, ELF archive handling is simpler than that done by - _bfd_generic_link_add_archive_symbols, which has to allow for a.out - oddities. In ELF, if we find a symbol in the archive map, and the - symbol is currently undefined, we know that we must pull in that - object file. - - Unfortunately, we do have to make multiple passes over the symbol - table until nothing further is resolved. */ - -static bfd_boolean -elf_link_add_archive_symbols (bfd *abfd, struct bfd_link_info *info) -{ - symindex c; - bfd_boolean *defined = NULL; - bfd_boolean *included = NULL; - carsym *symdefs; - bfd_boolean loop; - bfd_size_type amt; - - if (! bfd_has_map (abfd)) - { - /* An empty archive is a special case. */ - if (bfd_openr_next_archived_file (abfd, NULL) == NULL) - return TRUE; - bfd_set_error (bfd_error_no_armap); - return FALSE; - } - - /* Keep track of all symbols we know to be already defined, and all - files we know to be already included. This is to speed up the - second and subsequent passes. */ - c = bfd_ardata (abfd)->symdef_count; - if (c == 0) - return TRUE; - amt = c; - amt *= sizeof (bfd_boolean); - defined = bfd_zmalloc (amt); - included = bfd_zmalloc (amt); - if (defined == NULL || included == NULL) - goto error_return; - - symdefs = bfd_ardata (abfd)->symdefs; - - do - { - file_ptr last; - symindex i; - carsym *symdef; - carsym *symdefend; - - loop = FALSE; - last = -1; - - symdef = symdefs; - symdefend = symdef + c; - for (i = 0; symdef < symdefend; symdef++, i++) - { - struct elf_link_hash_entry *h; - bfd *element; - struct bfd_link_hash_entry *undefs_tail; - symindex mark; - - if (defined[i] || included[i]) - continue; - if (symdef->file_offset == last) - { - included[i] = TRUE; - continue; - } - - h = elf_link_hash_lookup (elf_hash_table (info), symdef->name, - FALSE, FALSE, FALSE); - - if (h == NULL) - { - char *p, *copy; - size_t len, first; - - /* If this is a default version (the name contains @@), - look up the symbol again with only one `@' as well - as without the version. The effect is that references - to the symbol with and without the version will be - matched by the default symbol in the archive. */ - - p = strchr (symdef->name, ELF_VER_CHR); - if (p == NULL || p[1] != ELF_VER_CHR) - continue; - - /* First check with only one `@'. */ - len = strlen (symdef->name); - copy = bfd_alloc (abfd, len); - if (copy == NULL) - goto error_return; - first = p - symdef->name + 1; - memcpy (copy, symdef->name, first); - memcpy (copy + first, symdef->name + first + 1, len - first); - - h = elf_link_hash_lookup (elf_hash_table (info), copy, - FALSE, FALSE, FALSE); - - if (h == NULL) - { - /* We also need to check references to the symbol - without the version. */ - - copy[first - 1] = '\0'; - h = elf_link_hash_lookup (elf_hash_table (info), - copy, FALSE, FALSE, FALSE); - } - - bfd_release (abfd, copy); - } - - if (h == NULL) - continue; - - if (h->root.type == bfd_link_hash_common) - { - /* We currently have a common symbol. The archive map contains - a reference to this symbol, so we may want to include it. We - only want to include it however, if this archive element - contains a definition of the symbol, not just another common - declaration of it. - - Unfortunately some archivers (including GNU ar) will put - declarations of common symbols into their archive maps, as - well as real definitions, so we cannot just go by the archive - map alone. Instead we must read in the element's symbol - table and check that to see what kind of symbol definition - this is. */ - if (! elf_link_is_defined_archive_symbol (abfd, symdef)) - continue; - } - else if (h->root.type != bfd_link_hash_undefined) - { - if (h->root.type != bfd_link_hash_undefweak) - defined[i] = TRUE; - continue; - } - - /* We need to include this archive member. */ - element = _bfd_get_elt_at_filepos (abfd, symdef->file_offset); - if (element == NULL) - goto error_return; - - if (! bfd_check_format (element, bfd_object)) - goto error_return; - - /* Doublecheck that we have not included this object - already--it should be impossible, but there may be - something wrong with the archive. */ - if (element->archive_pass != 0) - { - bfd_set_error (bfd_error_bad_value); - goto error_return; - } - element->archive_pass = 1; - - undefs_tail = info->hash->undefs_tail; - - if (! (*info->callbacks->add_archive_element) (info, element, - symdef->name)) - goto error_return; - if (! elf_link_add_object_symbols (element, info)) - goto error_return; - - /* If there are any new undefined symbols, we need to make - another pass through the archive in order to see whether - they can be defined. FIXME: This isn't perfect, because - common symbols wind up on undefs_tail and because an - undefined symbol which is defined later on in this pass - does not require another pass. This isn't a bug, but it - does make the code less efficient than it could be. */ - if (undefs_tail != info->hash->undefs_tail) - loop = TRUE; - - /* Look backward to mark all symbols from this object file - which we have already seen in this pass. */ - mark = i; - do - { - included[mark] = TRUE; - if (mark == 0) - break; - --mark; - } - while (symdefs[mark].file_offset == symdef->file_offset); - - /* We mark subsequent symbols from this object file as we go - on through the loop. */ - last = symdef->file_offset; - } + long sdiff = h1->root.u.def.section - h2->root.u.def.section; + if (sdiff) + return sdiff > 0 ? 1 : -1; + else + return 0; } - while (loop); - - free (defined); - free (included); - - return TRUE; - - error_return: - if (defined != NULL) - free (defined); - if (included != NULL) - free (included); - return FALSE; } /* Add symbols from an ELF object file to the linker hash table. */ @@ -1493,63 +1169,132 @@ elf_link_add_object_symbols (bfd *abfd, assembler code, handling it correctly would be very time consuming, and other ELF linkers don't handle general aliasing either. */ - while (weaks != NULL) + if (weaks != NULL) { - struct elf_link_hash_entry *hlook; - asection *slook; - bfd_vma vlook; struct elf_link_hash_entry **hpp; struct elf_link_hash_entry **hppend; + struct elf_link_hash_entry **sorted_sym_hash; + struct elf_link_hash_entry *h; + size_t sym_count; - hlook = weaks; - weaks = hlook->weakdef; - hlook->weakdef = NULL; - - BFD_ASSERT (hlook->root.type == bfd_link_hash_defined - || hlook->root.type == bfd_link_hash_defweak - || hlook->root.type == bfd_link_hash_common - || hlook->root.type == bfd_link_hash_indirect); - slook = hlook->root.u.def.section; - vlook = hlook->root.u.def.value; - + /* Since we have to search the whole symbol list for each weak + defined symbol, search time for N weak defined symbols will be + O(N^2). Binary search will cut it down to O(NlogN). */ + amt = extsymcount * sizeof (struct elf_link_hash_entry *); + sorted_sym_hash = bfd_malloc (amt); + if (sorted_sym_hash == NULL) + goto error_return; + sym_hash = sorted_sym_hash; hpp = elf_sym_hashes (abfd); hppend = hpp + extsymcount; + sym_count = 0; for (; hpp < hppend; hpp++) { - struct elf_link_hash_entry *h; - h = *hpp; - if (h != NULL && h != hlook + if (h != NULL && h->root.type == bfd_link_hash_defined - && h->root.u.def.section == slook - && h->root.u.def.value == vlook) + && h->type != STT_FUNC) { - hlook->weakdef = h; + *sym_hash = h; + sym_hash++; + sym_count++; + } + } - /* If the weak definition is in the list of dynamic - symbols, make sure the real definition is put there - as well. */ - if (hlook->dynindx != -1 - && h->dynindx == -1) + qsort (sorted_sym_hash, sym_count, + sizeof (struct elf_link_hash_entry *), + sort_symbol); + + while (weaks != NULL) + { + struct elf_link_hash_entry *hlook; + asection *slook; + bfd_vma vlook; + long ilook; + size_t i, j, idx; + + hlook = weaks; + weaks = hlook->weakdef; + hlook->weakdef = NULL; + + BFD_ASSERT (hlook->root.type == bfd_link_hash_defined + || hlook->root.type == bfd_link_hash_defweak + || hlook->root.type == bfd_link_hash_common + || hlook->root.type == bfd_link_hash_indirect); + slook = hlook->root.u.def.section; + vlook = hlook->root.u.def.value; + + ilook = -1; + i = 0; + j = sym_count; + while (i < j) + { + bfd_signed_vma vdiff; + idx = (i + j) / 2; + h = sorted_sym_hash [idx]; + vdiff = vlook - h->root.u.def.value; + if (vdiff < 0) + j = idx; + else if (vdiff > 0) + i = idx + 1; + else { - if (! _bfd_elf_link_record_dynamic_symbol (info, h)) - goto error_return; + long sdiff = slook - h->root.u.def.section; + if (sdiff < 0) + j = idx; + else if (sdiff > 0) + i = idx + 1; + else + { + ilook = idx; + break; + } } + } + + /* We didn't find a value/section match. */ + if (ilook == -1) + continue; - /* If the real definition is in the list of dynamic - symbols, make sure the weak definition is put there - as well. If we don't do this, then the dynamic - loader might not merge the entries for the real - definition and the weak definition. */ - if (h->dynindx != -1 - && hlook->dynindx == -1) + for (i = ilook; i < sym_count; i++) + { + h = sorted_sym_hash [i]; + + /* Stop if value or section doesn't match. */ + if (h->root.u.def.value != vlook + || h->root.u.def.section != slook) + break; + else if (h != hlook) { - if (! _bfd_elf_link_record_dynamic_symbol (info, hlook)) - goto error_return; + hlook->weakdef = h; + + /* If the weak definition is in the list of dynamic + symbols, make sure the real definition is put + there as well. */ + if (hlook->dynindx != -1 && h->dynindx == -1) + { + if (! _bfd_elf_link_record_dynamic_symbol (info, + h)) + goto error_return; + } + + /* If the real definition is in the list of dynamic + symbols, make sure the weak definition is put + there as well. If we don't do this, then the + dynamic loader might not merge the entries for the + real definition and the weak definition. */ + if (h->dynindx != -1 && hlook->dynindx == -1) + { + if (! _bfd_elf_link_record_dynamic_symbol (info, + hlook)) + goto error_return; + } + break; } - break; } } + + free (sorted_sym_hash); } /* If this object is the same format as the output object, and it is @@ -2434,6 +2179,11 @@ NAME(bfd_elf,size_dynamic_sections) (bfd if (! elf_add_dynamic_entry (info, DT_FLAGS, info->flags)) return FALSE; } + else if (info->flags & DF_BIND_NOW) + { + if (! elf_add_dynamic_entry (info, DT_BIND_NOW, 0)) + return FALSE; + } if (info->flags_1) { diff -uprN binutils-2.14.90.0.8/bfd/elfxx-ia64.c binutils-2.15.90.0.1/bfd/elfxx-ia64.c --- binutils-2.14.90.0.8/bfd/elfxx-ia64.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elfxx-ia64.c 2004-03-03 12:24:33.000000000 -0800 @@ -92,6 +92,9 @@ struct elfNN_ia64_dyn_sym_info asection *srel; int type; int count; + + /* Is this reloc against readonly section? */ + bfd_boolean reltext; } *reloc_entries; /* TRUE when the section contents have been updated. */ @@ -243,9 +246,6 @@ static asection *get_pltoff static asection *get_reloc_section PARAMS ((bfd *abfd, struct elfNN_ia64_link_hash_table *ia64_info, asection *sec, bfd_boolean create)); -static bfd_boolean count_dyn_reloc - PARAMS ((bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i, - asection *srel, int type)); static bfd_boolean elfNN_ia64_check_relocs PARAMS ((bfd *abfd, struct bfd_link_info *info, asection *sec, const Elf_Internal_Rela *relocs)); @@ -672,6 +672,36 @@ bfd_elfNN_ia64_after_parse (int itanium) oor_branch_size = itanium ? sizeof (oor_ip) : sizeof (oor_brl); } +static void +elfNN_ia64_relax_brl (bfd *abfd, bfd_byte *contents, bfd_vma off) +{ + int template; + bfd_byte *hit_addr; + bfd_vma t0, t1, i0, i1, i2; + + hit_addr = (bfd_byte *) (contents + off); + hit_addr -= (long) hit_addr & 0x3; + t0 = bfd_get_64 (abfd, hit_addr); + t1 = bfd_get_64 (abfd, hit_addr + 8); + + /* Keep the instruction in slot 0. */ + i0 = (t0 >> 5) & 0x1ffffffffffLL; + /* Use nop.b for slot 1. */ + i1 = 0x4000000000LL; + /* For slot 2, turn brl into br by masking out bit 40. */ + i2 = (t1 >> 23) & 0x0ffffffffffLL; + + /* Turn a MLX bundle into a MBB bundle with the same stop-bit + variety. */ + template = 0x12; + if ((t0 & 0x1fLL) == 5) + template += 1; + t0 = (i1 << 46) | (i0 << 5) | template; + t1 = (i2 << 23) | (i1 >> 18); + + bfd_put_64 (abfd, t0, hit_addr); + bfd_put_64 (abfd, t1, hit_addr + 8); +} /* These functions do relaxation for IA-64 ELF. */ @@ -765,13 +795,30 @@ elfNN_ia64_relax_section (abfd, sec, lin case R_IA64_PCREL21BI: case R_IA64_PCREL21M: case R_IA64_PCREL21F: + /* In the finalize pass, all br relaxations are done. We can + skip it. */ if (!link_info->need_relax_finalize) continue; is_branch = TRUE; break; + case R_IA64_PCREL60B: + /* We can't optimize brl to br before the finalize pass since + br relaxations will increase the code size. Defer it to + the finalize pass. */ + if (link_info->need_relax_finalize) + { + sec->need_finalize_relax = 1; + continue; + } + is_branch = TRUE; + break; + case R_IA64_LTOFF22X: case R_IA64_LDXMOV: + /* We can't relax ldx/mov before the finalize pass since + br relaxations will increase the code size. Defer it to + the finalize pass. */ if (link_info->need_relax_finalize) { sec->need_finalize_relax = 1; @@ -885,6 +932,25 @@ elfNN_ia64_relax_section (abfd, sec, lin /* If the branch is in range, no need to do anything. */ if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000 && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0) + { + /* If the 60-bit branch is in 21-bit range, optimize it. */ + if (r_type == R_IA64_PCREL60B) + { + elfNN_ia64_relax_brl (abfd, contents, roff); + + irel->r_info + = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), + R_IA64_PCREL21B); + + /* If the original relocation offset points to slot + 1, change it to slot 2. */ + if ((irel->r_offset & 3) == 1) + irel->r_offset += 1; + } + + continue; + } + else if (r_type == R_IA64_PCREL60B) continue; /* If the branch and target are in the same section, you've @@ -2109,18 +2175,12 @@ get_reloc_section (abfd, ia64_info, sec, return NULL; } - if (sec->flags & SEC_READONLY) - ia64_info->reltext = 1; - return srel; } static bfd_boolean -count_dyn_reloc (abfd, dyn_i, srel, type) - bfd *abfd; - struct elfNN_ia64_dyn_sym_info *dyn_i; - asection *srel; - int type; +count_dyn_reloc (bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i, + asection *srel, int type, bfd_boolean reltext) { struct elfNN_ia64_dyn_reloc_entry *rent; @@ -2141,6 +2201,7 @@ count_dyn_reloc (abfd, dyn_i, srel, type rent->count = 0; dyn_i->reloc_entries = rent; } + rent->reltext = reltext; rent->count++; return TRUE; @@ -2425,7 +2486,8 @@ elfNN_ia64_check_relocs (abfd, info, sec if (!srel) return FALSE; } - if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type)) + if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type, + (sec->flags & SEC_READONLY) != 0)) return FALSE; } } @@ -2732,6 +2794,8 @@ allocate_dynrel_entries (dyn_i, data) default: abort (); } + if (rent->reltext) + ia64_info->reltext = 1; rent->srel->_raw_size += sizeof (ElfNN_External_Rela) * count; } @@ -3951,6 +4015,24 @@ elfNN_ia64_relocate_section (output_bfd, BFD_ASSERT (srel != NULL); + switch (r_type) + { + case R_IA64_IMM14: + case R_IA64_IMM22: + case R_IA64_IMM64: + /* ??? People shouldn't be doing non-pic code in + shared libraries nor dynamic executables. */ + (*_bfd_error_handler) + (_("%s: non-pic code with imm relocation against dynamic symbol `%s'"), + bfd_archive_filename (input_bfd), + h->root.root.string); + ret_val = FALSE; + continue; + + default: + break; + } + /* If we don't need dynamic symbol lookup, find a matching RELATIVE relocation. */ dyn_r_type = r_type; @@ -3978,17 +4060,7 @@ elfNN_ia64_relocate_section (output_bfd, break; default: - /* We can't represent this without a dynamic symbol. - Adjust the relocation to be against an output - section symbol, which are always present in the - dynamic symbol table. */ - /* ??? People shouldn't be doing non-pic code in - shared libraries. Hork. */ - (*_bfd_error_handler) - (_("%s: linking non-pic code in a shared library"), - bfd_archive_filename (input_bfd)); - ret_val = FALSE; - continue; + break; } dynindx = 0; addend = value; diff -uprN binutils-2.14.90.0.8/bfd/elfxx-mips.c binutils-2.15.90.0.1/bfd/elfxx-mips.c --- binutils-2.14.90.0.8/bfd/elfxx-mips.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elfxx-mips.c 2004-03-03 12:24:33.000000000 -0800 @@ -3261,12 +3261,9 @@ mips_elf_calculate_relocation (bfd *abfd { case R_MIPS_GOT_PAGE: case R_MIPS_GOT_OFST: - /* If this symbol got a global GOT entry, we have to decay - GOT_PAGE/GOT_OFST to GOT_DISP/addend. */ - local_p = local_p || ! h - || (h->root.dynindx - < mips_elf_get_global_gotsym_index (elf_hash_table (info) - ->dynobj)); + /* We need to decay to GOT_DISP/addend if the symbol doesn't + bind locally. */ + local_p = local_p || _bfd_elf_symbol_refs_local_p (&h->root, info, 1); if (local_p || r_type == R_MIPS_GOT_OFST) break; /* Fall through. */ @@ -4271,6 +4268,26 @@ _bfd_mips_elf_symbol_processing (bfd *ab } } +/* There appears to be a bug in the MIPSpro linker that causes GOT_DISP + relocations against two unnamed section symbols to resolve to the + same address. For example, if we have code like: + + lw $4,%got_disp(.data)($gp) + lw $25,%got_disp(.text)($gp) + jalr $25 + + then the linker will resolve both relocations to .data and the program + will jump there rather than to .text. + + We can work around this problem by giving names to local section symbols. + This is also what the MIPSpro tools do. */ + +bfd_boolean +_bfd_mips_elf_name_local_section_symbols (bfd *abfd) +{ + return SGI_COMPAT (abfd); +} + /* Work over a section just before writing it out. This routine is used by both the 32-bit and the 64-bit ABI. FIXME: We recognize sections that need the SHF_MIPS_GPREL flag by name; there has to be @@ -5364,25 +5381,10 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s hmips = (struct mips_elf_link_hash_entry *) hmips->root.root.u.i.link; - if ((hmips->root.root.type == bfd_link_hash_defined - || hmips->root.root.type == bfd_link_hash_defweak) - && hmips->root.root.u.def.section + if ((hmips->root.elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) && ! (info->shared && ! info->symbolic && ! (hmips->root.elf_link_hash_flags - & ELF_LINK_FORCED_LOCAL)) - /* If we've encountered any other relocation - referencing the symbol, we'll have marked it as - dynamic, and, even though we might be able to get - rid of the GOT entry should we know for sure all - previous relocations were GOT_PAGE ones, at this - point we can't tell, so just keep using the - symbol as dynamic. This is very important in the - multi-got case, since we don't decide whether to - decay GOT_PAGE to GOT_DISP on a per-GOT basis: if - the symbol is dynamic, we'll need a GOT entry for - every GOT in which the symbol is referenced with - a GOT_PAGE relocation. */ - && hmips->root.dynindx == -1) + & ELF_LINK_FORCED_LOCAL))) break; } /* Fall through. */ diff -uprN binutils-2.14.90.0.8/bfd/elfxx-mips.h binutils-2.15.90.0.1/bfd/elfxx-mips.h --- binutils-2.14.90.0.8/bfd/elfxx-mips.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elfxx-mips.h 2004-03-03 12:24:33.000000000 -0800 @@ -24,6 +24,8 @@ extern bfd_boolean _bfd_mips_elf_new_sec (bfd *, asection *); extern void _bfd_mips_elf_symbol_processing (bfd *, asymbol *); +extern bfd_boolean _bfd_mips_elf_name_local_section_symbols + (bfd *); extern bfd_boolean _bfd_mips_elf_section_processing (bfd *, Elf_Internal_Shdr *); extern bfd_boolean _bfd_mips_elf_section_from_shdr @@ -119,4 +121,6 @@ extern bfd_vma _bfd_mips_elf_sign_extend (bfd_vma, int); extern struct bfd_elf_special_section const _bfd_mips_elf_special_sections[]; +#define elf_backend_name_local_section_symbols \ + _bfd_mips_elf_name_local_section_symbols #define elf_backend_special_sections _bfd_mips_elf_special_sections diff -uprN binutils-2.14.90.0.8/bfd/elfxx-target.h binutils-2.15.90.0.1/bfd/elfxx-target.h --- binutils-2.14.90.0.8/bfd/elfxx-target.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/elfxx-target.h 2004-03-03 12:24:33.000000000 -0800 @@ -274,6 +274,9 @@ #ifndef elf_backend_get_symbol_type #define elf_backend_get_symbol_type 0 #endif +#ifndef elf_backend_name_local_section_symbols +#define elf_backend_name_local_section_symbols 0 +#endif #ifndef elf_backend_section_processing #define elf_backend_section_processing 0 #endif @@ -388,6 +391,15 @@ #ifndef elf_backend_ignore_discarded_relocs #define elf_backend_ignore_discarded_relocs NULL #endif +#ifndef elf_backend_can_make_relative_eh_frame +#define elf_backend_can_make_relative_eh_frame _bfd_elf_can_make_relative +#endif +#ifndef elf_backend_can_make_lsda_relative_eh_frame +#define elf_backend_can_make_lsda_relative_eh_frame _bfd_elf_can_make_relative +#endif +#ifndef elf_backend_encode_eh_address +#define elf_backend_encode_eh_address _bfd_elf_encode_eh_address +#endif #ifndef elf_backend_write_section #define elf_backend_write_section NULL #endif @@ -456,6 +468,7 @@ static const struct elf_backend_data elf elf_backend_symbol_processing, elf_backend_symbol_table_processing, elf_backend_get_symbol_type, + elf_backend_name_local_section_symbols, elf_backend_section_processing, elf_backend_section_from_shdr, elf_backend_section_flags, @@ -493,6 +506,9 @@ static const struct elf_backend_data elf elf_backend_reloc_type_class, elf_backend_discard_info, elf_backend_ignore_discarded_relocs, + elf_backend_can_make_relative_eh_frame, + elf_backend_can_make_lsda_relative_eh_frame, + elf_backend_encode_eh_address, elf_backend_write_section, elf_backend_mips_irix_compat, elf_backend_mips_rtype_to_howto, diff -uprN binutils-2.14.90.0.8/bfd/libaout.h binutils-2.15.90.0.1/bfd/libaout.h --- binutils-2.14.90.0.8/bfd/libaout.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/libaout.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* BFD back-end data structures for a.out (and similar) files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Cygnus Support. @@ -249,73 +249,74 @@ struct aout_backend_data struct internal_exec { - long a_info; /* Magic number and flags, packed */ - bfd_vma a_text; /* length of text, in bytes */ - bfd_vma a_data; /* length of data, in bytes */ - bfd_vma a_bss; /* length of uninitialized data area in mem */ - bfd_vma a_syms; /* length of symbol table data in file */ - bfd_vma a_entry; /* start address */ - bfd_vma a_trsize; /* length of text's relocation info, in bytes */ - bfd_vma a_drsize; /* length of data's relocation info, in bytes */ - /* Added for i960 */ - bfd_vma a_tload; /* Text runtime load address */ - bfd_vma a_dload; /* Data runtime load address */ - unsigned char a_talign; /* Alignment of text segment */ - unsigned char a_dalign; /* Alignment of data segment */ - unsigned char a_balign; /* Alignment of bss segment */ - char a_relaxable; /* Enough info for linker relax */ + long a_info; /* Magic number and flags, packed. */ + bfd_vma a_text; /* Length of text, in bytes. */ + bfd_vma a_data; /* Length of data, in bytes. */ + bfd_vma a_bss; /* Length of uninitialized data area in mem. */ + bfd_vma a_syms; /* Length of symbol table data in file. */ + bfd_vma a_entry; /* Start address. */ + bfd_vma a_trsize; /* Length of text's relocation info, in bytes. */ + bfd_vma a_drsize; /* Length of data's relocation info, in bytes. */ + /* Added for i960 */ + bfd_vma a_tload; /* Text runtime load address. */ + bfd_vma a_dload; /* Data runtime load address. */ + unsigned char a_talign; /* Alignment of text segment. */ + unsigned char a_dalign; /* Alignment of data segment. */ + unsigned char a_balign; /* Alignment of bss segment. */ + char a_relaxable; /* Enough info for linker relax. */ }; /* Magic number is written -< MSB > -3130292827262524232221201918171615141312111009080706050403020100 -< FLAGS >< MACHINE TYPE >< MAGIC NUMBER > -*/ + < MSB > + 3130292827262524232221201918171615141312111009080706050403020100 + < FLAGS >< MACHINE TYPE >< MAGIC NUMBER > */ + /* Magic number for NetBSD is - -3130292827262524232221201918171615141312111009080706050403020100 -< FLAGS >< MACHINE TYPE >< MAGIC NUMBER > -*/ + + 3130292827262524232221201918171615141312111009080706050403020100 + < FLAGS >< MACHINE TYPE >< MAGIC NUMBER > */ -enum machine_type { +enum machine_type +{ M_UNKNOWN = 0, M_68010 = 1, M_68020 = 2, M_SPARC = 3, /* Skip a bunch so we don't run into any of SUN's numbers. */ /* Make these up for the ns32k. */ - M_NS32032 = (64), /* ns32032 running ? */ - M_NS32532 = (64 + 5), /* ns32532 running mach */ - + M_NS32032 = (64), /* NS32032 running ? */ + M_NS32532 = (64 + 5), /* NS32532 running mach. */ M_386 = 100, - M_29K = 101, /* AMD 29000 */ - M_386_DYNIX = 102, /* Sequent running dynix */ - M_ARM = 103, /* Advanced Risc Machines ARM */ - M_SPARCLET = 131, /* SPARClet = M_SPARC + 128 */ - M_386_NETBSD = 134, /* NetBSD/i386 binary */ - M_68K_NETBSD = 135, /* NetBSD/m68k binary */ - M_68K4K_NETBSD = 136, /* NetBSD/m68k4k binary */ - M_532_NETBSD = 137, /* NetBSD/ns32k binary */ - M_SPARC_NETBSD = 138, /* NetBSD/sparc binary */ - M_PMAX_NETBSD = 139, /* NetBSD/pmax (MIPS little-endian) binary */ - M_VAX_NETBSD = 140, /* NetBSD/vax binary */ - M_ALPHA_NETBSD = 141, /* NetBSD/alpha binary */ - M_ARM6_NETBSD = 143, /* NetBSD/arm32 binary */ - M_SPARCLET_1 = 147, /* 0x93, reserved */ - M_VAX4K_NETBSD = 150, /* NetBSD/vax 4K pages binary */ - M_MIPS1 = 151, /* MIPS R2000/R3000 binary */ - M_MIPS2 = 152, /* MIPS R4000/R6000 binary */ - M_SPARCLET_2 = 163, /* 0xa3, reserved */ - M_SPARCLET_3 = 179, /* 0xb3, reserved */ - M_SPARCLET_4 = 195, /* 0xc3, reserved */ - M_HP200 = 200, /* HP 200 (68010) BSD binary */ - M_HP300 = (300 % 256), /* HP 300 (68020+68881) BSD binary */ - M_HPUX = (0x20c % 256), /* HP 200/300 HPUX binary */ - M_SPARCLET_5 = 211, /* 0xd3, reserved */ - M_SPARCLET_6 = 227, /* 0xe3, reserved */ - /* M_SPARCLET_7 = 243 / * 0xf3, reserved */ + M_29K = 101, /* AMD 29000. */ + M_386_DYNIX = 102, /* Sequent running dynix. */ + M_ARM = 103, /* Advanced Risc Machines ARM. */ + M_SPARCLET = 131, /* SPARClet = M_SPARC + 128. */ + M_386_NETBSD = 134, /* NetBSD/i386 binary. */ + M_68K_NETBSD = 135, /* NetBSD/m68k binary. */ + M_68K4K_NETBSD = 136, /* NetBSD/m68k4k binary. */ + M_532_NETBSD = 137, /* NetBSD/ns32k binary. */ + M_SPARC_NETBSD = 138, /* NetBSD/sparc binary. */ + M_PMAX_NETBSD = 139, /* NetBSD/pmax (MIPS little-endian) binary. */ + M_VAX_NETBSD = 140, /* NetBSD/vax binary. */ + M_ALPHA_NETBSD = 141, /* NetBSD/alpha binary. */ + M_ARM6_NETBSD = 143, /* NetBSD/arm32 binary. */ + M_SPARCLET_1 = 147, /* 0x93, reserved. */ + M_VAX4K_NETBSD = 150, /* NetBSD/vax 4K pages binary. */ + M_MIPS1 = 151, /* MIPS R2000/R3000 binary. */ + M_MIPS2 = 152, /* MIPS R4000/R6000 binary. */ + M_SPARC64_NETBSD = 156, /* NetBSD/sparc64 binary. */ + M_X86_64_NETBSD = 157, /* NetBSD/amd64 binary. */ + M_SPARCLET_2 = 163, /* 0xa3, reserved. */ + M_SPARCLET_3 = 179, /* 0xb3, reserved. */ + M_SPARCLET_4 = 195, /* 0xc3, reserved. */ + M_HP200 = 200, /* HP 200 (68010) BSD binary. */ + M_HP300 = (300 % 256), /* HP 300 (68020+68881) BSD binary. */ + M_HPUX = (0x20c % 256), /* HP 200/300 HPUX binary. */ + M_SPARCLET_5 = 211, /* 0xd3, reserved. */ + M_SPARCLET_6 = 227, /* 0xe3, reserved. */ +/*M_SPARCLET_7 = 243 / * 0xf3, reserved. */ M_SPARCLITE_LE = 243, - M_CRIS = 255 /* Axis CRIS binary. */ + M_CRIS = 255 /* Axis CRIS binary. */ }; #define N_DYNAMIC(exec) ((exec).a_info & 0x80000000) @@ -362,7 +363,8 @@ enum machine_type { ((exec).a_info&0x00ffffff) | (((flags) & 0xff) << 24)) #endif -typedef struct aout_symbol { +typedef struct aout_symbol +{ asymbol symbol; short desc; char other; @@ -373,9 +375,10 @@ typedef struct aout_symbol { Various things depend on this struct being around any time an a.out file is being handled. An example is dbxread.c in GDB. */ -struct aoutdata { - struct internal_exec *hdr; /* exec file header */ - aout_symbol_type *symbols; /* symtab for input bfd */ +struct aoutdata +{ + struct internal_exec *hdr; /* Exec file header. */ + aout_symbol_type *symbols; /* Symtab for input bfd. */ /* For ease, we do this. */ asection *textsec; @@ -445,30 +448,31 @@ struct aoutdata { bfd_vma *local_got_offsets; }; -struct aout_data_struct { - struct aoutdata a; - struct internal_exec e; +struct aout_data_struct +{ + struct aoutdata a; + struct internal_exec e; }; -#define adata(bfd) ((bfd)->tdata.aout_data->a) -#define exec_hdr(bfd) (adata(bfd).hdr) -#define obj_aout_symbols(bfd) (adata(bfd).symbols) -#define obj_textsec(bfd) (adata(bfd).textsec) -#define obj_datasec(bfd) (adata(bfd).datasec) -#define obj_bsssec(bfd) (adata(bfd).bsssec) -#define obj_sym_filepos(bfd) (adata(bfd).sym_filepos) -#define obj_str_filepos(bfd) (adata(bfd).str_filepos) -#define obj_reloc_entry_size(bfd) (adata(bfd).reloc_entry_size) -#define obj_symbol_entry_size(bfd) (adata(bfd).symbol_entry_size) -#define obj_aout_subformat(bfd) (adata(bfd).subformat) -#define obj_aout_external_syms(bfd) (adata(bfd).external_syms) -#define obj_aout_external_sym_count(bfd) (adata(bfd).external_sym_count) -#define obj_aout_sym_window(bfd) (adata(bfd).sym_window) -#define obj_aout_external_strings(bfd) (adata(bfd).external_strings) -#define obj_aout_external_string_size(bfd) (adata(bfd).external_string_size) -#define obj_aout_string_window(bfd) (adata(bfd).string_window) -#define obj_aout_sym_hashes(bfd) (adata(bfd).sym_hashes) -#define obj_aout_dynamic_info(bfd) (adata(bfd).dynamic_info) +#define adata(bfd) ((bfd)->tdata.aout_data->a) +#define exec_hdr(bfd) (adata (bfd).hdr) +#define obj_aout_symbols(bfd) (adata (bfd).symbols) +#define obj_textsec(bfd) (adata (bfd).textsec) +#define obj_datasec(bfd) (adata (bfd).datasec) +#define obj_bsssec(bfd) (adata (bfd).bsssec) +#define obj_sym_filepos(bfd) (adata (bfd).sym_filepos) +#define obj_str_filepos(bfd) (adata (bfd).str_filepos) +#define obj_reloc_entry_size(bfd) (adata (bfd).reloc_entry_size) +#define obj_symbol_entry_size(bfd) (adata (bfd).symbol_entry_size) +#define obj_aout_subformat(bfd) (adata (bfd).subformat) +#define obj_aout_external_syms(bfd) (adata (bfd).external_syms) +#define obj_aout_external_sym_count(bfd) (adata (bfd).external_sym_count) +#define obj_aout_sym_window(bfd) (adata (bfd).sym_window) +#define obj_aout_external_strings(bfd) (adata (bfd).external_strings) +#define obj_aout_external_string_size(bfd) (adata (bfd).external_string_size) +#define obj_aout_string_window(bfd) (adata (bfd).string_window) +#define obj_aout_sym_hashes(bfd) (adata (bfd).sym_hashes) +#define obj_aout_dynamic_info(bfd) (adata (bfd).dynamic_info) /* We take the address of the first element of an asymbol to ensure that the macro is only ever applied to an asymbol. */ @@ -630,7 +634,7 @@ extern bfd_boolean NAME(aout,bfd_free_ca #ifndef WRITE_HEADERS #define WRITE_HEADERS(abfd, execp) \ { \ - bfd_size_type text_size; /* dummy vars */ \ + bfd_size_type text_size; /* Dummy vars. */ \ file_ptr text_end; \ if (adata(abfd).magic == undecided_magic) \ NAME(aout,adjust_sizes_and_vmas) (abfd, &text_size, &text_end); \ @@ -645,7 +649,7 @@ extern bfd_boolean NAME(aout,bfd_free_ca NAME(aout,swap_exec_header_out) (abfd, execp, &exec_bytes); \ \ if (bfd_seek (abfd, (file_ptr) 0, SEEK_SET) != 0 \ - || bfd_bwrite ((PTR) &exec_bytes, (bfd_size_type) EXEC_BYTES_SIZE, \ + || bfd_bwrite ((PTR) &exec_bytes, (bfd_size_type) EXEC_BYTES_SIZE,\ abfd) != EXEC_BYTES_SIZE) \ return FALSE; \ /* Now write out reloc info, followed by syms and strings. */ \ @@ -660,12 +664,12 @@ extern bfd_boolean NAME(aout,bfd_free_ca return FALSE; \ } \ \ - if (bfd_seek (abfd, (file_ptr) (N_TRELOFF(*execp)), SEEK_SET) != 0) \ + if (bfd_seek (abfd, (file_ptr) (N_TRELOFF (*execp)), SEEK_SET) != 0) \ return FALSE; \ if (!NAME(aout,squirt_out_relocs) (abfd, obj_textsec (abfd))) \ return FALSE; \ \ - if (bfd_seek (abfd, (file_ptr) (N_DRELOFF(*execp)), SEEK_SET) != 0) \ + if (bfd_seek (abfd, (file_ptr) (N_DRELOFF (*execp)), SEEK_SET) != 0) \ return FALSE; \ if (!NAME(aout,squirt_out_relocs) (abfd, obj_datasec (abfd))) \ return FALSE; \ diff -uprN binutils-2.14.90.0.8/bfd/libbfd-in.h binutils-2.15.90.0.1/bfd/libbfd-in.h --- binutils-2.14.90.0.8/bfd/libbfd-in.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/libbfd-in.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,8 +1,9 @@ /* libbfd.h -- Declarations used by bfd library *implementation*. (This include file is not for users of the library.) - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + + Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -594,6 +595,11 @@ extern void _bfd_abort #undef abort #define abort() _bfd_abort (__FILE__, __LINE__, __PRETTY_FUNCTION__) +/* Manipulate a system FILE but using BFD's "file_ptr", rather than + the system "off_t" or "off64_t", as the offset. */ +extern file_ptr real_ftell (FILE *file); +extern int real_fseek (FILE *file, file_ptr offset, int whence); + FILE * bfd_cache_lookup_worker (bfd *); diff -uprN binutils-2.14.90.0.8/bfd/libbfd.h binutils-2.15.90.0.1/bfd/libbfd.h --- binutils-2.14.90.0.8/bfd/libbfd.h 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/libbfd.h 2004-03-03 12:24:34.000000000 -0800 @@ -5,9 +5,10 @@ /* libbfd.h -- Declarations used by bfd library *implementation*. (This include file is not for users of the library.) - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + + Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + Written by Cygnus Support. This file is part of BFD, the Binary File Descriptor library. @@ -599,6 +600,11 @@ extern void _bfd_abort #undef abort #define abort() _bfd_abort (__FILE__, __LINE__, __PRETTY_FUNCTION__) +/* Manipulate a system FILE but using BFD's "file_ptr", rather than + the system "off_t" or "off64_t", as the offset. */ +extern file_ptr real_ftell (FILE *file); +extern int real_fseek (FILE *file, file_ptr offset, int whence); + FILE * bfd_cache_lookup_worker (bfd *); @@ -1430,6 +1436,7 @@ static const char *const bfd_reloc_code_ "BFD_RELOC_M68HC11_LO16", "BFD_RELOC_M68HC11_PAGE", "BFD_RELOC_M68HC11_24", + "BFD_RELOC_M68HC12_5B", "BFD_RELOC_CRIS_BDISP8", "BFD_RELOC_CRIS_UNSIGNED_5", "BFD_RELOC_CRIS_SIGNED_6", diff -uprN binutils-2.14.90.0.8/bfd/netbsd-core.c binutils-2.15.90.0.1/bfd/netbsd-core.c --- binutils-2.14.90.0.8/bfd/netbsd-core.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/netbsd-core.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,44 +1,47 @@ /* BFD back end for NetBSD style core files Copyright 1988, 1989, 1991, 1992, 1993, 1996, 1998, 1999, 2000, 2001, - 2002 + 2002, 2004 Free Software Foundation, Inc. Written by Paul Kranenburg, EUR -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "bfd.h" #include "sysdep.h" #include "libbfd.h" -#include "libaout.h" /* BFD a.out internal data structures */ +#include "libaout.h" /* BFD a.out internal data structures. */ #include #include #include #include -/* - * FIXME: On NetBSD/sparc CORE_FPU_OFFSET should be (sizeof (struct trapframe)) - */ +/* The machine ID for OpenBSD/sparc64 and older versions of + NetBSD/sparc64 overlaps with M_MIPS1. */ +#define M_SPARC64_OPENBSD M_MIPS1 -struct netbsd_core_struct { - struct core core; +/* FIXME: On NetBSD/sparc CORE_FPU_OFFSET should be (sizeof (struct trapframe)). */ + +struct netbsd_core_struct +{ + struct core core; } *rawptr; -/* forward declarations */ +/* Forward declarations. */ static const bfd_target *netbsd_core_file_p PARAMS ((bfd *abfd)); @@ -68,7 +71,7 @@ netbsd_core_file_p (abfd) val = bfd_bread ((void *) &core, amt, abfd); if (val != sizeof core) { - /* Too small to be a core file */ + /* Too small to be a core file. */ bfd_set_error (bfd_error_wrong_format); return 0; } @@ -160,6 +163,27 @@ netbsd_core_file_p (abfd) #endif } + /* Set architecture from machine ID. */ + switch (CORE_GETMID (core)) + { + case M_X86_64_NETBSD: + bfd_default_set_arch_mach (abfd, bfd_arch_i386, bfd_mach_x86_64); + break; + + case M_386_NETBSD: + bfd_default_set_arch_mach (abfd, bfd_arch_i386, bfd_mach_i386_i386); + break; + + case M_SPARC_NETBSD: + bfd_default_set_arch_mach (abfd, bfd_arch_sparc, bfd_mach_sparc); + break; + + case M_SPARC64_NETBSD: + case M_SPARC64_OPENBSD: + bfd_default_set_arch_mach (abfd, bfd_arch_sparc, bfd_mach_sparc_v9); + break; + } + /* OK, we believe you. You're a core file (sure, sure). */ return abfd->xvec; @@ -191,15 +215,19 @@ netbsd_core_file_matches_executable_p ( bfd *core_bfd ATTRIBUTE_UNUSED; bfd *exec_bfd ATTRIBUTE_UNUSED; { - return TRUE; /* FIXME, We have no way of telling at this point */ + /* FIXME, We have no way of telling at this point. */ + return TRUE; } /* If somebody calls any byte-swapping routines, shoot them. */ + static void swap_abort () { - abort (); /* This way doesn't require any declaration for ANSI to fuck up */ + /* This way doesn't require any declaration for ANSI to fuck up. */ + abort (); } + #define NO_GET ((bfd_vma (*) PARAMS (( const bfd_byte *))) swap_abort ) #define NO_PUT ((void (*) PARAMS ((bfd_vma, bfd_byte *))) swap_abort ) #define NO_SIGNED_GET \ @@ -209,33 +237,33 @@ const bfd_target netbsd_core_vec = { "netbsd-core", bfd_target_unknown_flavour, - BFD_ENDIAN_UNKNOWN, /* target byte order */ - BFD_ENDIAN_UNKNOWN, /* target headers byte order */ - (HAS_RELOC | EXEC_P | /* object flags */ + BFD_ENDIAN_UNKNOWN, /* Target byte order. */ + BFD_ENDIAN_UNKNOWN, /* Target headers byte order. */ + (HAS_RELOC | EXEC_P | /* Object flags. */ HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED), - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ - 0, /* symbol prefix */ - ' ', /* ar_pad_char */ - 16, /* ar_max_namelen */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 64 bit data */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 32 bit data */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 16 bit data */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 64 bit hdrs */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 32 bit hdrs */ - NO_GET, NO_SIGNED_GET, NO_PUT, /* 16 bit hdrs */ - - { /* bfd_check_format */ - _bfd_dummy_target, /* unknown format */ - _bfd_dummy_target, /* object file */ - _bfd_dummy_target, /* archive */ - netbsd_core_file_p /* a core file */ + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + 0, /* Symbol prefix. */ + ' ', /* ar_pad_char. */ + 16, /* ar_max_namelen. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 64 bit data. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 32 bit data. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 16 bit data. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 64 bit hdrs. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 32 bit hdrs. */ + NO_GET, NO_SIGNED_GET, NO_PUT, /* 16 bit hdrs. */ + + { /* bfd_check_format. */ + _bfd_dummy_target, /* Unknown format. */ + _bfd_dummy_target, /* Object file. */ + _bfd_dummy_target, /* Archive. */ + netbsd_core_file_p /* A core file. */ }, - { /* bfd_set_format */ + { /* bfd_set_format. */ bfd_false, bfd_false, bfd_false, bfd_false }, - { /* bfd_write_contents */ + { /* bfd_write_contents. */ bfd_false, bfd_false, bfd_false, bfd_false }, @@ -252,5 +280,5 @@ const bfd_target netbsd_core_vec = NULL, - (PTR) 0 /* backend_data */ + (PTR) 0 /* Backend_data. */ }; diff -uprN binutils-2.14.90.0.8/bfd/opncls.c binutils-2.15.90.0.1/bfd/opncls.c --- binutils-2.14.90.0.8/bfd/opncls.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/opncls.c 2004-03-03 12:24:34.000000000 -0800 @@ -70,8 +70,7 @@ _bfd_new_bfd (void) nbfd->direction = no_direction; nbfd->iostream = NULL; nbfd->where = 0; - if (!bfd_hash_table_init_n (&nbfd->section_htab, - bfd_section_hash_newfunc, + if (!bfd_hash_table_init_n (& nbfd->section_htab, bfd_section_hash_newfunc, 251)) { free (nbfd); @@ -923,7 +922,7 @@ find_separate_debug_file (bfd *abfd, con for (i = strlen (dir) - 1; i >= 0; i--) if (IS_DIR_SEPARATOR (dir[i])) break; - + dir[i + 1] = '\0'; BFD_ASSERT (dir[i] == '/' || dir[0] == '\0') @@ -996,23 +995,26 @@ SYNOPSIS DESCRIPTION Takes a BFD and searches it for a .gnu_debuglink section. If this - section is found, examines the section for the name and checksum of - a '.debug' file containing auxiliary debugging - information. Searches filesystem for .debug file in some standard + section is found, it examines the section for the name and checksum + of a '.debug' file containing auxiliary debugging information. It + then searches the filesystem for this .debug file in some standard locations, including the directory tree rooted at @var{dir}, and if - found returns the full filename. If @var{dir} is NULL, will search - default path configured into libbfd at build time. + found returns the full filename. + + If @var{dir} is NULL, it will search a default path configured into + libbfd at build time. [XXX this feature is not currently + implemented]. RETURNS <> on any errors or failure to locate the .debug file, otherwise a pointer to a heap-allocated string containing the - filename. The caller is responsible for freeing this string. + filename. The caller is responsible for freeing this string. */ char * bfd_follow_gnu_debuglink (bfd *abfd, const char *dir) { -#if 0 /* Disabled until DEBUGDIR can be defined by configure.in */ +#if 0 /* Disabled until DEBUGDIR can be defined by configure.in. */ if (dir == NULL) dir = DEBUGDIR; #endif diff -uprN binutils-2.14.90.0.8/bfd/peXXigen.c binutils-2.15.90.0.1/bfd/peXXigen.c --- binutils-2.14.90.0.8/bfd/peXXigen.c 2004-01-14 13:07:43.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/peXXigen.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* Support for the generic parts of PE/PEI; the common executable parts. - Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Cygnus Solutions. @@ -985,13 +985,20 @@ _bfd_XXi_swap_scnhdr_out (abfd, in, out) pe_required_section_flags * p; int flags = scnhdr_int->s_flags; + /* We have defaulted to adding the IMAGE_SCN_MEM_WRITE flag, but now + we know exactly what this specific section wants so we remove it + and then allow the must_have field to add it back in if necessary. + However, we don't remove IMAGE_SCN_MEM_WRITE flag from .text if the + default WP_TEXT file flag has been cleared. WP_TEXT may be cleared + by ld --enable-auto-import (if auto-import is actually needed), + by ld --omagic, or by obcopy --writable-text. */ + for (p = known_sections; p->section_name; p++) if (strcmp (scnhdr_int->s_name, p->section_name) == 0) { - /* We have defaulted to adding the IMAGE_SCN_MEM_WRITE flag, but now - we know exactly what this specific section wants so we remove it - and then allow the must_have field to add it back in if necessary. */ - flags &= ~IMAGE_SCN_MEM_WRITE; + if (strcmp (scnhdr_int->s_name, ".text") + || (bfd_get_file_flags (abfd) & WP_TEXT)) + flags &= ~IMAGE_SCN_MEM_WRITE; flags |= p->must_have; break; } diff -uprN binutils-2.14.90.0.8/bfd/reloc.c binutils-2.15.90.0.1/bfd/reloc.c --- binutils-2.14.90.0.8/bfd/reloc.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/reloc.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* BFD support for handling relocation entries. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Cygnus Support. @@ -3764,6 +3764,11 @@ ENUMDOC This is a 24-bit reloc that represents the address with a 16-bit value and a 8-bit page number. The symbol address is transformed to follow the 16K memory bank of 68HC12 (seen as mapped in the window). +ENUM + BFD_RELOC_M68HC12_5B +ENUMDOC + Motorola 68HC12 reloc. + This is the 5 bits of a value. ENUM BFD_RELOC_CRIS_BDISP8 diff -uprN binutils-2.14.90.0.8/bfd/version.h binutils-2.15.90.0.1/bfd/version.h --- binutils-2.14.90.0.8/bfd/version.h 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/bfd/version.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,3 @@ -#define BFD_VERSION_DATE 20040114 +#define BFD_VERSION_DATE 20040303 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_string@ diff -uprN binutils-2.14.90.0.8/binutils/ChangeLog binutils-2.15.90.0.1/binutils/ChangeLog --- binutils-2.14.90.0.8/binutils/ChangeLog 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,40 @@ +2004-02-27 Andreas Schwab + + * ar.c (main): Support POSIX-compatible argument parsing. + +2004-02-23 Daniel Lucq + + * readelf.c (process_mips_specific): Print conflictsno as an + unsigned long. + +2004-02-21 Dmitry Timoshkov + + * dlltool.c (gen_exp_file): Always output names for forwarded symbols. + +2004-02-19 Jakub Jelinek + + * objcopy.c (copy_section): Avoid warnings. + +2004-02-14 Andrew Cagney + + * ar.c (remove_output): Use bfd_cache_close. + * arsup.c (ar_end): Ditto. + +2004-01-21 Roland McGrath + + * readelf.c (get_note_type): Match NT_AUXV. + +2004-01-20 Nick Clifton + + * version.c (print_version): Update copyright year to 2004. + +2004-01-14 Maciej W. Rozycki + + * acinclude.m4: Quote names of macros to be defined by AC_DEFUN + throughout. + * aclocal.m4: Regenerate. + * configure: Regenerate. + 2004-01-12 Jakub Jelinek * objcopy.c: Include elf-bfd.h. diff -uprN binutils-2.14.90.0.8/binutils/acinclude.m4 binutils-2.15.90.0.1/binutils/acinclude.m4 --- binutils-2.14.90.0.8/binutils/acinclude.m4 2001-02-10 15:40:39.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/acinclude.m4 2004-03-03 12:24:34.000000000 -0800 @@ -26,7 +26,7 @@ AC_SUBST(INTLLIBS) dnl AM_PROG_LEX dnl Look for flex, lex or missing, then run AC_PROG_LEX and AC_DECL_YYTEXT -AC_DEFUN(AM_PROG_LEX, +AC_DEFUN([AM_PROG_LEX], [missing_dir=ifelse([$1],,`cd $ac_aux_dir && pwd`,$1) AC_CHECK_PROGS(LEX, flex lex, [$missing_dir/missing flex]) AC_PROG_LEX diff -uprN binutils-2.14.90.0.8/binutils/ar.c binutils-2.15.90.0.1/binutils/ar.c --- binutils-2.14.90.0.8/binutils/ar.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/ar.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* ar.c - Archive modify and extract. Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003 + 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GNU Binutils. @@ -324,8 +324,8 @@ remove_output (void) { if (output_filename != NULL) { - if (output_bfd != NULL && output_bfd->iostream != NULL) - fclose ((FILE *) (output_bfd->iostream)); + if (output_bfd != NULL) + bfd_cache_close (output_bfd); if (output_file != NULL) fclose (output_file); unlink (output_filename); @@ -353,6 +353,7 @@ main (int argc, char **argv) char *inarch_filename; int show_version; int i; + int do_posix = 0; #if defined (HAVE_SETLOCALE) && defined (HAVE_LC_MESSAGES) setlocale (LC_MESSAGES, ""); @@ -459,107 +460,125 @@ main (int argc, char **argv) if (argc < 2) usage (0); - arg_ptr = argv[1]; + arg_index = 1; + arg_ptr = argv[arg_index]; if (*arg_ptr == '-') - ++arg_ptr; /* compatibility */ + { + /* When the first option starts with '-' we support POSIX-compatible + option parsing. */ + do_posix = 1; + ++arg_ptr; /* compatibility */ + } - while ((c = *arg_ptr++) != '\0') + do { - switch (c) + while ((c = *arg_ptr++) != '\0') { - case 'd': - case 'm': - case 'p': - case 'q': - case 'r': - case 't': - case 'x': - if (operation != none) - fatal (_("two different operation options specified")); switch (c) { case 'd': - operation = delete; - operation_alters_arch = TRUE; - break; case 'm': - operation = move; - operation_alters_arch = TRUE; - break; case 'p': - operation = print_files; - break; case 'q': - operation = quick_append; - operation_alters_arch = TRUE; - break; case 'r': - operation = replace; - operation_alters_arch = TRUE; - break; case 't': - operation = print_table; - break; case 'x': - operation = extract; + if (operation != none) + fatal (_("two different operation options specified")); + switch (c) + { + case 'd': + operation = delete; + operation_alters_arch = TRUE; + break; + case 'm': + operation = move; + operation_alters_arch = TRUE; + break; + case 'p': + operation = print_files; + break; + case 'q': + operation = quick_append; + operation_alters_arch = TRUE; + break; + case 'r': + operation = replace; + operation_alters_arch = TRUE; + break; + case 't': + operation = print_table; + break; + case 'x': + operation = extract; + break; + } + case 'l': + break; + case 'c': + silent_create = 1; + break; + case 'o': + preserve_dates = 1; + break; + case 'V': + show_version = TRUE; + break; + case 's': + write_armap = 1; + break; + case 'S': + write_armap = -1; + break; + case 'u': + newer_only = 1; + break; + case 'v': + verbose = 1; + break; + case 'a': + postype = pos_after; + break; + case 'b': + postype = pos_before; break; + case 'i': + postype = pos_before; + break; + case 'M': + mri_mode = 1; + break; + case 'N': + counted_name_mode = TRUE; + break; + case 'f': + ar_truncate = TRUE; + break; + case 'P': + full_pathname = TRUE; + break; + default: + /* xgettext:c-format */ + non_fatal (_("illegal option -- %c"), c); + usage (0); } - case 'l': - break; - case 'c': - silent_create = 1; - break; - case 'o': - preserve_dates = 1; - break; - case 'V': - show_version = TRUE; - break; - case 's': - write_armap = 1; - break; - case 'S': - write_armap = -1; - break; - case 'u': - newer_only = 1; - break; - case 'v': - verbose = 1; - break; - case 'a': - postype = pos_after; - break; - case 'b': - postype = pos_before; - break; - case 'i': - postype = pos_before; - break; - case 'M': - mri_mode = 1; - break; - case 'N': - counted_name_mode = TRUE; - break; - case 'f': - ar_truncate = TRUE; - break; - case 'P': - full_pathname = TRUE; - break; - default: - /* xgettext:c-format */ - non_fatal (_("illegal option -- %c"), c); - usage (0); } + + /* With POSIX-compatible option parsing continue with the next + argument if it starts with '-'. */ + if (do_posix && arg_index + 1 < argc && argv[arg_index + 1][0] == '-') + arg_ptr = argv[++arg_index] + 1; + else + do_posix = 0; } + while (do_posix); if (show_version) print_version ("ar"); - if (argc < 3) + ++arg_index; + if (arg_index >= argc) usage (0); if (mri_mode) @@ -578,7 +597,7 @@ main (int argc, char **argv) if ((operation == none || operation == print_table) && write_armap == 1) { - ranlib_only (argv[2]); + ranlib_only (argv[arg_index]); xexit (0); } @@ -588,8 +607,6 @@ main (int argc, char **argv) if (newer_only && operation != replace) fatal (_("`u' is only meaningful with the `r' option.")); - arg_index = 2; - if (postype != pos_default) posname = argv[arg_index++]; diff -uprN binutils-2.14.90.0.8/binutils/arsup.c binutils-2.15.90.0.1/binutils/arsup.c --- binutils-2.14.90.0.8/binutils/arsup.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/arsup.c 2004-03-03 12:24:34.000000000 -0800 @@ -433,7 +433,7 @@ ar_end (void) { if (obfd) { - fclose ((FILE *)(obfd->iostream)); + bfd_cache_close (obfd); unlink (bfd_get_filename (obfd)); } } diff -uprN binutils-2.14.90.0.8/binutils/dlltool.c binutils-2.15.90.0.1/binutils/dlltool.c --- binutils-2.14.90.0.8/binutils/dlltool.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/dlltool.c 2004-03-03 12:24:34.000000000 -0800 @@ -1841,14 +1841,14 @@ gen_exp_file (void) fprintf(f,"%s Export Name Table\n", ASM_C); for (i = 0; (exp = d_exports_lexically[i]); i++) - if (!exp->noname || show_allnames) - { + { + if (!exp->noname || show_allnames) fprintf (f, "n%d: %s \"%s\"\n", exp->ordinal, ASM_TEXT, xlate (exp->name)); - if (exp->forward != 0) - fprintf (f, "f%d: %s \"%s\"\n", - exp->forward, ASM_TEXT, exp->internal_name); - } + if (exp->forward != 0) + fprintf (f, "f%d: %s \"%s\"\n", + exp->forward, ASM_TEXT, exp->internal_name); + } if (a_list) { diff -uprN binutils-2.14.90.0.8/binutils/objcopy.c binutils-2.15.90.0.1/binutils/objcopy.c --- binutils-2.14.90.0.8/binutils/objcopy.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/objcopy.c 2004-03-03 12:24:34.000000000 -0800 @@ -2055,9 +2055,9 @@ copy_section (bfd *ibfd, sec_ptr isectio if (copy_byte >= 0) { /* Keep only every `copy_byte'th byte in MEMHUNK. */ - char *from = memhunk + copy_byte; + char *from = (char *) memhunk + copy_byte; char *to = memhunk; - char *end = memhunk + size; + char *end = (char *) memhunk + size; for (; from < end; from += interleave) *to++ = *from; diff -uprN binutils-2.14.90.0.8/binutils/readelf.c binutils-2.15.90.0.1/binutils/readelf.c --- binutils-2.14.90.0.8/binutils/readelf.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/readelf.c 2004-03-03 12:24:34.000000000 -0800 @@ -25,7 +25,7 @@ Both programs are capabale of displaying the contents of ELF format files, so why does the binutils project have two file dumpers ? - + The reason is that objdump sees an ELF file through a BFD filter of the world; if BFD has a bug where, say, it disagrees about a machine constant in e_flags, then the odds are good that it will remain internally @@ -2271,7 +2271,7 @@ get_ia64_section_type_name (unsigned int /* If the top 8 bits are 0x78 the next 8 are the os/abi ID. */ if ((sh_type & 0xFF000000) == SHT_IA_64_LOPSREG) return get_osabi_name ((sh_type & 0x00FF0000) >> 16); - + switch (sh_type) { case SHT_IA_64_EXT: return "IA_64_EXT"; @@ -3478,7 +3478,7 @@ process_section_headers (FILE *file) if (string_table == NULL) return 0; - + string_table_length = section->sh_size; } @@ -3706,7 +3706,7 @@ process_relocs (FILE *file) const char *name; int has_dynamic_reloc; unsigned int i; - + has_dynamic_reloc = 0; for (i = 0; i < ARRAY_SIZE (dynamic_relocations); i++) @@ -4364,7 +4364,7 @@ dynamic_segment_ia64_val (Elf_Internal_D { switch (entry->d_tag) { - case DT_IA_64_PLT_RESERVE: + case DT_IA_64_PLT_RESERVE: /* First 3 slots reserved. */ print_vma (entry->d_un.d_ptr, PREFIX_HEX); printf (" -- "); @@ -6279,7 +6279,7 @@ find_section (const char * name) { Elf_Internal_Shdr *sec; unsigned int i; - + for (i = elf_header.e_shnum, sec = section_headers + i - 1; i; --i, --sec) if (strcmp (SECTION_NAME (sec), name) == 0) @@ -6382,7 +6382,7 @@ get_debug_line_pointer_sizes (FILE * fil { /* For 32-bit DWARF, the 1-byte address_size field is 10 bytes from the start of the section: - + unit_length: 4 bytes version: 2 bytes debug_abbrev_offset: 4 bytes @@ -9787,8 +9787,8 @@ process_mips_specific (FILE *file) free (econf64); } - printf (_("\nSection '.conflict' contains %ld entries:\n"), - (long) conflictsno); + printf (_("\nSection '.conflict' contains %lu entries:\n"), + (unsigned long) conflictsno); puts (_(" Num: Index Value Name")); for (cnt = 0; cnt < conflictsno; ++cnt) @@ -9892,6 +9892,7 @@ get_note_type (unsigned e_type) switch (e_type) { + case NT_AUXV: return _("NT_AUXV (auxiliary vector)"); case NT_PRSTATUS: return _("NT_PRSTATUS (prstatus structure)"); case NT_FPREGSET: return _("NT_FPREGSET (floating point registers)"); case NT_PRPSINFO: return _("NT_PRPSINFO (prpsinfo structure)"); diff -uprN binutils-2.14.90.0.8/binutils/testsuite/ChangeLog binutils-2.15.90.0.1/binutils/testsuite/ChangeLog --- binutils-2.14.90.0.8/binutils/testsuite/ChangeLog 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/testsuite/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,11 @@ +2004-02-27 Andreas Schwab + + * binutils-all/ar.exp (argument_parsing): New test. + +2004-02-20 Nathan Sidwell + + * binutils-all/objcopy.exp: Reorder arguments for POSIXLY_CORRECT + systems. For older changes see ChangeLog-9303 diff -uprN binutils-2.14.90.0.8/binutils/testsuite/binutils-all/ar.exp binutils-2.15.90.0.1/binutils/testsuite/binutils-all/ar.exp --- binutils-2.14.90.0.8/binutils/testsuite/binutils-all/ar.exp 2002-04-21 01:09:26.000000000 -0700 +++ binutils-2.15.90.0.1/binutils/testsuite/binutils-all/ar.exp 2004-03-03 12:24:34.000000000 -0800 @@ -1,4 +1,4 @@ -# Copyright 1995, 1997 Free Software Foundation, Inc. +# Copyright 1995, 1997, 2004 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -214,7 +214,43 @@ proc symbol_table { } { pass $testname } +# Test POSIX-compatible argument parsing. + +proc argument_parsing { } { + global AR + global AS + global srcdir + global subdir + + set testname "ar argument parsing" + + if ![binutils_assemble $srcdir/$subdir/bintest.s tmpdir/bintest.o] { + unresolved $testname + return + } + + if [is_remote host] { + set archive artest.a + set objfile [remote_download host tmpdir/bintest.o] + remote_file host delete $archive + } else { + set archive tmpdir/artest.a + set objfile tmpdir/bintest.o + } + + remote_file build delete tmpdir/artest.a + + set got [binutils_run $AR "-r -c $archive ${objfile}"] + if ![string match "" $got] { + fail $testname + return + } + + pass $testname +} + # Run the tests. long_filenames symbol_table +argument_parsing diff -uprN binutils-2.14.90.0.8/binutils/testsuite/binutils-all/objcopy.exp binutils-2.15.90.0.1/binutils/testsuite/binutils-all/objcopy.exp --- binutils-2.14.90.0.8/binutils/testsuite/binutils-all/objcopy.exp 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/testsuite/binutils-all/objcopy.exp 2004-03-03 12:24:34.000000000 -0800 @@ -175,7 +175,7 @@ if ![regexp "start address (\[0-9a-fA-Fx perror "objdump can not recognize bintest.o" set origstart "" } else { - set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $tempfile ${copyfile}.srec --set-start 0x7654"] + set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec --set-start 0x7654 $tempfile ${copyfile}.srec"] if ![string match "" $got] then { fail "objcopy --set-start" } else { @@ -192,7 +192,7 @@ if ![regexp "start address (\[0-9a-fA-Fx } } - set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $tempfile ${copyfile}.srec --adjust-start 0x123"] + set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec --adjust-start 0x123 $tempfile ${copyfile}.srec"] if ![string match "" $got] then { fail "objcopy --adjust-start" } else { @@ -237,7 +237,7 @@ while {[regexp $headers_regexp $got all if {$low == "" || $origstart == ""} then { perror "objdump can not recognize bintest.o" } else { - set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $tempfile ${copyfile}.srec --adjust-vma 0x123"] + set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec --adjust-vma 0x123 $tempfile ${copyfile}.srec"] if ![string match "" $got] then { fail "objcopy --adjust-vma" } else { @@ -271,7 +271,7 @@ if {$low == "" || $origstart == ""} then set got $rest } - set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $tempfile ${copyfile}.srec $arg"] + set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $arg $tempfile ${copyfile}.srec"] if ![string match "" $got] then { fail "objcopy --adjust-section-vma +" } else { @@ -291,7 +291,7 @@ if {$low == "" || $origstart == ""} then } regsub -all "\\+4" $arg "=[expr $low + 4]" argeq - set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $tempfile ${copyfile}.srec $argeq"] + set got [binutils_run $OBJCOPY "$OBJCOPYFLAGS -O srec $argeq $tempfile ${copyfile}.srec"] if ![string match "" $got] then { fail "objcopy --adjust-section-vma =" } else { diff -uprN binutils-2.14.90.0.8/binutils/version.c binutils-2.15.90.0.1/binutils/version.c --- binutils-2.14.90.0.8/binutils/version.c 2004-01-14 13:07:44.000000000 -0800 +++ binutils-2.15.90.0.1/binutils/version.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,22 +1,22 @@ /* version.c -- binutils version information - Copyright 1991, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1991, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. -This file is part of GNU Binutils. + This file is part of GNU Binutils. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include #include "bfd.h" @@ -32,7 +32,7 @@ print_version (const char *name) /* This output is intended to follow the GNU standards document. */ /* xgettext:c-format */ printf ("GNU %s %s\n", name, BFD_VERSION_STRING); - printf (_("Copyright 2003 Free Software Foundation, Inc.\n")); + printf (_("Copyright 2004 Free Software Foundation, Inc.\n")); printf (_("\ This program is free software; you may redistribute it under the terms of\n\ the GNU General Public License. This program has absolutely no warranty.\n")); diff -uprN binutils-2.14.90.0.8/binutils.spec binutils-2.15.90.0.1/binutils.spec --- binutils-2.14.90.0.8/binutils.spec 2004-01-14 13:08:51.000000000 -0800 +++ binutils-2.15.90.0.1/binutils.spec 2004-03-03 13:35:53.000000000 -0800 @@ -12,12 +12,12 @@ Summary: A GNU collection of binary utilities. Name: binutils -Version: 2.14.90.0.8 +Version: 2.15.90.0.1 Release: 1 Copyright: GPL Group: Development/Tools URL: http://sources.redhat.com/binutils -Source: http://www.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.gz +Source: http://www.kernel.org/pub/linux/devel/binutils/binutils-%{version}.tar.bz2 Buildroot: %{_tmppath}/%{name}-%{version}-%{release}-root Prereq: /sbin/install-info @@ -86,27 +86,17 @@ make tooldir=%{_prefix} all info %install rm -rf ${RPM_BUILD_ROOT} mkdir -p ${RPM_BUILD_ROOT}%{_prefix} -# Works for both rpm 3.0 and 4.0. -make prefix=${RPM_BUILD_ROOT}%{_prefix} \ - exec_prefix=$RPM_BUILD_ROOT%{_prefix} \ - tooldir=$RPM_BUILD_ROOT%{_prefix} \ - infodir=${RPM_BUILD_ROOT}%{_infodir} \ - mandir=${RPM_BUILD_ROOT}%{_mandir} \ - includedir=$RPM_BUILD_ROOT%{_prefix}/include \ - libdir=$RPM_BUILD_ROOT%{_prefix}/lib \ - bindir=$RPM_BUILD_ROOT%{_prefix}/bin \ - install install-info -#%makeinstall tooldir=${RPM_BUILD_ROOT}%{_prefix} -#make prefix=${RPM_BUILD_ROOT}%{_prefix} infodir=${RPM_BUILD_ROOT}%{_infodir} install-info -strip ${RPM_BUILD_ROOT}%{_prefix}/bin/* +# Works for rpm 4.0 only. +%makeinstall tooldir=${RPM_BUILD_ROOT}%{_prefix} +make prefix=${RPM_BUILD_ROOT}%{_prefix} infodir=${RPM_BUILD_ROOT}%{_infodir} install-info +strip ${RPM_BUILD_ROOT}%{_bindir}/* gzip -q9f ${RPM_BUILD_ROOT}%{_infodir}/*.info* -#install -m 644 libiberty/libiberty.a ${RPM_BUILD_ROOT}%{_prefix}/lib -install -m 644 include/libiberty.h ${RPM_BUILD_ROOT}%{_prefix}/include +install -m 644 include/libiberty.h ${RPM_BUILD_ROOT}%{_includedir} -chmod +x ${RPM_BUILD_ROOT}%{_prefix}/lib/lib*.so* +chmod +x ${RPM_BUILD_ROOT}%{_libdir}/lib*.so* -rm -f ${RPM_BUILD_ROOT}%{_prefix}/lib/lib{bfd,opcodes}.{la,so} +rm -f ${RPM_BUILD_ROOT}%{_libdir}/lib{bfd,opcodes}.{la,so} rm -f ${RPM_BUILD_ROOT}%{_infodir}/dir rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres}* @@ -137,10 +127,10 @@ fi %files %defattr(-,root,root) %doc README -%{_prefix}/bin/* +%{_bindir}/* %{_mandir}/man1/* -%{_prefix}/include/* +%{_includedir}/* %{_prefix}/lib/ldscripts/* -%{_prefix}/lib/lib* +%{_libdir}/lib* %{_infodir}/*info* %{_datadir}/locale/*/LC_MESSAGES/*.mo diff -uprN binutils-2.14.90.0.8/config/ChangeLog binutils-2.15.90.0.1/config/ChangeLog --- binutils-2.14.90.0.8/config/ChangeLog 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/config/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,10 @@ +2004-01-14 Maciej W. Rozycki + + * acinclude.m4: Quote names of macros to be defined by AC_DEFUN + throughout. + * aclocal.m4: Regenerate. + * configure: Regenerate. + 2003-10-14 Nathanael Nerode * gettext.m4: Properly quote arguments to AC_DEFUN. diff -uprN binutils-2.14.90.0.8/config/acinclude.m4 binutils-2.15.90.0.1/config/acinclude.m4 --- binutils-2.14.90.0.8/config/acinclude.m4 2003-05-23 07:18:53.000000000 -0700 +++ binutils-2.15.90.0.1/config/acinclude.m4 2004-03-03 12:24:34.000000000 -0800 @@ -6,7 +6,7 @@ dnl and doesn't call AC_PROG_CXX_GNU, ca dnl We are probably using a cross compiler, which will not be able to fully dnl link an executable. This should really be fixed in autoconf itself. dnl Find a working G++ cross compiler. This only works for the GNU C++ compiler. -AC_DEFUN(CYG_AC_PROG_CXX_CROSS, +AC_DEFUN([CYG_AC_PROG_CXX_CROSS], [AC_BEFORE([$0], [AC_PROG_CXXCPP]) AC_CHECK_PROGS(CXX, $CCC c++ g++ gcc CC cxx cc++, gcc) @@ -35,7 +35,7 @@ fi ]) dnl See if the G++ compiler we found works. -AC_DEFUN(CYG_AC_PROG_GXX_WORKS, +AC_DEFUN([CYG_AC_PROG_GXX_WORKS], [AC_MSG_CHECKING([whether the G++ compiler ($CXX $CXXFLAGS $LDFLAGS) actually works]) AC_LANG_SAVE AC_LANG_CPLUSPLUS @@ -103,7 +103,7 @@ AC_SUBST(CXX) dnl ==================================================================== dnl Find a working GCC cross compiler. This only works for the GNU gcc compiler. dnl This is based on the macros above for G++. -AC_DEFUN(CYG_AC_PROG_CC_CROSS, +AC_DEFUN([CYG_AC_PROG_CC_CROSS], [AC_BEFORE([$0], [AC_PROG_CCPP]) AC_CHECK_PROGS(CC, cc, gcc) @@ -132,7 +132,7 @@ fi ]) dnl See if the GCC compiler we found works. -AC_DEFUN(CYG_AC_PROG_GCC_WORKS, +AC_DEFUN([CYG_AC_PROG_GCC_WORKS], [AC_MSG_CHECKING([whether the Gcc compiler ($CC $CFLAGS $LDFLAGS) actually works]) AC_LANG_SAVE AC_LANG_C @@ -199,7 +199,7 @@ AC_SUBST(CC) dnl ==================================================================== dnl Find the BFD library in the build tree. This is used to access and dnl manipulate object or executable files. -AC_DEFUN(CYG_AC_PATH_BFD, [ +AC_DEFUN([CYG_AC_PATH_BFD], [ AC_MSG_CHECKING(for the bfd header in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." dnl Look for the header file @@ -241,7 +241,7 @@ AC_SUBST(BFDLIB) dnl ==================================================================== dnl Find the libiberty library. This defines many commonly used C dnl functions that exists in various states based on the underlying OS. -AC_DEFUN(CYG_AC_PATH_LIBERTY, [ +AC_DEFUN([CYG_AC_PATH_LIBERTY], [ AC_MSG_CHECKING(for the liberty library in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_liberty,[ @@ -262,7 +262,7 @@ AC_SUBST(LIBERTY) dnl ==================================================================== dnl Find the opcodes library. This is used to do dissasemblies. -AC_DEFUN(CYG_AC_PATH_OPCODES, [ +AC_DEFUN([CYG_AC_PATH_OPCODES], [ AC_MSG_CHECKING(for the opcodes library in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_opc,[ @@ -284,7 +284,7 @@ AC_SUBST(OPCODESLIB) dnl ==================================================================== dnl Look for the DejaGnu header file in the source tree. This file dnl defines the functions used to testing support. -AC_DEFUN(CYG_AC_PATH_DEJAGNU, [ +AC_DEFUN([CYG_AC_PATH_DEJAGNU], [ AC_MSG_CHECKING(for the testing support files in the source tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_dejagnu,[ @@ -335,7 +335,7 @@ AC_SUBST(DEJAGNUHDIR) dnl ==================================================================== dnl Find the libintl library in the build tree. This is for dnl internationalization support. -AC_DEFUN(CYG_AC_PATH_INTL, [ +AC_DEFUN([CYG_AC_PATH_INTL], [ AC_MSG_CHECKING(for the intl header in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." dnl Look for the header file @@ -375,7 +375,7 @@ AC_SUBST(INTLLIB) dnl ==================================================================== dnl Find the simulator library. -AC_DEFUN(CYG_AC_PATH_SIM, [ +AC_DEFUN([CYG_AC_PATH_SIM], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.. ../../../../../../../../../.." case "$target_cpu" in powerpc) target_dir=ppc ;; @@ -457,7 +457,7 @@ AC_SUBST(SIMLIB) dnl ==================================================================== dnl Find the libiberty library. -AC_DEFUN(CYG_AC_PATH_LIBIBERTY, [ +AC_DEFUN([CYG_AC_PATH_LIBIBERTY], [ AC_MSG_CHECKING(for the libiberty library in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_libib,[ @@ -477,7 +477,7 @@ AC_SUBST(LIBIBERTY) ]) dnl ==================================================================== -AC_DEFUN(CYG_AC_PATH_DEVO, [ +AC_DEFUN([CYG_AC_PATH_DEVO], [ AC_MSG_CHECKING(for devo headers in the source tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_devoh,[ @@ -498,7 +498,7 @@ AC_SUBST(DEVOHDIR) dnl ==================================================================== dnl find the IDE library and headers. -AC_DEFUN(CYG_AC_PATH_IDE, [ +AC_DEFUN([CYG_AC_PATH_IDE], [ AC_MSG_CHECKING(for IDE headers in the source tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." IDEHDIR= @@ -591,7 +591,7 @@ AC_SUBST(IDETCLLIB) dnl ==================================================================== dnl Find all the ILU headers and libraries -AC_DEFUN(CYG_AC_PATH_ILU, [ +AC_DEFUN([CYG_AC_PATH_ILU], [ AC_MSG_CHECKING(for ILU kernel headers in the source tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." AC_CACHE_VAL(ac_cv_c_iluh,[ @@ -752,7 +752,7 @@ dnl ==================================== dnl This defines the byte order for the host. We can't use dnl AC_C_BIGENDIAN, cause we want to create a config file and dnl substitue the real value, so the header files work right -AC_DEFUN(CYG_AC_C_ENDIAN, [ +AC_DEFUN([CYG_AC_C_ENDIAN], [ AC_MSG_CHECKING(to see if this is a little endian host) AC_CACHE_VAL(ac_cv_c_little_endian, [ ac_cv_c_little_endian=unknown @@ -809,7 +809,7 @@ AC_SUBST(ENDIAN) dnl ==================================================================== dnl Look for the path to libgcc, so we can use it to directly link dnl in libgcc.a with LD. -AC_DEFUN(CYG_AC_PATH_LIBGCC, +AC_DEFUN([CYG_AC_PATH_LIBGCC], [AC_MSG_CHECKING([Looking for the path to libgcc.a]) AC_LANG_SAVE AC_LANG_C @@ -844,12 +844,12 @@ dnl Warning: transition of version 9 to dnl because 10 sorts before 9. We also look for just tcl. We have to dnl be careful that we don't match stuff like tclX by accident. dnl the alternative search directory is involked by --with-tclinclude -AC_DEFUN(CYG_AC_PATH_TCL, [ +AC_DEFUN([CYG_AC_PATH_TCL], [ CYG_AC_PATH_TCLH CYG_AC_PATH_TCLCONFIG CYG_AC_LOAD_TCLCONFIG ]) -AC_DEFUN(CYG_AC_PATH_TCLH, [ +AC_DEFUN([CYG_AC_PATH_TCLH], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." no_tcl=true AC_MSG_CHECKING(for Tcl headers in the source tree) @@ -935,7 +935,7 @@ AC_SUBST(TCLHDIR) dnl ==================================================================== dnl Ok, lets find the tcl configuration -AC_DEFUN(CYG_AC_PATH_TCLCONFIG, [ +AC_DEFUN([CYG_AC_PATH_TCLCONFIG], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." dnl First, look for one uninstalled. dnl the alternative search directory is invoked by --with-tclconfig @@ -1024,7 +1024,7 @@ AC_SUBST(TCLCONFIG) dnl Defined as a separate macro so we don't have to cache the values dnl from PATH_TCLCONFIG (because this can also be cached). -AC_DEFUN(CYG_AC_LOAD_TCLCONFIG, [ +AC_DEFUN([CYG_AC_LOAD_TCLCONFIG], [ . $TCLCONFIG dnl AC_SUBST(TCL_VERSION) @@ -1070,12 +1070,12 @@ dnl AC_SUBST(TCL_UNSHARED_LIB_SUFFIX) ]) dnl ==================================================================== -AC_DEFUN(CYG_AC_PATH_TK, [ +AC_DEFUN([CYG_AC_PATH_TK], [ CYG_AC_PATH_TKH CYG_AC_PATH_TKCONFIG CYG_AC_LOAD_TKCONFIG ]) -AC_DEFUN(CYG_AC_PATH_TKH, [ +AC_DEFUN([CYG_AC_PATH_TKH], [ # # Ok, lets find the tk source trees so we can use the headers # If the directory (presumably symlink) named "tk" exists, use that one @@ -1168,7 +1168,7 @@ fi AC_SUBST(TKHDIR) ]) -AC_DEFUN(CYG_AC_PATH_TKCONFIG, [ +AC_DEFUN([CYG_AC_PATH_TKCONFIG], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." dnl First, look for one uninstalled. dnl the alternative search directory is invoked by --with-tkconfig @@ -1257,7 +1257,7 @@ AC_SUBST(TKCONFIG) dnl Defined as a separate macro so we don't have to cache the values dnl from PATH_TKCONFIG (because this can also be cached). -AC_DEFUN(CYG_AC_LOAD_TKCONFIG, [ +AC_DEFUN([CYG_AC_LOAD_TKCONFIG], [ if test -f "$TKCONFIG" ; then . $TKCONFIG fi @@ -1287,13 +1287,13 @@ dnl AC_SUBST(TK_EXEC_PREFIX) dnl ==================================================================== dnl Ok, lets find the itcl source trees so we can use the headers dnl the alternative search directory is involked by --with-itclinclude -AC_DEFUN(CYG_AC_PATH_ITCL, [ +AC_DEFUN([CYG_AC_PATH_ITCL], [ CYG_AC_PATH_ITCLH CYG_AC_PATH_ITCLLIB CYG_AC_PATH_ITCLSH CYG_AC_PATH_ITCLMKIDX ]) -AC_DEFUN(CYG_AC_PATH_ITCLH, [ +AC_DEFUN([CYG_AC_PATH_ITCLH], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." no_itcl=true AC_MSG_CHECKING(for Itcl headers in the source tree) @@ -1367,7 +1367,7 @@ AC_SUBST(ITCLHDIR) dnl Ok, lets find the itcl library dnl First, look for one uninstalled. dnl the alternative search directory is invoked by --with-itcllib -AC_DEFUN(CYG_AC_PATH_ITCLLIB, [ +AC_DEFUN([CYG_AC_PATH_ITCLLIB], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." if test x"${no_itcl}" = x ; then dnl we reset no_itcl incase something fails here @@ -1454,7 +1454,7 @@ AC_SUBST(ITCLLIB) dnl ==================================================================== dnl Ok, lets find the itcl source trees so we can use the itcl_sh script dnl the alternative search directory is involked by --with-itclinclude -AC_DEFUN(CYG_AC_PATH_ITCLSH, [ +AC_DEFUN([CYG_AC_PATH_ITCLSH], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." no_itcl=true AC_MSG_CHECKING(for the itcl_sh script) @@ -1516,7 +1516,7 @@ AC_SUBST(ITCLSH) dnl ==================================================================== dnl Ok, lets find the itcl source trees so we can use the itcl_sh script dnl the alternative search directory is involked by --with-itclinclude -AC_DEFUN(CYG_AC_PATH_ITCLMKIDX, [ +AC_DEFUN([CYG_AC_PATH_ITCLMKIDX], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." no_itcl=true AC_MSG_CHECKING(for itcl_mkindex.tcl script) @@ -1582,11 +1582,11 @@ AC_SUBST(ITCLMKIDX) dnl ==================================================================== dnl Ok, lets find the tix source trees so we can use the headers dnl the alternative search directory is involked by --with-tixinclude -AC_DEFUN(CYG_AC_PATH_TIX, [ +AC_DEFUN([CYG_AC_PATH_TIX], [ CYG_AC_PATH_TIXH CYG_AC_PATH_TIXLIB ]) -AC_DEFUN(CYG_AC_PATH_TIXH, [ +AC_DEFUN([CYG_AC_PATH_TIXH], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." no_tix=true AC_MSG_CHECKING(for Tix headers in the source tree) @@ -1663,7 +1663,7 @@ fi AC_SUBST(TIXHDIR) ]) -AC_DEFUN(CYG_AC_PATH_TIXCONFIG, [ +AC_DEFUN([CYG_AC_PATH_TIXCONFIG], [ # # Ok, lets find the tix configuration # First, look for one uninstalled. @@ -1737,7 +1737,7 @@ fi # Defined as a separate macro so we don't have to cache the values # from PATH_TIXCONFIG (because this can also be cached). -AC_DEFUN(CYG_AC_LOAD_TIXCONFIG, [ +AC_DEFUN([CYG_AC_LOAD_TIXCONFIG], [ if test -f "$TIXCONFIG" ; then . $TIXCONFIG fi @@ -1746,7 +1746,7 @@ AC_DEFUN(CYG_AC_LOAD_TIXCONFIG, [ AC_SUBST(TIX_LIB_FULL_PATH) ]) -AC_DEFUN(CYG_AC_PATH_ITCLCONFIG, [ +AC_DEFUN([CYG_AC_PATH_ITCLCONFIG], [ # # Ok, lets find the itcl configuration # First, look for one uninstalled. @@ -1820,7 +1820,7 @@ fi # Defined as a separate macro so we don't have to cache the values # from PATH_ITCLCONFIG (because this can also be cached). -AC_DEFUN(CYG_AC_LOAD_ITCLCONFIG, [ +AC_DEFUN([CYG_AC_LOAD_ITCLCONFIG], [ if test -f "$ITCLCONFIG" ; then . $ITCLCONFIG fi @@ -1833,7 +1833,7 @@ AC_DEFUN(CYG_AC_LOAD_ITCLCONFIG, [ ]) -AC_DEFUN(CYG_AC_PATH_ITKCONFIG, [ +AC_DEFUN([CYG_AC_PATH_ITKCONFIG], [ # # Ok, lets find the itk configuration # First, look for one uninstalled. @@ -1907,7 +1907,7 @@ fi # Defined as a separate macro so we don't have to cache the values # from PATH_ITKCONFIG (because this can also be cached). -AC_DEFUN(CYG_AC_LOAD_ITKCONFIG, [ +AC_DEFUN([CYG_AC_LOAD_ITKCONFIG], [ if test -f "$ITKCONFIG" ; then . $ITKCONFIG fi @@ -1921,11 +1921,11 @@ AC_DEFUN(CYG_AC_LOAD_ITKCONFIG, [ dnl ==================================================================== dnl Ok, lets find the libgui source trees so we can use the headers dnl the alternative search directory is involked by --with-libguiinclude -AC_DEFUN(CYG_AC_PATH_LIBGUI, [ +AC_DEFUN([CYG_AC_PATH_LIBGUI], [ CYG_AC_PATH_LIBGUIH CYG_AC_PATH_LIBGUILIB ]) -AC_DEFUN(CYG_AC_PATH_LIBGUIH, [ +AC_DEFUN([CYG_AC_PATH_LIBGUIH], [ dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../..../../../../../../../../../../.." no_libgui=true AC_MSG_CHECKING(for Libgui headers in the source tree) @@ -1995,7 +1995,7 @@ AC_SUBST(LIBGUIHDIR) dnl ==================================================================== dnl find the GUI library -AC_DEFUN(CYG_AC_PATH_LIBGUILIB, [ +AC_DEFUN([CYG_AC_PATH_LIBGUILIB], [ AC_MSG_CHECKING(for GUI library in the build tree) dirlist=".. ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../.. ../../../../../../../.. ../../../../../../../../.. ../../../../../../../../../.." dnl look for the library diff -uprN binutils-2.14.90.0.8/config.guess binutils-2.15.90.0.1/config.guess --- binutils-2.14.90.0.8/config.guess 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/config.guess 2004-03-03 12:24:33.000000000 -0800 @@ -3,7 +3,7 @@ # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, # 2000, 2001, 2002, 2003 Free Software Foundation, Inc. -timestamp='2003-06-12' +timestamp='2004-02-16' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by @@ -197,12 +197,18 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. echo "${machine}-${os}${release}" exit 0 ;; + amd64:OpenBSD:*:*) + echo x86_64-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; amiga:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; arc:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; + cats:OpenBSD:*:*) + echo arm-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; hp300:OpenBSD:*:*) echo m68k-unknown-openbsd${UNAME_RELEASE} exit 0 ;; @@ -221,6 +227,9 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ mvmeppc:OpenBSD:*:*) echo powerpc-unknown-openbsd${UNAME_RELEASE} exit 0 ;; + pegasos:OpenBSD:*:*) + echo powerpc-unknown-openbsd${UNAME_RELEASE} + exit 0 ;; pmax:OpenBSD:*:*) echo mipsel-unknown-openbsd${UNAME_RELEASE} exit 0 ;; @@ -236,6 +245,15 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ *:OpenBSD:*:*) echo ${UNAME_MACHINE}-unknown-openbsd${UNAME_RELEASE} exit 0 ;; + *:ekkoBSD:*:*) + echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} + exit 0 ;; + macppc:MirBSD:*:*) + echo powerppc-unknown-mirbsd${UNAME_RELEASE} + exit 0 ;; + *:MirBSD:*:*) + echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} + exit 0 ;; alpha:OSF1:*:*) if test $UNAME_RELEASE = "V4.0"; then UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` @@ -307,6 +325,9 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ *:OS/390:*:*) echo i370-ibm-openedition exit 0 ;; + *:OS400:*:*) + echo powerpc-ibm-os400 + exit 0 ;; arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) echo arm-acorn-riscix${UNAME_RELEASE} exit 0;; @@ -399,6 +420,9 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit 0 ;; + m68k:machten:*:*) + echo m68k-apple-machten${UNAME_RELEASE} + exit 0 ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit 0 ;; @@ -734,7 +758,7 @@ EOF echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; *:UNICOS/mp:*:*) - echo nv1-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + echo nv1-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit 0 ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` @@ -742,6 +766,11 @@ EOF FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit 0 ;; + 5000:UNIX_System_V:4.*:*) + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` + echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit 0 ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit 0 ;; @@ -751,7 +780,7 @@ EOF *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit 0 ;; - *:FreeBSD:*:*|*:GNU/FreeBSD:*:*) + *:FreeBSD:*:*) # Determine whether the default compiler uses glibc. eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c @@ -763,7 +792,10 @@ EOF #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` - echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`${LIBC:+-$LIBC} + # GNU/KFreeBSD systems have a "k" prefix to indicate we are using + # FreeBSD's kernel, but not the complete OS. + case ${LIBC} in gnu) kernel_only='k' ;; esac + echo ${UNAME_MACHINE}-unknown-${kernel_only}freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`${LIBC:+-$LIBC} exit 0 ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin @@ -796,8 +828,13 @@ EOF echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit 0 ;; *:GNU:*:*) + # the GNU system echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` exit 0 ;; + *:GNU/*:*:*) + # other systems with GNU libc and userland + echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu + exit 0 ;; i*86:Minix:*:*) echo ${UNAME_MACHINE}-pc-minix exit 0 ;; @@ -885,6 +922,9 @@ EOF s390:Linux:*:* | s390x:Linux:*:*) echo ${UNAME_MACHINE}-ibm-linux exit 0 ;; + sh64*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit 0 ;; sh*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu exit 0 ;; @@ -942,6 +982,9 @@ EOF LIBC=gnuaout #endif #endif + #ifdef __dietlibc__ + LIBC=dietlibc + #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` test x"${LIBC}" != x && echo "${UNAME_MACHINE}-pc-linux-${LIBC}" && exit 0 @@ -972,6 +1015,9 @@ EOF i*86:atheos:*:*) echo ${UNAME_MACHINE}-unknown-atheos exit 0 ;; + i*86:syllable:*:*) + echo ${UNAME_MACHINE}-pc-syllable + exit 0 ;; i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit 0 ;; @@ -1043,7 +1089,7 @@ EOF exit 0 ;; M68*:*:R3V[567]*:*) test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; - 3[34]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0) + 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` @@ -1158,7 +1204,7 @@ EOF *:QNX:*:4*) echo i386-pc-qnx exit 0 ;; - NSR-[DGKLNPTVW]:NONSTOP_KERNEL:*:*) + NSR-?:NONSTOP_KERNEL:*:*) echo nsr-tandem-nsk${UNAME_RELEASE} exit 0 ;; *:NonStop-UX:*:*) @@ -1199,6 +1245,12 @@ EOF *:ITS:*:*) echo pdp10-unknown-its exit 0 ;; + SEI:*:*:SEIUX) + echo mips-sei-seiux${UNAME_RELEASE} + exit 0 ;; + *:DragonFly:*:*) + echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` + exit 0 ;; esac #echo '(No uname command or uname output not recognized.)' 1>&2 diff -uprN binutils-2.14.90.0.8/config.sub binutils-2.15.90.0.1/config.sub --- binutils-2.14.90.0.8/config.sub 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/config.sub 2004-03-03 12:24:33.000000000 -0800 @@ -3,7 +3,7 @@ # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, # 2000, 2001, 2002, 2003 Free Software Foundation, Inc. -timestamp='2003-06-13' +timestamp='2004-02-16' # This file is (in principle) common to ALL GNU software. # The presence of a machine in this file suggests that SOME GNU software @@ -118,7 +118,8 @@ esac # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` case $maybe_os in - nto-qnx* | linux-gnu* | freebsd*-gnu* | netbsd*-gnu* | storm-chaos* | os2-emx* | rtmk-nova*) + nto-qnx* | linux-gnu* | linux-dietlibc | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | \ + kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | storm-chaos* | os2-emx* | rtmk-nova*) os=-$maybe_os basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` ;; @@ -232,13 +233,14 @@ case $basic_machine in | a29k \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ + | am33_2.0 \ | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \ | c4x | clipper \ | d10v | d30v | dlx | dsp16xx \ | fr30 | frv \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | i370 | i860 | i960 | ia64 \ - | iq2000 | ip2k \ + | ip2k | iq2000 \ | m32r | m68000 | m68k | m88k | mcore \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ @@ -251,6 +253,7 @@ case $basic_machine in | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa64 | mipsisa64el \ + | mipsisa64r2 | mipsisa64r2el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipstx39 | mipstx39el \ @@ -308,7 +311,7 @@ case $basic_machine in | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | i*86-* | i860-* | i960-* | ia64-* \ - | iq2000-* | ip2k-* \ + | ip2k-* | iq2000-* \ | m32r-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | mcore-* \ @@ -323,6 +326,7 @@ case $basic_machine in | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa64-* | mipsisa64el-* \ + | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipstx39-* | mipstx39el-* \ @@ -363,6 +367,9 @@ case $basic_machine in basic_machine=a29k-amd os=-udi ;; + abacus) + basic_machine=abacus-unknown + ;; adobe68k) basic_machine=m68010-adobe os=-scout @@ -380,6 +387,9 @@ case $basic_machine in amd64) basic_machine=x86_64-pc ;; + amd64-*) + basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; amdahl) basic_machine=580-amdahl os=-sysv @@ -439,6 +449,10 @@ case $basic_machine in basic_machine=j90-cray os=-unicos ;; + cr16c) + basic_machine=cr16c-unknown + os=-elf + ;; crds | unos) basic_machine=m68k-crds ;; @@ -744,6 +758,10 @@ case $basic_machine in basic_machine=or32-unknown os=-coff ;; + os400) + basic_machine=powerpc-ibm + os=-os400 + ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose @@ -851,6 +869,10 @@ case $basic_machine in sb1el) basic_machine=mipsisa64sb1el-unknown ;; + sei) + basic_machine=mips-sei + os=-seiux + ;; sequent) basic_machine=i386-sequent ;; @@ -858,6 +880,9 @@ case $basic_machine in basic_machine=sh-hitachi os=-hms ;; + sh64) + basic_machine=sh64-unknown + ;; sparclite-wrs | simso-wrs) basic_machine=sparclite-wrs os=-vxworks @@ -957,6 +982,10 @@ case $basic_machine in tower | tower-32) basic_machine=m68k-ncr ;; + tpf) + basic_machine=s390x-ibm + os=-tpf + ;; udi29k) basic_machine=a29k-amd os=-udi @@ -1125,19 +1154,20 @@ case $os in | -aos* \ | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ - | -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \ - | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ + | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* | -openbsd* \ + | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \ + | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ | -chorusos* | -chorusrdb* \ | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ - | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \ + | -mingw32* | -linux-gnu* | -linux-uclibc* | -uxpv* | -beos* | -mpeix* | -udk* \ | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \ | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \ | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \ | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \ - | -powermax* | -dnix* | -nx6 | -nx7) + | -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly*) # Remember, each alternative MUST END IN *, to match a version number. ;; -qnx*) @@ -1161,6 +1191,9 @@ case $os in -mac*) os=`echo $os | sed -e 's|mac|macos|'` ;; + -linux-dietlibc) + os=-linux-dietlibc + ;; -linux*) os=`echo $os | sed -e 's|linux|linux-gnu|'` ;; @@ -1173,6 +1206,9 @@ case $os in -opened*) os=-openedition ;; + -os400*) + os=-os400 + ;; -wince*) os=-wince ;; @@ -1194,6 +1230,9 @@ case $os in -atheos*) os=-atheos ;; + -syllable*) + os=-syllable + ;; -386bsd) os=-bsd ;; @@ -1216,6 +1255,9 @@ case $os in -sinix*) os=-sysv4 ;; + -tpf*) + os=-tpf + ;; -triton*) os=-sysv3 ;; @@ -1464,9 +1506,15 @@ case $basic_machine in -mvs* | -opened*) vendor=ibm ;; + -os400*) + vendor=ibm + ;; -ptx*) vendor=sequent ;; + -tpf*) + vendor=ibm + ;; -vxsim* | -vxworks* | -windiss*) vendor=wrs ;; diff -uprN binutils-2.14.90.0.8/configure binutils-2.15.90.0.1/configure --- binutils-2.14.90.0.8/configure 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/configure 2004-03-03 12:24:33.000000000 -0800 @@ -12,6 +12,8 @@ ac_help= ac_default_prefix=/usr/local # Any additions from configure.in: ac_help="$ac_help + --enable-libada Builds libada directory" +ac_help="$ac_help --enable-serial-[{host,target,build}-]configure Force sequential configuration of sub-packages for the host, target or build @@ -577,7 +579,7 @@ else { echo "configure: error: can not r fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:581: checking host system type" >&5 +echo "configure:583: checking host system type" >&5 host_alias=$host case "$host_alias" in @@ -598,7 +600,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)- echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:602: checking target system type" >&5 +echo "configure:604: checking target system type" >&5 target_alias=$target case "$target_alias" in @@ -616,7 +618,7 @@ target_os=`echo $target | sed 's/^\([^-] echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:620: checking build system type" >&5 +echo "configure:622: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -671,7 +673,7 @@ test "$program_transform_name" = "" && p # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:675: checking for a BSD compatible install" >&5 +echo "configure:677: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -891,7 +893,8 @@ target_libraries="target-libiberty \ target-libstdc++-v3 \ target-libf2c \ ${libgcj} \ - target-libobjc" + target-libobjc \ + target-libada" # these tools are built using the target libraries, and are intended to # run only in the target environment @@ -1038,26 +1041,26 @@ case "${host}" in noconfigdirs="$noconfigdirs byacc" ;; i[3456789]86-*-vsta) - noconfigdirs="tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl itcl tix gnuserv gettext" + noconfigdirs="$noconfigdirs tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl itcl tix gnuserv gettext" ;; i[3456789]86-*-go32* | i[3456789]86-*-msdosdjgpp*) - noconfigdirs="tcl tk expect dejagnu send-pr uudecode guile itcl tix gnuserv libffi" + noconfigdirs="$noconfigdirs tcl tk expect dejagnu send-pr uudecode guile itcl tix gnuserv libffi" ;; i[3456789]86-*-mingw32*) # noconfigdirs="tcl tk expect dejagnu make texinfo bison patch flex byacc send-pr uudecode dejagnu diff guile perl itcl tix gnuserv" - noconfigdirs="expect dejagnu autoconf automake send-pr rcs guile perl texinfo libtool" + noconfigdirs="$noconfigdirs expect dejagnu autoconf automake send-pr rcs guile perl texinfo libtool" ;; i[3456789]86-*-beos*) noconfigdirs="$noconfigdirs tk itcl tix libgui gdb" ;; *-*-cygwin*) - noconfigdirs="autoconf automake send-pr rcs guile perl" + noconfigdirs="$noconfigdirs autoconf automake send-pr rcs guile perl" ;; *-*-netbsd*) - noconfigdirs="rcs" + noconfigdirs="$noconfigdirs rcs" ;; ppc*-*-pe) - noconfigdirs="patch diff make tk tcl expect dejagnu autoconf automake texinfo bison send-pr gprof rcs guile perl itcl tix gnuserv" + noconfigdirs="$noconfigdirs patch diff make tk tcl expect dejagnu autoconf automake texinfo bison send-pr gprof rcs guile perl itcl tix gnuserv" ;; powerpc-*-beos*) noconfigdirs="$noconfigdirs tk itcl tix libgui gdb dejagnu readline" @@ -1067,6 +1070,18 @@ case "${host}" in ;; esac +# Check whether --enable-libada or --disable-libada was given. +if test "${enable_libada+set}" = set; then + enableval="$enable_libada" + ENABLE_LIBADA=$enableval +else + ENABLE_LIBADA=yes +fi + +if test "${ENABLE_LIBADA}" != "yes" ; then + noconfigdirs="$noconfigdirs target-libada" +fi + # Save it here so that, even in case of --enable-libgcj, if the Java # front-end isn't enabled, we still get libgcj disabled. libgcj_saved=$libgcj @@ -1364,7 +1379,7 @@ case "${target}" in ;; powerpc-*-aix*) # copied from rs6000-*-* entry - noconfigdirs="$noconfigdirs gprof target-libgloss ${libgcj}" + noconfigdirs="$noconfigdirs gprof target-libada target-libgloss ${libgcj}" ;; powerpc*-*-winnt* | powerpc*-*-pe* | ppc*-*-pe) target_configdirs="$target_configdirs target-winsup" @@ -1386,7 +1401,7 @@ case "${target}" in noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}" ;; rs6000-*-aix*) - noconfigdirs="$noconfigdirs gprof ${libgcj}" + noconfigdirs="$noconfigdirs gprof target-libada target-libgloss ${libgcj}" ;; rs6000-*-*) noconfigdirs="$noconfigdirs gprof ${libgcj}" @@ -1414,6 +1429,9 @@ case "${target}" in mipstx39-*-*) noconfigdirs="$noconfigdirs gprof ${libgcj}" # same as generic mips ;; + mips64*-*-linux*) + noconfigdirs="$noconfigdirs target-newlib ${libgcj}" + ;; mips*-*-linux*) noconfigdirs="$noconfigdirs target-newlib target-libgloss" ;; @@ -2011,7 +2029,7 @@ fi # Default to using --with-stabs for certain targets. if test x${with_stabs} = x ; then case "${target}" in - mips*-*-irix6*) + mips*-*-irix[56]*) ;; mips*-*-* | alpha*-*-osf*) with_stabs=yes; @@ -2837,7 +2855,7 @@ test -n "$target_alias" && ncn_target_to # Extract the first word of "${ncn_tool_prefix}ar", so it can be a program name with args. set dummy ${ncn_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2841: checking for $ac_word" >&5 +echo "configure:2859: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2870,7 +2888,7 @@ if test -z "$ac_cv_prog_AR" ; then # Extract the first word of "ar", so it can be a program name with args. set dummy ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2874: checking for $ac_word" >&5 +echo "configure:2892: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2909,7 +2927,7 @@ fi # Extract the first word of "${ncn_tool_prefix}as", so it can be a program name with args. set dummy ${ncn_tool_prefix}as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2913: checking for $ac_word" >&5 +echo "configure:2931: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2942,7 +2960,7 @@ if test -z "$ac_cv_prog_AS" ; then # Extract the first word of "as", so it can be a program name with args. set dummy as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2946: checking for $ac_word" >&5 +echo "configure:2964: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AS'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2981,7 +2999,7 @@ fi # Extract the first word of "${ncn_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ncn_tool_prefix}dlltool; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2985: checking for $ac_word" >&5 +echo "configure:3003: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3014,7 +3032,7 @@ if test -z "$ac_cv_prog_DLLTOOL" ; then # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3018: checking for $ac_word" >&5 +echo "configure:3036: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_DLLTOOL'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3053,7 +3071,7 @@ fi # Extract the first word of "${ncn_tool_prefix}ld", so it can be a program name with args. set dummy ${ncn_tool_prefix}ld; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3057: checking for $ac_word" >&5 +echo "configure:3075: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3086,7 +3104,7 @@ if test -z "$ac_cv_prog_LD" ; then # Extract the first word of "ld", so it can be a program name with args. set dummy ld; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3090: checking for $ac_word" >&5 +echo "configure:3108: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_LD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3125,7 +3143,7 @@ fi # Extract the first word of "${ncn_tool_prefix}nm", so it can be a program name with args. set dummy ${ncn_tool_prefix}nm; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3129: checking for $ac_word" >&5 +echo "configure:3147: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3158,7 +3176,7 @@ if test -z "$ac_cv_prog_NM" ; then # Extract the first word of "nm", so it can be a program name with args. set dummy nm; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3162: checking for $ac_word" >&5 +echo "configure:3180: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_NM'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3197,7 +3215,7 @@ fi # Extract the first word of "${ncn_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ncn_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3201: checking for $ac_word" >&5 +echo "configure:3219: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3230,7 +3248,7 @@ if test -z "$ac_cv_prog_RANLIB" ; then # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3234: checking for $ac_word" >&5 +echo "configure:3252: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3269,7 +3287,7 @@ fi # Extract the first word of "${ncn_tool_prefix}windres", so it can be a program name with args. set dummy ${ncn_tool_prefix}windres; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3273: checking for $ac_word" >&5 +echo "configure:3291: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3302,7 +3320,7 @@ if test -z "$ac_cv_prog_WINDRES" ; then # Extract the first word of "windres", so it can be a program name with args. set dummy windres; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3306: checking for $ac_word" >&5 +echo "configure:3324: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_WINDRES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3341,7 +3359,7 @@ fi # Extract the first word of "${ncn_tool_prefix}objcopy", so it can be a program name with args. set dummy ${ncn_tool_prefix}objcopy; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3345: checking for $ac_word" >&5 +echo "configure:3363: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3374,7 +3392,7 @@ if test -z "$ac_cv_prog_OBJCOPY" ; then # Extract the first word of "objcopy", so it can be a program name with args. set dummy objcopy; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3378: checking for $ac_word" >&5 +echo "configure:3396: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJCOPY'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3413,7 +3431,7 @@ fi # Extract the first word of "${ncn_tool_prefix}objdump", so it can be a program name with args. set dummy ${ncn_tool_prefix}objdump; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3417: checking for $ac_word" >&5 +echo "configure:3435: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3446,7 +3464,7 @@ if test -z "$ac_cv_prog_OBJDUMP" ; then # Extract the first word of "objdump", so it can be a program name with args. set dummy objdump; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3450: checking for $ac_word" >&5 +echo "configure:3468: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_OBJDUMP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3495,7 +3513,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}ar", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3499: checking for $ac_word" >&5 +echo "configure:3517: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3528,7 +3546,7 @@ if test -z "$ac_cv_prog_AR_FOR_TARGET" ; # Extract the first word of "ar", so it can be a program name with args. set dummy ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3532: checking for $ac_word" >&5 +echo "configure:3550: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AR_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3567,7 +3585,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}as", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3571: checking for $ac_word" >&5 +echo "configure:3589: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3600,7 +3618,7 @@ if test -z "$ac_cv_prog_AS_FOR_TARGET" ; # Extract the first word of "as", so it can be a program name with args. set dummy as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3604: checking for $ac_word" >&5 +echo "configure:3622: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_AS_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3639,7 +3657,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}dlltool; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3643: checking for $ac_word" >&5 +echo "configure:3661: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3672,7 +3690,7 @@ if test -z "$ac_cv_prog_DLLTOOL_FOR_TARG # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3676: checking for $ac_word" >&5 +echo "configure:3694: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3711,7 +3729,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}ld", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}ld; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3715: checking for $ac_word" >&5 +echo "configure:3733: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3744,7 +3762,7 @@ if test -z "$ac_cv_prog_LD_FOR_TARGET" ; # Extract the first word of "ld", so it can be a program name with args. set dummy ld; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3748: checking for $ac_word" >&5 +echo "configure:3766: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_LD_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3783,7 +3801,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}nm", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}nm; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3787: checking for $ac_word" >&5 +echo "configure:3805: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3816,7 +3834,7 @@ if test -z "$ac_cv_prog_NM_FOR_TARGET" ; # Extract the first word of "nm", so it can be a program name with args. set dummy nm; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3820: checking for $ac_word" >&5 +echo "configure:3838: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_NM_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3855,7 +3873,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3859: checking for $ac_word" >&5 +echo "configure:3877: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3888,7 +3906,7 @@ if test -z "$ac_cv_prog_RANLIB_FOR_TARGE # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3892: checking for $ac_word" >&5 +echo "configure:3910: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_RANLIB_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3927,7 +3945,7 @@ fi # Extract the first word of "${ncn_target_tool_prefix}windres", so it can be a program name with args. set dummy ${ncn_target_tool_prefix}windres; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3931: checking for $ac_word" >&5 +echo "configure:3949: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3960,7 +3978,7 @@ if test -z "$ac_cv_prog_WINDRES_FOR_TARG # Extract the first word of "windres", so it can be a program name with args. set dummy windres; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3964: checking for $ac_word" >&5 +echo "configure:3982: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_ncn_cv_WINDRES_FOR_TARGET'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4027,7 +4045,7 @@ RANLIB_FOR_TARGET=${RANLIB_FOR_TARGET}${ NM_FOR_TARGET=${NM_FOR_TARGET}${extra_nmflags_for_target} echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:4031: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:4049: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" diff -uprN binutils-2.14.90.0.8/configure.in binutils-2.15.90.0.1/configure.in --- binutils-2.14.90.0.8/configure.in 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/configure.in 2004-03-03 12:24:33.000000000 -0800 @@ -1,5 +1,5 @@ # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +# 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by @@ -151,7 +151,8 @@ target_libraries="target-libiberty \ target-libstdc++-v3 \ target-libf2c \ ${libgcj} \ - target-libobjc" + target-libobjc \ + target-libada" # these tools are built using the target libraries, and are intended to # run only in the target environment @@ -277,26 +278,26 @@ case "${host}" in noconfigdirs="$noconfigdirs byacc" ;; i[[3456789]]86-*-vsta) - noconfigdirs="tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl itcl tix gnuserv gettext" + noconfigdirs="$noconfigdirs tcl expect dejagnu make texinfo bison patch flex byacc send-pr gprof uudecode dejagnu diff guile perl itcl tix gnuserv gettext" ;; i[[3456789]]86-*-go32* | i[[3456789]]86-*-msdosdjgpp*) - noconfigdirs="tcl tk expect dejagnu send-pr uudecode guile itcl tix gnuserv libffi" + noconfigdirs="$noconfigdirs tcl tk expect dejagnu send-pr uudecode guile itcl tix gnuserv libffi" ;; i[[3456789]]86-*-mingw32*) # noconfigdirs="tcl tk expect dejagnu make texinfo bison patch flex byacc send-pr uudecode dejagnu diff guile perl itcl tix gnuserv" - noconfigdirs="expect dejagnu autoconf automake send-pr rcs guile perl texinfo libtool" + noconfigdirs="$noconfigdirs expect dejagnu autoconf automake send-pr rcs guile perl texinfo libtool" ;; i[[3456789]]86-*-beos*) noconfigdirs="$noconfigdirs tk itcl tix libgui gdb" ;; *-*-cygwin*) - noconfigdirs="autoconf automake send-pr rcs guile perl" + noconfigdirs="$noconfigdirs autoconf automake send-pr rcs guile perl" ;; *-*-netbsd*) - noconfigdirs="rcs" + noconfigdirs="$noconfigdirs rcs" ;; ppc*-*-pe) - noconfigdirs="patch diff make tk tcl expect dejagnu autoconf automake texinfo bison send-pr gprof rcs guile perl itcl tix gnuserv" + noconfigdirs="$noconfigdirs patch diff make tk tcl expect dejagnu autoconf automake texinfo bison send-pr gprof rcs guile perl itcl tix gnuserv" ;; powerpc-*-beos*) noconfigdirs="$noconfigdirs tk itcl tix libgui gdb dejagnu readline" @@ -306,6 +307,14 @@ case "${host}" in ;; esac +AC_ARG_ENABLE(libada, +[ --enable-libada Builds libada directory], +ENABLE_LIBADA=$enableval, +ENABLE_LIBADA=yes) +if test "${ENABLE_LIBADA}" != "yes" ; then + noconfigdirs="$noconfigdirs target-libada" +fi + # Save it here so that, even in case of --enable-libgcj, if the Java # front-end isn't enabled, we still get libgcj disabled. libgcj_saved=$libgcj @@ -603,7 +612,7 @@ case "${target}" in ;; powerpc-*-aix*) # copied from rs6000-*-* entry - noconfigdirs="$noconfigdirs gprof target-libgloss ${libgcj}" + noconfigdirs="$noconfigdirs gprof target-libada target-libgloss ${libgcj}" ;; powerpc*-*-winnt* | powerpc*-*-pe* | ppc*-*-pe) target_configdirs="$target_configdirs target-winsup" @@ -625,7 +634,7 @@ case "${target}" in noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}" ;; rs6000-*-aix*) - noconfigdirs="$noconfigdirs gprof ${libgcj}" + noconfigdirs="$noconfigdirs gprof target-libada target-libgloss ${libgcj}" ;; rs6000-*-*) noconfigdirs="$noconfigdirs gprof ${libgcj}" @@ -653,6 +662,9 @@ case "${target}" in mipstx39-*-*) noconfigdirs="$noconfigdirs gprof ${libgcj}" # same as generic mips ;; + mips64*-*-linux*) + noconfigdirs="$noconfigdirs target-newlib ${libgcj}" + ;; mips*-*-linux*) noconfigdirs="$noconfigdirs target-newlib target-libgloss" ;; @@ -1250,7 +1262,7 @@ fi # Default to using --with-stabs for certain targets. if test x${with_stabs} = x ; then case "${target}" in - mips*-*-irix6*) + mips*-*-irix[[56]]*) ;; mips*-*-* | alpha*-*-osf*) with_stabs=yes; diff -uprN binutils-2.14.90.0.8/cpu/ChangeLog binutils-2.15.90.0.1/cpu/ChangeLog --- binutils-2.14.90.0.8/cpu/ChangeLog 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,91 @@ +2004-03-01 Richard Sandiford + + * frv.cpu (define-arch frv): Add fr450 mach. + (define-mach fr450): New. + (define-model fr450): New. Add profile units to every fr450 insn. + (define-attr UNIT): Add MDCUTSSI. + (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. + (define-attr AUDIO): New boolean. + (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) + (f-LRA-null, f-TLBPR-null): New fields. + (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) + (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. + (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. + (LRA-null, TLBPR-null): New macros. + (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. + (load-real-address): New macro. + (lrai, lrad, tlbpr): New instructions. + (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. + (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. + (mdcutssi): Change UNIT attribute to MDCUTSSI. + (media-low-clear-semantics, media-scope-limit-semantics) + (media-quad-limit, media-quad-shift): New macros. + (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. + * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) + (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) + (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. + (fr450_unit_mapping): New array. + (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry + for new MDCUTSSI unit. + (fr450_check_insn_major_constraints): New function. + (check_insn_major_constraints): Use it. + +2004-03-01 Richard Sandiford + + * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. + (scutss): Change unit to I0. + (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. + (mqsaths): Fix FR400-MAJOR categorization. + (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) + (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. + * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) + combinations. + +2004-03-01 Richard Sandiford + + * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. + (rstb, rsth, rst, rstd, rstq): Delete. + (rstbf, rsthf, rstf, rstdf, rstqf): Delete. + +2004-02-23 Nick Clifton + + * Apply these patches from Renesas: + + 2004-02-10 Kazuhiro Inaoka + + * cpu/m32r.opc (my_print_insn): Fixed incorrect output when + disassembling codes for 0x*2 addresses. + + 2003-12-15 Kazuhiro Inaoka + + * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. + + 2003-12-03 Kazuhiro Inaoka + + * cpu/m32r.cpu : Add new model m32r2. + Add new instructions. + Replace occurrances of 'Mitsubishi' with 'Renesas'. + Changed PIPE attr of push from O to OS. + Care for Little-endian of M32R. + * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): + Care for Little-endian of M32R. + (parse_slo16): signed extension for value. + +2004-02-20 Andrew Cagney + + * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick + Clifton, Ben Elliston, Matthew Green, and Andrew Haley. + + * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all + written by Ben Elliston. + +2004-01-14 Richard Sandiford + + * frv.cpu (UNIT): Add IACC. + (iacc-multiply-r-r): Use it. + * frv.opc (fr400_unit_mapping): Add entry for IACC. + (fr500_unit_mapping, fr550_unit_mapping): Likewise. + 2004-01-06 Alexandre Oliva 2003-12-19 Alexandre Oliva diff -uprN binutils-2.14.90.0.8/cpu/frv.cpu binutils-2.15.90.0.1/cpu/frv.cpu --- binutils-2.14.90.0.8/cpu/frv.cpu 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/frv.cpu 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ ; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*- ; -; Copyright 2000, 2001, 2003 Free Software Foundation, Inc. +; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc. ; ; Contributed by Red Hat Inc; developed under contract from Fujitsu. ; @@ -28,7 +28,7 @@ (name frv) ; name of cpu architecture (comment "Fujitsu FRV") (insn-lsb0? #t) - (machs frv fr550 fr500 fr400 tomcat simple) + (machs frv fr550 fr500 fr450 fr400 tomcat simple) (isas frv) ) @@ -1338,6 +1338,390 @@ ) ) +; FR450 machine +(define-mach + (name fr450) + (comment "FR450 cpu") + (cpu frvbf) +) +(define-model + (name fr450) (comment "FR450 model") (attrs) + (mach fr450) + (pipeline all "" () ((fetch) (decode) (execute) (writeback))) + ; `state' is a list of variables for recording model state + (state + ; State items + ; These are all masks with each bit representing one register. + (prev-fp-load DI) ; Previous use of FR register was floating point load + (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 + (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 + (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 + (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 + (cur-fp-load DI) ; Current use of FR register is floating point load + (cur-fr-p4 DI) ; Current use of FR register is media unit 4 + (cur-fr-p6 DI) ; Current use of FR register is media unit 6 + (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 + (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 + ) + (unit u-exec "Execution Unit" () + 1 1 ; issue done + () ; state + () ; inputs + () ; outputs + () ; profile action (default) + ) + ; Basic integer insn unit + (unit u-integer "Integer Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((GRk INT -1) (ICCi_1 INT -1)) ; outputs + () ; profile action (default) + ) + ; Integer multiplication unit + (unit u-imul "Integer Multiplication Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs + () ; profile action (default) + ) + ; Integer division unit + (unit u-idiv "Integer Division Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((GRk INT -1) (ICCi_1 INT -1)) ; outputs + () ; profile action (default) + ) + ; Branch unit + (unit u-branch "Branch Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1) + (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs + ((pc)) ; outputs + () ; profile action (default) + ) + ; Trap unit + (unit u-trap "Trap Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1) + (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Condition code check unit + (unit u-check "Check Unit" () + 1 1 ; issue done + () ; state + ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; GR set half unit + (unit u-set-hilo "GR Set Half" () + 1 1 ; issue done + () ; state + () ; inputs + ((GRkhi INT -1) (GRklo INT -1)) ; outputs + () ; profile action (default) + ) + ; GR load unit -- TODO doesn't handle quad + (unit u-gr-load "GR Load Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((GRk INT -1) (GRdoublek INT -1)) ; outputs + () ; profile action (default) + ) + ; GR store unit -- TODO doesn't handle quad + (unit u-gr-store "GR Store Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; FR load unit -- TODO doesn't handle quad + (unit u-fr-load "FR Load Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((FRintk INT -1) (FRdoublek INT -1)) ; outputs + () ; profile action (default) + ) + ; FR store unit -- TODO doesn't handle quad + (unit u-fr-store "FR Store Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Swap unit + (unit u-swap "Swap Unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + ((GRk INT -1)) ; outputs + () ; profile action (default) + ) + ; FR Move to GR unit + (unit u-fr2gr "FR Move to GR Unit" () + 1 1 ; issue done + () ; state + ((FRintk INT -1)) ; inputs + ((GRj INT -1)) ; outputs + () ; profile action (default) + ) + ; SPR Move to GR unit + (unit u-spr2gr "SPR Move to GR Unit" () + 1 1 ; issue done + () ; state + ((spr INT -1)) ; inputs + ((GRj INT -1)) ; outputs + () ; profile action (default) + ) + ; GR Move to FR unit + (unit u-gr2fr "GR Move to FR Unit" () + 1 1 ; issue done + () ; state + ((GRj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + ; GR Move to SPR unit + (unit u-gr2spr "GR Move to SPR Unit" () + 1 1 ; issue done + () ; state + ((GRj INT -1)) ; inputs + ((spr INT -1)) ; outputs + () ; profile action (default) + ) + ; Media unit M1 -- see table 14-8 in the fr450 LSI + (unit u-media-1 "Media-1 unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-1-quad "Media-1-quad unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () + 1 1 ; issue done + () ; state + () ; inputs + ((FRkhi INT -1) (FRklo INT -1)) ; outputs + () ; profile action (default) + ) + ; Media unit M2 -- see table 14-8 in the fr450 LSI + (unit u-media-2 "Media-2 unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-2-quad "Media-2-quad unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-2-acc "Media-2-acc unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1)) ; inputs + ((ACC40Sk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-2-acc-dual "Media-2-acc-dual unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1)) ; inputs + ((ACC40Sk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-2-add-sub "Media-2-add-sub unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1)) ; inputs + ((ACC40Sk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1)) ; inputs + ((ACC40Sk INT -1)) ; outputs + () ; profile action (default) + ) + ; Media unit M3 -- see table 14-8 in the fr450 LSI + (unit u-media-3 "Media-3 unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-3-dual "Media-3-dual unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-3-quad "Media-3-quad unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + ; Media unit M4 -- see table 14-8 in the fr450 LSI + (unit u-media-4 "Media-4 unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1) (FRintj INT -1)) ; inputs + ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-4-accg "Media-4-accg unit" () + 1 1 ; issue done + () ; state + ((ACCGi INT -1) (FRinti INT -1)) ; inputs + ((ACCGk INT -1) (FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-4-acc-dual "Media-4-acc-dual unit" () + 1 1 ; issue done + () ; state + ((ACC40Si INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" () + 1 1 ; issue done + () ; state + () ; inputs + () ; outputs + () ; profile action (default) + ) + ; Media unit M6 -- see table 14-8 in the fr450 LSI + (unit u-media-6 "Media-6 unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + ; Media unit M7 -- see table 14-8 in the fr450 LSI + (unit u-media-7 "Media-1 unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1) (FRintj INT -1)) ; inputs + ((FCCk INT -1)) ; outputs + () ; profile action (default) + ) + ; Media Dual Expand unit + (unit u-media-dual-expand "Media Dual Expand unit" () + 1 1 ; issue done + () ; state + ((FRinti INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + ; Media Dual half to byte unit + (unit u-media-dual-htob "Media Half to byte" () + 1 1 ; issue done + () ; state + ((FRintj INT -1)) ; inputs + ((FRintk INT -1)) ; outputs + () ; profile action (default) + ) + ; Barrier unit + (unit u-barrier "Barrier unit" () + 1 1 ; issue done + () ; state + () ; inputs + () ; outputs + () ; profile action (default) + ) + ; Memory Barrier unit + (unit u-membar "Memory Barrier unit" () + 1 1 ; issue done + () ; state + () ; inputs + () ; outputs + () ; profile action (default) + ) + ; Insn cache invalidate unit + (unit u-ici "Insn cache invalidate unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Data cache invalidate unit + (unit u-dci "Data cache invalidate unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Data cache flush unit + (unit u-dcf "Data cache flush unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Insn cache preload unit + (unit u-icpl "Insn cache preload unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Data cache preload unit + (unit u-dcpl "Data cache preload unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Insn cache unlock unit + (unit u-icul "Insn cache unlock unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + ; Data cache unlock unit + (unit u-dcul "Data cache unlock unit" () + 1 1 ; issue done + () ; state + ((GRi INT -1) (GRj INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) +) + ; Simple machine - single issue integer machine (define-mach (name simple) @@ -1388,11 +1772,13 @@ B0 B1 B01 C MULT-DIV ; multiply/division slotted differently on different machines + IACC ; iacc multiply slotted differently on different machines LOAD ; loads slotted differently on different machines STORE ; store slotted differently on different machines SCAN ; scan, scani slotted differently on different machines DCPL ; dcpl slotted differently on different machines MDUALACC ; media dual acc slotted differently on different machines + MDCUTSSI ; mdcutssi insn slotted differently on different machines MCLRACC-1; mclracc A==1 slotted differently on different machines NUM_UNITS ) @@ -1415,6 +1801,20 @@ (define-attr (for insn) (type enum) + (name FR450-MAJOR) + (comment "fr450 major insn categories") + ; The order of declaration is significant. Keep variations on the same major + ; together. + (values NONE + I-1 I-2 I-3 I-4 I-5 + B-1 B-2 B-3 B-4 B-5 B-6 + C-1 C-2 + M-1 M-2 M-3 M-4 M-5 M-6 + ) +) +(define-attr + (for insn) + (type enum) (name FR500-MAJOR) (comment "fr500 major insn categories") ; The order of declaration is significant. Keep variations on the same major @@ -1477,6 +1877,13 @@ (name PRESERVE-OVF) (comment "Preserve value of MSR.OVF") ) +; "Audio" instruction provided by the fr405 but not the original fr400 core. +(define-attr + (for insn) + (type boolean) + (name AUDIO) + (comment "Audio instruction added with FR405") +) ; null attribute -- used as a place holder for where an attribue is required. (define-attr (for insn) @@ -1632,6 +2039,13 @@ pc))) ) +(dnf f-LRAE "Load Real Address E flag" () 5 1) +(dnf f-LRAD "Load Real Address D flag" () 4 1) +(dnf f-LRAS "Load Real Address S flag" () 3 1) + +(dnf f-TLBPRopx "TLB Probe operation number" () 28 3) +(dnf f-TLBPRL "TLB Probe L flag" () 25 1) + (dnf f-ICCi_1-null "null field" (RESERVED) 11 2) (dnf f-ICCi_2-null "null field" (RESERVED) 26 2) (dnf f-ICCi_3-null "null field" (RESERVED) 1 2) @@ -1662,6 +2076,9 @@ (dnf f-misc-null-10 "null field" (RESERVED) 16 5) (dnf f-misc-null-11 "null field" (RESERVED) 5 1) +(dnf f-LRA-null "null field" (RESERVED) 2 3) +(dnf f-TLBPR-null "null field" (RESERVED) 30 2) + (dnf f-LI-off "null field" (RESERVED) 25 1) (dnf f-LI-on "null field" (RESERVED) 25 1) @@ -2120,6 +2537,8 @@ (sr0 768) (sr1 769) (sr2 770) (sr3 771) + (scr0 832) (scr1 833) (scr2 834) (scr3 835) + (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027) (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031) (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035) @@ -2354,7 +2773,11 @@ (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919) (amcr 1920) (stbar 1921) (mmcr 1922) - (dcr 2048) (brr 2049) (nmar 2050) + (iamvr1 1925) (damvr1 1927) + (cxnr 1936) (ttbr 1937) (tplr 1938) (tppr 1939) + (tpxr 1940) + (timerh 1952) (timerl 1953) (timerd 1954) + (dcr 2048) (brr 2049) (nmar 2050) (btbr 2051) (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055) (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059) @@ -2515,7 +2938,7 @@ (define-hardware (name h-iacc0) (comment "64 bit signed accumulator") - (attrs PROFILE VIRTUAL (MACH fr400)) + (attrs PROFILE VIRTUAL (MACH fr400,fr450)) (type register DI (1)) (indices extern-keyword iacc0-names) ; The single 64-bit integer accumulator is made up of two 32 bit @@ -2735,6 +3158,13 @@ (dnop label16 "18 bit pc relative address" () h-iaddr f-label16) (dnop label24 "26 bit pc relative address" () h-iaddr f-label24) +(dnop LRAE "Load Real Address E flag" () h-uint f-LRAE) +(dnop LRAD "Load Real Address D flag" () h-uint f-LRAD) +(dnop LRAS "Load Real Address S flag" () h-uint f-LRAS) + +(dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx) +(dnop TLBPRL "TLB Probe L flag" () h-uint f-TLBPRL) + (define-operand (name A0) (comment "A==0 operand of mclracc") @@ -2893,6 +3323,9 @@ (define-pmacro (misc-null-10) (f-misc-null-10 0)) (define-pmacro (misc-null-11) (f-misc-null-11 0)) +(define-pmacro (LRA-null) (f-LRA-null 0)) +(define-pmacro (TLBPR-null) (f-TLBPR-null 0)) + (define-pmacro (LI-on) (f-LI-on 1)) (define-pmacro (LI-off) (f-LI-off 0)) @@ -2983,11 +3416,12 @@ (define-pmacro (int-logic-r-r name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRk") (+ pack GRk op GRi (ICCi_1-null) ope GRj) (set GRk (operation GRi GRj)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3000,24 +3434,26 @@ (dni not ("not") - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) ("not$pack $GRj,$GRk") (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj) (set GRk (inv GRj)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) (dni sdiv "signed division" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "sdiv$pack $GRi,$GRj,$GRk" (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj) (sequence () (c-call VOID "@cpu@_signed_integer_divide" GRi GRj (index-of GRk) 0) (clobber GRk)) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) @@ -3031,20 +3467,20 @@ (c-call VOID "@cpu@_signed_integer_divide" GRi GRj (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (dni udiv "unsigned division reg/reg" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "udiv$pack $GRi,$GRj,$GRk" (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj) (sequence () (c-call VOID "@cpu@_unsigned_integer_divide" GRi GRj (index-of GRk) 0) (clobber GRk)) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) @@ -3058,8 +3494,7 @@ (c-call VOID "@cpu@_unsigned_integer_divide" GRi GRj (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) ; Multiplication @@ -3067,11 +3502,12 @@ (define-pmacro (multiply-r-r name signop op ope comment) (dni name (comment) - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRdoublek") (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj) (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj))) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) ) @@ -3118,11 +3554,12 @@ (define-pmacro (iacc-multiply-r-r name operation op ope comment) (dni name (comment) - ((UNIT MULT-DIV) (FR400-MAJOR I-1) (MACH fr400)) + ((UNIT IACC) (MACH fr400,fr450) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) (.str name "$pack $GRi,$GRj") (+ pack (rd-null) op GRi ope GRj) ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj))) - ((fr400 (unit u-integer))) + ((fr400 (unit u-integer)) (fr450 (unit u-integer))) ) ) @@ -3133,11 +3570,12 @@ (define-pmacro (int-shift-r-r name op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRk") (+ pack GRk op GRi (ICCi_1-null) ope GRj) (set GRk (name GRi (and GRj #x1f))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3148,7 +3586,8 @@ (dni slass "shift left arith reg/reg with saturation" - ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) + ((UNIT IALL) (MACH fr400,fr450) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) "slass$pack $GRi,$GRj,$GRk" (+ pack GRk OP_46 GRi OPE1_02 GRj) (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj)) @@ -3157,7 +3596,8 @@ (dni scutss "Integer accumulator cut with saturation" - ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) + ((UNIT I0) (MACH fr400,fr450) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) "scutss$pack $GRj,$GRk" (+ pack GRk OP_46 (rs-null) OPE1_04 GRj) (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj)) @@ -3173,11 +3613,12 @@ (dni scan "scan" - ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "scan$pack $GRi,$GRj,$GRk" (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj) (scan-semantics GRi GRj GRk) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) @@ -3186,12 +3627,13 @@ (define-pmacro (conditional-int-logic name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) (set GRk (operation GRi GRj))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3204,29 +3646,32 @@ (dni cnot "conditional not" - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "cnot$pack $GRj,$GRk,$CCi,$cond" (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj) (if (eq CCi (or cond 2)) (set GRk (inv GRj))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) (dni csmul "conditional signed multiply" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj)))) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) (dni csdiv "conditional signed division" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond" (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj) (if (eq CCi (or cond 2)) @@ -3234,13 +3679,14 @@ (c-call VOID "@cpu@_signed_integer_divide" GRi GRj (index-of GRk) 0) (clobber GRk))) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (dni cudiv "conditional unsigned division" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond" (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj) (if (eq CCi (or cond 2)) @@ -3248,19 +3694,20 @@ (c-call VOID "@cpu@_unsigned_integer_divide" GRi GRj (index-of GRk) 0) (clobber GRk))) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (define-pmacro (conditional-shift name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) (set GRk (operation GRi (and GRj #x1f)))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3271,12 +3718,13 @@ (dni cscan "conditional scan" - ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond" (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj) (if (eq CCi (or cond 2)) (scan-semantics GRi GRj GRk)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) @@ -3298,11 +3746,12 @@ (define-pmacro (int-arith-cc-r-r name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 ope GRj) (int-arith-cc-semantics operation ICCi_1) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3320,11 +3769,12 @@ (define-pmacro (int-logic-cc-r-r name op ope comment) (dni (.sym name cc) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 ope GRj) (int-logic-cc-semantics name ICCi_1) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3347,11 +3797,12 @@ (define-pmacro (int-shift-cc-r-r name l-r op ope comment) (dni (.sym name cc) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 ope GRj) (int-shift-cc-semantics name l-r ICCi_1) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3373,11 +3824,12 @@ (define-pmacro (multiply-cc-r-r name signop op ope comment) (dni name (comment) - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1") (+ pack GRdoublek op GRi ICCi_1 ope GRj) (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) ) @@ -3391,13 +3843,14 @@ (define-pmacro (conditional-int-arith-cc name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) (int-arith-cc-semantics operation (reg h-iccr (and (index-of CCi) 3)))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3407,26 +3860,28 @@ (dni csmulcc "conditional signed multiply and set condition code" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (multiply-cc-semantics ext GRi GRj GRdoublek (reg h-iccr (and (index-of CCi) 3)))) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) (define-pmacro (conditional-int-logic-cc name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) (int-logic-cc-semantics operation (reg h-iccr (and (index-of CCi) 3)))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3438,13 +3893,14 @@ (define-pmacro (conditional-int-shift-cc name l-r op ope comment) (dni (.sym c name cc) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) (int-shift-cc-semantics name l-r (reg h-iccr (and (index-of CCi) 3)))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3458,11 +3914,12 @@ (define-pmacro (int-arith-x-r-r name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 ope GRj) (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3473,7 +3930,8 @@ (define-pmacro (int-arith-x-cc-r-r name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 ope GRj) (sequence ((WI tmp) (QI cc)) @@ -3484,7 +3942,7 @@ (set-z-and-n cc tmp) (set GRk tmp) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3496,7 +3954,8 @@ (define-pmacro (int-arith-ss-r-r name operation op ope comment) (dni name (comment) - ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) + ((UNIT IALL) (MACH fr400,fr450) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) (.str name "$pack $GRi,$GRj,$GRk") (+ pack GRk op GRi ope GRj) (sequence () @@ -3511,7 +3970,7 @@ ((lt GRi 0) (const #x80000000)) (else (const 0))))) ) - ((fr400 (unit u-integer))) + ((fr400 (unit u-integer)) (fr450 (unit u-integer))) ) ) @@ -3523,11 +3982,12 @@ (define-pmacro (int-logic-r-simm name operation op comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s12,$GRk") (+ pack GRk op GRi s12) (set GRk (operation GRi s12)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3540,14 +4000,15 @@ (dni sdivi "signed division reg/immed" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "sdivi$pack $GRi,$s12,$GRk" (+ pack GRk OP_1E GRi s12) (sequence () (c-call VOID "@cpu@_signed_integer_divide" GRi s12 (index-of GRk) 0) (clobber GRk)) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) @@ -3561,20 +4022,20 @@ (c-call VOID "@cpu@_signed_integer_divide" GRi s12 (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (dni udivi "unsigned division reg/immed" - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "udivi$pack $GRi,$s12,$GRk" (+ pack GRk OP_1F GRi s12) (sequence () (c-call VOID "@cpu@_unsigned_integer_divide" GRi s12 (index-of GRk) 0) (clobber GRk)) - ((fr400 (unit u-idiv)) + ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) @@ -3588,18 +4049,18 @@ (c-call VOID "@cpu@_unsigned_integer_divide" GRi s12 (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (define-pmacro (multiply-r-simm name signop op comment) (dni name (comment) - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s12,$GRdoublek") (+ pack GRdoublek op GRi s12) (set GRdoublek (mul DI (signop DI GRi) (signop DI s12))) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) ) @@ -3610,11 +4071,12 @@ (define-pmacro (int-shift-r-simm name op comment) (dni (.sym name i) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str (.sym name i) "$pack $GRi,$s12,$GRk") (+ pack GRk op GRi s12) (set GRk (name GRi (and s12 #x1f))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3625,11 +4087,12 @@ (dni scani "scan immediate" - ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "scani$pack $GRi,$s12,$GRk" (+ pack GRk OP_47 GRi s12) (scan-semantics GRi s12 GRk) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) @@ -3638,7 +4101,8 @@ (define-pmacro (int-arith-cc-r-simm name operation op comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 s10) (sequence ((BI tmp) (QI cc) (SI result)) @@ -3651,7 +4115,7 @@ (set-z-and-n cc result) (set GRk result) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3662,14 +4126,15 @@ (define-pmacro (int-logic-cc-r-simm name op comment) (dni (.sym name icc) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 s10) (sequence ((SI tmp)) (set tmp (name GRi s10)) (set GRk tmp) (set-z-and-n ICCi_1 tmp)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3681,11 +4146,12 @@ (define-pmacro (multiply-cc-r-simm name signop op comment) (dni name (comment) - ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1)) + ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1") (+ pack GRdoublek op GRi ICCi_1 s10) (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1) - ((fr400 (unit u-imul)) + ((fr400 (unit u-imul)) (fr450 (unit u-imul)) (fr500 (unit u-imul)) (fr550 (unit u-imul))) ) ) @@ -3696,7 +4162,8 @@ (define-pmacro (int-shift-cc-r-simm name l-r op comment) (dni (.sym name icc) (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 s10) (sequence ((WI shift) (SI tmp) (QI cc)) @@ -3707,7 +4174,7 @@ (set GRk tmp) (set-z-and-n cc tmp) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3719,11 +4186,12 @@ (define-pmacro (int-arith-x-r-simm name operation op comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 s10) (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1))) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3734,7 +4202,8 @@ (define-pmacro (int-arith-x-cc-r-simm name operation op comment) (dni name (comment) - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") (+ pack GRk op GRi ICCi_1 s10) (sequence ((WI tmp) (QI cc)) @@ -3745,7 +4214,7 @@ (set-z-and-n cc tmp) (set GRk tmp) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) ) @@ -3757,7 +4226,8 @@ (dni cmpb "Compare bytes" - ((UNIT IALL) (FR400-MAJOR I-1) (FR550-MAJOR I-1) (MACH fr400,fr550)) + ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "cmpb$pack $GRi,$GRj,$ICCi_1" (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) (sequence ((QI cc)) @@ -3766,12 +4236,14 @@ (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff))) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) (fr550 (unit u-integer))) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) + (fr550 (unit u-integer))) ) (dni cmpba "OR of Compare bytes" - ((UNIT IALL) (FR400-MAJOR I-1) (FR550-MAJOR I-1) (MACH fr400,fr550)) + ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "cmpba$pack $GRi,$GRj,$ICCi_1" (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj) (sequence ((QI cc)) @@ -3784,49 +4256,54 @@ (eq (and GRi #x000000ff) (and GRj #x000000ff)))))) (set ICCi_1 cc)) - ((fr400 (unit u-integer)) (fr550 (unit u-integer))) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) + (fr550 (unit u-integer))) ) ; Format: Load immediate ; (dni setlo "set low order bits" - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "setlo$pack $ulo16,$GRklo" (+ pack GRk OP_3D (misc-null-4) u16) (set GRklo u16) - ((fr400 (unit u-set-hilo)) + ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) ) (dni sethi "set high order bits" - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "sethi$pack $uhi16,$GRkhi" (+ pack GRkhi OP_3E (misc-null-4) u16) (set GRkhi u16) - ((fr400 (unit u-set-hilo)) + ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) ) (dni setlos "set low order bits and extend sign" - ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "setlos$pack $slo16,$GRk" (+ pack GRk OP_3F (misc-null-4) s16) (set GRk s16) - ((fr400 (unit u-integer)) + ((fr400 (unit u-integer)) (fr450 (unit u-integer)) (fr500 (unit u-integer)) (fr550 (unit u-integer))) ) (define-pmacro (load-gr-r name mode op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2)) (.str name "$pack @($GRi,$GRj),$GRk") (+ pack GRk op GRi ope GRj) (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) - ((fr400 (unit u-gr-load)) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) ) ) @@ -3840,11 +4317,12 @@ (define-pmacro (load-fr-r name mode op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) (.str name "$pack @($GRi,$GRj),$FRintk") (+ pack FRintk op GRi ope GRj) (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) - ((fr400 (unit u-fr-load)) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) ) ) @@ -3939,7 +4417,8 @@ name not_gr mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) (.str name "$pack @($GRi,$GRj),$" regtype "doublek") (+ pack (.sym regtype doublek) op GRi ope GRj) (sequence ((WI address)) @@ -3949,10 +4428,12 @@ ) (load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") (load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") (load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) () "Load coprocessor double") @@ -4043,11 +4524,12 @@ (define-pmacro (load-gr-u name mode op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2)) (.str name "$pack @($GRi,$GRj),$GRk") (+ pack GRk op GRi ope GRj) (load-gr-u-semantics mode) - ((fr400 (unit u-gr-load)) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) ) ) @@ -4088,11 +4570,12 @@ (define-pmacro (load-fr-u name mode op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) (.str name "$pack @($GRi,$GRj),$FRintk") (+ pack FRintk op GRi ope GRj) (load-non-gr-u-semantics mode FRint) - ((fr400 (unit u-fr-load)) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) ) ) @@ -4143,11 +4626,12 @@ (define-pmacro (load-double-gr-u name op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2)) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2)) (.str name "$pack @($GRi,$GRj),$GRdoublek") (+ pack GRdoublek op GRi ope GRj) (load-double-gr-u-semantics) - ((fr400 (unit u-gr-load)) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) ) ) @@ -4181,7 +4665,8 @@ name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) (.str name "$pack @($GRi,$GRj),$" regtype "doublek") (+ pack (.sym regtype doublek) op GRi ope GRj) (load-double-non-gr-u-semantics mode regtype) @@ -4190,7 +4675,8 @@ ) (load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float, update index") (load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv) () "Load coprocessor double float, update index") @@ -4288,7 +4774,8 @@ (define-pmacro (load-r-simm name mode op regtype attr profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) (.str name "$pack @($GRi,$d12),$" regtype "k") (+ pack (.sym regtype k) op GRi d12) (set (.sym regtype k) @@ -4298,29 +4785,37 @@ ) (load-r-simm ldsbi QI OP_30 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte") (load-r-simm ldshi HI OP_31 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half") (load-r-simm ldi SI OP_32 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word") (load-r-simm ldubi UQI OP_35 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte") (load-r-simm lduhi UHI OP_36 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half") (load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float") (load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float") (load-r-simm ldfi SI OP_3A FRint FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float") (define-pmacro (ne-load-r-simm @@ -4361,7 +4856,8 @@ name not_gr mode op regtype attr profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) (.str name "$pack @($GRi,$d12),$" regtype "doublek") (+ pack (.sym regtype doublek) op GRi d12) (sequence ((WI address)) @@ -4371,10 +4867,12 @@ ) (load-double-r-simm lddi 0 DI OP_33 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") (load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") (define-pmacro (ne-load-double-r-simm @@ -4437,7 +4935,8 @@ (define-pmacro (store-r-r name mode op ope reg attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" reg "k,@($GRi,$GRj)") (+ pack (.sym reg k) op GRi ope GRj) (c-call VOID (.str "@cpu@_write_mem_" mode) @@ -4447,57 +4946,33 @@ ) (store-r-r stb QI OP_03 OPE1_00 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned byte") (store-r-r sth HI OP_03 OPE1_01 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned half") (store-r-r st SI OP_03 OPE1_02 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store word") (store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store byte float") (store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store half float") (store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store word float") (store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word") -(define-pmacro (r-store name mode op ope reg size is_float profile comment) - (dni name - (comment) - ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv)) - (.str name "$pack $" reg "k,@($GRi,$GRj)") - (+ pack (.sym reg k) op GRi ope GRj) - (sequence ((WI address)) - (set address (add GRi GRj)) - (c-call VOID (.str "@cpu@_write_mem_" mode) - pc address (.sym reg k)) - (c-call VOID "@cpu@_check_recovering_store" - address (index-of (.sym reg k)) size is_float)) - profile - ) -) - -(r-store rstb QI OP_03 OPE1_20 GR 1 0 - ((fr500 (unit u-gr-r-store))) "Store unsigned byte") -(r-store rsth HI OP_03 OPE1_21 GR 2 0 - ((fr500 (unit u-gr-r-store))) "Store unsigned half") -(r-store rst SI OP_03 OPE1_22 GR 4 0 - ((fr500 (unit u-gr-r-store))) "Store word") - -(r-store rstbf QI OP_03 OPE1_28 FRint 1 1 - ((fr500 (unit u-fr-r-store))) "Store byte float") -(r-store rsthf HI OP_03 OPE1_29 FRint 2 1 - ((fr500 (unit u-fr-r-store))) "Store half float") -(r-store rstf SI OP_03 OPE1_2A FRint 4 1 - ((fr500 (unit u-fr-r-store))) "Store word float") - ; Semantics for a store-double insn ; (define-pmacro (store-double-semantics mode regtype address arg) @@ -4510,7 +4985,8 @@ (define-pmacro (store-double-r-r name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") (+ pack (.sym regtype doublek) op GRi ope GRj) (sequence ((WI address)) @@ -4520,35 +4996,17 @@ ) (store-double-r-r std DI OP_03 OPE1_03 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store double word") (store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store double float") (store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv) () "Store coprocessor double word") -(define-pmacro (r-store-double - name mode op ope regtype is_float attr profile comment) - (dni name - (comment) - ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) - (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") - (+ pack (.sym regtype doublek) op GRi ope GRj) - (sequence ((WI address)) - (store-double-semantics mode regtype address GRj) - (c-call VOID "@cpu@_check_recovering_store" - address (index-of (.sym regtype doublek)) 8 is_float)) - profile - ) -) - -(r-store-double rstd DI OP_03 OPE1_23 GR 0 NA - ((fr500 (unit u-gr-r-store))) "Store double word") -(r-store-double rstdf DF OP_03 OPE1_2B FR 1 FR-ACCESS - ((fr500 (unit u-fr-r-store))) "Store double float") - ; Semantics for a store-quad insn ; (define-pmacro (store-quad-semantics regtype address arg) @@ -4578,29 +5036,11 @@ (store-quad-r-r stqc OP_03 OPE1_27 CPR NA () "Store coprocessor quad word") -(define-pmacro (r-store-quad name op ope regtype is_float attr profile comment) - (dni name - (comment) - ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) - (.str name "$pack $" regtype "k,@($GRi,$GRj)") - (+ pack (.sym regtype k) op GRi ope GRj) - (sequence ((WI address)) - (store-quad-semantics regtype address GRj) - (c-call VOID "@cpu@_check_recovering_store" - address (index-of (.sym regtype k)) 16 is_float)) - profile - ) -) - -(r-store-quad rstq OP_03 OPE1_24 GR 0 NA - ((fr500 (unit u-gr-r-store))) "Store quad word") -(r-store-quad rstqf OP_03 OPE1_2C FRint 1 FR-ACCESS - ((fr500 (unit u-fr-r-store))) "Store quad float") - (define-pmacro (store-r-r-u name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" regtype "k,@($GRi,$GRj)") (+ pack (.sym regtype k) op GRi ope GRj) (sequence ((UWI address)) @@ -4613,23 +5053,29 @@ ) (store-r-r-u stbu QI OP_03 OPE1_10 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned byte, update index") (store-r-r-u sthu HI OP_03 OPE1_11 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned half, update index") (store-r-r-u stu WI OP_03 OPE1_12 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store word, update index") (store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store byte float, update index") (store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store half float, update index") (store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store word float, update index") (store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) () @@ -4639,7 +5085,8 @@ name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") (+ pack (.sym regtype doublek) op GRi ope GRj) (sequence ((WI address)) @@ -4650,10 +5097,12 @@ ) (store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store double word, update index") (store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store double float,update index") (store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) () "Store coprocessor double word, update index") @@ -4683,7 +5132,8 @@ (define-pmacro (conditional-load name mode op ope regtype profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") (+ pack (.sym regtype k) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4694,36 +5144,45 @@ ) (conditional-load cldsb QI OP_5E OPE4_0 GR - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte") (conditional-load cldub UQI OP_5E OPE4_1 GR - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte") (conditional-load cldsh HI OP_5E OPE4_2 GR - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half") (conditional-load clduh UHI OP_5E OPE4_3 GR - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half") (conditional-load cld SI OP_5F OPE4_0 GR - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word") (conditional-load cldbf UQI OP_60 OPE4_0 FRint - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float") (conditional-load cldhf UHI OP_60 OPE4_1 FRint - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float") (conditional-load cldf SI OP_60 OPE4_2 FRint - ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) + (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float") (define-pmacro (conditional-load-double name not_gr mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL attr) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr) (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond") (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4734,10 +5193,12 @@ ) (conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") (conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS - ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load))) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) + (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load))) "Load double float") (dni cldq @@ -4754,7 +5215,8 @@ (define-pmacro (conditional-load-gr-u name mode op ope comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond") (+ pack GRk op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4765,7 +5227,7 @@ pc address)) (if (ne (index-of GRi) (index-of GRk)) (set GRi address)))) - ((fr400 (unit u-gr-load)) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) ) ) @@ -4779,7 +5241,8 @@ (define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment) (dni name (comment) - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") (+ pack (.sym regtype k) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4789,7 +5252,7 @@ (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) (set GRi address))) - ((fr400 (unit u-fr-load)) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) ) ) @@ -4801,7 +5264,8 @@ (dni clddu "Load double word, update" - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond" (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) (if (eq CCi (or cond 2)) @@ -4809,20 +5273,21 @@ (load-double-semantics 0 DI GR address GRj) (if (ne (index-of GRi) (index-of GRdoublek)) (set GRi address)))) - ((fr400 (unit u-gr-load)) + ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) ) (dni clddfu "Load double float, update" - ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS) + ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) + (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond" (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj) (if (eq CCi (or cond 2)) (sequence ((WI address)) (load-double-semantics 1 DF FR address GRj) (set GRi address))) - ((fr400 (unit u-fr-load)) + ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) ) @@ -4842,7 +5307,8 @@ (define-pmacro (conditional-store name mode op ope regtype profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL) (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") (+ pack (.sym regtype k) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4853,30 +5319,37 @@ ) (conditional-store cstb QI OP_64 OPE4_0 GR - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned byte") (conditional-store csth HI OP_64 OPE4_1 GR - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned half") (conditional-store cst SI OP_64 OPE4_2 GR - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store word") (conditional-store cstbf QI OP_66 OPE4_0 FRint - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store byte float") (conditional-store csthf HI OP_66 OPE4_1 FRint - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store half float") (conditional-store cstf SI OP_66 OPE4_2 FRint - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store word float") (define-pmacro (conditional-store-double name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4887,10 +5360,12 @@ ) (conditional-store-double cstd DI OP_64 OPE4_3 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store double word") (conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store double float") (dni cstq @@ -4908,7 +5383,8 @@ name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") (+ pack (.sym regtype k) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4922,30 +5398,37 @@ ) (conditional-store-u cstbu QI OP_67 OPE4_0 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned byte, update index") (conditional-store-u csthu HI OP_67 OPE4_1 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned half, update index") (conditional-store-u cstu SI OP_67 OPE4_2 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store word, update index") (conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store byte float, update index") (conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store half float, update index") (conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store word float, update index") (define-pmacro (conditional-store-double-u name mode op ope regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) (if (eq CCi (or cond 2)) @@ -4957,18 +5440,19 @@ ) (conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA - ((fr400 (unit u-gr-store)) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store double word, update index") (conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS - ((fr400 (unit u-fr-store)) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store double float, update index") (define-pmacro (store-r-simm name mode op regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" regtype "k,@($GRi,$d12)") (+ pack (.sym regtype k) op GRi d12) (c-call VOID (.str "@cpu@_write_mem_" mode) @@ -4978,29 +5462,36 @@ ) (store-r-simm stbi QI OP_50 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned byte") (store-r-simm sthi HI OP_51 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store unsigned half") (store-r-simm sti SI OP_52 GR NA - ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) + (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store word") (store-r-simm stbfi QI OP_4E FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store byte float") (store-r-simm sthfi HI OP_4F FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store half float") (store-r-simm stfi SI OP_55 FRint FR-ACCESS - ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) + (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store word float") (define-pmacro (store-double-r-simm name mode op regtype attr profile comment) (dni name (comment) - ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr) + ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) + (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) (.str name "$pack $" regtype "doublek,@($GRi,$d12)") (+ pack (.sym regtype doublek) op GRi d12) (sequence ((WI address)) @@ -5010,11 +5501,11 @@ ) (store-double-r-simm stdi DI OP_53 GR NA - ((fr400 (unit u-gr-store)) + ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) "Store double word") (store-double-r-simm stdfi DF OP_56 FR FR-ACCESS - ((fr400 (unit u-fr-store)) + ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) "Store double float") @@ -5046,32 +5537,35 @@ (dni swap "Swap contents of memory with GR" - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) "swap$pack @($GRi,$GRj),$GRk" (+ pack GRk OP_03 GRi OPE1_05 GRj) (swap-semantics GRi GRj GRk) - ((fr400 (unit u-swap)) + ((fr400 (unit u-swap)) (fr450 (unit u-swap)) (fr500 (unit u-swap)) (fr550 (unit u-swap))) ) (dni "swapi" "Swap contents of memory with GR" - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) ("swapi$pack @($GRi,$d12),$GRk") (+ pack GRk OP_4D GRi d12) (swap-semantics GRi d12 GRk) - ((fr400 (unit u-swap)) + ((fr400 (unit u-swap)) (fr450 (unit u-swap)) (fr500 (unit u-swap)) (fr550 (unit u-swap))) ) (dni cswap "Conditionally swap contents of memory with GR" - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2) CONDITIONAL) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL) "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond" (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (swap-semantics GRi GRj GRk)) - ((fr400 (unit u-swap)) + ((fr400 (unit u-swap)) (fr450 (unit u-swap)) (fr500 (unit u-swap)) (fr550 (unit u-swap))) ) @@ -5089,13 +5583,17 @@ (register-transfer movgf OP_03 OPE1_15 GRj FRintk I0 - ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS) - ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) + ((FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) + ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) + (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) "transfer gr to fr") (register-transfer movfg OP_03 OPE1_0D FRintk GRj I0 - ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS) - ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) + ((FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) + ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) + (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) "transfer fr to gr") (define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset))) @@ -5113,12 +5611,13 @@ (dni movgfd "move GR for FR double" - ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS) + ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) "movgfd$pack $GRj,$FRintk" (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj) (register-transfer-double-from-gr-semantics 1) ; TODO -- doesn't handle second register in the pair - ((fr400 (unit u-gr2fr)) + ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) ) @@ -5131,12 +5630,13 @@ (dni movfgd "move FR for GR double" - ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS) + ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) "movfgd$pack $FRintk,$GRj" (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj) (register-transfer-double-to-gr-semantics 1) ; TODO -- doesn't handle second register in the pair - ((fr400 (unit u-fr2gr)) + ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) ) @@ -5193,34 +5693,40 @@ ) (conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0 - ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4)) - ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) + ((FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4)) + ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) + (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) "transfer gr to fr") (conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0 - ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4)) - ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) + ((FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4)) + ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) + (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) "transfer fr to gr") (dni cmovgfd "Conditional move GR to FR double" - ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS) + ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) "cmovgfd$pack $GRj,$FRintk,$CCi,$cond" (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj) (register-transfer-double-from-gr-semantics (eq CCi (or cond 2))) ; TODO -- doesn't handle extra registers in double - ((fr400 (unit u-gr2fr)) + ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) ) (dni cmovfgd "Conditional move FR to GR double" - ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS) + ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) + (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) "cmovfgd$pack $FRintk,$GRj,$CCi,$cond" (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj) (register-transfer-double-to-gr-semantics (eq CCi (or cond 2))) ; TODO -- doesn't handle second register in the pair - ((fr400 (unit u-fr2gr)) + ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) ) @@ -5228,11 +5734,12 @@ name op ope reg_src reg_targ unitname comment) (dni name (comment) - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) (.str name "$pack $" reg_src ",$" reg_targ) (+ pack reg_targ op ope reg_src) (set reg_targ reg_src) - ((fr400 (unit unitname)) + ((fr400 (unit unitname)) (fr450 (unit unitname)) (fr500 (unit unitname)) (fr550 (unit unitname))) ) ) @@ -5279,37 +5786,40 @@ (define-pmacro (conditional-branch-i prefix cc op cond comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1)) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1)) (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16") (+ pack (.sym ICC_ cc) ICCi_2 op hint label16) (sequence () (c-call VOID "@cpu@_model_branch" label16 hint) (if (cond ICCi_2) (set pc label16))) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) ) (dni bra "integer branch equal" - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1)) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1)) "bra$pack $hint_taken$label16" (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16) (sequence () (c-call VOID "@cpu@_model_branch" label16 hint_taken) (set pc label16)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni bno "integer branch never" - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1)) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1)) "bno$pack$hint_not_taken" (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null)) (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5331,36 +5841,39 @@ (define-pmacro (conditional-branch-f prefix cc op cond comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16") (+ pack (.sym FCC_ cc) FCCi_2 op hint label16) (sequence () (c-call VOID "@cpu@_model_branch" label16 hint) (if (cond FCCi_2) (set pc label16))) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) ) (dni fbra "float branch equal" - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) "fbra$pack $hint_taken$label16" (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16) (sequence () (c-call VOID "@cpu@_model_branch" label16 hint_taken) (set pc label16)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni fbno "float branch never" - ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) + (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) "fbno$pack$hint_not_taken" (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null)) (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5393,50 +5906,54 @@ (dni bctrlr "LCR conditional branch to lr" - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2)) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2)) ("bctrlr$pack $ccond,$hint") (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint) (ctrlr-branch-semantics (const BI 1) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment) (dni (.sym prefix cc lr) (comment) - ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) attr) + ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr) (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint") (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope (ccond-null) (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint) (if (cond (.sym i-f CCi_2)) (set pc (spr-lr)))) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) ) (dni bralr "integer cclr branch always" - ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3)) + ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3)) "bralr$pack$hint_taken" (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) (set pc (spr-lr))) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni bnolr "integer cclr branch never" - ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3)) + ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3)) "bnolr$pack$hint_not_taken" (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null)) (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5457,23 +5974,25 @@ (dni fbralr "float cclr branch always" - ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) "fbralr$pack$hint_taken" (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) (set pc (spr-lr))) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni fbnolr "float cclr branch never" - ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) "fbnolr$pack$hint_not_taken" (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null)) (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5495,38 +6014,41 @@ (define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment) (dni (.sym prefix cc lr) (comment) - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) attr) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr) (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint") (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint) (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) ) (dni bcralr "integer ctrlr branch always" - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2)) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2)) "bcralr$pack $ccond$hint_taken" (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) (ctrlr-branch-semantics (const BI 1) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni bcnolr "integer ctrlr branch never" - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2)) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2)) "bcnolr$pack$hint_not_taken" (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) (ctrlr-branch-semantics (const BI 0) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5547,25 +6069,27 @@ (dni fcbralr "float ctrlr branch always" - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) "fcbralr$pack $ccond$hint_taken" (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) (ctrlr-branch-semantics (const BI 1) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni fcbnolr "float ctrlr branch never" - ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS) + ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) + (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) "fcbnolr$pack$hint_not_taken" (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null)) (sequence () (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) (ctrlr-branch-semantics (const BI 0) ccond)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) @@ -5595,60 +6119,66 @@ (dni jmpl "jump and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5)) "jmpl$pack @($GRi,$GRj)" (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj) (jump-and-link-semantics GRi GRj LI) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni calll "call and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5)) "calll$pack @($GRi,$GRj)" (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj) (jump-and-link-semantics GRi GRj LI) - ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni jmpil "jump immediate and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5)) "jmpil$pack @($GRi,$s12)" (+ pack (misc-null-1) (LI-off) OP_0D GRi s12) (jump-and-link-semantics GRi s12 LI) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni callil "call immediate and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5)) "callil$pack @($GRi,$s12)" (+ pack (misc-null-1) (LI-on) OP_0D GRi s12) (jump-and-link-semantics GRi s12 LI) - ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni call "call and link" - ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4) (FR400-MAJOR B-4)) + ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4) + (FR400-MAJOR B-4) (FR450-MAJOR B-4)) "call$pack $label24" (+ pack OP_0F label24) (sequence () (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1) (set pc label24) (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni rett "return from trap" - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2) PRIVILEGED) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED) "rett$pack $debug" (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null)) ; frv_rett handles operating vs user mode @@ -5699,32 +6229,35 @@ (define-pmacro (trap-r prefix cc i-f op ope cond attr comment) (dni (.sym prefix cc) (comment) - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) attr) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj") (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj) (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) ) (dni tra "integer trap always" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1)) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1)) "tra$pack $GRi,$GRj" (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj) (trap-semantics (const BI 1) GRi GRj) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) (dni tno "integer trap never" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1)) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1)) "tno$pack" (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null)) (trap-semantics (const BI 0) GRi GRj) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) @@ -5745,21 +6278,23 @@ (dni ftra "float trap always" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) "ftra$pack $GRi,$GRj" (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj) (trap-semantics (const BI 1) GRi GRj) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) (dni ftno "flost trap never" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) "ftno$pack" (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null)) (trap-semantics (const BI 0) GRi GRj) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) @@ -5781,32 +6316,35 @@ (define-pmacro (trap-immed prefix cc i-f op cond attr comment) (dni (.sym prefix cc) (comment) - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) attr) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12") (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12) (trap-semantics (cond (.sym i-f CCi_2)) GRi s12) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) ) (dni tira "integer trap always" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1)) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1)) "tira$pack $GRi,$s12" (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12) (trap-semantics (const BI 1) GRi s12) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) (dni tino "integer trap never" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1)) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1)) "tino$pack" (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null)) (trap-semantics (const BI 0) GRi s12) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) @@ -5827,7 +6365,8 @@ (dni ftira "float trap always" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) "ftira$pack $GRi,$s12" (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12) (trap-semantics (const BI 1) GRi s12) @@ -5837,11 +6376,12 @@ (dni ftino "float trap never" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) "ftino$pack" (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null)) (trap-semantics (const BI 0) GRi s12) - ((fr400 (unit u-trap)) + ((fr400 (unit u-trap)) (fr450 (unit u-trap)) (fr500 (unit u-trap)) (fr550 (unit u-trap))) ) @@ -5862,7 +6402,8 @@ (dni break "break trap" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1)) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1)) "break$pack" (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null)) (sequence () @@ -5890,7 +6431,8 @@ (dni mtrap "media trap" - ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS) + ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) + (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) "mtrap$pack" (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null)) (c-call VOID "frv_mtrap") @@ -5900,7 +6442,8 @@ (define-pmacro (condition-code-logic name operation ope comment) (dni name (comment) - ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) (FR400-MAJOR B-6)) + ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) + (FR400-MAJOR B-6) (FR450-MAJOR B-6)) (.str name "$pack $CRi,$CRj,$CRk") (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj) (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj)) @@ -5933,7 +6476,8 @@ (dni notcr ("not cccr register") - ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) (FR400-MAJOR B-6)) + ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) + (FR400-MAJOR B-6) (FR450-MAJOR B-6)) (.str notcr "$pack $CRj,$CRk") (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj) (set CRk (xor CRj 1)) @@ -5947,32 +6491,35 @@ (define-pmacro (check-int-condition-code prefix cc op cond comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5)) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5)) (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int") (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3) (check-semantics (cond ICCi_3) CRj_int) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) ) (dni ckra "check integer cc always" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5)) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5)) "ckra$pack $CRj_int" (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null)) (check-semantics (const BI 1) CRj_int) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) (dni ckno "check integer cc never" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5)) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5)) "ckno$pack $CRj_int" (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null)) (check-semantics (const BI 0) CRj_int) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) @@ -5994,32 +6541,35 @@ (define-pmacro (check-float-condition-code prefix cc op cond comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float") (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3) (check-semantics (cond FCCi_3) CRj_float) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) ) (dni fckra "check float cc always" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) "fckra$pack $CRj_float" (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3) (check-semantics (const BI 1) CRj_float) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) (dni fckno "check float cc never" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) "fckno$pack $CRj_float" (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3) (check-semantics (const BI 0) CRj_float) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) @@ -6041,41 +6591,44 @@ (define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond") (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope (misc-null-9) ICCi_3) (if (eq CCi (or cond 2)) (check-semantics (test ICCi_3) CRj_int) (set CRj_int (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) ) (dni cckra "conditional check integer cc always" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) "cckra$pack $CRj_int,$CCi,$cond" (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0 (misc-null-9) (ICCi_3-null)) (if (eq CCi (or cond 2)) (check-semantics (const BI 1) CRj_int) (set CRj_int (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) (dni cckno "conditional check integer cc never" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) "cckno$pack $CRj_int,$CCi,$cond" (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0 (misc-null-9) (ICCi_3-null)) (if (eq CCi (or cond 2)) (check-semantics (const BI 0) CRj_int) (set CRj_int (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) @@ -6097,41 +6650,44 @@ (define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment) (dni (.sym prefix cc) (comment) - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond") (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope (misc-null-9) FCCi_3) (if (eq CCi (or cond 2)) (check-semantics (test FCCi_3) CRj_float) (set CRj_float (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) ) (dni cfckra "conditional check float cc always" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) "cfckra$pack $CRj_float,$CCi,$cond" (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1 (misc-null-9) (FCCi_3-null)) (if (eq CCi (or cond 2)) (check-semantics (const BI 1) CRj_float) (set CRj_float (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) (dni cfckno "conditional check float cc never" - ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS) + ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) + (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) "cfckno$pack $CRj_float,$CCi,$cond" (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1 (misc-null-9) (FCCi_3-null)) (if (eq CCi (or cond 2)) (check-semantics (const BI 0) CRj_float) (set CRj_float (cr-undefined))) - ((fr400 (unit u-check)) + ((fr400 (unit u-check)) (fr450 (unit u-check)) (fr500 (unit u-check)) (fr550 (unit u-check))) ) @@ -6152,30 +6708,33 @@ (dni cjmpl "conditional jump and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5) CONDITIONAL) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) "cjmpl$pack @($GRi,$GRj),$CCi,$cond" (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (jump-and-link-semantics GRi GRj LI)) - ((fr400 (unit u-branch)) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni ccalll "conditional call and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5) CONDITIONAL) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) "ccalll$pack @($GRi,$GRj),$CCi,$cond" (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (jump-and-link-semantics GRi GRj LI)) - ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + ((fr400 (unit u-branch)) (fr450 (unit u-branch)) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (define-pmacro (cache-invalidate name cache all op ope profile comment) (dni name (comment) - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) (.str name "$pack @($GRi,$GRj)") (+ pack (rd-null) op GRi ope GRj) (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all) @@ -6184,16 +6743,19 @@ ) (cache-invalidate ici insn 0 OP_03 OPE1_38 - ((fr400 (unit u-ici)) (fr500 (unit u-ici)) (fr550 (unit u-ici))) + ((fr400 (unit u-ici)) (fr450 (unit u-ici)) + (fr500 (unit u-ici)) (fr550 (unit u-ici))) "invalidate insn cache") (cache-invalidate dci data 0 OP_03 OPE1_3C - ((fr400 (unit u-dci)) (fr500 (unit u-dci)) (fr550 (unit u-dci))) + ((fr400 (unit u-dci)) (fr450 (unit u-dci)) + (fr500 (unit u-dci)) (fr550 (unit u-dci))) "invalidate data cache") (define-pmacro (cache-invalidate-entry name cache op ope profile comment) (dni name (comment) - ((UNIT C) (FR400-MAJOR C-2) (FR550-MAJOR C-2) (MACH fr400,fr550)) + ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) (.str name "$pack @($GRi,$GRj),$ae") (+ pack (misc-null-1) ae op GRi ope GRj) (if (eq ae 0) @@ -6204,31 +6766,35 @@ ) (cache-invalidate-entry icei insn OP_03 OPE1_39 - ((fr400 (unit u-ici)) (fr550 (unit u-ici))) + ((fr400 (unit u-ici)) (fr450 (unit u-ici)) + (fr550 (unit u-ici))) "invalidate insn cache entry") (cache-invalidate-entry dcei data OP_03 OPE1_3A - ((fr400 (unit u-dci)) (fr550 (unit u-dci))) + ((fr400 (unit u-dci)) (fr450 (unit u-dci)) + (fr550 (unit u-dci))) "invalidate data cache entry") (dni dcf "Data cache flush" - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) "dcf$pack @($GRi,$GRj)" (+ pack (rd-null) OP_03 GRi OPE1_3D GRj) (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0) - ((fr400 (unit u-dcf)) + ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr500 (unit u-dcf)) (fr550 (unit u-dcf))) ) (dni dcef "Data cache entry flush" - ((UNIT C) (FR400-MAJOR C-2) (FR550-MAJOR C-2) (MACH fr400,fr550)) + ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) "dcef$pack @($GRi,$GRj),$ae" (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj) (if (eq ae 0) (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1) (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae)) - ((fr400 (unit u-dcf)) (fr550 (unit u-dcf))) + ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf))) ) (define-pmacro (write-TLB name insn op ope comment) @@ -6262,7 +6828,8 @@ (define-pmacro (cache-preload name cache pipe attrs op ope profile comment) (dni name (comment) - (.splice (UNIT pipe) (FR500-MAJOR C-2) (FR400-MAJOR C-2) (.unsplice attrs)) + (.splice (UNIT pipe) (FR500-MAJOR C-2) + (FR400-MAJOR C-2) (.unsplice attrs)) (.str name "$pack $GRi,$GRj,$lock") (+ pack (misc-null-1) lock op GRi ope GRj) (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock) @@ -6270,17 +6837,20 @@ ) ) -(cache-preload icpl insn C ((FR550-MAJOR C-2)) OP_03 OPE1_30 - ((fr400 (unit u-icpl)) (fr500 (unit u-icpl)) (fr550 (unit u-icpl))) +(cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30 + ((fr400 (unit u-icpl)) (fr450 (unit u-icpl)) + (fr500 (unit u-icpl)) (fr550 (unit u-icpl))) "preload insn cache") -(cache-preload dcpl data DCPL ((FR550-MAJOR I-8)) OP_03 OPE1_34 - ((fr400 (unit u-dcpl)) (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl))) +(cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34 + ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl)) + (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl))) "preload data cache") (define-pmacro (cache-unlock name cache op ope profile comment) (dni name (comment) - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) (.str name "$pack $GRi") (+ pack (rd-null) op GRi ope (GRj-null)) (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi) @@ -6289,16 +6859,19 @@ ) (cache-unlock icul insn OP_03 OPE1_31 - ((fr400 (unit u-icul)) (fr500 (unit u-icul)) (fr550 (unit u-icul))) + ((fr400 (unit u-icul)) (fr450 (unit u-icul)) + (fr500 (unit u-icul)) (fr550 (unit u-icul))) "unlock insn cache") (cache-unlock dcul data OP_03 OPE1_35 - ((fr400 (unit u-dcul)) (fr500 (unit u-dcul)) (fr550 (unit u-dcul))) + ((fr400 (unit u-dcul)) (fr450 (unit u-dcul)) + (fr500 (unit u-dcul)) (fr550 (unit u-dcul))) "unlock data cache") (define-pmacro (barrier name insn op ope profile comment) (dni name (comment) - ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2)) + ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) + (FR400-MAJOR C-2) (FR450-MAJOR C-2)) (.str insn "$pack") (+ pack (rd-null) op (rs-null) ope (GRj-null)) (nop) ; sufficient implementation @@ -6307,12 +6880,38 @@ ) (barrier bar bar OP_03 OPE1_3E - ((fr400 (unit u-barrier)) (fr500 (unit u-barrier))) + ((fr400 (unit u-barrier)) (fr450 (unit u-barrier)) + (fr500 (unit u-barrier))) "barrier") (barrier membar membar OP_03 OPE1_3F - ((fr400 (unit u-membar)) (fr500 (unit u-membar))) + ((fr400 (unit u-membar)) (fr450 (unit u-membar)) + (fr500 (unit u-membar))) "memory barrier") +; Load real address instructions +(define-pmacro (load-real-address name insn what op ope) + (dni name + (.str "Load real address of " what) + ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) + (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS") + (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null)) + (nop) ; not simulated + () + ) +) + +(load-real-address lrai "lrai" "instruction" OP_03 OPE1_20) +(load-real-address lrad "lrad" "data" OP_03 OPE1_21) + +(dni tlbpr + "TLB Probe" + ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) + "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL" + (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj) + (nop) ; not simulated + () +) + ; Coprocessor operations (define-pmacro (cop-op num op) (dni (.sym cop num) @@ -7114,25 +7713,30 @@ (dni mhsetlos "Media set lower signed 12 bits" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mhsetlos$pack $u12,$FRklo" (+ pack FRklo OP_78 OPE1_20 u12) (set FRklo u12) - ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk FRklo)))) + ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) + (fr550 (unit u-media-set (out FRintk FRklo)))) ) (dni mhsethis "Media set upper signed 12 bits" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mhsethis$pack $u12,$FRkhi" (+ pack FRkhi OP_78 OPE1_22 u12) (set FRkhi u12) - ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk FRkhi)))) + ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) + (fr550 (unit u-media-set (out FRintk FRkhi)))) ) (dni mhdsets "Media dual set halfword signed 12 bits" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mhdsets$pack $u12,$FRintk" (+ pack FRintk OP_78 OPE1_24 u12) (sequence () @@ -7140,7 +7744,8 @@ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) (set (halfword hi FRintk 0) u12) (set (halfword lo FRintk 0) u12)) - ((fr400 (unit u-media-1)) (fr550 (unit u-media-set))) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) + (fr550 (unit u-media-set))) ) (define-pmacro (set-5-semantics target value) @@ -7154,11 +7759,13 @@ (define-pmacro (media-set-5 name hilo op ope comment) (dni name (comment) - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $s5,$FRk" hilo) (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5) (set-5-semantics (.sym FRk hilo) s5) - ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk (.sym FRk hilo))))) + ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) + (fr550 (unit u-media-set (out FRintk (.sym FRk hilo))))) ) ) @@ -7167,7 +7774,8 @@ (dni mhdseth "Media dual set halfword upper 5 bits" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mhdseth$pack $s5,$FRintk" (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5) (sequence () @@ -7175,17 +7783,19 @@ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) (set-5-semantics (halfword hi FRintk 0) s5) (set-5-semantics (halfword lo FRintk 0) s5)) - ((fr400 (unit u-media-1)) (fr550 (unit u-media-set))) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) + (fr550 (unit u-media-set))) ) (define-pmacro (media-logic-r-r name operation op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $FRinti,$FRintj,$FRintk") (+ pack FRintk op FRinti ope FRintj) (set FRintk (operation FRinti FRintj)) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7197,12 +7807,13 @@ (define-pmacro (conditional-media-logic name operation op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") (+ pack FRintk op FRinti CCi cond ope FRintj) (if (eq CCi (or cond 2)) (set FRintk (operation FRinti FRintj))) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7213,33 +7824,36 @@ (dni mnot ("mnot") - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) ("mnot$pack $FRintj,$FRintk") (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj) (set FRintk (inv FRintj)) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (dni cmnot ("cmnot") - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) ("cmnot$pack $FRintj,$FRintk,$CCi,$cond") (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj) (if (eq CCi (or cond 2)) (set FRintk (inv FRintj))) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (define-pmacro (media-rotate-r-r name operation op ope comment) (dni name (comment) - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $FRinti,$u6,$FRintk") (+ pack FRintk op FRinti ope u6) (set FRintk (operation FRinti (and u6 #x1f))) - ((fr400 (unit u-media-3)) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7250,11 +7864,12 @@ (define-pmacro (media-cut-r-r name arg op ope comment) (dni name (comment) - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) (.str name "$pack $FRinti,$" arg ",$FRintk") (+ pack FRintk op FRinti ope arg) (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg)) - ((fr400 (unit u-media-3)) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7262,35 +7877,37 @@ (media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut") (media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut") -(define-pmacro (media-cut-acc name arg op ope comment) +(define-pmacro (media-cut-acc name arg op ope fr450-major comment) (dni name (comment) - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) (.str name "$pack $ACC40Si,$" arg ",$FRintk") (+ pack FRintk op ACC40Si ope arg) (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg)) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) ) ) -(media-cut-acc mcut FRintj OP_7B OPE1_2C "media accumulator cut reg") -(media-cut-acc mcuti s6 OP_7B OPE1_2E "media accumulator cut immed") +(media-cut-acc mcut FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg") +(media-cut-acc mcuti s6 OP_7B OPE1_2E M-5 "media accumulator cut immed") -(define-pmacro (media-cut-acc-ss name arg op ope comment) +(define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment) (dni name (comment) - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) (.str name "$pack $ACC40Si,$" arg ",$FRintk") (+ pack FRintk op ACC40Si ope arg) (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg)) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) ) ) -(media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D "media accumulator cut reg with saturation") -(media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F "media accumulator cut immed with saturation") +(media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation") +(media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation") ; Dual Media Instructions ; @@ -7300,7 +7917,8 @@ (dni mdcutssi "Media dual cut with signed saturation" - ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-6)) "mdcutssi$pack $ACC40Si,$s6,$FRintkeven" (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6) (if (register-unaligned ACC40Si 2) @@ -7313,7 +7931,10 @@ (c-call SI "@cpu@_media_cut_ss" (nextreg h-acc40S ACC40Si 1) s6))))) ((fr400 (unit u-media-4-acc-dual - (out FRintk FRintkeven))) (fr550 (unit u-media-3-acc-dual))) + (out FRintk FRintkeven))) + (fr450 (unit u-media-4-acc-dual + (out FRintk FRintkeven))) + (fr550 (unit u-media-3-acc-dual))) ) ; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated @@ -7328,18 +7949,20 @@ (dni maveh "Media dual average" - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "maveh$pack $FRinti,$FRintj,$FRintk" (+ pack FRintk OP_7B FRinti OPE1_08 FRintj) (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj)) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (define-pmacro (media-dual-shift name operation op ope profile comment) (dni name (comment) - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $FRinti,$u6,$FRintk") (+ pack FRintk op FRinti ope u6) (sequence () @@ -7355,19 +7978,23 @@ ) (media-dual-shift msllhi sll OP_7B OPE1_09 - ((fr400 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) + (fr500 (unit u-media)) (fr550 (unit u-media))) "Media dual shift left logical") (media-dual-shift msrlhi srl OP_7B OPE1_0A - ((fr400 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) + (fr500 (unit u-media)) (fr550 (unit u-media))) "Media dual shift right logical") (media-dual-shift msrahi sra OP_7B OPE1_0B - ((fr400 (unit u-media-6)) (fr500 (unit u-media)) (fr550 (unit u-media))) + ((fr400 (unit u-media-6)) (fr450 (unit u-media-6)) + (fr500 (unit u-media)) (fr550 (unit u-media))) "Media dual shift right arithmetic") (define-pmacro (media-dual-word-rotate-r-r name operation op ope comment) (dni name (comment) - ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) (.str name "$pack $FRintieven,$s6,$FRintkeven") (+ pack FRintkeven op FRintieven ope s6) (if (orif (register-unaligned FRintieven 2) @@ -7380,7 +8007,11 @@ (and s6 #x1f))))) ((fr400 (unit u-media-3-quad (in FRinti FRintieven) - (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) + (out FRintk FRintkeven))) + (fr450 (unit u-media-3-quad + (in FRinti FRintieven) + (out FRintk FRintkeven))) + (fr550 (unit u-media-quad))) ) ) @@ -7388,7 +8019,8 @@ (dni mcplhi "Media bit concatenate, halfword" - ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mcplhi$pack $FRinti,$u6,$FRintk" (+ pack FRintk OP_78 FRinti OPE1_0C u6) (sequence ((HI arg1) (HI arg2) (HI shift)) @@ -7403,12 +8035,14 @@ (sub 15 shift))) (set arg1 (or HI arg1 arg2)))) (set (halfword hi FRintk 0) arg1)) - ((fr400 (unit u-media-3-dual)) (fr550 (unit u-media-3-dual))) + ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) + (fr550 (unit u-media-3-dual))) ) (dni mcpli "Media bit concatenate, word" - ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mcpli$pack $FRinti,$u6,$FRintk" (+ pack FRintk OP_78 FRinti OPE1_0D u6) (sequence ((SI tmp) (SI shift)) @@ -7421,7 +8055,8 @@ (sub 31 shift))) (set tmp (or tmp tmp1)))) (set FRintk tmp)) - ((fr400 (unit u-media-3-dual)) (fr550 (unit u-media-3-dual))) + ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) + (fr550 (unit u-media-3-dual))) ) (define-pmacro (saturate arg max min result) @@ -7434,20 +8069,22 @@ (dni msaths "Media dual saturation signed" - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "msaths$pack $FRinti,$FRintj,$FRintk" (+ pack FRintk OP_7B FRinti OPE1_0C FRintj) (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0)) (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0))) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (dni mqsaths "Media quad saturation signed" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven" (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven) (if (orif (register-unaligned FRintieven 2) @@ -7466,7 +8103,12 @@ ((fr400 (unit u-media-1-quad (in FRinti FRintieven) (in FRintj FRintjeven) - (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) + (out FRintk FRintkeven))) + (fr450 (unit u-media-1-quad + (in FRinti FRintieven) + (in FRintj FRintjeven) + (out FRintk FRintkeven))) + (fr550 (unit u-media-quad))) ) (define-pmacro (saturate-unsigned arg max result) @@ -7477,21 +8119,23 @@ (dni msathu "Media dual saturation unsigned" - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "msathu$pack $FRinti,$FRintj,$FRintk" (+ pack FRintk OP_7B FRinti OPE1_0D FRintj) (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo)) (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) (saturate-unsigned argihi argjhi (halfword hi FRintk 0)) (saturate-unsigned argilo argjlo (halfword lo FRintk 0))) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (define-pmacro (media-dual-compare name mode op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $FRinti,$FRintj,$FCCk") (+ pack (cond-null) FCCk op FRinti ope FRintj) (if (register-unaligned FCCk 2) @@ -7502,7 +8146,7 @@ (compare-and-set-fcc argihi argjhi FCCk) (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1)))) ; TODO - doesn't handle second FCC - ((fr400 (unit u-media-7)) + ((fr400 (unit u-media-7)) (fr450 (unit u-media-7)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7535,7 +8179,8 @@ (dni mabshs "Media dual absolute value, halfword" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mabshs$pack $FRintj,$FRintk" (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj) (sequence ((HI arghi) (HI arglo)) @@ -7547,7 +8192,8 @@ (halfword hi FRintk 0)) (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo) (halfword lo FRintk 0))) - ((fr400 (unit u-media-1)) (fr550 (unit u-media))) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) + (fr550 (unit u-media))) ) (define-pmacro (media-arith-sat-semantics @@ -7571,11 +8217,12 @@ (define-pmacro (media-dual-arith-sat name operation mode max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) (.str name "$pack $FRinti,$FRintj,$FRintk") (+ pack FRintk op FRinti ope FRintj) (media-dual-arith-sat-semantics operation mode max min) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7590,12 +8237,13 @@ name operation mode max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") (+ pack FRintk op FRinti CCi cond ope FRintj) (if (eq CCi (or cond 2)) (media-dual-arith-sat-semantics operation mode max min)) - ((fr400 (unit u-media-1)) + ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) ) @@ -7636,7 +8284,8 @@ (define-pmacro (media-quad-arith-sat name operation mode max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-2)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") (+ pack FRintkeven op FRintieven ope FRintjeven) (media-quad-arith-sat-semantics 1 operation mode max min) @@ -7644,6 +8293,10 @@ (in FRinti FRintieven) (in FRintj FRintjeven) (out FRintk FRintkeven))) + (fr450 (unit u-media-1-quad + (in FRinti FRintieven) + (in FRintj FRintjeven) + (out FRintk FRintkeven))) (fr500 (unit u-media-quad-arith (in FRinti FRintieven) (in FRintj FRintjeven) @@ -7661,7 +8314,8 @@ name operation mode max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-2) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) + (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond") (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven) (media-quad-arith-sat-semantics (eq CCi (or cond 2)) @@ -7670,6 +8324,10 @@ (in FRinti FRintieven) (in FRintj FRintjeven) (out FRintk FRintkeven))) + (fr450 (unit u-media-1-quad + (in FRinti FRintieven) + (in FRintj FRintjeven) + (out FRintk FRintkeven))) (fr500 (unit u-media-quad-arith (in FRinti FRintieven) (in FRintj FRintjeven) @@ -7683,10 +8341,98 @@ (conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation") (conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation") +;; Return A if |A| > |B| and B is positive. Return -A if |A| > |B| and +;; B is negative, saturating 0x8000 as 0x7fff. Return 0 otherwise. +(define-pmacro (media-low-clear-semantics a b) + (cond HI + ((le UHI (abs a) (abs b)) 0) + ((le HI 0 b) a) + ((eq HI a -32768) 32767) + (else (neg a)))) + +;; Return A if -|B| < A < |B|. Return -B if A <= -|B|, saturating 0x8000 +;; as 0x7fff. Return B if A >= |B|. +(define-pmacro (media-scope-limit-semantics a b) + (cond HI + ((andif (gt HI b -32768) + (ge HI a (abs b))) b) + ((gt HI a (neg (abs b))) a) + ((eq HI b -32768) 32767) + (else (neg b)))) + +(define-pmacro (media-quad-limit name operation op ope comment) + (dni name + comment + ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) + (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") + (+ pack FRintkeven op FRintieven ope FRintjeven) + (if (orif (register-unaligned FRintieven 2) + (orif (register-unaligned FRintjeven 2) + (register-unaligned FRintkeven 2))) + (c-call VOID "@cpu@_media_register_not_aligned") + (sequence ((HI a1) (HI a2) (HI a3) (HI a4) + (HI b1) (HI b2) (HI b3) (HI b4)) + ; hack to get FRintkeven referenced as a target + ; for profiling + (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) + (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2) + (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4) + (set (halfword hi FRintkeven 0) (operation a1 b1)) + (set (halfword lo FRintkeven 0) (operation a2 b2)) + (set (halfword hi FRintkeven 1) (operation a3 b3)) + (set (halfword lo FRintkeven 1) (operation a4 b4)))) + ((fr450 (unit u-media-1-quad + (in FRinti FRintieven) + (in FRintj FRintjeven) + (out FRintk FRintkeven)))) + ) +) + +(media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10 + "Media quad low clear") +(media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14 + "Media quad scope limitation") + +(define-pmacro (media-quad-shift name operation op ope comment) + (dni name + (comment) + ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) + (.str name "$pack $FRintieven,$u6,$FRintkeven") + (+ pack FRintkeven op FRintieven ope u6) + (if (orif (register-unaligned FRintieven 2) + (register-unaligned FRintkeven 2)) + (c-call VOID "@cpu@_media_register_not_aligned") + (sequence () + ; hack to get these referenced for profiling + (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) + (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) + (set (halfword hi FRintkeven 0) + (operation HI (halfword hi FRintieven 0) + (and u6 #xf))) + (set (halfword lo FRintkeven 0) + (operation HI (halfword lo FRintieven 0) + (and u6 #xf))) + (set (halfword hi FRintkeven 1) + (operation HI (halfword hi FRintieven 1) + (and u6 #xf))) + (set (halfword lo FRintkeven 1) + (operation HI (halfword lo FRintieven 1) + (and u6 #xf))))) + ((fr450 (unit u-media-3-quad + (in FRinti FRintieven) + (in FRintj FRintieven) + (out FRintk FRintkeven)))) + ) +) + +(media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift") +(media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift") + (define-pmacro (media-acc-arith-sat name operation mode max min op ope comment) (dni name (comment) - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) (.str name "$pack $ACC40Si,$ACC40Sk") (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) @@ -7696,7 +8442,8 @@ (media-arith-sat-semantics operation ACC40Si (nextreg h-acc40S ACC40Si 1) ACC40Sk mode max min (msr-sie-acci))))) - ((fr400 (unit u-media-2-acc)) (fr550 (unit u-media-4-acc))) + ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc)) + (fr550 (unit u-media-4-acc))) ) ) @@ -7709,7 +8456,8 @@ comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $ACC40Si,$ACC40Sk") (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) @@ -7729,7 +8477,8 @@ (nextreg h-acc40S ACC40Sk 1) mode max min (msr-sie-acci-1))))))) - ((fr400 (unit u-media-2-acc-dual)) (fr550 (unit u-media-4-acc-dual))) + ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual)) + (fr550 (unit u-media-4-acc-dual))) ) ) @@ -7740,7 +8489,8 @@ (dni masaccs "Media add and subtract signed accumulator with saturation" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) "masaccs$pack $ACC40Si,$ACC40Sk" (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null)) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) @@ -7763,12 +8513,14 @@ #x7fffffffff (inv DI #x7fffffffff) (msr-sie-acci-1))))))) - ((fr400 (unit u-media-2-add-sub)) (fr550 (unit u-media-4-add-sub))) + ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub)) + (fr550 (unit u-media-4-add-sub))) ) (dni mdasaccs "Media add and subtract signed accumulator with saturation" - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) "mdasaccs$pack $ACC40Si,$ACC40Sk" (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null)) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) @@ -7807,7 +8559,9 @@ #x7fffffffff (inv DI #x7fffffffff) (msr-sie-acci-3))))))) - ((fr400 (unit u-media-2-add-sub-dual)) (fr550 (unit u-media-4-add-sub-dual))) + ((fr400 (unit u-media-2-add-sub-dual)) + (fr450 (unit u-media-2-add-sub-dual)) + (fr550 (unit u-media-4-add-sub-dual))) ) (define-pmacro (media-multiply-semantics conv arg1 arg2 res) @@ -7830,11 +8584,12 @@ (define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) PRESERVE-OVF) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF) (.str name "$pack $FRinti,$FRintj,$ACC40Sk") (+ pack ACC40Sk op FRinti ope FRintj) (media-dual-multiply-semantics 1 mode conv rhs1 rhs2) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -7849,12 +8604,13 @@ name mode conv rhs1 rhs2 op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") (+ pack ACC40Sk op FRinti CCi cond ope FRintj) (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -7888,13 +8644,17 @@ (define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2) PRESERVE-OVF) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF) (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") (+ pack ACC40Sk op FRintieven ope FRintjeven) (media-quad-multiply-semantics 1 mode conv rhs1 rhs2) ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-mul (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -7911,7 +8671,8 @@ name mode conv rhs1 rhs2 op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF CONDITIONAL) (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond") (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven) @@ -7919,6 +8680,9 @@ ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-mul (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -7956,11 +8720,12 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) (.str name "$pack $FRinti,$FRintj,$" res) (+ pack res op FRinti ope FRintj) (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -7989,12 +8754,13 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond") (+ pack res op FRinti CCi cond ope FRintj) (media-dual-multiply-acc-semantics (eq CCi (or cond 2)) mode conv addop rhw res max min) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -8043,13 +8809,17 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min) ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-mul (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -8070,7 +8840,8 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL) (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond") (+ pack res op FRintieven CCi cond ope FRintjeven) (media-quad-multiply-acc-semantics (eq CCi (or cond 2)) @@ -8078,6 +8849,9 @@ ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-mul (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -8128,14 +8902,19 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res max min) ((fr400 (unit u-media-2-quad (in FRinti FRintieven) - (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) + (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) + (fr550 (unit u-media-4-quad))) ) ) @@ -8178,14 +8957,19 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res max min) ((fr400 (unit u-media-2-quad (in FRinti FRintieven) - (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) + (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) + (fr550 (unit u-media-4-quad))) ) ) @@ -8228,14 +9012,19 @@ name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res max min) ((fr400 (unit u-media-2-quad (in FRinti FRintieven) - (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) + (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) + (fr550 (unit u-media-4-quad))) ) ) @@ -8282,11 +9071,12 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) (.str name "$pack $FRinti,$FRintj,$ACC40Sk") (+ pack ACC40Sk op FRinti ope FRintj) (media-dual-complex-semantics mode conv rhs1 rhs2 max min) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -8295,11 +9085,12 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) (.str name "$pack $FRinti,$FRintj,$ACC40Sk") (+ pack ACC40Sk op FRinti ope FRintj) (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -8328,12 +9119,13 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") (+ pack ACC40Sk op FRinti CCi cond ope FRintj) (if (eq CCi (or cond 2)) (media-dual-complex-semantics mode conv rhs1 rhs2 max min)) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -8342,12 +9134,13 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") (+ pack ACC40Sk op FRinti CCi cond ope FRintj) (if (eq CCi (or cond 2)) (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)) - ((fr400 (unit u-media-2)) + ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) ) ) @@ -8376,7 +9169,8 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") (+ pack ACC40Sk op FRintieven ope FRintjeven) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) @@ -8400,6 +9194,9 @@ ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-complex (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -8410,7 +9207,8 @@ name mode conv rhs1 rhs2 max min op ope comment) (dni name (comment) - ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") (+ pack ACC40Sk op FRintieven ope FRintjeven) (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) @@ -8434,6 +9232,9 @@ ((fr400 (unit u-media-2-quad (in FRinti FRintieven) (in FRintj FRintjeven))) + (fr450 (unit u-media-2-quad + (in FRinti FRintieven) + (in FRintj FRintjeven))) (fr500 (unit u-media-quad-complex (in FRinti FRintieven) (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) @@ -8478,21 +9279,23 @@ (dni mexpdhw "Media expand halfword to word" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mexpdhw$pack $FRinti,$u6,$FRintk" (+ pack FRintk OP_7B FRinti OPE1_32 u6) (media-expand-halfword-to-word-semantics 1) - ((fr400 (unit u-media-3)) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (dni cmexpdhw "Conditional media expand halfword to word" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1) CONDITIONAL) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond" (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6) (media-expand-halfword-to-word-semantics (eq CCi (or cond 2))) - ((fr400 (unit u-media-3)) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) @@ -8514,41 +9317,51 @@ (dni mexpdhd "Media expand halfword to double" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mexpdhd$pack $FRinti,$u6,$FRintkeven" (+ pack FRintkeven OP_7B FRinti OPE1_33 u6) (media-expand-halfword-to-double-semantics 1) ((fr400 (unit u-media-dual-expand - (out FRintk FRintkeven))) + (out FRintk FRintkeven))) + (fr450 (unit u-media-dual-expand + (out FRintk FRintkeven))) (fr500 (unit u-media-dual-expand - (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-dual-expand))) ) (dni cmexpdhd "Conditional media expand halfword to double" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond" (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6) (media-expand-halfword-to-double-semantics (eq CCi (or cond 2))) ((fr400 (unit u-media-dual-expand (out FRintk FRintkeven))) + (fr450 (unit u-media-dual-expand + (out FRintk FRintkeven))) (fr500 (unit u-media-dual-expand - (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-dual-expand))) ) (dni mpackh "Media halfword pack" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mpackh$pack $FRinti,$FRintj,$FRintk" (+ pack FRintk OP_7B FRinti OPE1_34 FRintj) (media-pack FRinti FRintj FRintk 0) - ((fr400 (unit u-media-3)) + ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media))) ) (dni mdpackh "Media dual pack" - ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven" (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven) (if (orif (register-unaligned FRintieven 2) @@ -8566,10 +9379,15 @@ (in FRinti FRintieven) (in FRintj FRintjeven) (out FRintk FRintkeven))) + (fr450 (unit u-media-3-quad + (in FRinti FRintieven) + (in FRintj FRintjeven) + (out FRintk FRintkeven))) (fr500 (unit u-media-quad-arith (in FRinti FRintieven) (in FRintj FRintjeven) - (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-quad))) ) (define-pmacro (media-unpack src soff targ toff) @@ -8582,7 +9400,8 @@ (dni munpackh "Media halfword unpack" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "munpackh$pack $FRinti,$FRintkeven" (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null)) (if (register-unaligned FRintkeven 2) @@ -8594,8 +9413,11 @@ (media-unpack FRinti 0 FRintkeven 0))) ((fr400 (unit u-media-dual-expand (out FRintk FRintkeven))) + (fr450 (unit u-media-dual-expand + (out FRintk FRintkeven))) (fr500 (unit u-media-dual-expand - (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-dual-expand))) ) (dni mdunpackh @@ -8631,7 +9453,8 @@ (dni mbtoh "Media convert byte to halfword" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mbtoh$pack $FRintj,$FRintkeven" (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj) (sequence () @@ -8641,13 +9464,17 @@ (mbtoh-semantics 1)) ((fr400 (unit u-media-dual-expand (out FRintk FRintkeven))) + (fr450 (unit u-media-dual-expand + (out FRintk FRintkeven))) (fr500 (unit u-media-dual-btoh - (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-dual-expand))) ) (dni cmbtoh "Conditional media convert byte to halfword" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond" (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj) (sequence () @@ -8657,8 +9484,12 @@ (mbtoh-semantics (eq CCi (or cond 2)))) ((fr400 (unit u-media-dual-expand (out FRintk FRintkeven))) + (fr450 (unit u-media-dual-expand + (out FRintk FRintkeven))) (fr500 (unit u-media-dual-btoh - (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand (in FRinti FRintj)))) + (out FRintk FRintkeven))) + (fr550 (unit u-media-dual-expand + (in FRinti FRintj)))) ) (define-pmacro (mhtob-semantics cond) @@ -8674,7 +9505,8 @@ (dni mhtob "Media convert halfword to byte" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2)) "mhtob$pack $FRintjeven,$FRintk" (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven) (sequence () @@ -8684,13 +9516,18 @@ (mhtob-semantics 1)) ((fr400 (unit u-media-dual-htob (in FRintj FRintjeven))) + (fr450 (unit u-media-dual-htob + (in FRintj FRintjeven))) (fr500 (unit u-media-dual-htob - (in FRintj FRintjeven))) (fr550 (unit u-media-3-dual (in FRinti FRintjeven)))) + (in FRintj FRintjeven))) + (fr550 (unit u-media-3-dual + (in FRinti FRintjeven)))) ) (dni cmhtob "Conditional media convert halfword to byte" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond" (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven) (sequence () @@ -8700,8 +9537,12 @@ (mhtob-semantics (eq CCi (or cond 2)))) ((fr400 (unit u-media-dual-htob (in FRintj FRintjeven))) + (fr450 (unit u-media-dual-htob + (in FRintj FRintjeven))) (fr500 (unit u-media-dual-htob - (in FRintj FRintjeven))) (fr550 (unit u-media-3-dual (in FRinti FRintjeven)))) + (in FRintj FRintjeven))) + (fr550 (unit u-media-3-dual + (in FRinti FRintjeven)))) ) (define-pmacro (mbtohe-semantics cond) @@ -8748,7 +9589,8 @@ ; Media NOP ; A special case of mclracc (dni mnop "Media nop" - ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1) (FR400-MAJOR M-1)) + ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1) + (FR400-MAJOR M-1) (FR450-MAJOR M-1)) "mnop$pack" (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) (nop) @@ -8758,66 +9600,72 @@ ; mclracc with #A==0 (dni mclracc-0 "Media clear accumulator(s)" - ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) "mclracc$pack $ACC40Sk,$A0" (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null)) (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) ) ; mclracc with #A==1 (dni mclracc-1 "Media clear accumulator(s)" - ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3) (FR400-MAJOR M-2)) + ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3) + (FR400-MAJOR M-2) (FR450-MAJOR M-4)) "mclracc$pack $ACC40Sk,$A1" (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca)) (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) ) (dni mrdacc "Media read accumulator" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-5)) "mrdacc$pack $ACC40Si,$FRintk" (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null)) (set FRintk ACC40Si) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) ) (dni mrdaccg "Media read accumulator guard" - ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-5)) "mrdaccg$pack $ACCGi,$FRintk" (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null)) (set FRintk ACCGi) - ((fr400 (unit u-media-4-accg)) + ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi)))) ) (dni mwtacc "Media write accumulator" - ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) "mwtacc$pack $FRinti,$ACC40Sk" (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null)) (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000)) FRinti)) - ((fr400 (unit u-media-4)) + ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc))) ) (dni mwtaccg "Media write accumulator guard" - ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1)) + ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) + (FR400-MAJOR M-1) (FR450-MAJOR M-3)) "mwtaccg$pack $FRinti,$ACCGk" (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null)) (sequence () ; hack to get these referenced for profiling (c-raw-call VOID "frv_ref_SI" ACCGk) (set ACCGk FRinti)) - ((fr400 (unit u-media-4-accg)) + ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk)))) ) @@ -8841,7 +9689,7 @@ ; On the other hand spending a little time in the decoder is often worth it. ; (dnmi nop "nop" - ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) + ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "nop$pack" (emit ori pack (GRi 0) (s12 0) (GRk 0)) ) @@ -8858,37 +9706,43 @@ ; A return instruction (dnmi ret "return" - (NO-DIS (UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3)) + (NO-DIS (UNIT B01) (FR500-MAJOR B-3) + (FR400-MAJOR B-3) (FR450-MAJOR B-3)) "ret$pack" (emit bralr pack (hint_taken 2)) ) (dnmi cmp "compare" - (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) + (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "cmp$pack $GRi,$GRj,$ICCi_1" (emit subcc pack GRi GRj (GRk 0) ICCi_1) ) (dnmi cmpi "compare immediate" - (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) + (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "cmpi$pack $GRi,$s10,$ICCi_1" (emit subicc pack GRi s10 (GRk 0) ICCi_1) ) (dnmi ccmp "conditional compare" - (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "ccmp$pack $GRi,$GRj,$CCi,$cond" (emit csubcc pack GRi GRj (GRk 0) CCi cond) ) (dnmi mov "move" - (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1)) + (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1)) "mov$pack $GRi,$GRk" (emit ori pack GRi (s12 0) GRk) ) (dnmi cmov "conditional move" - (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL) + (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) + (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) "cmov$pack $GRi,$GRk,$CCi,$cond" (emit cor pack GRi (GRj 0) GRk CCi cond) ) diff -uprN binutils-2.14.90.0.8/cpu/frv.opc binutils-2.15.90.0.1/cpu/frv.opc --- binutils-2.14.90.0.8/cpu/frv.opc 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/frv.opc 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* Fujitsu FRV opcode support, for GNU Binutils. -*- C -*- - Copyright 2000, 2001, 2003 Free Software Foundation, Inc. + Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc. Contributed by Red Hat Inc; developed under contract from Fujitsu. @@ -90,6 +90,8 @@ static int find_major_in_vliw PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr400_check_insn_major_constraints PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); +static int fr450_check_insn_major_constraints + PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr500_check_insn_major_constraints PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr550_check_insn_major_constraints @@ -106,6 +108,10 @@ frv_is_branch_major (CGEN_ATTR_VALUE_TYP if (major >= FR400_MAJOR_B_1 && major <= FR400_MAJOR_B_6) return 1; /* is a branch */ break; + case bfd_mach_fr450: + if (major >= FR450_MAJOR_B_1 && major <= FR450_MAJOR_B_6) + return 1; /* is a branch */ + break; default: if (major >= FR500_MAJOR_B_1 && major <= FR500_MAJOR_B_6) return 1; /* is a branch */ @@ -121,6 +127,7 @@ frv_is_float_major (CGEN_ATTR_VALUE_TYPE switch (mach) { case bfd_mach_fr400: + case bfd_mach_fr450: return 0; /* No float insns */ default: if (major >= FR500_MAJOR_F_1 && major <= FR500_MAJOR_F_8) @@ -140,6 +147,10 @@ frv_is_media_major (CGEN_ATTR_VALUE_TYPE if (major >= FR400_MAJOR_M_1 && major <= FR400_MAJOR_M_2) return 1; /* is a media insn */ break; + case bfd_mach_fr450: + if (major >= FR450_MAJOR_M_1 && major <= FR450_MAJOR_M_6) + return 1; /* is a media insn */ + break; default: if (major >= FR500_MAJOR_M_1 && major <= FR500_MAJOR_M_8) return 1; /* is a media insn */ @@ -155,6 +166,9 @@ frv_is_branch_insn (const CGEN_INSN *ins if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -168,6 +182,9 @@ frv_is_float_insn (const CGEN_INSN *insn if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -181,6 +198,9 @@ frv_is_media_insn (const CGEN_INSN *insn if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -285,11 +305,48 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_m /* B01 */ UNIT_B0, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ +/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ /* LOAD */ UNIT_I0, /* load only in I0 unit. */ /* STORE */ UNIT_I0, /* store only in I0 unit. */ /* SCAN */ UNIT_I0, /* scan only in I0 unit. */ /* DCPL */ UNIT_C, /* dcpl only in C unit. */ /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ +/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ +}; + +/* Some insns are assigned specialized implementation units which map to + different actual implementation units on different machines. These + tables perform that mapping. */ +static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = +{ +/* unit in insn actual unit */ +/* NIL */ UNIT_NIL, +/* I0 */ UNIT_I0, +/* I1 */ UNIT_I1, +/* I01 */ UNIT_I01, +/* I2 */ UNIT_NIL, /* no I2 or I3 unit */ +/* I3 */ UNIT_NIL, +/* IALL */ UNIT_I01, /* only I0 and I1 units */ +/* FM0 */ UNIT_FM0, +/* FM1 */ UNIT_FM1, +/* FM01 */ UNIT_FM01, +/* FM2 */ UNIT_NIL, /* no F2 or M2 units */ +/* FM3 */ UNIT_NIL, /* no F3 or M3 units */ +/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */ +/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */ +/* B0 */ UNIT_B0, /* branches only in B0 unit. */ +/* B1 */ UNIT_B0, +/* B01 */ UNIT_B0, +/* C */ UNIT_C, +/* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ +/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ +/* LOAD */ UNIT_I0, /* load only in I0 unit. */ +/* STORE */ UNIT_I0, /* store only in I0 unit. */ +/* SCAN */ UNIT_I0, /* scan only in I0 unit. */ +/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ +/* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1. */ /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ }; @@ -315,11 +372,13 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_m /* B01 */ UNIT_B01, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ +/* IACC */ UNIT_NIL, /* iacc multiply not implemented */ /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ /* STORE */ UNIT_I0, /* store only in I0 unit. */ /* SCAN */ UNIT_I01, /* scan in I0 or I1 unit. */ /* DCPL */ UNIT_C, /* dcpl only in C unit. */ /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; @@ -345,11 +404,13 @@ static CGEN_ATTR_VALUE_TYPE fr550_unit_m /* B01 */ UNIT_B01, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ +/* IACC */ UNIT_NIL, /* iacc multiply not implemented. */ /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ /* STORE */ UNIT_I01, /* store in I0 or I1 unit. */ /* SCAN */ UNIT_IALL, /* scan in any integer unit. */ /* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ /* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */ +/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1 unit. */ /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; @@ -367,6 +428,10 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned vliw->current_vliw = fr400_allowed_vliw; vliw->unit_mapping = fr400_unit_mapping; break; + case bfd_mach_fr450: + vliw->current_vliw = fr400_allowed_vliw; + vliw->unit_mapping = fr450_unit_mapping; + break; case bfd_mach_fr550: vliw->current_vliw = fr550_allowed_vliw; vliw->unit_mapping = fr550_unit_mapping; @@ -496,6 +561,8 @@ fr400_check_insn_major_constraints ( case FR400_MAJOR_M_2: return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1) && ! find_major_in_vliw (vliw, FR400_MAJOR_M_2); + case FR400_MAJOR_M_1: + return !find_major_in_vliw (vliw, FR400_MAJOR_M_2); default: break; } @@ -503,6 +570,43 @@ fr400_check_insn_major_constraints ( } static int +fr450_check_insn_major_constraints ( + FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major +) +{ + CGEN_ATTR_VALUE_TYPE other_major; + + /* Our caller guarantees there's at least one other instruction. */ + other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR); + + /* (M4, M5) and (M4, M6) are allowed. */ + if (other_major == FR450_MAJOR_M_4) + if (major == FR450_MAJOR_M_5 || major == FR450_MAJOR_M_6) + return 1; + + /* Otherwise, instructions in even-numbered media categories cannot be + executed in parallel with other media instructions. */ + switch (major) + { + case FR450_MAJOR_M_2: + case FR450_MAJOR_M_4: + case FR450_MAJOR_M_6: + return !(other_major >= FR450_MAJOR_M_1 + && other_major <= FR450_MAJOR_M_6); + + case FR450_MAJOR_M_1: + case FR450_MAJOR_M_3: + case FR450_MAJOR_M_5: + return !(other_major == FR450_MAJOR_M_2 + || other_major == FR450_MAJOR_M_4 + || other_major == FR450_MAJOR_M_6); + + default: + return 1; + } +} + +static int find_unit_in_vliw ( FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit ) @@ -739,6 +843,9 @@ check_insn_major_constraints ( case bfd_mach_fr400: rc = fr400_check_insn_major_constraints (vliw, major); break; + case bfd_mach_fr450: + rc = fr450_check_insn_major_constraints (vliw, major); + break; case bfd_mach_fr550: rc = fr550_check_insn_major_constraints (vliw, major, insn); break; @@ -779,6 +886,9 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const case bfd_mach_fr400: major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR); break; + case bfd_mach_fr450: + major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR); + break; case bfd_mach_fr550: major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR); break; diff -uprN binutils-2.14.90.0.8/cpu/m32r.cpu binutils-2.15.90.0.1/cpu/m32r.cpu --- binutils-2.14.90.0.8/cpu/m32r.cpu 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/m32r.cpu 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,2426 @@ +; Renesas M32R CPU description. -*- Scheme -*- +; +; Copyright 1998, 1999, 2000, 2001, 2003 Free Software Foundation, Inc. +; +; Contributed by Red Hat Inc; developed under contract from Mitsubishi +; Electric Corporation. +; +; This file is part of the GNU Binutils. +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2 of the License, or +; (at your option) any later version. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +(include "simplify.inc") + +; FIXME: Delete sign extension of accumulator results. +; Sign extension is done when accumulator is read. + +; define-arch must appear first + +(define-arch + (name m32r) ; name of cpu family + (comment "Renesas M32R") + (default-alignment aligned) + (insn-lsb0? #f) + (machs m32r m32rx m32r2) + (isas m32r) +) + +; Attributes. + +; An attribute to describe which pipeline an insn runs in. +; O_OS is a special attribute for sll, sra, sla, slli, srai, slai. +; These instructions have O attribute for m32rx and OS attribute for m32r2. + +(define-attr + (for insn) + (type enum) + (name PIPE) + (comment "parallel execution pipeline selection") + (values NONE O S OS O_OS) +) + +; A derived attribute that says which insns can be executed in parallel +; with others. This is a required attribute for architectures with +; parallel execution. + +(define-attr + (for insn) + (type enum) + (name PARALLEL) + (attrs META) ; do not define in any generated file for now + (values NO YES) + (default (if (eq-attr (current-insn) PIPE NONE) (symbol NO) (symbol YES))) +) + +; Instruction set parameters. + +(define-isa + (name m32r) + + ; This is 32 because 16 bit insns always appear as pairs. + ; ??? See if this can go away. It's only used by the disassembler (right?) + ; to decide how long an unknown insn is. One value isn't sufficient (e.g. if + ; on a 16 bit (and not 32 bit) boundary, will only want to advance pc by 16.) + (default-insn-bitsize 32) + + ; Number of bytes of insn we can initially fetch. + ; The M32R is tricky in that insns are either two 16-bit insns + ; (executed sequentially or in parallel) or one 32-bit insn. + ; So on one hand the base insn size is 16 bits, but on another it's 32. + ; 32 is chosen because: + ; - if the chip were ever bi-endian it is believed that the byte order would + ; be based on 32 bit quantities + ; - 32 bit insns are always aligned on 32 bit boundaries + ; - the pc will never stop on a 16 bit (and not 32 bit) boundary + ; [well actually it can, but there are no branches to such places] + (base-insn-bitsize 32) + + ; Used in computing bit numbers. + (default-insn-word-bitsize 32) + + ; The m32r fetches 2 insns at a time. + (liw-insns 2) + + ; While the m32r can execute insns in parallel, the base mach can't + ; (other than nop). The base mach is greatly handicapped by this, but + ; we still need to cleanly handle it. + (parallel-insns 2) + + ; Initial bitnumbers to decode insns by. + (decode-assist (0 1 2 3 8 9 10 11)) + + ; Classification of instructions that fit in the various frames. + ; wip, not currently used + (insn-types (long ; name + 31 ; length + (eq-attr (current-insn) LENGTH 31) ; matching insns + (0 1 2 7 8 9 10) ; decode-assist + ) + (short + 15 + (eq-attr (current-insn) LENGTH 15) ; matching insns + (0 1 2 7 8 9 10) + ) + ) + + ; Instruction framing. + ; Each m32r insn is either one 32 bit insn, two 16 bit insns executed + ; serially (left->right), or two 16 bit insns executed parallelly. + ; wip, not currently used + (frame long32 ; name + ((long)) ; list of insns in frame, plus constraint + "$0" ; assembler + (+ (1 1) (31 $0)) ; value + (sequence () (execute $0)) ; action + ) + (frame serial2x16 + ((short) + (short)) + "$0 -> $1" + (+ (1 0) (15 $0) (1 0) (15 $1)) + (sequence () + (execute $0) + (execute $1)) + ) + (frame parallel2x16 + ((short (eq-attr (current-insn) PIPE "O,BOTH")) + (short (eq-attr (current-insn) PIPE "S,BOTH"))) + "$0 || $1" + (+ (1 0) (15 $0) (1 1) (15 $1)) + (parallel () + (execute $0) + (execute $1)) + ) +) + +; Cpu family definitions. + +; ??? define-cpu-family [and in general "cpu-family"] might be clearer than +; define-cpu. +; ??? Have define-arch provide defaults for architecture that define-cpu can +; then override [reduces duplication in define-cpu]. +; ??? Another way to go is to delete cpu-families entirely and have one mach +; able to inherit things from another mach (would also need the ability to +; not only override specific inherited things but also disable some, +; e.g. if an insn wasn't supported). + +(define-cpu + ; cpu names must be distinct from the architecture name and machine names. + ; The "b" suffix stands for "base" and is the convention. + ; The "f" suffix stands for "family" and is the convention. + (name m32rbf) + (comment "Renesas M32R base family") + (endian either) + (word-bitsize 32) + ; Override isa spec (??? keeps things simpler, though it was more true + ; in the early days and not so much now). + (parallel-insns 1) +) + +(define-cpu + (name m32rxf) + (comment "Renesas M32Rx family") + (endian either) + (word-bitsize 32) + ; Generated files have an "x" suffix. + (file-transform "x") +) + +(define-cpu + (name m32r2f) + (comment "Renesas M32R2 family") + (endian either) + (word-bitsize 32) + ; Generated files have an "2" suffix. + (file-transform "2") +) + +(define-mach + (name m32r) + (comment "Generic M32R cpu") + (cpu m32rbf) +) + +(define-mach + (name m32rx) + (comment "M32RX cpu") + (cpu m32rxf) +) + +(define-mach + (name m32r2) + (comment "M32R2 cpu") + (cpu m32r2f) +) + +; Model descriptions. + +; The meaning of this value is wip but at the moment it's intended to describe +; the implementation (i.e. what -mtune=foo does in sparc gcc). +; +; Notes while wip: +; - format of pipeline entry: +; (pipeline name (stage1-name ...) (stage2-name ...) ...) +; The contents of a stage description is wip. +; - each mach must have at least one model +; - the default model must be the first one +;- maybe have `retire' support update total cycle count to handle current +; parallel insn cycle counting problems + +(define-model + (name m32r/d) (comment "m32r/d") (attrs) + (mach m32r) + + ;(prefetch) + ;(retire) + + (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback))) + (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback))) + + ; `state' is a list of variables for recording model state + (state + ; bit mask of h-gr registers, =1 means value being loaded from memory + (h-gr UINT) + ) + + (unit u-exec "Execution Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1) (dr INT -1)) ; inputs + ((dr INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-cmp "Compare Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-mac "Multiply/Accumulate Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-cti "Branch Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1)) ; inputs + ((pc)) ; outputs + () ; profile action (default) + ) + (unit u-load "Memory Load Unit" () + 1 1 ; issue done + () ; state + ((sr INT) + ;(ld-mem AI) + ) ; inputs + ((dr INT)) ; outputs + () ; profile action (default) + ) + (unit u-store "Memory Store Unit" () + 1 1 ; issue done + () ; state + ((src1 INT) (src2 INT)) ; inputs + () ; ((st-mem AI)) ; outputs + () ; profile action (default) + ) +) + +(define-model + (name test) (comment "test") (attrs) + (mach m32r) + (pipeline all "" () ((fetch) (decode) (execute) (writeback))) + (unit u-exec "Execution Unit" () + 1 1 ; issue done + () () () ()) +) + +; Each mach must have at least one model. + +(define-model + (name m32rx) (comment "m32rx") (attrs) + (mach m32rx) + + ; ??? It's 6 stages but I forget the details right now. + (pipeline p-o "" () ((fetch) (decode) (execute) (writeback))) + (pipeline p-s "" () ((fetch) (decode) (execute) (writeback))) + (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback))) + + (unit u-exec "Execution Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1) (dr INT -1)) ; inputs + ((dr INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-cmp "Compare Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-mac "Multiply/Accumulate Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-cti "Branch Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1)) ; inputs + ((pc)) ; outputs + () ; profile action (default) + ) + (unit u-load "Memory Load Unit" () + 1 1 ; issue done + () ; state + ((sr INT)) ; inputs + ((dr INT)) ; outputs + () ; profile action (default) + ) + (unit u-store "Memory Store Unit" () + 1 1 ; issue done + () ; state + ((src1 INT) (src2 INT)) ; inputs + () ; outputs + () ; profile action (default) + ) +) + +(define-model + (name m32r2) (comment "m32r2") (attrs) + (mach m32r2) + + ; ??? It's 6 stages but I forget the details right now. + (pipeline p-o "" () ((fetch) (decode) (execute) (writeback))) + (pipeline p-s "" () ((fetch) (decode) (execute) (writeback))) + (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback))) + + (unit u-exec "Execution Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1) (dr INT -1)) ; inputs + ((dr INT -1)) ; outputs + () ; profile action (default) + ) + (unit u-cmp "Compare Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-mac "Multiply/Accumulate Unit" () + 1 1 ; issue done + () ; state + ((src1 INT -1) (src2 INT -1)) ; inputs + () ; outputs + () ; profile action (default) + ) + (unit u-cti "Branch Unit" () + 1 1 ; issue done + () ; state + ((sr INT -1)) ; inputs + ((pc)) ; outputs + () ; profile action (default) + ) + (unit u-load "Memory Load Unit" () + 1 1 ; issue done + () ; state + ((sr INT)) ; inputs + ((dr INT)) ; outputs + () ; profile action (default) + ) + (unit u-store "Memory Store Unit" () + 1 1 ; issue done + () ; state + ((src1 INT) (src2 INT)) ; inputs + () ; outputs + () ; profile action (default) + ) +) + +; The instruction fetch/execute cycle. +; This is split into two parts as sometimes more than one instruction is +; decoded at once. +; The `const SI' argument to decode/execute is used to distinguish +; multiple instructions processed at the same time (e.g. m32r). +; +; ??? This is wip, and not currently used. +; ??? Needs to be moved to define-isa. + +; This is how to fetch and decode an instruction. + +;(define-extract +; (sequence VOID +; (if VOID (ne AI (and AI pc (const AI 3)) (const AI 0)) +; (sequence VOID +; (set-quiet USI (scratch UHI insn1) (ifetch UHI pc)) +; (decode VOID pc (and UHI insn1 (const UHI #x7fff)) +; (const SI 0))) +; (sequence VOID +; (set-quiet USI (scratch USI insn) (ifetch USI pc)) +; (if VOID (ne USI (and USI insn (const USI #x80000000)) +; (const USI 0)) +; (decode VOID pc (srl USI insn (const WI 16)) (const SI 0)) +; (sequence VOID +; ; ??? parallel support +; (decode VOID pc (srl USI insn (const WI 16)) +; (const SI 0)) +; (decode VOID (add AI pc (const AI 2)) +; (and USI insn (const WI #x7fff)) +; (const SI 1)))))) +; ) +;) + +; This is how to execute a decoded instruction. + +;(define-execute +; (sequence VOID () ; () is empty option list +; ((AI new_pc)) +; (set AI new_pc (execute: AI (const 0)) #:quiet) +; (set AI pc new_pc #:direct) +; ) +;) + +; FIXME: It might simplify things to separate the execute process from the +; one that updates the PC. + +; Instruction fields. +; +; Attributes: +; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) +; ABS-ADDR: absolute address (for reloc and disassembly purposes?) +; RESERVED: bits are not used to decode insn, must be all 0 +; RELOC: there is a relocation associated with this field (experiment) + +(define-attr + (for ifield operand) + (type boolean) + (name RELOC) + (comment "there is a reloc associated with this field (experiment)") +) + +(dnf f-op1 "op1" () 0 4) +(dnf f-op2 "op2" () 8 4) +(dnf f-cond "cond" () 4 4) +(dnf f-r1 "r1" () 4 4) +(dnf f-r2 "r2" () 12 4) +(df f-simm8 "simm8" () 8 8 INT #f #f) +(df f-simm16 "simm16" () 16 16 INT #f #f) +(dnf f-shift-op2 "shift op2" () 8 3) +(dnf f-uimm3 "uimm3" () 5 3) +(dnf f-uimm4 "uimm4" () 12 4) +(dnf f-uimm5 "uimm5" () 11 5) +(dnf f-uimm8 "uimm8" () 8 8) +(dnf f-uimm16 "uimm16" () 16 16) +(dnf f-uimm24 "uimm24" (ABS-ADDR RELOC) 8 24) +(dnf f-hi16 "high 16 bits" (SIGN-OPT) 16 16) +(df f-disp8 "disp8, slot unknown" (PCREL-ADDR RELOC) 8 8 INT + ((value pc) (sra WI (sub WI value (and WI pc (const -4))) (const 2))) + ((value pc) (add WI (sll WI value (const 2)) (and WI pc (const -4))))) +(df f-disp16 "disp16" (PCREL-ADDR RELOC) 16 16 INT + ((value pc) (sra WI (sub WI value pc) (const 2))) + ((value pc) (add WI (sll WI value (const 2)) pc))) +(df f-disp24 "disp24" (PCREL-ADDR RELOC) 8 24 INT + ((value pc) (sra WI (sub WI value pc) (const 2))) + ((value pc) (add WI (sll WI value (const 2)) pc))) + +(dnf f-op23 "op2.3" () 9 3) +(dnf f-op3 "op3" () 14 2) +(dnf f-acc "acc" () 8 1) +(dnf f-accs "accs" () 12 2) +(dnf f-accd "accd" () 4 2) +(dnf f-bits67 "bits67" () 6 2) +(dnf f-bit4 "bit4" () 4 1) +(dnf f-bit14 "bit14" () 14 1) + +(define-ifield (name f-imm1) (comment "1 bit immediate, 0->1 1->2") + (attrs) + (start 15) (length 1) + (encode (value pc) (sub WI value (const WI 1))) + (decode (value pc) (add WI value (const WI 1))) +) + +; Enums. + +; insn-op1: bits 0-3 +; FIXME: should use die macro or some such +(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1 + ("0" "1" "2" "3" "4" "5" "6" "7" + "8" "9" "10" "11" "12" "13" "14" "15") +) + +; insn-op2: bits 8-11 +; FIXME: should use die macro or some such +(define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2 + ("0" "1" "2" "3" "4" "5" "6" "7" + "8" "9" "10" "11" "12" "13" "14" "15") +) + +; Hardware pieces. +; These entries list the elements of the raw hardware. +; They're also used to provide tables and other elements of the assembly +; language. + +(dnh h-pc "program counter" (PC PROFILE) (pc) () () ()) + +(dnh h-hi16 "high 16 bits" () + (immediate (UINT 16)) + () () () +) + +; These two aren't technically needed. +; They're here for illustration sake mostly. +; Plus they cause the value to be stored in the extraction buffers to only +; be 16 bits wide (vs 32 or 64). Whoopie ding. But it's fun. +(dnh h-slo16 "signed low 16 bits" () + (immediate (INT 16)) + () () () +) +(dnh h-ulo16 "unsigned low 16 bits" () + (immediate (UINT 16)) + () () () +) + +(define-keyword + (name gr-names) + (print-name h-gr) + (prefix "") + (values (fp 13) (lr 14) (sp 15) + (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7) + (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)) +) + +(define-hardware + (name h-gr) + (comment "general registers") + (attrs PROFILE CACHE-ADDR) + (type register WI (16)) + (indices extern-keyword gr-names) +) + +(define-keyword + (name cr-names) + (print-name h-cr) + (prefix "") + (values (psw 0) (cbr 1) (spi 2) (spu 3) + (bpc 6) (bbpsw 8) (bbpc 14) (evb 5) + (cr0 0) (cr1 1) (cr2 2) (cr3 3) + (cr4 4) (cr5 5) (cr6 6) (cr7 7) + (cr8 8) (cr9 9) (cr10 10) (cr11 11) + (cr12 12) (cr13 13) (cr14 14) (cr15 15)) +) + +(define-hardware + (name h-cr) + (comment "control registers") + (type register UWI (16)) + (indices extern-keyword cr-names) + (get (index) (c-call UWI "@cpu@_h_cr_get_handler" index)) + (set (index newval) (c-call VOID "@cpu@_h_cr_set_handler" index newval)) +) + +; The actual accumulator is only 56 bits. +; The top 8 bits are sign extended from bit 8 (when counting msb = bit 0). +; To simplify the accumulator instructions, no attempt is made to keep the +; top 8 bits properly sign extended (currently there's no point since they +; all ignore them). When the value is read it is properly sign extended +; [in the `get' handler]. +(define-hardware + (name h-accum) + (comment "accumulator") + (type register DI) + (get () (c-call DI "@cpu@_h_accum_get_handler")) + (set (newval) (c-call VOID "@cpu@_h_accum_set_handler" newval)) +) + +; FIXME: Revisit after sanitization can be removed. Remove h-accum. +(define-hardware + (name h-accums) + (comment "accumulators") + (attrs (MACH m32rx,m32r2)) + (type register DI (2)) + (indices keyword "" ((a0 0) (a1 1))) + ; get/set so a0 accesses are redirected to h-accum. + ; They're also so reads can properly sign extend the value. + ; FIXME: Needn't be a function call. + (get (index) (c-call DI "@cpu@_h_accums_get_handler" index)) + (set (index newval) (c-call VOID "@cpu@_h_accums_set_handler" index newval)) +) + +; For condbit operand. FIXME: Need to allow spec of get/set of operands. +; Having this separate from h-psw keeps the parts that use it simpler +; [since they greatly outnumber those that use h-psw]. +(dsh h-cond "condition bit" () (register BI)) + +; The actual values of psw,bpsw,bbpsw are recorded here to allow access +; to them as a unit. +(define-hardware + (name h-psw) + (comment "psw part of psw") + (type register UQI) + ; get/set to handle cond bit. + ; FIXME: missing: use's and clobber's + ; FIXME: remove c-call? + (get () (c-call UQI "@cpu@_h_psw_get_handler")) + (set (newval) (c-call VOID "@cpu@_h_psw_set_handler" newval)) +) +(dsh h-bpsw "backup psw" () (register UQI)) +(dsh h-bbpsw "backup bpsw" () (register UQI)) + +; FIXME: Later make add get/set specs and support SMP. +(dsh h-lock "lock" () (register BI)) + +; Instruction Operands. +; These entries provide a layer between the assembler and the raw hardware +; description, and are used to refer to hardware elements in the semantic +; code. Usually there's a bit of over-specification, but in more complicated +; instruction sets there isn't. + +; M32R specific operand attributes: + +(define-attr + (for operand) + (type boolean) + (name HASH-PREFIX) + (comment "immediates have an optional '#' prefix") +) + +; ??? Convention says this should be o-sr, but then the insn definitions +; should refer to o-sr which is clumsy. The "o-" could be implicit, but +; then it should be implicit for all the symbols here, but then there would +; be confusion between (f-)simm8 and (h-)simm8. +; So for now the rule is exactly as it appears here. + +(dnop sr "source register" () h-gr f-r2) +(dnop dr "destination register" () h-gr f-r1) +;; The assembler relies upon the fact that dr and src1 are the same field. +;; FIXME: Revisit. +(dnop src1 "source register 1" () h-gr f-r1) +(dnop src2 "source register 2" () h-gr f-r2) +(dnop scr "source control register" () h-cr f-r2) +(dnop dcr "destination control register" () h-cr f-r1) + +(dnop simm8 "8 bit signed immediate" (HASH-PREFIX) h-sint f-simm8) +(dnop simm16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-simm16) +(dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-uint f-uimm3) +(dnop uimm4 "4 bit trap number" (HASH-PREFIX) h-uint f-uimm4) +(dnop uimm5 "5 bit shift count" (HASH-PREFIX) h-uint f-uimm5) +(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8) +(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16) + +(dnop imm1 "1 bit immediate" ((MACH m32rx,m32r2) HASH-PREFIX) h-uint f-imm1) +(dnop accd "accumulator destination register" ((MACH m32rx,m32r2)) h-accums f-accd) +(dnop accs "accumulator source register" ((MACH m32rx,m32r2)) h-accums f-accs) +(dnop acc "accumulator reg (d)" ((MACH m32rx,m32r2)) h-accums f-acc) + +; slo16,ulo16 are used in both with-hash-prefix/no-hash-prefix cases. +; e.g. add3 r3,r3,#1 and ld r3,@(4,r4). We could use HASH-PREFIX. +; Instead we create a fake operand `hash'. The m32r is an illustration port, +; so we often try out various ways of doing things. + +(define-operand (name hash) (comment "# prefix") (attrs) + (type h-sint) ; doesn't really matter + (index f-nil) + (handlers (parse "hash") (print "hash")) +) + +; For high(foo),shigh(foo). +(define-operand + (name hi16) + (comment "high 16 bit immediate, sign optional") + (attrs) + (type h-hi16) + (index f-hi16) + (handlers (parse "hi16")) +) + +; For low(foo),sda(foo). +(define-operand + (name slo16) + (comment "16 bit signed immediate, for low()") + (attrs) + (type h-slo16) + (index f-simm16) + (handlers (parse "slo16")) +) + +; For low(foo). +(define-operand + (name ulo16) + (comment "16 bit unsigned immediate, for low()") + (attrs) + (type h-ulo16) + (index f-uimm16) + (handlers (parse "ulo16")) +) + +(dnop uimm24 "24 bit address" (HASH-PREFIX) h-addr f-uimm24) + +(define-operand + (name disp8) + (comment "8 bit displacement") + (attrs RELAX) + (type h-iaddr) + (index f-disp8) + ; ??? Early experiments had insert/extract fields here. + ; Moving these to f-disp8 made things cleaner, but may wish to re-introduce + ; fields here to handle more complicated cases. +) + +(dnop disp16 "16 bit displacement" () h-iaddr f-disp16) +(dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24) + +; These hardware elements are refered to frequently. + +(dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil) +(dnop accum "accumulator" (SEM-ONLY) h-accum f-nil) + +; Instruction definitions. +; +; Notes while wip: +; - dni is a cover macro to the real "this is an instruction" keyword. +; The syntax of the real one is yet to be determined. +; At the lowest level (i.e. the "real" one) it will probably take a variable +; list of arguments where each argument [perhaps after the standard three of +; name, comment, attrs] is "(keyword arg-to-keyword)". This syntax is simple +; and yet completely upward extensible. And given the macro facility, one +; needn't code at that low a level so even though it'll be more verbose than +; necessary it won't matter. This same reasoning can be applied to most +; types of entries in this file. + +; M32R specific instruction attributes: + +; FILL-SLOT: Need next insn to begin on 32 bit boundary. +; (A "slot" as used here is a 32 bit quantity that can either be filled with +; one 32 bit insn or two 16 bit insns which go in the "left bin" and "right +; bin" where the left bin is the one with a lower address). + +(define-attr + (for insn) + (type boolean) + (name FILL-SLOT) + (comment "fill right bin with `nop' if insn is in left bin") +) + +(define-attr + (for insn) + (type boolean) + (name SPECIAL) + (comment "non-public m32rx insn") +) + +(define-attr + (for insn) + (type boolean) + (name SPECIAL_M32R) + (comment "non-public m32r insn") +) + +(define-attr + (for insn) + (type boolean) + (name SPECIAL_FLOAT) + (comment "floating point insn") +) + +; IDOC attribute for instruction documentation. + +(define-attr + (for insn) + (type enum) + (name IDOC) + (comment "insn kind for documentation") + (attrs META) + (values + (MEM - () "Memory") + (ALU - () "ALU") + (BR - () "Branch") + (ACCUM - () "Accumulator") + (MAC - () "Multiply/Accumulate") + (MISC - () "Miscellaneous") + ) +) + +(define-pmacro (bin-op mnemonic op2-op sem-op imm-prefix imm) + (begin + (dni mnemonic + (.str mnemonic " reg/reg") + ((PIPE OS) (IDOC ALU)) + (.str mnemonic " $dr,$sr") + (+ OP1_0 op2-op dr sr) + (set dr (sem-op dr sr)) + () + ) + (dni (.sym mnemonic "3") + (.str mnemonic " reg/" imm) + ((IDOC ALU)) + (.str mnemonic "3 $dr,$sr," imm-prefix "$" imm) + (+ OP1_8 op2-op dr sr imm) + (set dr (sem-op sr imm)) + () + ) + ) +) +(bin-op add OP2_10 add "$hash" slo16) +; sub isn't present because sub3 doesn't exist. +(bin-op and OP2_12 and "" uimm16) +(bin-op or OP2_14 or "$hash" ulo16) +(bin-op xor OP2_13 xor "" uimm16) + +(dni addi "addi" + ((PIPE OS) (IDOC ALU)) + ;#.(string-append "addi " "$dr,$simm8") ; #. experiment + "addi $dr,$simm8" + (+ OP1_4 dr simm8) + (set dr (add dr simm8)) + ((m32r/d (unit u-exec)) + (m32rx (unit u-exec)) + (m32r2 (unit u-exec))) +) + +(dni addv "addv" + ((PIPE OS) (IDOC ALU)) + "addv $dr,$sr" + (+ OP1_0 OP2_8 dr sr) + (parallel () + (set dr (add dr sr)) + (set condbit (add-oflag dr sr (const 0)))) + () +) + +(dni addv3 "addv3" + ((IDOC ALU)) + "addv3 $dr,$sr,$simm16" + (+ OP1_8 OP2_8 dr sr simm16) + (parallel () + (set dr (add sr simm16)) + (set condbit (add-oflag sr simm16 (const 0)))) + () +) + +(dni addx "addx" + ((PIPE OS) (IDOC ALU)) + "addx $dr,$sr" + (+ OP1_0 OP2_9 dr sr) + (parallel () + (set dr (addc dr sr condbit)) + (set condbit (add-cflag dr sr condbit))) + () +) + +(dni bc8 "bc with 8 bit displacement" + (COND-CTI (PIPE O) (IDOC BR)) + "bc.s $disp8" + (+ OP1_7 (f-r1 12) disp8) + (if condbit (set pc disp8)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bc8r "relaxable bc8" + (COND-CTI RELAXABLE (PIPE O) (IDOC BR)) + "bc $disp8" + (emit bc8 disp8) +) + +(dni bc24 "bc with 24 bit displacement" + (COND-CTI (IDOC BR)) + "bc.l $disp24" + (+ OP1_15 (f-r1 12) disp24) + (if condbit (set pc disp24)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bc24r "relaxable bc24" + (COND-CTI RELAXED (IDOC BR)) + "bc $disp24" + (emit bc24 disp24) +) + +(dni beq "beq" + (COND-CTI (IDOC BR)) + "beq $src1,$src2,$disp16" + (+ OP1_11 OP2_0 src1 src2 disp16) + (if (eq src1 src2) (set pc disp16)) + ((m32r/d (unit u-cti) (unit u-cmp (cycles 0))) + (m32rx (unit u-cti) (unit u-cmp (cycles 0))) + (m32r2 (unit u-cti) (unit u-cmp (cycles 0)))) +) + +(define-pmacro (cbranch sym comment op2-op comp-op) + (dni sym comment (COND-CTI (IDOC BR)) + (.str sym " $src2,$disp16") + (+ OP1_11 op2-op (f-r1 0) src2 disp16) + (if (comp-op src2 (const WI 0)) (set pc disp16)) + ((m32r/d (unit u-cti) (unit u-cmp (cycles 0))) + (m32rx (unit u-cti) (unit u-cmp (cycles 0))) + (m32r2 (unit u-cti) (unit u-cmp (cycles 0)))) + ) +) +(cbranch beqz "beqz" OP2_8 eq) +(cbranch bgez "bgez" OP2_11 ge) +(cbranch bgtz "bgtz" OP2_13 gt) +(cbranch blez "blez" OP2_12 le) +(cbranch bltz "bltz" OP2_10 lt) +(cbranch bnez "bnez" OP2_9 ne) + +(dni bl8 "bl with 8 bit displacement" + (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR)) + "bl.s $disp8" + (+ OP1_7 (f-r1 14) disp8) + (sequence () + (set (reg h-gr 14) + (add (and pc (const -4)) (const 4))) + (set pc disp8)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bl8r "relaxable bl8" + (UNCOND-CTI FILL-SLOT RELAXABLE (PIPE O) (IDOC BR)) + "bl $disp8" + (emit bl8 disp8) +) + +(dni bl24 "bl with 24 bit displacement" + (UNCOND-CTI (IDOC BR)) + "bl.l $disp24" + (+ OP1_15 (f-r1 14) disp24) + (sequence () + (set (reg h-gr 14) (add pc (const 4))) + (set pc disp24)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bl24r "relaxable bl24" + (UNCOND-CTI RELAXED (IDOC BR)) + "bl $disp24" + (emit bl24 disp24) +) + +(dni bcl8 "bcl with 8 bit displacement" + (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) (IDOC BR)) + "bcl.s $disp8" + (+ OP1_7 (f-r1 8) disp8) + (if condbit + (sequence () + (set (reg h-gr 14) + (add (and pc (const -4)) + (const 4))) + (set pc disp8))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bcl8r "relaxable bcl8" + (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) RELAXABLE (IDOC BR)) + "bcl $disp8" + (emit bcl8 disp8) +) + +(dni bcl24 "bcl with 24 bit displacement" + (COND-CTI (MACH m32rx,m32r2) (IDOC BR)) + "bcl.l $disp24" + (+ OP1_15 (f-r1 8) disp24) + (if condbit + (sequence () + (set (reg h-gr 14) (add pc (const 4))) + (set pc disp24))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bcl24r "relaxable bcl24" + (COND-CTI (MACH m32rx,m32r2) RELAXED (IDOC BR)) + "bcl $disp24" + (emit bcl24 disp24) +) + +(dni bnc8 "bnc with 8 bit displacement" + (COND-CTI (PIPE O) (IDOC BR)) + "bnc.s $disp8" + (+ OP1_7 (f-r1 13) disp8) + (if (not condbit) (set pc disp8)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bnc8r "relaxable bnc8" + (COND-CTI RELAXABLE (PIPE O) (IDOC BR)) + "bnc $disp8" + (emit bnc8 disp8) +) + +(dni bnc24 "bnc with 24 bit displacement" + (COND-CTI (IDOC BR)) + "bnc.l $disp24" + (+ OP1_15 (f-r1 13) disp24) + (if (not condbit) (set pc disp24)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bnc24r "relaxable bnc24" + (COND-CTI RELAXED (IDOC BR)) + "bnc $disp24" + (emit bnc24 disp24) +) + +(dni bne "bne" + (COND-CTI (IDOC BR)) + "bne $src1,$src2,$disp16" + (+ OP1_11 OP2_1 src1 src2 disp16) + (if (ne src1 src2) (set pc disp16)) + ((m32r/d (unit u-cti) (unit u-cmp (cycles 0))) + (m32rx (unit u-cti) (unit u-cmp (cycles 0))) + (m32r2 (unit u-cti) (unit u-cmp (cycles 0)))) +) + +(dni bra8 "bra with 8 bit displacement" + (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR)) + "bra.s $disp8" + (+ OP1_7 (f-r1 15) disp8) + (set pc disp8) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bra8r "relaxable bra8" + (UNCOND-CTI FILL-SLOT RELAXABLE (PIPE O) (IDOC BR)) + "bra $disp8" + (emit bra8 disp8) +) + +(dni bra24 "bra with 24 displacement" + (UNCOND-CTI (IDOC BR)) + "bra.l $disp24" + (+ OP1_15 (f-r1 15) disp24) + (set pc disp24) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bra24r "relaxable bra24" + (UNCOND-CTI RELAXED (IDOC BR)) + "bra $disp24" + (emit bra24 disp24) +) + +(dni bncl8 "bncl with 8 bit displacement" + (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) (IDOC BR)) + "bncl.s $disp8" + (+ OP1_7 (f-r1 9) disp8) + (if (not condbit) + (sequence () + (set (reg h-gr 14) + (add (and pc (const -4)) + (const 4))) + (set pc disp8))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bncl8r "relaxable bncl8" + (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) RELAXABLE (IDOC BR)) + "bncl $disp8" + (emit bncl8 disp8) +) + +(dni bncl24 "bncl with 24 bit displacement" + (COND-CTI (MACH m32rx,m32r2) (IDOC BR)) + "bncl.l $disp24" + (+ OP1_15 (f-r1 9) disp24) + (if (not condbit) + (sequence () + (set (reg h-gr 14) (add pc (const 4))) + (set pc disp24))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dnmi bncl24r "relaxable bncl24" + (COND-CTI (MACH m32rx,m32r2) RELAXED (IDOC BR)) + "bncl $disp24" + (emit bncl24 disp24) +) + +(dni cmp "cmp" + ((PIPE OS) (IDOC ALU)) + "cmp $src1,$src2" + (+ OP1_0 OP2_4 src1 src2) + (set condbit (lt src1 src2)) + ((m32r/d (unit u-cmp)) + (m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni cmpi "cmpi" + ((IDOC ALU)) + "cmpi $src2,$simm16" + (+ OP1_8 (f-r1 0) OP2_4 src2 simm16) + (set condbit (lt src2 simm16)) + ((m32r/d (unit u-cmp)) + (m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni cmpu "cmpu" + ((PIPE OS) (IDOC ALU)) + "cmpu $src1,$src2" + (+ OP1_0 OP2_5 src1 src2) + (set condbit (ltu src1 src2)) + ((m32r/d (unit u-cmp)) + (m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni cmpui "cmpui" + ((IDOC ALU)) + "cmpui $src2,$simm16" + (+ OP1_8 (f-r1 0) OP2_5 src2 simm16) + (set condbit (ltu src2 simm16)) + ((m32r/d (unit u-cmp)) + (m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni cmpeq "cmpeq" + ((MACH m32rx,m32r2) (PIPE OS) (IDOC ALU)) + "cmpeq $src1,$src2" + (+ OP1_0 OP2_6 src1 src2) + (set condbit (eq src1 src2)) + ((m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni cmpz "cmpz" + ((MACH m32rx,m32r2) (PIPE OS) (IDOC ALU)) + "cmpz $src2" + (+ OP1_0 OP2_7 (f-r1 0) src2) + (set condbit (eq src2 (const 0))) + ((m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +(dni div "div" + ((IDOC ALU)) + "div $dr,$sr" + (+ OP1_9 OP2_0 dr sr (f-simm16 0)) + (if (ne sr (const 0)) (set dr (div dr sr))) + ((m32r/d (unit u-exec (cycles 37))) + (m32rx (unit u-exec (cycles 37))) + (m32r2 (unit u-exec (cycles 37)))) +) + +(dni divu "divu" + ((IDOC ALU)) + "divu $dr,$sr" + (+ OP1_9 OP2_1 dr sr (f-simm16 0)) + (if (ne sr (const 0)) (set dr (udiv dr sr))) + ((m32r/d (unit u-exec (cycles 37))) + (m32rx (unit u-exec (cycles 37))) + (m32r2 (unit u-exec (cycles 37)))) +) + +(dni rem "rem" + ((IDOC ALU)) + "rem $dr,$sr" + (+ OP1_9 OP2_2 dr sr (f-simm16 0)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (mod dr sr))) + ((m32r/d (unit u-exec (cycles 37))) + (m32rx (unit u-exec (cycles 37))) + (m32r2 (unit u-exec (cycles 37)))) +) + +(dni remu "remu" + ((IDOC ALU)) + "remu $dr,$sr" + (+ OP1_9 OP2_3 dr sr (f-simm16 0)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (umod dr sr))) + ((m32r/d (unit u-exec (cycles 37))) + (m32rx (unit u-exec (cycles 37))) + (m32r2 (unit u-exec (cycles 37)))) +) + +(dni remh "remh" + ((MACH m32r2)) + "remh $dr,$sr" + (+ OP1_9 OP2_2 dr sr (f-simm16 #x10)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (mod (ext WI (trunc HI dr)) sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni remuh "remuh" + ((MACH m32r2)) + "remuh $dr,$sr" + (+ OP1_9 OP2_3 dr sr (f-simm16 #x10)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (umod dr sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni remb "remb" + ((MACH m32r2)) + "remb $dr,$sr" + (+ OP1_9 OP2_2 dr sr (f-simm16 #x18)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (mod (ext WI (trunc BI dr)) sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni remub "remub" + ((MACH m32r2)) + "remub $dr,$sr" + (+ OP1_9 OP2_3 dr sr (f-simm16 #x18)) + ; FIXME: Check rounding direction. + (if (ne sr (const 0)) (set dr (umod dr sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni divuh "divuh" + ((MACH m32r2)) + "divuh $dr,$sr" + (+ OP1_9 OP2_1 dr sr (f-simm16 #x10)) + (if (ne sr (const 0)) (set dr (udiv dr sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni divb "divb" + ((MACH m32r2)) + "divb $dr,$sr" + (+ OP1_9 OP2_0 dr sr (f-simm16 #x18)) + (if (ne sr (const 0)) (set dr (div (ext WI (trunc BI dr)) sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni divub "divub" + ((MACH m32r2)) + "divub $dr,$sr" + (+ OP1_9 OP2_1 dr sr (f-simm16 #x18)) + (if (ne sr (const 0)) (set dr (udiv dr sr))) + ((m32r2 (unit u-exec (cycles 21)))) +) + +(dni divh "divh" + ((MACH m32rx,m32r2) (IDOC ALU)) + "divh $dr,$sr" + (+ OP1_9 OP2_0 dr sr (f-simm16 #x10)) + (if (ne sr (const 0)) (set dr (div (ext WI (trunc HI dr)) sr))) + ((m32rx (unit u-exec (cycles 21))) + (m32r2 (unit u-exec (cycles 21)))) +) + +(dni jc "jc" + (COND-CTI (MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR)) + "jc $sr" + (+ OP1_1 (f-r1 12) OP2_12 sr) + (if condbit (set pc (and sr (const -4)))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dni jnc "jnc" + (COND-CTI (MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR)) + "jnc $sr" + (+ OP1_1 (f-r1 13) OP2_12 sr) + (if (not condbit) (set pc (and sr (const -4)))) + ((m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dni jl "jl" + (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR)) + "jl $sr" + (+ OP1_1 (f-r1 14) OP2_12 sr) + (parallel () + (set (reg h-gr 14) + (add (and pc (const -4)) (const 4))) + (set pc (and sr (const -4)))) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(dni jmp "jmp" + (UNCOND-CTI (PIPE O) (IDOC BR)) + "jmp $sr" + (+ OP1_1 (f-r1 15) OP2_12 sr) + (set pc (and sr (const -4))) + ; The above works now so this kludge has been commented out. + ; It's kept around because the f-r1 reference in the semantic part + ; should work. + ; FIXME: kludge, instruction decoding not finished. + ; But this should work, so that's another FIXME. + ;(sequence VOID (if VOID (eq SI f-r1 (const SI 14)) + ; FIXME: abuf->insn should be a macro of some sort. + ;(sequence VOID + ; (if VOID (eq SI (c-code SI "((abuf->insn >> 8) & 15)") + ; (const SI 14)) + ; (set WI (reg WI h-gr 14) + ; (add WI (and WI pc (const WI -4)) (const WI 4)))) + ; (set WI pc sr)) + ((m32r/d (unit u-cti)) + (m32rx (unit u-cti)) + (m32r2 (unit u-cti))) +) + +(define-pmacro (no-ext-expr mode expr) expr) +(define-pmacro (ext-expr mode expr) (ext mode expr)) +(define-pmacro (zext-expr mode expr) (zext mode expr)) + +(define-pmacro (load-op suffix op2-op mode ext-op) + (begin + (dni (.sym ld suffix) (.str "ld" suffix) + ((PIPE O) (IDOC MEM)) + (.str "ld" suffix " $dr,@$sr") + (+ OP1_2 op2-op dr sr) + (set dr (ext-op WI (mem mode sr))) + ((m32r/d (unit u-load)) + (m32rx (unit u-load)) + (m32r2 (unit u-load))) + ) + (dnmi (.sym ld suffix "-2") (.str "ld" suffix "-2") + (NO-DIS (PIPE O) (IDOC MEM)) + (.str "ld" suffix " $dr,@($sr)") + (emit (.sym ld suffix) dr sr)) + (dni (.sym ld suffix -d) (.str "ld" suffix "-d") + ((IDOC MEM)) + (.str "ld" suffix " $dr,@($slo16,$sr)") + (+ OP1_10 op2-op dr sr slo16) + (set dr (ext-op WI (mem mode (add sr slo16)))) + ((m32r/d (unit u-load (cycles 2))) + (m32rx (unit u-load (cycles 2))) + (m32r2 (unit u-load (cycles 2)))) + ) + (dnmi (.sym ld suffix -d2) (.str "ld" suffix "-d2") + (NO-DIS (IDOC MEM)) + (.str "ld" suffix " $dr,@($sr,$slo16)") + (emit (.sym ld suffix -d) dr sr slo16)) + ) +) +(load-op "" OP2_12 WI no-ext-expr) +(load-op b OP2_8 QI ext-expr) +(load-op h OP2_10 HI ext-expr) +(load-op ub OP2_9 QI zext-expr) +(load-op uh OP2_11 HI zext-expr) + +(dni ld-plus "ld+" + ((PIPE O) (IDOC MEM)) + "ld $dr,@$sr+" + (+ OP1_2 dr OP2_14 sr) + (parallel () + ; wip: memory addresses in profiling support + ;(set dr (name ld-mem (mem WI sr))) + (set dr (mem WI sr)) + (set sr (add sr (const 4)))) + ; Note: `pred' is the constraint. Also useful here is (ref name) + ; and returns true if operand was referenced + ; (where "referenced" means _read_ if input operand and _written_ if + ; output operand). + ; args to unit are "unit-name (name1 value1) ..." + ; - cycles(done),issue,pred are also specified this way + ; - if unspecified, default is used + ; - for ins/outs, extra arg is passed that says what was specified + ; - this is AND'd with `written' for outs + ((m32r/d (unit u-load (pred (const 1))) + (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1)))) + (m32rx (unit u-load) + (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1)))) + (m32r2 (unit u-load) + (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1)))) + ) +) + +(dnmi pop "pop" + ((PIPE O) (IDOC MEM)) + "pop $dr" + (emit ld-plus dr (sr 15)) ; "ld %0,@sp+" +) + +(dni ld24 "ld24" + ((IDOC MEM)) + "ld24 $dr,$uimm24" + (+ OP1_14 dr uimm24) + (set dr uimm24) + () +) + +; ldi8 appears before ldi16 so we try the shorter version first + +(dni ldi8 "ldi8" + ((PIPE OS) (IDOC ALU)) + "ldi8 $dr,$simm8" + (+ OP1_6 dr simm8) + (set dr simm8) + () +) + +(dnmi ldi8a "ldi8 alias" + ((PIPE OS) (IDOC ALU)) + "ldi $dr,$simm8" + (emit ldi8 dr simm8) +) + +(dni ldi16 "ldi16" + ((IDOC ALU)) + "ldi16 $dr,$hash$slo16" + (+ OP1_9 OP2_15 (f-r2 0) dr slo16) + (set dr slo16) + () +) + +(dnmi ldi16a "ldi16 alias" + ((IDOC ALU)) + "ldi $dr,$hash$slo16" + (emit ldi16 dr slo16) +) + +(dni lock "lock" + ((PIPE O) (IDOC MISC)) + "lock $dr,@$sr" + (+ OP1_2 OP2_13 dr sr) + (sequence () + (set (reg h-lock) (const BI 1)) + (set dr (mem WI sr))) + ((m32r/d (unit u-load)) + (m32rx (unit u-load)) + (m32r2 (unit u-load))) +) + +(dni machi "machi" + ( + ; (MACH m32r) is a temporary hack. This insn collides with machi-a + ; in the simulator so disable it for m32rx. + (MACH m32r) (PIPE S) (IDOC MAC) + ) + "machi $src1,$src2" + (+ OP1_3 OP2_4 src1 src2) + ; FIXME: TRACE_RESULT will print the wrong thing since we + ; alter one of the arguments. + (set accum + (sra DI + (sll DI + (add DI + accum + (mul DI + (ext DI (and WI src1 (const #xffff0000))) + (ext DI (trunc HI (sra WI src2 (const 16)))))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni machi-a "machi-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "machi $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 4) src2) + (set acc + (sra DI + (sll DI + (add DI + acc + (mul DI + (ext DI (and WI src1 (const #xffff0000))) + (ext DI (trunc HI (sra WI src2 (const 16)))))) + (const 8)) + (const 8))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni maclo "maclo" + ((MACH m32r) (PIPE S) (IDOC MAC)) + "maclo $src1,$src2" + (+ OP1_3 OP2_5 src1 src2) + (set accum + (sra DI + (sll DI + (add DI + accum + (mul DI + (ext DI (sll WI src1 (const 16))) + (ext DI (trunc HI src2)))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni maclo-a "maclo-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "maclo $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 5) src2) + (set acc + (sra DI + (sll DI + (add DI + acc + (mul DI + (ext DI (sll WI src1 (const 16))) + (ext DI (trunc HI src2)))) + (const 8)) + (const 8))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni macwhi "macwhi" + ((MACH m32r) (PIPE S) (IDOC MAC)) + "macwhi $src1,$src2" + (+ OP1_3 OP2_6 src1 src2) + (set accum + (sra DI + (sll DI + (add DI + accum + (mul DI + (ext DI src1) + (ext DI (trunc HI (sra WI src2 (const 16)))))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni macwhi-a "macwhi-a" + ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC MAC)) + "macwhi $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 6) src2) + ; Note that this doesn't do the sign extension, which is correct. + (set acc + (add acc + (mul (ext DI src1) + (ext DI (trunc HI (sra src2 (const 16))))))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni macwlo "macwlo" + ((MACH m32r) (PIPE S) (IDOC MAC)) + "macwlo $src1,$src2" + (+ OP1_3 OP2_7 src1 src2) + (set accum + (sra DI + (sll DI + (add DI + accum + (mul DI + (ext DI src1) + (ext DI (trunc HI src2)))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni macwlo-a "macwlo-a" + ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC MAC)) + "macwlo $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 7) src2) + ; Note that this doesn't do the sign extension, which is correct. + (set acc + (add acc + (mul (ext DI src1) + (ext DI (trunc HI src2))))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni mul "mul" + ((PIPE S) (IDOC ALU)) + "mul $dr,$sr" + (+ OP1_1 OP2_6 dr sr) + (set dr (mul dr sr)) + ((m32r/d (unit u-exec (cycles 4))) + (m32rx (unit u-exec (cycles 4))) + (m32r2 (unit u-exec (cycles 4)))) +) + +(dni mulhi "mulhi" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mulhi $src1,$src2" + (+ OP1_3 OP2_0 src1 src2) + (set accum + (sra DI + (sll DI + (mul DI + (ext DI (and WI src1 (const #xffff0000))) + (ext DI (trunc HI (sra WI src2 (const 16))))) + (const 16)) + (const 16))) + ((m32r/d (unit u-mac))) +) + +(dni mulhi-a "mulhi-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mulhi $src1,$src2,$acc" + (+ OP1_3 (f-op23 0) src1 acc src2) + (set acc + (sra DI + (sll DI + (mul DI + (ext DI (and WI src1 (const #xffff0000))) + (ext DI (trunc HI (sra WI src2 (const 16))))) + (const 16)) + (const 16))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni mullo "mullo" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mullo $src1,$src2" + (+ OP1_3 OP2_1 src1 src2) + (set accum + (sra DI + (sll DI + (mul DI + (ext DI (sll WI src1 (const 16))) + (ext DI (trunc HI src2))) + (const 16)) + (const 16))) + ((m32r/d (unit u-mac))) +) + +(dni mullo-a "mullo-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mullo $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 1) src2) + (set acc + (sra DI + (sll DI + (mul DI + (ext DI (sll WI src1 (const 16))) + (ext DI (trunc HI src2))) + (const 16)) + (const 16))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni mulwhi "mulwhi" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mulwhi $src1,$src2" + (+ OP1_3 OP2_2 src1 src2) + (set accum + (sra DI + (sll DI + (mul DI + (ext DI src1) + (ext DI (trunc HI (sra WI src2 (const 16))))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni mulwhi-a "mulwhi-a" + ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC ACCUM)) + "mulwhi $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 2) src2) + ; Note that this doesn't do the sign extension, which is correct. + (set acc + (mul (ext DI src1) + (ext DI (trunc HI (sra src2 (const 16)))))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni mulwlo "mulwlo" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mulwlo $src1,$src2" + (+ OP1_3 OP2_3 src1 src2) + (set accum + (sra DI + (sll DI + (mul DI + (ext DI src1) + (ext DI (trunc HI src2))) + (const 8)) + (const 8))) + ((m32r/d (unit u-mac))) +) + +(dni mulwlo-a "mulwlo-a" + ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC ACCUM)) + "mulwlo $src1,$src2,$acc" + (+ OP1_3 src1 acc (f-op23 3) src2) + ; Note that this doesn't do the sign extension, which is correct. + (set acc + (mul (ext DI src1) + (ext DI (trunc HI src2)))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dni mv "mv" + ((PIPE OS) (IDOC ALU)) + "mv $dr,$sr" + (+ OP1_1 OP2_8 dr sr) + (set dr sr) + () +) + +(dni mvfachi "mvfachi" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mvfachi $dr" + (+ OP1_5 OP2_15 (f-r2 0) dr) + (set dr (trunc WI (sra DI accum (const 32)))) + ((m32r/d (unit u-exec (cycles 2)))) +) + +(dni mvfachi-a "mvfachi-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mvfachi $dr,$accs" + (+ OP1_5 dr OP2_15 accs (f-op3 0)) + (set dr (trunc WI (sra DI accs (const 32)))) + ((m32rx (unit u-exec (cycles 2))) + (m32r2 (unit u-exec (cycles 2)))) +) + +(dni mvfaclo "mvfaclo" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mvfaclo $dr" + (+ OP1_5 OP2_15 (f-r2 1) dr) + (set dr (trunc WI accum)) + ((m32r/d (unit u-exec (cycles 2)))) +) + +(dni mvfaclo-a "mvfaclo-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mvfaclo $dr,$accs" + (+ OP1_5 dr OP2_15 accs (f-op3 1)) + (set dr (trunc WI accs)) + ((m32rx (unit u-exec (cycles 2))) + (m32r2 (unit u-exec (cycles 2)))) +) + +(dni mvfacmi "mvfacmi" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mvfacmi $dr" + (+ OP1_5 OP2_15 (f-r2 2) dr) + (set dr (trunc WI (sra DI accum (const 16)))) + ((m32r/d (unit u-exec (cycles 2)))) +) + +(dni mvfacmi-a "mvfacmi-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mvfacmi $dr,$accs" + (+ OP1_5 dr OP2_15 accs (f-op3 2)) + (set dr (trunc WI (sra DI accs (const 16)))) + ((m32rx (unit u-exec (cycles 2))) + (m32r2 (unit u-exec (cycles 2)))) +) + +(dni mvfc "mvfc" + ((PIPE O) (IDOC MISC)) + "mvfc $dr,$scr" + (+ OP1_1 OP2_9 dr scr) + (set dr scr) + () +) + +(dni mvtachi "mvtachi" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mvtachi $src1" + (+ OP1_5 OP2_7 (f-r2 0) src1) + (set accum + (or DI + (and DI accum (const DI #xffffffff)) + (sll DI (ext DI src1) (const 32)))) + ((m32r/d (unit u-exec (in sr src1)))) +) + +(dni mvtachi-a "mvtachi-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mvtachi $src1,$accs" + (+ OP1_5 src1 OP2_7 accs (f-op3 0)) + (set accs + (or DI + (and DI accs (const DI #xffffffff)) + (sll DI (ext DI src1) (const 32)))) + ((m32rx (unit u-exec (in sr src1))) + (m32r2 (unit u-exec (in sr src1)))) +) + +(dni mvtaclo "mvtaclo" + ((MACH m32r) (PIPE S) (IDOC ACCUM)) + "mvtaclo $src1" + (+ OP1_5 OP2_7 (f-r2 1) src1) + (set accum + (or DI + (and DI accum (const DI #xffffffff00000000)) + (zext DI src1))) + ((m32r/d (unit u-exec (in sr src1)))) +) + +(dni mvtaclo-a "mvtaclo-a" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "mvtaclo $src1,$accs" + (+ OP1_5 src1 OP2_7 accs (f-op3 1)) + (set accs + (or DI + (and DI accs (const DI #xffffffff00000000)) + (zext DI src1))) + ((m32rx (unit u-exec (in sr src1))) + (m32r2 (unit u-exec (in sr src1)))) +) + +(dni mvtc "mvtc" + ((PIPE O) (IDOC MISC)) + "mvtc $sr,$dcr" + (+ OP1_1 OP2_10 dcr sr) + (set dcr sr) + () +) + +(dni neg "neg" + ((PIPE OS) (IDOC ALU)) + "neg $dr,$sr" + (+ OP1_0 OP2_3 dr sr) + (set dr (neg sr)) + () +) + +(dni nop "nop" + ((PIPE OS) (IDOC MISC)) + "nop" + (+ OP1_7 OP2_0 (f-r1 0) (f-r2 0)) + (c-code VOID "PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);\n") + ; FIXME: quick hack: parallel nops don't contribute to cycle count. + ; Other kinds of nops do however (which we currently ignore). + ((m32r/d (unit u-exec (cycles 0))) + (m32rx (unit u-exec (cycles 0))) + (m32r2 (unit u-exec (cycles 0)))) +) + +(dni not "not" + ((PIPE OS) (IDOC ALU)) + "not $dr,$sr" + (+ OP1_0 OP2_11 dr sr) + (set dr (inv sr)) + () +) + +(dni rac "rac" + ((MACH m32r) (PIPE S) (IDOC MAC)) + "rac" + (+ OP1_5 OP2_9 (f-r1 0) (f-r2 0)) + (sequence ((DI tmp1)) + (set tmp1 (sll DI accum (const 1))) + (set tmp1 (add DI tmp1 (const DI #x8000))) + (set accum + (cond DI + ((gt tmp1 (const DI #x00007fffffff0000)) + (const DI #x00007fffffff0000)) + ((lt tmp1 (const DI #xffff800000000000)) + (const DI #xffff800000000000)) + (else (and tmp1 (const DI #xffffffffffff0000))))) + ) + ((m32r/d (unit u-mac))) +) + +(dni rac-dsi "rac-dsi" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rac $accd,$accs,$imm1" + (+ OP1_5 accd (f-bits67 0) OP2_9 accs (f-bit14 0) imm1) + (sequence ((DI tmp1)) + (set tmp1 (sll accs imm1)) + (set tmp1 (add tmp1 (const DI #x8000))) + (set accd + (cond DI + ((gt tmp1 (const DI #x00007fffffff0000)) + (const DI #x00007fffffff0000)) + ((lt tmp1 (const DI #xffff800000000000)) + (const DI #xffff800000000000)) + (else (and tmp1 (const DI #xffffffffffff0000))))) + ) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dnmi rac-d "rac-d" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rac $accd" + (emit rac-dsi accd (f-accs 0) (f-imm1 0)) +) + +(dnmi rac-ds "rac-ds" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rac $accd,$accs" + (emit rac-dsi accd accs (f-imm1 0)) +) + + +(dni rach "rach" + ((MACH m32r) (PIPE S) (IDOC MAC)) + "rach" + (+ OP1_5 OP2_8 (f-r1 0) (f-r2 0)) + (sequence ((DI tmp1)) + ; Lop off top 8 bits. + ; The sign bit we want to use is bit 55 so the 64 bit value + ; isn't properly signed which we deal with in the if's below. + (set tmp1 (and accum (const DI #xffffffffffffff))) + (if (andif (ge tmp1 (const DI #x003fff80000000)) + (le tmp1 (const DI #x7fffffffffffff))) + (set tmp1 (const DI #x003fff80000000)) + ; else part + (if (andif (ge tmp1 (const DI #x80000000000000)) + (le tmp1 (const DI #xffc00000000000))) + (set tmp1 (const DI #xffc00000000000)) + (set tmp1 (and (add accum (const DI #x40000000)) + (const DI #xffffffff80000000))))) + (set tmp1 (sll tmp1 (const 1))) + ; Sign extend top 8 bits. + (set accum + ; FIXME: 7? + (sra DI (sll DI tmp1 (const 7)) (const 7))) + ) + ((m32r/d (unit u-mac))) +) + +(dni rach-dsi "rach-dsi" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rach $accd,$accs,$imm1" + (+ OP1_5 accd (f-bits67 0) OP2_8 accs (f-bit14 0) imm1) + (sequence ((DI tmp1)) + (set tmp1 (sll accs imm1)) + (set tmp1 (add tmp1 (const DI #x80000000))) + (set accd + (cond DI + ((gt tmp1 (const DI #x00007fff00000000)) + (const DI #x00007fff00000000)) + ((lt tmp1 (const DI #xffff800000000000)) + (const DI #xffff800000000000)) + (else (and tmp1 (const DI #xffffffff00000000))))) + ) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +(dnmi rach-d "rach-d" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rach $accd" + (emit rach-dsi accd (f-accs 0) (f-imm1 0)) +) + +(dnmi rach-ds "rach-ds" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "rach $accd,$accs" + (emit rach-dsi accd accs (f-imm1 0)) +) + +(dni rte "rte" + (UNCOND-CTI (PIPE O) (IDOC BR)) + "rte" + (+ OP1_1 OP2_13 (f-r1 0) (f-r2 6)) + (sequence () + ; pc = bpc & -4 + (set pc (and (reg h-cr 6) (const -4))) + ; bpc = bbpc + (set (reg h-cr 6) (reg h-cr 14)) + ; psw = bpsw + (set (reg h-psw) (reg h-bpsw)) + ; bpsw = bbpsw + (set (reg h-bpsw) (reg h-bbpsw)) + ) + () +) + +(dni seth "seth" + ((IDOC ALU)) + "seth $dr,$hash$hi16" + (+ OP1_13 OP2_12 dr (f-r2 0) hi16) + (set dr (sll WI hi16 (const 16))) + () +) + +(define-pmacro (shift-op sym op2-r-op op2-3-op op2-i-op sem-op) + (begin + (dni sym sym ((PIPE O_OS) (IDOC ALU)) + (.str sym " $dr,$sr") + (+ OP1_1 op2-r-op dr sr) + (set dr (sem-op dr (and sr (const 31)))) + () + ) + (dni (.sym sym "3") sym ((IDOC ALU)) + (.str sym "3 $dr,$sr,$simm16") + (+ OP1_9 op2-3-op dr sr simm16) + (set dr (sem-op sr (and WI simm16 (const 31)))) + () + ) + (dni (.sym sym "i") sym ((PIPE O_OS) (IDOC ALU)) + (.str sym "i $dr,$uimm5") + (+ OP1_5 (f-shift-op2 op2-i-op) dr uimm5) + (set dr (sem-op dr uimm5)) + () + ) + ) +) +(shift-op sll OP2_4 OP2_12 2 sll) +(shift-op sra OP2_2 OP2_10 1 sra) +(shift-op srl OP2_0 OP2_8 0 srl) + +(define-pmacro (store-op suffix op2-op mode) + (begin + (dni (.sym st suffix) (.str "st" suffix) + ((PIPE O) (IDOC MEM)) + (.str "st" suffix " $src1,@$src2") + (+ OP1_2 op2-op src1 src2) + (set mode (mem mode src2) src1) + ((m32r/d (unit u-store (cycles 1))) + (m32rx (unit u-store (cycles 1))) + (m32r2 (unit u-store (cycles 1)))) + ) + (dnmi (.sym st suffix "-2") (.str "st" suffix "-2") + (NO-DIS (PIPE O) (IDOC MEM)) + (.str "st" suffix " $src1,@($src2)") + (emit (.sym st suffix) src1 src2)) + (dni (.sym st suffix -d) (.str "st" suffix "-d") + ((IDOC MEM)) + (.str "st" suffix " $src1,@($slo16,$src2)") + (+ OP1_10 op2-op src1 src2 slo16) + (set mode (mem mode (add src2 slo16)) src1) + ((m32r/d (unit u-store (cycles 2))) + (m32rx (unit u-store (cycles 2))) + (m32r2 (unit u-store (cycles 2)))) + ) + (dnmi (.sym st suffix -d2) (.str "st" suffix "-d2") + (NO-DIS (IDOC MEM)) + (.str "st" suffix " $src1,@($src2,$slo16)") + (emit (.sym st suffix -d) src1 src2 slo16)) + ) +) +(store-op "" OP2_4 WI) +(store-op b OP2_0 QI) +(store-op h OP2_2 HI) + +(dni st-plus "st+" + ((PIPE O) (IDOC MEM)) + "st $src1,@+$src2" + (+ OP1_2 OP2_6 src1 src2) + ; This has to be coded carefully to avoid an "earlyclobber" of src2. + (sequence ((WI new-src2)) + (set new-src2 (add WI src2 (const WI 4))) + (set (mem WI new-src2) src1) + (set src2 new-src2)) + ((m32r/d (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32rx (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32r2 (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + ) +) + +(dni sth-plus "sth+" + ((MACH m32rx,m32r2) (PIPE O) SPECIAL) + "sth $src1,@$src2+" + (+ OP1_2 OP2_3 src1 src2) + ; This has to be coded carefully to avoid an "earlyclobber" of src2. + (sequence ((HI new-src2)) + (set (mem HI new-src2) src1) + (set new-src2 (add src2 (const 2))) + (set src2 new-src2)) + ((m32rx (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32r2 (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + ) +) + +(dni stb-plus "stb+" + ((MACH m32rx,m32r2) (PIPE O) SPECIAL) + "stb $src1,@$src2+" + (+ OP1_2 OP2_1 src1 src2) + ; This has to be coded carefully to avoid an "earlyclobber" of src2. + (sequence ((QI new-src2)) + (set (mem QI new-src2) src1) + (set new-src2 (add src2 (const 1))) + (set src2 new-src2)) + ((m32rx (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32r2 (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + ) +) + +(dni st-minus "st-" + ((PIPE O) (IDOC MEM)) + "st $src1,@-$src2" + (+ OP1_2 OP2_7 src1 src2) + ; This is the original way. It doesn't work for parallel execution + ; because of the earlyclobber of src2. + ;(sequence () + ; (set src2 (sub src2 (const 4))) + ; (set (mem WI src2) src1)) + (sequence ((WI new-src2)) + (set new-src2 (sub src2 (const 4))) + (set (mem WI new-src2) src1) + (set src2 new-src2)) + ((m32r/d (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32rx (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + (m32r2 (unit u-store) + (unit u-exec (in dr src2) (out dr src2) (cycles 0))) + ) +) + +(dnmi push "push" ((PIPE O) (IDOC MEM)) + "push $src1" + (emit st-minus src1 (src2 15)) ; "st %0,@-sp" +) + +(dni sub "sub" + ((PIPE OS) (IDOC ALU)) + "sub $dr,$sr" + (+ OP1_0 OP2_2 dr sr) + (set dr (sub dr sr)) + () +) + +(dni subv "sub:rv" + ((PIPE OS) (IDOC ALU)) + "subv $dr,$sr" + (+ OP1_0 OP2_0 dr sr) + (parallel () + (set dr (sub dr sr)) + (set condbit (sub-oflag dr sr (const 0)))) + () +) + +(dni subx "sub:rx" + ((PIPE OS) (IDOC ALU)) + "subx $dr,$sr" + (+ OP1_0 OP2_1 dr sr) + (parallel () + (set dr (subc dr sr condbit)) + (set condbit (sub-cflag dr sr condbit))) + () +) + +(dni trap "trap" + (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC MISC)) + "trap $uimm4" + (+ OP1_1 OP2_15 (f-r1 0) uimm4) + (sequence () + ; bbpc = bpc + (set (reg h-cr 14) (reg h-cr 6)) + ; Set bpc to the return address. Actually it's not quite the + ; return address as RTE rounds the address down to a word + ; boundary. + (set (reg h-cr 6) (add pc (const 4))) + ; bbpsw = bpsw + (set (reg h-bbpsw) (reg h-bpsw)) + ; bpsw = psw + (set (reg h-bpsw) (reg h-psw)) + ; sm is unchanged, ie,c are set to zero. + (set (reg h-psw) (and (reg h-psw) (const #x80))) + ; m32r_trap handles operating vs user mode + (set WI pc (c-call WI "m32r_trap" pc uimm4)) + ) + () +) + +(dni unlock "unlock" + ((PIPE O) (IDOC MISC)) + "unlock $src1,@$src2" + (+ OP1_2 OP2_5 src1 src2) + (sequence () + (if (reg h-lock) + (set (mem WI src2) src1)) + (set (reg h-lock) (const BI 0))) + ((m32r/d (unit u-load)) + (m32rx (unit u-load)) + (m32r2 (unit u-load))) +) + +; Saturate into byte. +(dni satb "satb" + ((MACH m32rx,m32r2) (IDOC ALU)) + "satb $dr,$sr" + (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0300)) + (set dr + ; FIXME: min/max would simplify this nicely of course. + (cond WI + ((ge sr (const 127)) (const 127)) + ((le sr (const -128)) (const -128)) + (else sr))) + () +) + +; Saturate into half word. +(dni sath "sath" + ((MACH m32rx,m32r2) (IDOC ALU)) + "sath $dr,$sr" + (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0200)) + (set dr + (cond WI + ((ge sr (const 32767)) (const 32767)) + ((le sr (const -32768)) (const -32768)) + (else sr))) + () +) + +; Saturate word. +(dni sat "sat" + ((MACH m32rx,m32r2) SPECIAL (IDOC ALU)) + "sat $dr,$sr" + (+ OP1_8 dr OP2_6 sr (f-uimm16 0)) + (set dr + (if WI condbit + (if WI (lt sr (const 0)) + (const #x7fffffff) + (const #x80000000)) + sr)) + () +) + +; Parallel compare byte zeros. +; Set C bit in condition register if any byte in source register is zero. +(dni pcmpbz "pcmpbz" + ((MACH m32rx,m32r2) (PIPE OS) SPECIAL (IDOC ALU)) + "pcmpbz $src2" + (+ OP1_0 (f-r1 3) OP2_7 src2) + (set condbit + (cond BI + ((eq (and src2 (const #xff)) (const 0)) (const BI 1)) + ((eq (and src2 (const #xff00)) (const 0)) (const BI 1)) + ((eq (and src2 (const #xff0000)) (const 0)) (const BI 1)) + ((eq (and src2 (const #xff000000)) (const 0)) (const BI 1)) + (else (const BI 0)))) + ((m32rx (unit u-cmp)) + (m32r2 (unit u-cmp))) +) + +; Add accumulators +(dni sadd "sadd" + ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM)) + "sadd" + (+ OP1_5 (f-r1 0) OP2_14 (f-r2 4)) + (set (reg h-accums 0) + (add (sra (reg h-accums 1) (const 16)) + (reg h-accums 0))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +; Multiply and add into accumulator 1 +(dni macwu1 "macwu1" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "macwu1 $src1,$src2" + (+ OP1_5 src1 OP2_11 src2) + (set (reg h-accums 1) + (sra DI + (sll DI + (add DI + (reg h-accums 1) + (mul DI + (ext DI src1) + (ext DI (and src2 (const #xffff))))) + (const 8)) + (const 8))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +; Multiply and subtract from accumulator 0 +(dni msblo "msblo" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "msblo $src1,$src2" + (+ OP1_5 src1 OP2_13 src2) + (set accum + (sra DI + (sll DI + (sub accum + (sra DI + (sll DI + (mul DI + (ext DI (trunc HI src1)) + (ext DI (trunc HI src2))) + (const 32)) + (const 16))) + (const 8)) + (const 8))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +; Multiply into accumulator 1 +(dni mulwu1 "mulwu1" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "mulwu1 $src1,$src2" + (+ OP1_5 src1 OP2_10 src2) + (set (reg h-accums 1) + (sra DI + (sll DI + (mul DI + (ext DI src1) + (ext DI (and src2 (const #xffff)))) + (const 16)) + (const 16))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +; Multiply and add into accumulator 1 +(dni maclh1 "maclh1" + ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC)) + "maclh1 $src1,$src2" + (+ OP1_5 src1 OP2_12 src2) + (set (reg h-accums 1) + (sra DI + (sll DI + (add DI + (reg h-accums 1) + (sll DI + (ext DI + (mul SI + (ext SI (trunc HI src1)) + (sra SI src2 (const SI 16)))) + (const 16))) + (const 8)) + (const 8))) + ((m32rx (unit u-mac)) + (m32r2 (unit u-mac))) +) + +; skip instruction if C +(dni sc "sc" + ((MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR)) + "sc" + (+ OP1_7 (f-r1 4) OP2_0 (f-r2 1)) + (skip (zext INT condbit)) + () +) + +; skip instruction if not C +(dni snc "snc" + ((MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR)) + "snc" + (+ OP1_7 (f-r1 5) OP2_0 (f-r2 1)) + (skip (zext INT (not condbit))) + () +) + +; PSW &= ~((unsigned char) uimm8 | 0x000ff00) +(dni clrpsw "clrpsw" + ((PIPE O) SPECIAL_M32R) + "clrpsw $uimm8" + (+ OP1_7 (f-r1 2) uimm8) + (set USI (reg h-cr 0) + (and USI (reg h-cr 0) + (or USI (inv BI uimm8) (const #xff00)))) + () +) + +; PSW |= (unsigned char) uimm8 +(dni setpsw "setpsw" + ((PIPE O) SPECIAL_M32R) + "setpsw $uimm8" + (+ OP1_7 (f-r1 1) uimm8) + (set USI (reg h-cr 0) uimm8) + () +) + +; bset +(dni bset "bset" + (SPECIAL_M32R) + "bset $uimm3,@($slo16,$sr)" + (+ OP1_10 (f-bit4 0) uimm3 OP2_6 sr slo16) + (set QI (mem QI (add sr slo16)) + (or QI (mem QI (add sr slo16)) + (sll USI (const 1) (sub (const 7) uimm3)))) + () +) + +; bclr +(dni bclr "bclr" + (SPECIAL_M32R) + "bclr $uimm3,@($slo16,$sr)" + (+ OP1_10 (f-bit4 0) uimm3 OP2_7 sr slo16) + (set QI (mem QI (add sr slo16)) + (and QI (mem QI (add sr slo16)) + (inv QI (sll USI (const 1) (sub (const 7) uimm3))))) + () +) + +; btst +(dni btst "btst" + (SPECIAL_M32R (PIPE O)) + "btst $uimm3,$sr" + (+ OP1_0 (f-bit4 0) uimm3 OP2_15 sr) + (set condbit (and QI (srl USI sr (sub (const 7) uimm3)) (const 1))) + () +) + diff -uprN binutils-2.14.90.0.8/cpu/m32r.opc binutils-2.15.90.0.1/cpu/m32r.opc --- binutils-2.14.90.0.8/cpu/m32r.opc 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/m32r.opc 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,342 @@ +/* M32R opcode support. -*- C -*- + + Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + + Contributed by Red Hat Inc; developed under contract from + Mitsubishi Electric Corporation. + + This file is part of the GNU Binutils. + + Contributed by Red Hat Inc; developed under contract from Fujitsu. + + This file is part of the GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ + +/* This file is an addendum to m32r.cpu. Heavy use of C code isn't + appropriate in .cpu files, so it resides here. This especially applies + to assembly/disassembly where parsing/printing can be quite involved. + Such things aren't really part of the specification of the cpu, per se, + so .cpu files provide the general framework and .opc files handle the + nitty-gritty details as necessary. + + Each section is delimited with start and end markers. + + -opc.h additions use: "-- opc.h" + -opc.c additions use: "-- opc.c" + -asm.c additions use: "-- asm.c" + -dis.c additions use: "-- dis.c" + -ibd.h additions use: "-- ibd.h" +*/ + +/* -- opc.h */ + +#undef CGEN_DIS_HASH_SIZE +#define CGEN_DIS_HASH_SIZE 256 +#undef CGEN_DIS_HASH +#if 0 +#define X(b) (((unsigned char *) (b))[0] & 0xf0) +#define CGEN_DIS_HASH(buffer, value) \ +(X (buffer) | \ + (X (buffer) == 0x40 || X (buffer) == 0xe0 || X (buffer) == 0x60 || X (buffer) == 0x50 ? 0 \ + : X (buffer) == 0x70 || X (buffer) == 0xf0 ? (((unsigned char *) (buffer))[0] & 0xf) \ + : X (buffer) == 0x30 ? ((((unsigned char *) (buffer))[1] & 0x70) >> 4) \ + : ((((unsigned char *) (buffer))[1] & 0xf0) >> 4))) +#else +#define CGEN_DIS_HASH(buffer, value) m32r_cgen_dis_hash(buffer, value) +extern unsigned int m32r_cgen_dis_hash(const char *, CGEN_INSN_INT); +#endif + +/* -- */ + +/* -- opc.c */ +unsigned int +m32r_cgen_dis_hash (buf, value) + const char * buf ATTRIBUTE_UNUSED; + CGEN_INSN_INT value; +{ + unsigned int x; + + if (value & 0xffff0000) /* 32bit instructions */ + value = (value >> 16) & 0xffff; + + x = (value>>8) & 0xf0; + if (x == 0x40 || x == 0xe0 || x == 0x60 || x == 0x50) + return x; + + if (x == 0x70 || x == 0xf0) + return x | ((value>>8) & 0x0f); + + if (x == 0x30) + return x | ((value & 0x70) >> 4); + else + return x | ((value & 0xf0) >> 4); +} + +/* -- */ + +/* -- asm.c */ +static const char * parse_hash + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_hi16 + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_slo16 + PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); +static const char * parse_ulo16 + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + +/* Handle '#' prefixes (i.e. skip over them). */ + +static const char * +parse_hash (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; + const char **strp; + int opindex ATTRIBUTE_UNUSED; + unsigned long *valuep ATTRIBUTE_UNUSED; +{ + if (**strp == '#') + ++*strp; + return NULL; +} + +/* Handle shigh(), high(). */ + +static const char * +parse_hi16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; + const char **strp; + int opindex; + unsigned long *valuep; +{ + const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; + + if (**strp == '#') + ++*strp; + + if (strncasecmp (*strp, "high(", 5) == 0) + { + *strp += 5; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO, + &result_type, &value); + if (**strp != ')') + return "missing `)'"; + ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value >>= 16; + *valuep = value; + return errmsg; + } + else if (strncasecmp (*strp, "shigh(", 6) == 0) + { + *strp += 6; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO, + &result_type, &value); + if (**strp != ')') + return "missing `)'"; + ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value = (value >> 16) + (value & 0x8000 ? 1 : 0); + *valuep = value; + return errmsg; + } + + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); +} + +/* Handle low() in a signed context. Also handle sda(). + The signedness of the value doesn't matter to low(), but this also + handles the case where low() isn't present. */ + +static const char * +parse_slo16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; + const char **strp; + int opindex; + long *valuep; +{ + const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; + + if (**strp == '#') + ++*strp; + + if (strncasecmp (*strp, "low(", 4) == 0) + { + *strp += 4; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + &result_type, &value); + if (**strp != ')') + return "missing `)'"; + ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + value &= 0xffff; + if (value & 0x8000) + value |= 0xffff0000; + } + *valuep = value; + return errmsg; + } + + if (strncasecmp (*strp, "sda(", 4) == 0) + { + *strp += 4; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16, + NULL, &value); + if (**strp != ')') + return "missing `)'"; + ++*strp; + *valuep = value; + return errmsg; + } + + return cgen_parse_signed_integer (cd, strp, opindex, valuep); +} + +/* Handle low() in an unsigned context. + The signedness of the value doesn't matter to low(), but this also + handles the case where low() isn't present. */ + +static const char * +parse_ulo16 (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; + const char **strp; + int opindex; + unsigned long *valuep; +{ + const char *errmsg; + enum cgen_parse_operand_result result_type; + bfd_vma value; + + if (**strp == '#') + ++*strp; + + if (strncasecmp (*strp, "low(", 4) == 0) + { + *strp += 4; + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + &result_type, &value); + if (**strp != ')') + return "missing `)'"; + ++*strp; + if (errmsg == NULL + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + value &= 0xffff; + *valuep = value; + return errmsg; + } + + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); +} + +/* -- */ + +/* -- dis.c */ +static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); + +/* Immediate values are prefixed with '#'. */ + +#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ + do \ + { \ + if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ + (*info->fprintf_func) (info->stream, "#"); \ + } \ + while (0) + +/* Handle '#' prefixes as operands. */ + +static void +print_hash (cd, dis_info, value, attrs, pc, length) + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; + PTR dis_info; + long value ATTRIBUTE_UNUSED; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; +{ + disassemble_info *info = (disassemble_info *) dis_info; + (*info->fprintf_func) (info->stream, "#"); +} + +#undef CGEN_PRINT_INSN +#define CGEN_PRINT_INSN my_print_insn + +static int +my_print_insn (cd, pc, info) + CGEN_CPU_DESC cd; + bfd_vma pc; + disassemble_info *info; +{ + char buffer[CGEN_MAX_INSN_SIZE]; + char *buf = buffer; + int status; + int buflen = (pc & 3) == 0 ? 4 : 2; + int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; + char *x; + + /* Read the base part of the insn. */ + + status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0), + buf, buflen, info); + if (status != 0) + { + (*info->memory_error_func) (status, pc, info); + return -1; + } + + /* 32 bit insn? */ + x = (big_p ? &buf[0] : &buf[3]); + if ((pc & 3) == 0 && (*x & 0x80) != 0) + return print_insn (cd, pc, info, buf, buflen); + + /* Print the first insn. */ + if ((pc & 3) == 0) + { + buf += (big_p ? 0 : 2); + if (print_insn (cd, pc, info, buf, 2) == 0) + (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + buf += (big_p ? 2 : -2); + } + + x = (big_p ? &buf[0] : &buf[1]); + if (*x & 0x80) + { + /* Parallel. */ + (*info->fprintf_func) (info->stream, " || "); + *x &= 0x7f; + } + else + (*info->fprintf_func) (info->stream, " -> "); + + /* The "& 3" is to pass a consistent address. + Parallel insns arguably both begin on the word boundary. + Also, branch insns are calculated relative to the word boundary. */ + if (print_insn (cd, pc & ~ (bfd_vma) 3, info, buf, 2) == 0) + (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + + return (pc & 3) ? 2 : 4; +} + +/* -- */ diff -uprN binutils-2.14.90.0.8/cpu/sh.cpu binutils-2.15.90.0.1/cpu/sh.cpu --- binutils-2.14.90.0.8/cpu/sh.cpu 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/sh.cpu 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,368 @@ +; Hitachi SH architecture description. -*- Scheme -*- +; +; Copyright 2000, 2001 Free Software Foundation, Inc. +; +; Contributed by Red Hat Inc; developed under contract from Hitachi +; Semiconductor (America) Inc. +; +; This file is part of the GNU Binutils. +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2 of the License, or +; (at your option) any later version. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +(include "simplify.inc") + +(define-arch + (name sh) + (comment "Hitachi SuperH (SH)") + (insn-lsb0? #t) + (machs sh2 sh3 sh3e sh4 sh5) + (isas compact media) +) + + +; Instruction sets. + +(define-isa + (name media) + (comment "SHmedia 32-bit instruction set") + (base-insn-bitsize 32) +) + +(define-isa + (name compact) + (comment "SHcompact 16-bit instruction set") + (base-insn-bitsize 16) +) + + +; CPU family. + +(define-cpu + (name sh64) + (comment "SH 64-bit family") + (endian either) + (word-bitsize 32) +) + + +(define-mach + (name sh2) + (comment "SH-2 CPU core") + (cpu sh64) + (isas compact) +) + +(define-mach + (name sh3) + (comment "SH-3 CPU core") + (cpu sh64) + (isas compact) +) + +(define-mach + (name sh3e) + (comment "SH-3e CPU core") + (cpu sh64) + (isas compact) +) + +(define-mach + (name sh4) + (comment "SH-4 CPU core") + (cpu sh64) + (isas compact) +) + +(define-mach + (name sh5) + (comment "SH-5 CPU core") + (cpu sh64) + (isas compact media) +) + +(define-model + (name sh5) + (comment "SH-5 reference implementation") + (mach sh5) + (unit u-exec "Execution unit" () + 1 1 ; issue done + () () () ()) +) + +; Hardware elements. + +(define-hardware + (name h-pc) + (comment "Program counter") + (attrs PC (ISA compact,media)) + (type pc UDI) + (get () (raw-reg h-pc)) + (set (newval) (sequence () + (set (raw-reg h-ism) (and newval 1)) + (set (raw-reg h-pc) (and newval (inv UDI 1))))) +) + +(define-pmacro (-build-greg-name n) ((.sym r n) n)) + +(define-hardware + (name h-gr) + (comment "General purpose integer registers") + (attrs (ISA media,compact)) + (type register DI (64)) + (indices keyword "" (.map -build-greg-name (.iota 64))) + (get (index) + (if DI (eq index 63) + (const 0) + (raw-reg h-gr index))) + (set (index newval) + (if (ne index 63) + (set (raw-reg h-gr index) newval) + (nop))) +) + +(define-hardware + (name h-grc) + (comment "General purpose integer registers (SHcompact view)") + (attrs VIRTUAL (ISA compact)) + (type register SI (16)) + (indices keyword "" (.map -build-greg-name (.iota 16))) + (get (index) + (and (raw-reg h-gr index) (zext DI #xFFFFFFFF))) + (set (index newval) + (set (raw-reg h-gr index) (ext DI newval))) +) + +(define-pmacro (-build-creg-name n) ((.sym cr n) n)) + +(define-hardware + (name h-cr) + (comment "Control registers") + (attrs (ISA media)) + (type register DI (64)) + (indices keyword "" (.map -build-creg-name (.iota 64))) + (get (index) + (if DI (eq index 0) + (zext DI (reg h-sr)) + (raw-reg h-cr index))) + (set (index newval) + (if (eq index 0) + (set (reg h-sr) newval) + (set (raw-reg h-cr index) newval))) +) + +(define-hardware + (name h-sr) + (comment "Status register") + (attrs (ISA compact,media)) + (type register SI) +) + +(define-hardware + (name h-fpscr) + (comment "Floating point status and control register") + (attrs (ISA compact,media)) + (type register SI) +) + +(define-hardware + (name h-frbit) + (comment "Floating point register file bit") + (attrs (ISA media,compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 14) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 14))) (sll SI newvalue 14)))) +) + +(define-hardware + (name h-szbit) + (comment "Floating point transfer size bit") + (attrs (ISA media,compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 13) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 13))) (sll SI newvalue 13)))) +) + +(define-hardware + (name h-prbit) + (comment "Floating point precision bit") + (attrs (ISA media,compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 12) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 12))) (sll SI newvalue 12)))) +) + +(define-hardware + (name h-sbit) + (comment "Multiply-accumulate saturation flag") + (attrs (ISA compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 1) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv 2)) (sll SI newvalue 1)))) +) + +(define-hardware + (name h-mbit) + (comment "Divide-step M flag") + (attrs (ISA compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 9) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 9))) (sll SI newvalue 9)))) +) + +(define-hardware + (name h-qbit) + (comment "Divide-step Q flag") + (attrs (ISA compact) VIRTUAL) + (type register BI) + (get () (and (srl (reg h-sr) 8) 1)) + (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 8))) (sll SI newvalue 8)))) +) + +(define-pmacro (-build-freg-name n) ((.sym fr n) n)) + +(define-hardware + (name h-fr) + (comment "Single precision floating point registers") + (attrs (ISA media,compact)) + (type register SF (64)) + (indices keyword "" (.map -build-freg-name (.iota 64))) +) + + +(define-pmacro (-build-fpair-name n) ((.sym fp n) n)) + +(define-hardware + (name h-fp) + (comment "Single precision floating point register pairs") + (attrs (ISA media,compact)) + (type register DF (32)) + (indices keyword "" (.map -build-fpair-name (.iota 32))) +) + +(define-pmacro (-build-fvec-name n) ((.sym fv n) n)) + +(define-hardware + (name h-fv) + (comment "Single precision floating point vectors") + (attrs VIRTUAL (ISA media,compact)) + (type register SF (16)) + (indices keyword "" (.map -build-fvec-name (.iota 16))) + ; Mask with $F to ensure 0 <= index < 15. + (get (index) (reg h-fr (mul (and UQI index 15) 4))) + (set (index newval) (set (reg h-fr (mul (and UQI index 15) 4)) newval)) +) + +(define-hardware + (name h-fmtx) + (comment "Single precision floating point matrices") + (attrs VIRTUAL (ISA media)) + (type register SF (4)) + (indices keyword "" ((mtrx0 0) (mtrx1 1) (mtrx2 2) (mtrx3 3))) + ; Mask with $3 to ensure 0 <= index < 4. + (get (index) (reg h-fr (mul (and UQI index 3) 16))) + (set (index newval) (set (reg h-fr (mul (and UQI index 3) 16)) newval)) +) + +(define-pmacro (-build-dreg-name n) ((.sym dr n) n)) + +(define-hardware + (name h-dr) + (comment "Double precision floating point registers") + (attrs (ISA media,compact) VIRTUAL) + (type register DF (32)) + (indices keyword "" (.map -build-dreg-name (.iota 64))) + (get (index) + (subword DF + (or + (sll DI (zext DI (subword SI (reg h-fr index) 0)) 32) + (zext DI (subword SI (reg h-fr (add index 1)) 0))) 0)) + (set (index newval) + (sequence () + (set (reg h-fr index) + (subword SF (subword SI newval 0) 0)) + (set (reg h-fr (add index 1)) + (subword SF (subword SI newval 1) 0)))) +) + +(define-hardware + (name h-tr) + (comment "Branch target registers") + (attrs (ISA media)) + (type register DI (8)) + (indices keyword "" ((tr0 0) (tr1 1) (tr2 2) (tr3 3) (tr4 4) (tr5 5) (tr6 6) (tr7 7))) +) + +(define-hardware + (name h-endian) + (comment "Current endian mode") + (attrs (ISA compact,media) VIRTUAL) + (type register BI) + (get () (c-call BI "sh64_endian")) + (set (newval) (error "cannot alter target byte order mid-program")) +) + +(define-hardware + (name h-ism) + (comment "Current instruction set mode") + (attrs (ISA compact,media)) + (type register BI) + (get () (raw-reg h-ism)) + (set (newval) (error "cannot set ism directly")) +) + + +; Operands. + +(dnop endian "Endian mode" ((ISA compact,media)) h-endian f-nil) +(dnop ism "Instruction set mode" ((ISA compact,media)) h-ism f-nil) + +; Universally useful macros. + +; A pmacro for use in semantic bodies of unimplemented insns. +(define-pmacro (unimp mnemonic) (nop)) + +; Join 2 ints together in natural bit order. +(define-pmacro (-join-si s1 s0) + (or (sll (zext DI s1) 32) + (zext DI s0))) + +; Join 4 half-ints together in natural bit order. +(define-pmacro (-join-hi h3 h2 h1 h0) + (or (sll (zext DI h3) 48) + (or (sll (zext DI h2) 32) + (or (sll (zext DI h1) 16) + (zext DI h0))))) + +; Join 8 quarter-ints together in natural bit order. +(define-pmacro (-join-qi b7 b6 b5 b4 b3 b2 b1 b0) + (or (sll (zext DI b7) 56) + (or (sll (zext DI b6) 48) + (or (sll (zext DI b5) 40) + (or (sll (zext DI b4) 32) + (or (sll (zext DI b3) 24) + (or (sll (zext DI b2) 16) + (or (sll (zext DI b1) 8) + (zext DI b0))))))))) + + +; Include the two instruction set descriptions from their respective +; source files. + +(if (keep-isa? (compact)) + (include "sh64-compact.cpu")) + +(if (keep-isa? (media)) + (include "sh64-media.cpu")) diff -uprN binutils-2.14.90.0.8/cpu/sh.opc binutils-2.15.90.0.1/cpu/sh.opc --- binutils-2.14.90.0.8/cpu/sh.opc 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/sh.opc 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,78 @@ +/* SHmedia opcode support. -*- C -*- + + Copyright 2000 Free Software Foundation, Inc. + + Contributed by Red Hat Inc; developed under contract from Hitachi + Semiconductor (America) Inc. + + This file is part of the GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ +/* This file is an addendum to sh-media.cpu. Heavy use of C code isn't + appropriate in .cpu files, so it resides here. This especially applies + to assembly/disassembly where parsing/printing can be quite involved. + Such things aren't really part of the specification of the cpu, per se, + so .cpu files provide the general framework and .opc files handle the + nitty-gritty details as necessary. + + Each section is delimited with start and end markers. + + -opc.h additions use: "-- opc.h" + -opc.c additions use: "-- opc.c" + -asm.c additions use: "-- asm.c" + -dis.c additions use: "-- dis.c" + -ibd.h additions use: "-- ibd.h" +*/ + +/* -- opc.h */ + +/* Allows reason codes to be output when assembler errors occur. */ +#define CGEN_VERBOSE_ASSEMBLER_ERRORS + +/* Override disassembly hashing - there are variable bits in the top + byte of these instructions. */ +#define CGEN_DIS_HASH_SIZE 8 +#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 6) % CGEN_DIS_HASH_SIZE) + +/* -- asm.c */ + +static const char * +parse_fsd (cd, strp, opindex, valuep) + CGEN_CPU_DESC cd; + const char **strp; + int opindex; + long *valuep; +{ + abort(); +} + +/* -- dis.c */ + +static void +print_likely (cd, dis_info, value, attrs, pc, length) + CGEN_CPU_DESC cd; + PTR dis_info; + long value; + unsigned int attrs; + bfd_vma pc; + int length; +{ + disassemble_info *info = (disassemble_info *) dis_info; + (*info->fprintf_func) (info->stream, (value) ? "/l" : "/u"); +} + +/* -- */ diff -uprN binutils-2.14.90.0.8/cpu/sh64-compact.cpu binutils-2.15.90.0.1/cpu/sh64-compact.cpu --- binutils-2.14.90.0.8/cpu/sh64-compact.cpu 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/sh64-compact.cpu 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,1747 @@ +; Hitachi SHcompact instruction set description. -*- Scheme -*- +; +; Copyright 2000 Free Software Foundation, Inc. +; +; Contributed by Red Hat Inc; developed under contract from Hitachi +; Semiconductor (America) Inc. +; +; This file is part of the GNU Binutils. +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2 of the License, or +; (at your option) any later version. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +; dshcf -- define-normal-sh-compact-field + +(define-pmacro (dshcf xname xcomment ignored xstart xlength) + (dnf xname xcomment ((ISA compact)) xstart xlength)) + +; dshcop -- define-normal-sh-compact-operand + +(define-pmacro (dshcop xname xcomment ignored xhardware xfield) + (dnop xname xcomment ((ISA compact)) xhardware xfield)) + + +; SHcompact-specific attributes. + +(define-attr + (for insn) + (type boolean) + (name ILLSLOT) + (comment "instruction may not appear in a delay slot") +) + +(define-attr + (for insn) + (type boolean) + (name FP-INSN) + (comment "floating point instruction") +) + +(define-keyword + (name frc-names) + (attrs (ISA compact)) + (print-name h-frc) + (values (fr0 0) (fr1 1) (fr2 2) (fr3 3) (fr4 4) (fr5 5) + (fr6 6) (fr7 7) (fr8 8) (fr9 9) (fr10 10) (fr11 11) + (fr12 12) (fr13 13) (fr14 14) (fr15 15)) +) + +(define-keyword + (name drc-names) + (attrs (ISA compact)) + (print-name h-drc) + (values (dr0 0) (dr2 2) (dr4 4) (dr6 6) (dr8 8) (dr10 10) (dr12 12) (dr14 14)) +) + +(define-keyword + (name xf-names) + (attrs (ISA compact)) + (print-name h-xf) + (values (xf0 0) (xf1 1) (xf2 2) (xf3 3) (xf4 4) (xf5 5) + (xf6 6) (xf7 7) (xf8 8) (xf9 9) (xf10 10) (xf11 11) + (xf12 12) (xf13 13) (xf14 14) (xf15 15)) +) + +; Hardware specific to the SHcompact mode. + +(define-pmacro (front) (mul 16 frbit)) +(define-pmacro (back) (mul 16 (not frbit))) + +(define-hardware + (name h-frc) + (comment "Single precision floating point registers") + (attrs VIRTUAL (ISA compact)) + (indices extern-keyword frc-names) + (type register SF (16)) + (get (index) (reg h-fr (add (front) index))) + (set (index newval) (set (reg h-fr (add (front) index)) newval)) +) + +(define-hardware + (name h-drc) + (comment "Double precision floating point registers") + (attrs VIRTUAL (ISA compact)) + (indices extern-keyword drc-names) + (type register DF (8)) + (get (index) (reg h-dr (add (front) index))) + (set (index newval) (set (reg h-dr (add (front) index)) newval)) +) + +(define-hardware + (name h-xf) + (comment "Extended single precision floating point registers") + (attrs VIRTUAL (ISA compact)) + (indices extern-keyword xf-names) + (type register SF (16)) + (get (index) (reg h-fr (add (back) index))) + (set (index newval) (set (reg h-fr (add (back) index)) newval)) +) + +(define-hardware + (name h-xd) + (comment "Extended double precision floating point registers") + (attrs VIRTUAL (ISA compact)) + (indices extern-keyword frc-names) + (type register DF (8)) + (get (index) (reg h-dr (add (back) index))) + (set (index newval) (set (reg h-dr (add (back) index)) newval)) +) + +(define-hardware + (name h-fvc) + (comment "Single precision floating point vectors") + (attrs VIRTUAL (ISA compact)) + (indices keyword "" ((fv0 0) (fv4 4) (fv8 8) (fv12 12))) + (type register SF (4)) + (get (index) (reg h-fr (add (front) index))) + (set (index newval) (set (reg h-fr (add (front) index)) newval)) +) + +(define-hardware + (name h-fpccr) + (comment "SHcompact floating point status/control register") + (attrs VIRTUAL (ISA compact)) + (type register SI) + (get () (or (or (or (raw-reg h-fpscr) (sll SI prbit 19)) (sll SI szbit 20)) (sll SI frbit 21))) + (set (newvalue) (sequence () + (set (reg h-fpscr) newvalue) + (set prbit (and (srl newvalue 19) 1)) + (set szbit (and (srl newvalue 20) 1)) + (set frbit (and (srl newvalue 21) 1)))) +) + +(define-hardware + (name h-gbr) + (comment "Global base register") + (attrs VIRTUAL (ISA compact)) + (type register SI) + (get () (subword SI (raw-reg h-gr 16) 1)) + (set (newval) (set (raw-reg h-gr 16) (ext DI newval))) +) + +(define-hardware + (name h-pr) + (comment "Procedure link register") + (attrs VIRTUAL (ISA compact)) + (type register SI) + (get () (subword SI (raw-reg h-gr 18) 1)) + (set (newval) (set (raw-reg h-gr 18) (ext DI newval))) +) + +(define-hardware + (name h-macl) + (comment "Multiple-accumulate low register") + (attrs VIRTUAL (ISA compact)) + (type register SI) + (get () (subword SI (raw-reg h-gr 17) 1)) + (set (newval) (set (raw-reg h-gr 17) (-join-si (subword SI (raw-reg h-gr 17) 0) newval))) +) + +(define-hardware + (name h-mach) + (comment "Multiply-accumulate high register") + (attrs VIRTUAL (ISA compact)) + (type register SI) + (get () (subword SI (raw-reg h-gr 17) 0)) + (set (newval) (set (raw-reg h-gr 17) (-join-si newval (subword SI (raw-reg h-gr 17) 1)))) +) + +(define-hardware + (name h-tbit) + (comment "Condition code flag") + (attrs VIRTUAL (ISA compact)) + (type register BI) + (get () (and BI (raw-reg h-gr 19) 1)) + (set (newval) (set (raw-reg h-gr 19) (or (and (raw-reg h-gr 19) (inv DI 1)) (zext DI newval)))) +) + + +(dshcf f-op4 "Opcode (4 bits)" () 15 4) +(dshcf f-op8 "Opcode (8 bits)" () 15 8) +(dshcf f-op16 "Opcode (16 bits)" () 15 16) + +(dshcf f-sub4 "Sub opcode (4 bits)" () 3 4) +(dshcf f-sub8 "Sub opcode (8 bits)" () 7 8) +(dshcf f-sub10 "Sub opcode (10 bits)" () 9 10) + +(dshcf f-rn "Register selector n" () 11 4) +(dshcf f-rm "Register selector m" () 7 4) + +(dshcf f-8-1 "One bit at bit 8" () 8 1) + +(df f-disp8 "Displacement (8 bits)" ((ISA compact) PCREL-ADDR) 7 8 INT + ((value pc) (sra SI value 1)) + ((value pc) (add SI (sll SI value 1) (add pc 4)))) + +(df f-disp12 "Displacement (12 bits)" ((ISA compact) PCREL-ADDR) 11 12 INT + ((value pc) (sra SI value 1)) + ((value pc) (add SI (sll SI value 1) (add pc 4)))) + +(dshcf f-imm8 "Immediate (8 bits)" () 7 8) +(dshcf f-imm4 "Immediate (4 bits)" () 3 4) + +(df f-imm4x2 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT + ((value pc) (srl SI value 1)) + ((value pc) (sll SI value 1))) + +(df f-imm4x4 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT + ((value pc) (srl SI value 2)) + ((value pc) (sll SI value 2))) + +(df f-imm8x2 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT + ((value pc) (sra SI value 1)) + ((value pc) (sll SI value 1))) + +(df f-imm8x4 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT + ((value pc) (sra SI value 2)) + ((value pc) (sll SI value 2))) + +(df f-dn "Double selector n" ((ISA compact)) 11 3 UINT + ((value pc) (srl SI value 1)) + ((value pc) (sll SI value 1))) + +(df f-dm "Double selector m" ((ISA compact)) 7 3 UINT + ((value pc) (srl SI value 1)) + ((value pc) (sll SI value 1))) + +(df f-vn "Vector selector n" ((ISA compact)) 11 2 UINT + ((value pc) (srl SI value 2)) + ((value pc) (sll SI value 2))) + +(df f-vm "Vector selector m" ((ISA compact)) 9 2 UINT + ((value pc) (srl SI value 2)) + ((value pc) (sll SI value 2))) + +(df f-xn "Extended selector n" ((ISA compact)) 11 3 UINT + ((value pc) (srl SI value 1)) + ((value pc) (add SI (sll SI value 1) 1))) + +(df f-xm "Extended selector m" ((ISA compact)) 7 3 UINT + ((value pc) (srl SI value 1)) + ((value pc) (add SI (sll SI value 1) 1))) + + +; Operands. + +(dshcop rm "Left general purpose register" () h-grc f-rm) +(dshcop rn "Right general purpose register" () h-grc f-rn) +(dshcop r0 "Register 0" () h-grc 0) + +(dshcop frn "Single precision register" () h-frc f-rn) +(dshcop frm "Single precision register" () h-frc f-rm) + +(dshcop fvn "Left floating point vector" () h-fvc f-vn) +(dshcop fvm "Right floating point vector" () h-fvc f-vm) + +(dshcop drn "Left double precision register" () h-drc f-dn) +(dshcop drm "Right double precision register" () h-drc f-dm) + +(dshcop imm4 "Immediate value (4 bits)" () h-sint f-imm4) +(dshcop imm8 "Immediate value (8 bits)" () h-sint f-imm8) +(dshcop uimm8 "Immediate value (8 bits unsigned)" () h-uint f-imm8) + +(dshcop imm4x2 "Immediate value (4 bits, 2x scale)" () h-uint f-imm4x2) +(dshcop imm4x4 "Immediate value (4 bits, 4x scale)" () h-uint f-imm4x4) +(dshcop imm8x2 "Immediate value (8 bits, 2x scale)" () h-uint f-imm8x2) +(dshcop imm8x4 "Immediate value (8 bits, 4x scale)" () h-uint f-imm8x4) + +(dshcop disp8 "Displacement (8 bits)" () h-iaddr f-disp8) +(dshcop disp12 "Displacement (12 bits)" () h-iaddr f-disp12) + +(dshcop rm64 "Register m (64 bits)" () h-gr f-rm) +(dshcop rn64 "Register n (64 bits)" () h-gr f-rn) + +(dshcop gbr "Global base register" () h-gbr f-nil) +(dshcop pr "Procedure link register" () h-pr f-nil) + +(dshcop fpscr "Floating point status/control register" () h-fpccr f-nil) + +(dshcop tbit "Condition code flag" () h-tbit f-nil) +(dshcop sbit "Multiply-accumulate saturation flag" () h-sbit f-nil) +(dshcop mbit "Divide-step M flag" () h-mbit f-nil) +(dshcop qbit "Divide-step Q flag" () h-qbit f-nil) +(dshcop fpul "Floating point ???" () h-fr 32) + +(dshcop frbit "Floating point register bank bit" () h-frbit f-nil) +(dshcop szbit "Floating point transfer size bit" () h-szbit f-nil) +(dshcop prbit "Floating point precision bit" () h-prbit f-nil) + +(dshcop macl "Multiply-accumulate low register" () h-macl f-nil) +(dshcop mach "Multiply-accumulate high register" () h-mach f-nil) + + +(define-operand (name fsdm) (comment "bar") + (attrs (ISA compact)) (type h-frc) (index f-rm) (handlers (parse "fsd"))) + +(define-operand (name fsdn) (comment "bar") + (attrs (ISA compact)) (type h-frc) (index f-rn)) + + +; Cover macro to dni to indicate these are all SHcompact instructions. +; dshmi: define-normal-sh-compact-insn + +(define-pmacro (dshci xname xcomment xattrs xsyntax xformat xsemantics) + (define-insn + (name (.sym xname -compact)) + (comment xcomment) + (.splice attrs (.unsplice xattrs) (ISA compact)) + (syntax xsyntax) + (format xformat) + (semantics xsemantics))) + +(define-pmacro (dr operand) (reg h-dr (index-of operand))) +(define-pmacro (xd x) (reg h-xd (and (index-of x) (inv QI 1)))) + +(dshci add "Add" + () + "add $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 12)) + (set rn (add rn rm))) + +(dshci addi "Add immediate" + () + "add #$imm8, $rn" + (+ (f-op4 7) rn imm8) + (set rn (add rn (ext SI (and QI imm8 255))))) + +(dshci addc "Add with carry" + () + "addc $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 14)) + (sequence ((BI flag)) + (set flag (add-cflag rn rm tbit)) + (set rn (addc rn rm tbit)) + (set tbit flag))) + +(dshci addv "Add with overflow" + () + "addv $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 15)) + (sequence ((BI t)) + (set t (add-oflag rn rm 0)) + (set rn (add rn rm)) + (set tbit t))) + +(dshci and "Bitwise AND" + () + "and $rm64, $rn64" + (+ (f-op4 2) rn64 rm64 (f-sub4 9)) + (set rn64 (and rm64 rn64))) + +(dshci andi "Bitwise AND immediate" + () + "and #$uimm8, r0" + (+ (f-op8 #xc9) uimm8) + (set r0 (and r0 (zext DI uimm8)))) + +(dshci andb "Bitwise AND memory byte" + () + "and.b #$imm8, @(r0, gbr)" + (+ (f-op8 #xcd) imm8) + (sequence ((DI addr) (UQI data)) + (set addr (add r0 gbr)) + (set data (and (mem UQI addr) imm8)) + (set (mem UQI addr) data))) + +(dshci bf "Conditional branch" + () + "bf $disp8" + (+ (f-op8 #x8b) disp8) + (if (not tbit) + (set pc disp8))) + +(dshci bfs "Conditional branch with delay slot" + () + "bf/s $disp8" + (+ (f-op8 #x8f) disp8) + (if (not tbit) + (delay 1 (set pc disp8)))) + +(dshci bra "Branch" + () + "bra $disp12" + (+ (f-op4 10) disp12) + (delay 1 (set pc disp12))) + +(dshci braf "Branch far" + () + "braf $rn" + (+ (f-op4 0) rn (f-sub8 35)) + (delay 1 (set pc (add (ext DI rn) (add pc 4))))) + +(dshci brk "Breakpoint" + () + "brk" + (+ (f-op16 59)) + (c-call "sh64_break" pc)) + +(dshci bsr "Branch to subroutine" + () + "bsr $disp12" + (+ (f-op4 11) disp12) + (delay 1 (sequence () + (set pr (add pc 4)) + (set pc disp12)))) + +(dshci bsrf "Branch to far subroutine" + () + "bsrf $rn" + (+ (f-op4 0) rn (f-sub8 3)) + (delay 1 (sequence () + (set pr (add pc 4)) + (set pc (add (ext DI rn) (add pc 4)))))) + +(dshci bt "Conditional branch" + () + "bt $disp8" + (+ (f-op8 #x89) disp8) + (if tbit + (set pc disp8))) + +(dshci bts "Conditional branch with delay slot" + () + "bt/s $disp8" + (+ (f-op8 #x8d) disp8) + (if tbit + (delay 1 (set pc disp8)))) + +(dshci clrmac "Clear MACL and MACH" + () + "clrmac" + (+ (f-op16 40)) + (sequence () + (set macl 0) + (set mach 0))) + +(dshci clrs "Clear S-bit" + () + "clrs" + (+ (f-op16 72)) + (set sbit 0)) + +(dshci clrt "Clear T-bit" + () + "clrt" + (+ (f-op16 8)) + (set tbit 0)) + +(dshci cmpeq "Compare if equal" + () + "cmp/eq $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 0)) + (set tbit (eq rm rn))) + +(dshci cmpeqi "Compare if equal (immediate)" + () + "cmp/eq #$imm8, r0" + (+ (f-op8 #x88) imm8) + (set tbit (eq r0 (ext SI (and QI imm8 255))))) + +(dshci cmpge "Compare if greater than or equal" + () + "cmp/ge $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 3)) + (set tbit (ge rn rm))) + +(dshci cmpgt "Compare if greater than" + () + "cmp/gt $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 7)) + (set tbit (gt rn rm))) + +(dshci cmphi "Compare if greater than (unsigned)" + () + "cmp/hi $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 6)) + (set tbit (gtu rn rm))) + +(dshci cmphs "Compare if greater than or equal (unsigned)" + () + "cmp/hs $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 2)) + (set tbit (geu rn rm))) + +(dshci cmppl "Compare if greater than zero" + () + "cmp/pl $rn" + (+ (f-op4 4) rn (f-sub8 21)) + (set tbit (gt rn 0))) + +(dshci cmppz "Compare if greater than or equal zero" + () + "cmp/pz $rn" + (+ (f-op4 4) rn (f-sub8 17)) + (set tbit (ge rn 0))) + +(dshci cmpstr "Compare bytes" + () + "cmp/str $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 12)) + (sequence ((BI t) (SI temp)) + (set temp (xor rm rn)) + (set t (eq (and temp #xff000000) 0)) + (set t (or (eq (and temp #xff0000) 0) t)) + (set t (or (eq (and temp #xff00) 0) t)) + (set t (or (eq (and temp #xff) 0) t)) + (set tbit (if BI (gtu t 0) 1 0)))) + +(dshci div0s "Initialise divide-step state for signed division" + () + "div0s $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 7)) + (sequence () + (set qbit (srl rn 31)) + (set mbit (srl rm 31)) + (set tbit (if BI (eq (srl rm 31) (srl rn 31)) 0 1)))) + +(dshci div0u "Initialise divide-step state for unsigned division" + () + "div0u" + (+ (f-op16 25)) + (sequence () + (set tbit 0) + (set qbit 0) + (set mbit 0))) + +(dshci div1 "Divide step" + () + "div1 $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 4)) + (sequence ((BI oldq) (SI tmp0) (UQI tmp1)) + (set oldq qbit) + (set qbit (srl rn 31)) + (set rn (or (sll rn 1) (zext SI tbit))) + (if (not oldq) + (if (not mbit) + (sequence () + (set tmp0 rn) + (set rn (sub rn rm)) + (set tmp1 (gtu rn tmp0)) + (if (not qbit) + (set qbit (if BI tmp1 1 0)) + (set qbit (if BI (eq tmp1 0) 1 0)))) + (sequence () + (set tmp0 rn) + (set rn (add rn rm)) + (set tmp1 (ltu rn tmp0)) + (if (not qbit) + (set qbit (if BI (eq tmp1 0) 1 0)) + (set qbit (if BI tmp1 1 0))))) + (if (not mbit) + (sequence () + (set tmp0 rn) + (set rn (add rm rn)) + (set tmp1 (ltu rn tmp0)) + (if (not qbit) + (set qbit (if BI tmp1 1 0)) + (set qbit (if BI (eq tmp1 0) 1 0)))) + (sequence () + (set tmp0 rn) + (set rn (sub rn rm)) + (set tmp1 (gtu rn tmp0)) + (if (not qbit) + (set qbit (if BI (eq tmp1 0) 1 0)) + (set qbit (if BI tmp1 1 0)))))) + (set tbit (if BI (eq qbit mbit) 1 0)))) + +(dshci dmulsl "Multiply long (signed)" + () + "dmuls.l $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 13)) + (sequence ((DI result)) + (set result (mul (ext DI rm) (ext DI rn))) + (set mach (subword SI result 0)) + (set macl (subword SI result 1)))) + +(dshci dmulul "Multiply long (unsigned)" + () + "dmulu.l $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 5)) + (sequence ((DI result)) + (set result (mul (zext DI rm) (zext DI rn))) + (set mach (subword SI result 0)) + (set macl (subword SI result 1)))) + +(dshci dt "Decrement and set" + () + "dt $rn" + (+ (f-op4 4) rn (f-sub8 16)) + (sequence () + (set rn (sub rn 1)) + (set tbit (eq rn 0)))) + +(dshci extsb "Sign extend byte" + () + "exts.b $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 14)) + (set rn (ext SI (subword QI rm 3)))) + +(dshci extsw "Sign extend word" + () + "exts.w $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 15)) + (set rn (ext SI (subword HI rm 1)))) + +(dshci extub "Zero extend byte" + () + "extu.b $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 12)) + (set rn (zext SI (subword QI rm 3)))) + +(dshci extuw "Zero etxend word" + () + "extu.w $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 13)) + (set rn (zext SI (subword HI rm 1)))) + +(dshci fabs "Floating point absolute" + (FP-INSN) + "fabs $fsdn" + (+ (f-op4 15) fsdn (f-sub8 #x5d)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fabsd" (dr fsdn))) + (set fsdn (c-call SF "sh64_fabss" fsdn)))) + +(dshci fadd "Floating point add" + (FP-INSN) + "fadd $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 0)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_faddd" (dr fsdm) (dr fsdn))) + (set fsdn (c-call SF "sh64_fadds" fsdm fsdn)))) + +(dshci fcmpeq "Floating point compare equal" + (FP-INSN) + "fcmp/eq $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 4)) + (if prbit + (set tbit (c-call BI "sh64_fcmpeqd" (dr fsdm) (dr fsdn))) + (set tbit (c-call BI "sh64_fcmpeqs" fsdm fsdn)))) + +(dshci fcmpgt "Floating point compare greater than" + (FP-INSN) + "fcmp/gt $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 5)) + (if prbit + (set tbit (c-call BI "sh64_fcmpgtd" (dr fsdn) (dr fsdm))) + (set tbit (c-call BI "sh64_fcmpgts" fsdn fsdm)))) + +(dshci fcnvds "Floating point convert (double to single)" + (FP-INSN) + "fcnvds $drn, fpul" + (+ (f-op4 15) drn (f-8-1 10) (f-sub8 #xbd)) + (set fpul (c-call SF "sh64_fcnvds" drn))) + +(dshci fcnvsd "Floating point convert (single to double)" + (FP-INSN) + "fcnvsd fpul, $drn" + (+ (f-op4 15) drn (f-8-1 0) (f-sub8 #xad)) + (set drn (c-call DF "sh64_fcnvsd" fpul))) + +(dshci fdiv "Floating point divide" + (FP-INSN) + "fdiv $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 3)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fdivd" (dr fsdn) (dr fsdm))) + (set fsdn (c-call SF "sh64_fdivs" fsdn fsdm)))) + +(dshci fipr "Floating point inner product" + (FP-INSN) + "fipr $fvm, $fvn" + (+ (f-op4 15) fvn fvm (f-sub8 #xed)) + (sequence ((QI m) (QI n) (SF res)) + (set m (index-of fvm)) + (set n (index-of fvn)) + (set res (c-call SF "sh64_fmuls" fvm fvn)) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 1)) (reg h-frc (add n 1))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 2)) (reg h-frc (add n 2))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 3)) (reg h-frc (add n 3))))) + (set (reg h-frc (add n 3)) res))) + +(dshci flds "Floating point load status register" + (FP-INSN) + "flds $frn" + (+ (f-op4 15) frn (f-sub8 #x1d)) + (set fpul frn)) + +(dshci fldi0 "Floating point load immediate 0.0" + (FP-INSN) + "fldi0 $frn" + (+ (f-op4 15) frn (f-sub8 #x8d)) + (set frn (c-call SF "sh64_fldi0"))) + +(dshci fldi1 "Floating point load immediate 1.0" + (FP-INSN) + "fldi1 $frn" + (+ (f-op4 15) frn (f-sub8 #x9d)) + (set frn (c-call SF "sh64_fldi1"))) + +(dshci float "Floating point integer conversion" + (FP-INSN) + "float fpul, $fsdn" + (+ (f-op4 15) fsdn (f-sub8 #x2d)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_floatld" fpul)) + (set fsdn (c-call SF "sh64_floatls" fpul)))) + +(dshci fmac "Floating point multiply and accumulate" + (FP-INSN) + "fmac fr0, $frm, $frn" + (+ (f-op4 15) frn frm (f-sub4 14)) + (set frn (c-call SF "sh64_fmacs" (reg h-frc 0) frm frn))) + +(define-pmacro (even x) (eq (and x 1) 0)) +(define-pmacro (odd x) (eq (and x 1) 1)) +(define-pmacro (extd x) (odd (index-of x))) + +(dshci fmov1 "Floating point move (register to register)" + (FP-INSN) + "fmov $frm, $frn" + (+ (f-op4 15) frn frm (f-sub4 12)) + (if (not szbit) + ; single precision operation + (set frn frm) + ; double or extended operation + (if (extd frm) + (if (extd frn) + (set (xd frn) (xd frm)) + (set (dr frn) (xd frm))) + (if (extd frn) + (set (xd frn) (dr frm)) + (set (dr frn) (dr frm)))))) + +(dshci fmov2 "Floating point load" + (FP-INSN) + "fmov @$rm, $frn" + (+ (f-op4 15) frn rm (f-sub4 8)) + (if (not szbit) + ; single precision operation + (set frn (mem SF rm)) + ; double or extended operation + (if (extd frn) + (set (xd frn) (mem DF rm)) + (set (dr frn) (mem DF rm))))) + +(dshci fmov3 "Floating point load (post-increment)" + (FP-INSN) + "fmov @${rm}+, frn" + (+ (f-op4 15) frn rm (f-sub4 9)) + (if (not szbit) + ; single precision operation + (sequence () + (set frn (mem SF rm)) + (set rm (add rm 4))) + ; double or extended operation + (sequence () + (if (extd frn) + (set (xd frn) (mem DF rm)) + (set (dr frn) (mem DF rm))) + (set rm (add rm 8))))) + +(dshci fmov4 "Floating point load (register/register indirect)" + (FP-INSN) + "fmov @(r0, $rm), $frn" + (+ (f-op4 15) frn rm (f-sub4 6)) + (if (not szbit) + ; single precision operation + (set frn (mem SF (add r0 rm))) + ; double or extended operation + (if (extd frn) + (set (xd frn) (mem DF (add r0 rm))) + (set (dr frn) (mem DF (add r0 rm)))))) + +(dshci fmov5 "Floating point store" + (FP-INSN) + "fmov $frm, @$rn" + (+ (f-op4 15) rn frm (f-sub4 10)) + (if (not szbit) + ; single precision operation + (set (mem SF rn) frm) + ; double or extended operation + (if (extd frm) + (set (mem DF rn) (xd frm)) + (set (mem DF rn) (dr frm))))) + +(dshci fmov6 "Floating point store (pre-decrement)" + (FP-INSN) + "fmov $frm, @-$rn" + (+ (f-op4 15) rn frm (f-sub4 11)) + (if (not szbit) + ; single precision operation + (sequence () + (set rn (sub rn 4)) + (set (mem SF rn) frm)) + ; double or extended operation + (sequence () + (set rn (sub rn 8)) + (if (extd frm) + (set (mem DF rn) (xd frm)) + (set (mem DF rn) (dr frm)))))) + +(dshci fmov7 "Floating point store (register/register indirect)" + (FP-INSN) + "fmov $frm, @(r0, $rn)" + (+ (f-op4 15) rn frm (f-sub4 7)) + (if (not szbit) + ; single precision operation + (set (mem SF (add r0 rn)) frm) + ; double or extended operation + (if (extd frm) + (set (mem DF (add r0 rn)) (xd frm)) + (set (mem DF (add r0 rn)) (dr frm))))) + +(dshci fmul "Floating point multiply" + (FP-INSN) + "fmul $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 2)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fmuld" (dr fsdm) (dr fsdn))) + (set fsdn (c-call SF "sh64_fmuls" fsdm fsdn)))) + +(dshci fneg "Floating point negate" + (FP-INSN) + "fneg $fsdn" + (+ (f-op4 15) fsdn (f-sub8 #x4d)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fnegd" (dr fsdn))) + (set fsdn (c-call SF "sh64_fnegs" fsdn)))) + +(dshci frchg "Toggle floating point register banks" + (FP-INSN) + "frchg" + (+ (f-op16 #xfbfd)) + (set frbit (not frbit))) + +(dshci fschg "Set size of floating point transfers" + (FP-INSN) + "fschg" + (+ (f-op16 #xf3fd)) + (set szbit (not szbit))) + +(dshci fsqrt "Floating point square root" + (FP-INSN) + "fsqrt $fsdn" + (+ (f-op4 15) fsdn (f-sub8 #x6d)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fsqrtd" (dr fsdn))) + (set fsdn (c-call SF "sh64_fsqrts" fsdn)))) + +(dshci fsts "Floating point store status register" + (FP-INSN) + "fsts fpul, $frn" + (+ (f-op4 15) frn (f-sub8 13)) + (set frn fpul)) + +(dshci fsub "Floating point subtract" + (FP-INSN) + "fsub $fsdm, $fsdn" + (+ (f-op4 15) fsdn fsdm (f-sub4 1)) + (if prbit + (set (dr fsdn) (c-call DF "sh64_fsubd" (dr fsdn) (dr fsdm))) + (set fsdn (c-call SF "sh64_fsubs" fsdn fsdm)))) + +(dshci ftrc "Floating point truncate" + (FP-INSN) + "ftrc $fsdn, fpul" + (+ (f-op4 15) fsdn (f-sub8 #x3d)) + (set fpul (if SF prbit + (c-call SF "sh64_ftrcdl" (dr fsdn)) + (c-call SF "sh64_ftrcsl" fsdn)))) + +(dshci ftrv "Floating point transform vector" + (FP-INSN) + "ftrv xmtrx, $fvn" + (+ (f-op4 15) fvn (f-sub10 #x1fd)) + (sequence ((QI n) (SF res)) + (set n (index-of fvn)) + (set res (c-call SF "sh64_fmuls" (reg h-xf 0) (reg h-frc n))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 4) (reg h-frc (add n 1))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 8) (reg h-frc (add n 2))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 12) (reg h-frc (add n 3))))) + (set (reg h-frc n) res) + (set res (c-call SF "sh64_fmuls" (reg h-xf 1) (reg h-frc n))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 5) (reg h-frc (add n 1))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 9) (reg h-frc (add n 2))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 13) (reg h-frc (add n 3))))) + (set (reg h-frc (add n 1)) res) + (set res (c-call SF "sh64_fmuls" (reg h-xf 2) (reg h-frc n))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 6) (reg h-frc (add n 1))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 10) (reg h-frc (add n 2))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 14) (reg h-frc (add n 3))))) + (set (reg h-frc (add n 2)) res) + (set res (c-call SF "sh64_fmuls" (reg h-xf 3) (reg h-frc n))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 7) (reg h-frc (add n 1))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 11) (reg h-frc (add n 2))))) + (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 15) (reg h-frc (add n 3))))) + (set (reg h-frc (add n 3)) res))) + +(dshci jmp "Jump" + () + "jmp @$rn" + (+ (f-op4 4) rn (f-sub8 43)) + (delay 1 (set pc rn))) + +(dshci jsr "Jump to subroutine" + () + "jsr @$rn" + (+ (f-op4 4) rn (f-sub8 11)) + (delay 1 (sequence () + (set pr (add pc 4)) + (set pc rn)))) + +(dshci ldc "Load control register (GBR)" + () + "ldc $rn, gbr" + (+ (f-op4 4) rn (f-sub8 30)) + (set gbr rn)) + +(dshci ldcl "Load control register (GBR)" + () + "ldc.l @${rn}+, gbr" + (+ (f-op4 4) rn (f-sub8 39)) + (sequence () + (set gbr (mem SI rn)) + (set rn (add rn 4)))) + +(dshci lds-fpscr "Load status register (FPSCR)" + () + "lds $rn, fpscr" + (+ (f-op4 4) rn (f-sub8 106)) + (set fpscr rn)) + +(dshci ldsl-fpscr "Load status register (FPSCR)" + () + "lds.l @${rn}+, fpscr" + (+ (f-op4 4) rn (f-sub8 102)) + (sequence () + (set fpscr (mem SI rn)) + (set rn (add rn 4)))) + +(dshci lds-fpul "Load status register (FPUL)" + () + "lds $rn, fpul" + (+ (f-op4 4) rn (f-sub8 90)) + ; Use subword to convert rn's mode. + (set fpul (subword SF rn 0))) + +(dshci ldsl-fpul "Load status register (FPUL)" + () + "lds.l @${rn}+, fpul" + (+ (f-op4 4) rn (f-sub8 86)) + (sequence () + (set fpul (mem SF rn)) + (set rn (add rn 4)))) + +(dshci lds-mach "Load status register (MACH)" + () + "lds $rn, mach" + (+ (f-op4 4) rn (f-sub8 10)) + (set mach rn)) + +(dshci ldsl-mach "Load status register (MACH), post-increment" + () + "lds.l @${rn}+, mach" + (+ (f-op4 4) rn (f-sub8 6)) + (sequence () + (set mach (mem SI rn)) + (set rn (add rn 4)))) + +(dshci lds-macl "Load status register (MACL)" + () + "lds $rn, macl" + (+ (f-op4 4) rn (f-sub8 26)) + (set macl rn)) + +(dshci ldsl-macl "Load status register (MACL), post-increment" + () + "lds.l @${rn}+, macl" + (+ (f-op4 4) rn (f-sub8 22)) + (sequence () + (set macl (mem SI rn)) + (set rn (add rn 4)))) + +(dshci lds-pr "Load status register (PR)" + () + "lds $rn, pr" + (+ (f-op4 4) rn (f-sub8 42)) + (set pr rn)) + +(dshci ldsl-pr "Load status register (PR), post-increment" + () + "lds.l @${rn}+, pr" + (+ (f-op4 4) rn (f-sub8 38)) + (sequence () + (set pr (mem SI rn)) + (set rn (add rn 4)))) + +(dshci macl "Multiply and accumulate (long)" + () + "mac.l @${rm}+, @${rn}+" + (+ (f-op4 0) rn rm (f-sub4 15)) + (sequence ((DI tmpry) (DI mac) (DI result) (SI x) (SI y)) + (set x (mem SI rn)) + (set rn (add rn 4)) + (if (eq (index-of rn) (index-of rm)) + (sequence () + (set rn (add rn 4)) + (set rm (add rm 4)))) + (set y (mem SI rm)) + (set rm (add rm 4)) + (set tmpry (mul (zext DI x) (zext DI y))) + (set mac (or DI (sll (zext DI mach) 32) (zext DI macl))) + (set result (add mac tmpry)) + (sequence () + (if sbit + (sequence ((SI min) (SI max)) + (set max (srl (inv DI 0) 16)) + ; Preserve bit 48 for sign. + (set min (srl (inv DI 0) 15)) + (if (gt result max) + (set result max) + (if (lt result min) + (set result min))))) + (set mach (subword SI result 0)) + (set macl (subword SI result 1))))) + +(dshci macw "Multiply and accumulate (word)" + () + "mac.w @${rm}+, @${rn}+" + (+ (f-op4 4) rn rm (f-sub4 15)) + (sequence ((SI tmpry) (DI mac) (DI result) (HI x) (HI y)) + (set x (mem HI rn)) + (set rn (add rn 2)) + (if (eq (index-of rn) (index-of rm)) + (sequence () + (set rn (add rn 2)) + (set rm (add rm 2)))) + (set y (mem HI rm)) + (set rm (add rm 2)) + (set tmpry (mul (zext SI x) (zext SI y))) + (if sbit + (sequence () + (if (add-oflag tmpry macl 0) + (set mach 1)) + (set macl (add tmpry macl))) + (sequence () + (set mac (or DI (sll (zext DI mach) 32) (zext DI macl))) + (set result (add mac (ext DI tmpry))) + (set mach (subword SI result 0)) + (set macl (subword SI result 1)))))) + +(dshci mov "Move" + () + "mov $rm64, $rn64" + (+ (f-op4 6) rn64 rm64 (f-sub4 3)) + (set rn64 rm64)) + +(dshci movi "Move immediate" + () + "mov #$imm8, $rn" + (+ (f-op4 14) rn imm8) + (set rn (ext DI (and QI imm8 255)))) + +(dshci movb1 "Store byte to memory (register indirect w/ zero displacement)" + () + "mov.b $rm, @$rn" + (+ (f-op4 2) rn rm (f-sub4 0)) + (set (mem UQI rn) (subword UQI rm 3))) + +(dshci movb2 "Store byte to memory (register indirect w/ pre-decrement)" + () + "mov.b $rm, @-$rn" + (+ (f-op4 2) rn rm (f-sub4 4)) + (sequence ((DI addr)) + (set addr (sub rn 1)) + (set (mem UQI addr) (subword UQI rm 3)) + (set rn addr))) + +(dshci movb3 "Store byte to memory (register/register indirect)" + () + "mov.b $rm, @(r0,$rn)" + (+ (f-op4 0) rn rm (f-sub4 4)) + (set (mem UQI (add r0 rn)) (subword UQI rm 3))) + +(dshci movb4 "Store byte to memory (GBR-relative w/ displacement)" + () + "mov.b r0, @($imm8, gbr)" + (+ (f-op8 #xc0) imm8) + (sequence ((DI addr)) + (set addr (add gbr imm8)) + (set (mem UQI addr) (subword UQI r0 3)))) + +(dshci movb5 "Store byte to memory (register indirect w/ displacement)" + () + "mov.b r0, @($imm4, $rm)" + (+ (f-op8 #x80) rm imm4) + (sequence ((DI addr)) + (set addr (add rm imm4)) + (set (mem UQI addr) (subword UQI r0 3)))) + +(dshci movb6 "Load byte from memory (register indirect w/ zero displacement)" + () + "mov.b @$rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 0)) + (set rn (ext SI (mem QI rm)))) + +(dshci movb7 "Load byte from memory (register indirect w/ post-increment)" + () + "mov.b @${rm}+, $rn" + (+ (f-op4 6) rn rm (f-sub4 4)) + (sequence ((QI data)) + (set data (mem QI rm)) + (if (eq (index-of rm) (index-of rn)) + (set rm (ext SI data)) + (set rm (add rm 1))) + (set rn (ext SI data)))) + +(dshci movb8 "Load byte from memory (register/register indirect)" + () + "mov.b @(r0, $rm), $rn" + (+ (f-op4 0) rn rm (f-sub4 12)) + (set rn (ext SI (mem QI (add r0 rm))))) + +(dshci movb9 "Load byte from memory (GBR-relative with displacement)" + () + "mov.b @($imm8, gbr), r0" + (+ (f-op8 #xc4) imm8) + (set r0 (ext SI (mem QI (add gbr imm8))))) + +(dshci movb10 "Load byte from memory (register indirect w/ displacement)" + () + "mov.b @($imm4, $rm), r0" + (+ (f-op8 #x84) rm imm4) + (set r0 (ext SI (mem QI (add rm imm4))))) + +(dshci movl1 "Store long word to memory (register indirect w/ zero displacement)" + () + "mov.l $rm, @$rn" + (+ (f-op4 2) rn rm (f-sub4 2)) + (set (mem SI rn) rm)) + +(dshci movl2 "Store long word to memory (register indirect w/ pre-decrement)" + () + "mov.l $rm, @-$rn" + (+ (f-op4 2) rn rm (f-sub4 6)) + (sequence ((SI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) rm) + (set rn addr))) + +(dshci movl3 "Store long word to memory (register/register indirect)" + () + "mov.l $rm, @(r0, $rn)" + (+ (f-op4 0) rn rm (f-sub4 6)) + (set (mem SI (add r0 rn)) rm)) + +(dshci movl4 "Store long word to memory (GBR-relative w/ displacement)" + () + "mov.l r0, @($imm8x4, gbr)" + (+ (f-op8 #xc2) imm8x4) + (set (mem SI (add gbr imm8x4)) r0)) + +(dshci movl5 "Store long word to memory (register indirect w/ displacement)" + () + "mov.l $rm, @($imm4x4, $rn)" + (+ (f-op4 1) rn rm imm4x4) + (set (mem SI (add rn imm4x4)) rm)) + +(dshci movl6 "Load long word to memory (register indirect w/ zero displacement)" + () + "mov.l @$rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 2)) + (set rn (mem SI rm))) + +(dshci movl7 "Load long word from memory (register indirect w/ post-increment)" + () + "mov.l @${rm}+, $rn" + (+ (f-op4 6) rn rm (f-sub4 6)) + (sequence () + (set rn (mem SI rm)) + (if (eq (index-of rm) (index-of rn)) + (set rm rn) + (set rm (add rm 4))))) + +(dshci movl8 "Load long word from memory (register/register indirect)" + () + "mov.l @(r0, $rm), $rn" + (+ (f-op4 0) rn rm (f-sub4 14)) + (set rn (mem SI (add r0 rm)))) + +(dshci movl9 "Load long word from memory (GBR-relative w/ displacement)" + () + "mov.l @($imm8x4, gbr), r0" + (+ (f-op8 #xc6) imm8x4) + (set r0 (mem SI (add gbr imm8x4)))) + +(dshci movl10 "Load long word from memory (PC-relative w/ displacement)" + (ILLSLOT) + "mov.l @($imm8x4, pc), $rn" + (+ (f-op4 13) rn imm8x4) + (set rn (mem SI (add imm8x4 (and (add pc 4) (inv 3)))))) + +(dshci movl11 "Load long word from memory (register indirect w/ displacement)" + () + "mov.l @($imm4x4, $rm), $rn" + (+ (f-op4 5) rn rm imm4x4) + (set rn (mem SI (add rm imm4x4)))) + +(dshci movw1 "Store word to memory (register indirect w/ zero displacement)" + () + "mov.w $rm, @$rn" + (+ (f-op4 2) rn rm (f-sub4 1)) + (set (mem HI rn) (subword HI rm 1))) + +(dshci movw2 "Store word to memory (register indirect w/ pre-decrement)" + () + "mov.w $rm, @-$rn" + (+ (f-op4 2) rn rm (f-sub4 5)) + (sequence ((DI addr)) + (set addr (sub rn 2)) + (set (mem HI addr) (subword HI rm 1)) + (set rn addr))) + +(dshci movw3 "Store word to memory (register/register indirect)" + () + "mov.w $rm, @(r0, $rn)" + (+ (f-op4 0) rn rm (f-sub4 5)) + (set (mem HI (add r0 rn)) (subword HI rm 1))) + +(dshci movw4 "Store word to memory (GBR-relative w/ displacement)" + () + "mov.w r0, @($imm8x2, gbr)" + (+ (f-op8 #xc1) imm8x2) + (set (mem HI (add gbr imm8x2)) (subword HI r0 1))) + +(dshci movw5 "Store word to memory (register indirect w/ displacement)" + () + "mov.w r0, @($imm4x2, $rn)" + (+ (f-op8 #x81) rn imm4x2) + (set (mem HI (add rn imm4x2)) (subword HI r0 1))) + +(dshci movw6 "Load word from memory (register indirect w/ zero displacement)" + () + "mov.w @$rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 1)) + (set rn (ext SI (mem HI rm)))) + +(dshci movw7 "Load word from memory (register indirect w/ post-increment)" + () + "mov.w @${rm}+, $rn" + (+ (f-op4 6) rn rm (f-sub4 5)) + (sequence ((HI data)) + (set data (mem HI rm)) + (if (eq (index-of rm) (index-of rn)) + (set rm (ext SI data)) + (set rm (add rm 2))) + (set rn (ext SI data)))) + +(dshci movw8 "Load word from memory (register/register indirect)" + () + "mov.w @(r0, $rm), $rn" + (+ (f-op4 0) rn rm (f-sub4 13)) + (set rn (ext SI (mem HI (add r0 rm))))) + +(dshci movw9 "Load word from memory (GBR-relative w/ displacement)" + () + "mov.w @($imm8x2, gbr), r0" + (+ (f-op8 #xc5) imm8x2) + (set r0 (ext SI (mem HI (add gbr imm8x2))))) + +(dshci movw10 "Load word from memory (PC-relative w/ displacement)" + (ILLSLOT) + "mov.w @($imm8x2, pc), $rn" + (+ (f-op4 9) rn imm8x2) + (set rn (ext SI (mem HI (add (add pc 4) imm8x2))))) + +(dshci movw11 "Load word from memory (register indirect w/ displacement)" + () + "mov.w @($imm4x2, $rm), r0" + (+ (f-op8 #x85) rm imm4x2) + (set r0 (ext SI (mem HI (add rm imm4x2))))) + +(dshci mova "Move effective address" + (ILLSLOT) + "mova @($imm8x4, pc), r0" + (+ (f-op8 #xc7) imm8x4) + (set r0 (add (and (add pc 4) (inv 3)) imm8x4))) + +(dshci movcal "Move with cache block allocation" + () + "movca.l r0, @$rn" + (+ (f-op4 0) rn (f-sub8 #xc3)) + (set (mem SI rn) r0)) + +(dshci movt "Move t-bit" + () + "movt $rn" + (+ (f-op4 0) rn (f-sub8 41)) + (set rn (zext SI tbit))) + +(dshci mull "Multiply" + () + "mul.l $rm, $rn" + (+ (f-op4 0) rn rm (f-sub4 7)) + (set macl (mul rm rn))) + +(dshci mulsw "Multiply words (signed)" + () + "muls.w $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 15)) + (set macl (mul (ext SI (subword HI rm 1)) (ext SI (subword HI rn 1))))) + +(dshci muluw "Multiply words (unsigned)" + () + "mulu.w $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 14)) + (set macl (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))) + +(dshci neg "Negate" + () + "neg $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 11)) + (set rn (neg rm))) + +(dshci negc "Negate with carry" + () + "negc $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 10)) + (sequence ((BI flag)) + (set flag (sub-cflag 0 rm tbit)) + (set rn (subc 0 rm tbit)) + (set tbit flag))) + +(dshci nop "No operation" + () + "nop" + (+ (f-op16 9)) + (nop)) + +(dshci not "Bitwise NOT" + () + "not $rm64, $rn64" + (+ (f-op4 6) rn64 rm64 (f-sub4 7)) + (set rn64 (inv rm64))) + +(dshci ocbi "Invalidate operand cache block" + () + "ocbi @$rn" + (+ (f-op4 0) rn (f-sub8 147)) + (unimp "ocbi")) + +(dshci ocbp "Purge operand cache block" + () + "ocbp @$rn" + (+ (f-op4 0) rn (f-sub8 163)) + (unimp "ocbp")) + +(dshci ocbwb "Write back operand cache block" + () + "ocbwb @$rn" + (+ (f-op4 0) rn (f-sub8 179)) + (unimp "ocbwb")) + +(dshci or "Bitwise OR" + () + "or $rm64, $rn64" + (+ (f-op4 2) rn64 rm64 (f-sub4 11)) + (set rn64 (or rm64 rn64))) + +(dshci ori "Bitwise OR immediate" + () + "or #$uimm8, r0" + (+ (f-op8 #xcb) uimm8) + (set r0 (or r0 (zext DI uimm8)))) + +(dshci orb "Bitwise OR immediate" + () + "or.b #$imm8, @(r0, gbr)" + (+ (f-op8 #xcf) imm8) + (sequence ((DI addr) (UQI data)) + (set addr (add r0 gbr)) + (set data (or (mem UQI addr) imm8)) + (set (mem UQI addr) data))) + +(dshci pref "Prefetch data" + () + "pref @$rn" + (+ (f-op4 0) rn (f-sub8 131)) + (unimp "pref")) + +(dshci rotcl "Rotate with carry left" + () + "rotcl $rn" + (+ (f-op4 4) rn (f-sub8 36)) + (sequence ((BI temp)) + (set temp (srl rn 31)) + (set rn (or (sll rn 1) tbit)) + (set tbit (if BI temp 1 0)))) + +(dshci rotcr "Rotate with carry right" + () + "rotcr $rn" + (+ (f-op4 4) rn (f-sub8 37)) + (sequence ((BI lsbit) (SI temp)) + (set lsbit (if BI (eq (and rn 1) 0) 0 1)) + (set temp tbit) + (set rn (or (srl rn 1) (sll temp 31))) + (set tbit (if BI lsbit 1 0)))) + +(dshci rotl "Rotate left" + () + "rotl $rn" + (+ (f-op4 4) rn (f-sub8 4)) + (sequence ((BI temp)) + (set temp (srl rn 31)) + (set rn (or (sll rn 1) temp)) + (set tbit (if BI temp 1 0)))) + +(dshci rotr "Rotate right" + () + "rotr $rn" + (+ (f-op4 4) rn (f-sub8 5)) + (sequence ((BI lsbit) (SI temp)) + (set lsbit (if BI (eq (and rn 1) 0) 0 1)) + (set temp lsbit) + (set rn (or (srl rn 1) (sll temp 31))) + (set tbit (if BI lsbit 1 0)))) + +(dshci rts "Return from subroutine" + () + "rts" + (+ (f-op16 11)) + (delay 1 (set pc pr))) + +(dshci sets "Set S-bit" + () + "sets" + (+ (f-op16 88)) + (set sbit 1)) + +(dshci sett "Set T-bit" + () + "sett" + (+ (f-op16 24)) + (set tbit 1)) + +(dshci shad "Shift arithmetic dynamic" + () + "shad $rm, $rn" + (+ (f-op4 4) rn rm (f-sub4 12)) + (sequence ((QI shamt)) + (set shamt (and QI rm 31)) + (if (ge rm 0) + (set rn (sll rn shamt)) + (if (ne shamt 0) + (set rn (sra rn (sub 32 shamt))) + (if (lt rn 0) + (set rn (neg 1)) + (set rn 0)))))) + +(dshci shal "Shift left arithmetic one bit" + () + "shal $rn" + (+ (f-op4 4) rn (f-sub8 32)) + (sequence ((BI t)) + (set t (srl rn 31)) + (set rn (sll rn 1)) + (set tbit (if BI t 1 0)))) + +(dshci shar "Shift right arithmetic one bit" + () + "shar $rn" + (+ (f-op4 4) rn (f-sub8 33)) + (sequence ((BI t)) + (set t (and rn 1)) + (set rn (sra rn 1)) + (set tbit (if BI t 1 0)))) + +(dshci shld "Shift logical dynamic" + () + "shld $rm, $rn" + (+ (f-op4 4) rn rm (f-sub4 13)) + (sequence ((QI shamt)) + (set shamt (and QI rm 31)) + (if (ge rm 0) + (set rn (sll rn shamt)) + (if (ne shamt 0) + (set rn (srl rn (sub 32 shamt))) + (set rn 0))))) + +(dshci shll "Shift left logical one bit" + () + "shll $rn" + (+ (f-op4 4) rn (f-sub8 0)) + (sequence ((BI t)) + (set t (srl rn 31)) + (set rn (sll rn 1)) + (set tbit (if BI t 1 0)))) + +(dshci shll2 "Shift left logical two bits" + () + "shll2 $rn" + (+ (f-op4 4) rn (f-sub8 8)) + (set rn (sll rn 2))) + +(dshci shll8 "Shift left logical eight bits" + () + "shll8 $rn" + (+ (f-op4 4) rn (f-sub8 24)) + (set rn (sll rn 8))) + +(dshci shll16 "Shift left logical sixteen bits" + () + "shll16 $rn" + (+ (f-op4 4) rn (f-sub8 40)) + (set rn (sll rn 16))) + +(dshci shlr "Shift right logical one bit" + () + "shlr $rn" + (+ (f-op4 4) rn (f-sub8 1)) + (sequence ((BI t)) + (set t (and rn 1)) + (set rn (srl rn 1)) + (set tbit (if BI t 1 0)))) + +(dshci shlr2 "Shift right logical two bits" + () + "shlr2 $rn" + (+ (f-op4 4) rn (f-sub8 9)) + (set rn (srl rn 2))) + +(dshci shlr8 "Shift right logical eight bits" + () + "shlr8 $rn" + (+ (f-op4 4) rn (f-sub8 25)) + (set rn (srl rn 8))) + +(dshci shlr16 "Shift right logical sixteen bits" + () + "shlr16 $rn" + (+ (f-op4 4) rn (f-sub8 41)) + (set rn (srl rn 16))) + +(dshci stc-gbr "Store control register (GBR)" + () + "stc gbr, $rn" + (+ (f-op4 0) rn (f-sub8 18)) + (set rn gbr)) + +(dshci stcl-gbr "Store control register (GBR)" + () + "stc.l gbr, @-$rn" + (+ (f-op4 4) rn (f-sub8 19)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) gbr) + (set rn addr))) + +(dshci sts-fpscr "Store status register (FPSCR)" + () + "sts fpscr, $rn" + (+ (f-op4 0) rn (f-sub8 106)) + (set rn fpscr)) + +(dshci stsl-fpscr "Store status register (FPSCR)" + () + "sts.l fpscr, @-$rn" + (+ (f-op4 4) rn (f-sub8 98)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) fpscr) + (set rn addr))) + +(dshci sts-fpul "Store status register (FPUL)" + () + "sts fpul, $rn" + (+ (f-op4 0) rn (f-sub8 90)) + (set rn (subword SI fpul 0))) + +(dshci stsl-fpul "Store status register (FPUL)" + () + "sts.l fpul, @-$rn" + (+ (f-op4 4) rn (f-sub8 82)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SF addr) fpul) + (set rn addr))) + +(dshci sts-mach "Store status register (MACH)" + () + "sts mach, $rn" + (+ (f-op4 0) rn (f-sub8 10)) + (set rn mach)) + +(dshci stsl-mach "Store status register (MACH)" + () + "sts.l mach, @-$rn" + (+ (f-op4 4) rn (f-sub8 2)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) mach) + (set rn addr))) + +(dshci sts-macl "Store status register (MACL)" + () + "sts macl, $rn" + (+ (f-op4 0) rn (f-sub8 26)) + (set rn macl)) + +(dshci stsl-macl "Store status register (MACL)" + () + "sts.l macl, @-$rn" + (+ (f-op4 4) rn (f-sub8 18)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) macl) + (set rn addr))) + +(dshci sts-pr "Store status register (PR)" + () + "sts pr, $rn" + (+ (f-op4 0) rn (f-sub8 42)) + (set rn pr)) + +(dshci stsl-pr "Store status register (PR)" + () + "sts.l pr, @-$rn" + (+ (f-op4 4) rn (f-sub8 34)) + (sequence ((DI addr)) + (set addr (sub rn 4)) + (set (mem SI addr) pr) + (set rn addr))) + +(dshci sub "Subtract" + () + "sub $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 8)) + (set rn (sub rn rm))) + +(dshci subc "Subtract and detect carry" + () + "subc $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 10)) + (sequence ((BI flag)) + (set flag (sub-cflag rn rm tbit)) + (set rn (subc rn rm tbit)) + (set tbit flag))) + +(dshci subv "Subtract and detect overflow" + () + "subv $rm, $rn" + (+ (f-op4 3) rn rm (f-sub4 11)) + (sequence ((BI t)) + (set t (sub-oflag rn rm 0)) + (set rn (sub rn rm)) + (set tbit (if BI t 1 0)))) + +(dshci swapb "Swap bytes" + () + "swap.b $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 8)) + (sequence ((UHI top-half) (UQI byte1) (UQI byte0)) + (set top-half (subword HI rm 0)) + (set byte1 (subword QI rm 2)) + (set byte0 (subword QI rm 3)) + (set rn (or SI (sll SI top-half 16) (or SI (sll SI byte0 8) byte1))))) + +(dshci swapw "Swap words" + () + "swap.w $rm, $rn" + (+ (f-op4 6) rn rm (f-sub4 9)) + (set rn (or (srl rm 16) (sll rm 16)))) + +(dshci tasb "Test and set byte" + () + "tas.b @$rn" + (+ (f-op4 4) rn (f-sub8 27)) + (sequence ((UQI byte)) + (set byte (mem UQI rn)) + (set tbit (if BI (eq byte 0) 1 0)) + (set byte (or byte 128)) + (set (mem UQI rn) byte))) + +(dshci trapa "Trap" + (ILLSLOT) + "trapa #$uimm8" + (+ (f-op8 #xc3) uimm8) + (c-call "sh64_compact_trapa" uimm8 pc)) + +(dshci tst "Test and set t-bit" + () + "tst $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 8)) + (set tbit (if BI (eq (and rm rn) 0) 1 0))) + +(dshci tsti "Test and set t-bit immediate" + () + "tst #$uimm8, r0" + (+ (f-op8 #xc8) uimm8) + (set tbit (if BI (eq (and r0 (zext SI uimm8)) 0) 1 0))) + +(dshci tstb "Test and set t-bit immedate with memory byte" + () + "tst.b #$imm8, @(r0, gbr)" + (+ (f-op8 #xcc) imm8) + (sequence ((DI addr)) + (set addr (add r0 gbr)) + (set tbit (if BI (eq (and (mem UQI addr) imm8) 0) 1 0)))) + +(dshci xor "Exclusive OR" + () + "xor $rm64, $rn64" + (+ (f-op4 2) rn64 rm64 (f-sub4 10)) + (set rn64 (xor rn64 rm64))) + +(dshci xori "Exclusive OR immediate" + () + "xor #$uimm8, r0" + (+ (f-op8 #xca) uimm8) + (set (reg h-gr 0) (xor (reg h-gr 0) (zext DI uimm8)))) + +(dshci xorb "Exclusive OR immediate with memory byte" + () + "xor.b #$imm8, @(r0, gbr)" + (+ (f-op8 #xce) imm8) + (sequence ((DI addr) (UQI data)) + (set addr (add r0 gbr)) + (set data (xor (mem UQI addr) imm8)) + (set (mem UQI addr) data))) + +(dshci xtrct "Extract" + () + "xtrct $rm, $rn" + (+ (f-op4 2) rn rm (f-sub4 13)) + (set rn (or (sll rm 16) (srl rn 16)))) diff -uprN binutils-2.14.90.0.8/cpu/sh64-media.cpu binutils-2.15.90.0.1/cpu/sh64-media.cpu --- binutils-2.14.90.0.8/cpu/sh64-media.cpu 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/cpu/sh64-media.cpu 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,1732 @@ +; Hitachi SHmedia instruction set description. -*- Scheme -*- +; +; Copyright 2000, 2001 Free Software Foundation, Inc. +; +; Contributed by Red Hat Inc; developed under contract from Hitachi +; Semiconductor (America) Inc. +; +; This file is part of the GNU Binutils. +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2 of the License, or +; (at your option) any later version. +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + +; dshmf -- define-normal-sh-media-field + +(define-pmacro (dshmf xname xcomment ignored xstart xlength) + (dnf xname xcomment ((ISA media)) xstart xlength)) + +; dshmop -- define-normal-sh-media-operand + +(define-pmacro (dshmop xname xcomment ignored xhardware xfield) + (dnop xname xcomment ((ISA media)) xhardware xfield)) + +; dnshmi -- define-normal-sh-media-insn + +(define-pmacro (dshmi xname xcomment xattrs xsyntax xformat xsemantics) + (define-insn + (name xname) + (comment xcomment) + (.splice attrs (.unsplice xattrs) (ISA media)) + (syntax xsyntax) + (format xformat) + (semantics xsemantics))) + +; Saturation functions. +; Force a value `i' into words `n' bits wide. +; See Hitachi SH-5 CPU core, volume 2, p. 25 for details. + +; saturate -- signed saturatation function + +(define-pmacro (saturate mode n i) + (if mode (lt i (neg mode (sll mode 1 (sub n 1)))) + (neg (sll mode 1 (sub n 1))) + (if mode (lt i (sll mode 1 (sub n 1))) + i + (sub mode (sll mode 1 (sub n 1)) 1)))) + +; usaturate -- unsigned saturation function + +(define-pmacro (usaturate mode n i) + (if mode (lt i (const mode 0)) + (const mode 0) + (if mode (lt i (sll mode 1 n)) + i + (sub mode (sll mode 1 n) 1)))) + + +; Ifields. + +(dshmf f-op "Opcode" () 31 6) +(dshmf f-ext "Extension opcode" () 19 4) +(dshmf f-rsvd "Reserved" (RESERVED) 3 4) + +(dshmf f-left "Left register" () 25 6) +(dshmf f-right "Right register" () 15 6) +(dshmf f-dest "Destination register" () 9 6) + +(define-multi-ifield + (name f-left-right) + (comment "Left and right matched register pair") + (attrs (ISA media)) + (mode UINT) + (subfields f-left f-right) + (insert (sequence () + (set (ifield f-left) + (and (ifield f-left-right) 63)) + (set (ifield f-right) + (and (ifield f-left-right) 63)))) + (extract (set (ifield f-left-right) (ifield f-left))) +) + +(dshmf f-tra "Target register" () 6 3) +(dshmf f-trb "Target register" () 22 3) +(dshmf f-likely "Likely bit" () 9 1) +(dshmf f-25 "Three unused bits at bit 25" () 25 3) +(dshmf f-8-2 "Two unused bits at bit 8" () 8 2) + +(df f-imm6 "Immediate value (6 bits)" ((ISA media)) 15 6 INT #f #f) +(df f-imm10 "Immediate value (10 bits)" ((ISA media)) 19 10 INT #f #f) +(df f-imm16 "Immediate value (16 bits)" ((ISA media)) 25 16 INT #f #f) + +(dshmf f-uimm6 "Immediate value (6 bits)" () 15 6) +(dshmf f-uimm16 "Immediate value (16 bits)" () 25 16) + +; Various displacement fields. +; The 10 bit field, for example, has different scaling for displacements. + +(df f-disp6 "Displacement (6 bits)" ((ISA media)) 15 6 INT #f #f) + +(df f-disp6x32 "Displacement (6 bits)" ((ISA media)) 15 6 INT + ((value pc) (sra SI value 5)) + ((value pc) (sll SI value 5))) + +(df f-disp10 "Displacement (10 bits)" ((ISA media)) 19 10 INT #f #f) + +(df f-disp10x8 "Displacement (10 bits)" ((ISA media)) 19 10 INT + ((value pc) (sra SI value 3)) + ((value pc) (sll SI value 3))) + +(df f-disp10x4 "Displacement (10 bits)" ((ISA media)) 19 10 INT + ((value pc) (sra SI value 2)) + ((value pc) (sll SI value 2))) + +(df f-disp10x2 "Displacement (10 bits)" ((ISA media)) 19 10 INT + ((value pc) (sra SI value 1)) + ((value pc) (sll SI value 1))) + +(df f-disp16 "Displacement (16 bits)" ((ISA media) PCREL-ADDR) 25 16 INT + ((value pc) (sra DI value 2)) + ((value pc) (add DI (sll DI value 2) pc))) + + +; Operands. + +(dshmop rm "Left general purpose reg" () h-gr f-left) +(dshmop rn "Right general purpose reg" () h-gr f-right) +(dshmop rd "Destination general purpose reg" () h-gr f-dest) + +(dshmop frg "Left single precision register" () h-fr f-left) +(dshmop frh "Right single precision register" () h-fr f-right) +(dshmop frf "Destination single precision reg" () h-fr f-dest) +(dshmop frgh "Single precision register pair" () h-fr f-left-right) + +(dshmop fpf "Pair of single precision registers" () h-fp f-dest) + +(dshmop fvg "Left single precision vector" () h-fv f-left) +(dshmop fvh "Right single precision vector" () h-fv f-right) +(dshmop fvf "Destination single precision vector" () h-fv f-dest) +(dshmop mtrxg "Left single precision matrix" () h-fmtx f-left) + +(dshmop drg "Left double precision register" () h-dr f-left) +(dshmop drh "Right double precision register" () h-dr f-right) +(dshmop drf "Destination double precision reg" () h-dr f-dest) +(dshmop drgh "Double precision register pair" () h-dr f-left-right) + +(dshmop fpscr "Floating point status register" () h-fpscr f-nil) +(dshmop crj "Control register j" () h-cr f-dest) +(dshmop crk "Control register k" () h-cr f-left) + +(dshmop tra "Target register a" () h-tr f-tra) +(dshmop trb "Target register b" () h-tr f-trb) + +(dshmop disp6 "Displacement (6 bits)" () h-sint f-disp6) +(dshmop disp6x32 "Displacement (6 bits, scale 32)" () h-sint f-disp6x32) +(dshmop disp10 "Displacement (10 bits)" () h-sint f-disp10) +(dshmop disp10x2 "Displacement (10 bits, scale 2)" () h-sint f-disp10x2) +(dshmop disp10x4 "Displacement (10 bits, scale 4)" () h-sint f-disp10x4) +(dshmop disp10x8 "Displacement (10 bits, scale 8)" () h-sint f-disp10x8) +(dshmop disp16 "Displacement (16 bits)" () h-sint f-disp16) + +(dshmop imm6 "Immediate (6 bits)" () h-sint f-imm6) +(dshmop imm10 "Immediate (10 bits)" () h-sint f-imm10) +(dshmop imm16 "Immediate (16 bits)" () h-sint f-imm16) +(dshmop uimm6 "Immediate (6 bits)" () h-uint f-uimm6) +(dshmop uimm16 "Unsigned immediate (16 bits)" () h-uint f-uimm16) + +; FIXME: provide these parse/print functions in `sh-media.opc'. + +(define-operand (name likely) (comment "Likely branch?") (attrs (ISA media)) + (type h-uint) (index f-likely) (handlers (parse "likely") (print "likely"))) + + +; Instructions. + +(dshmi add "Add" + () + "add $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 9) rn rd (f-rsvd 0)) + (set rd (add rm rn))) + +(dshmi addl "Add long" + () + "add.l $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 8) rn rd (f-rsvd 0)) + (set rd (add (subword SI rm 1) (subword SI rn 1)))) + +(dshmi addi "Add immediate" + () + "addi $rm, $disp10, $rd" + (+ (f-op 52) rm disp10 rd (f-rsvd 0)) + (set rd (add rm (ext DI disp10)))) + +(dshmi addil "Add immediate long" + () + "addi.l $rm, $disp10, $rd" + (+ (f-op 53) rm disp10 rd (f-rsvd 0)) + (set rd (ext DI (add (ext SI disp10) (subword SI rm 1))))) + +(dshmi addzl "Add zero extended long" + () + "addz.l $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 12) rn rd (f-rsvd 0)) + (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1))))) + +(dshmi alloco "Allocate operand cache block" + () + "alloco $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 4) disp6x32 (f-dest 63) (f-rsvd 0)) + (unimp "alloco")) + +(dshmi and "AND" + () + "and $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 11) rn rd (f-rsvd 0)) + (set rd (and rm rn))) + +(dshmi andc "AND complement" + () + "andc $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 15) rn rd (f-rsvd 0)) + (set rd (and rm (inv rn)))) + +(dshmi andi "AND immediate" + () + "andi $rm, $disp10, $rd" + (+ (f-op 54) rm disp10 rd (f-rsvd 0)) + (set rd (and rm (ext DI disp10)))) + +(dshmi beq "Branch if equal" + () + "beq$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (eq rm rn) + (set pc tra))) + +(dshmi beqi "Branch if equal immediate" + () + "beqi$likely $rm, $imm6, $tra" + (+ (f-op 57) rm (f-ext 1) imm6 likely (f-8-2 0) tra (f-rsvd 0)) + (if (eq rm (ext DI imm6)) + (set pc tra))) + +(dshmi bge "Branch if greater than or equal" + () + "bge$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 3) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (ge rm rn) + (set pc tra))) + +(dshmi bgeu "Branch if greater than or equal (unsigned comparison)" + () + "bgeu$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 11) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (geu rm rn) + (set pc tra))) + +(dshmi bgt "Branch greater than" + () + "bgt$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 7) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (gt rm rn) + (set pc tra))) + +(dshmi bgtu "Branch greater than (unsigned comparison)" + () + "bgtu$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 15) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (gtu rm rn) + (set pc tra))) + +(dshmi blink "Branch and link" + () + "blink $trb, $rd" + (+ (f-op 17) (f-25 0) trb (f-ext 1) (f-right 63) rd (f-rsvd 0)) + (sequence () + (set rd (or (add pc 4) 1)) + (set pc trb))) + +(dshmi bne "Branch if not equal" + () + "bne$likely $rm, $rn, $tra" + (+ (f-op 25) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (ne rm rn) + (set pc tra))) + +(dshmi bnei "Branch if not equal immediate" + () + "bnei$likely $rm, $imm6, $tra" + (+ (f-op 57) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0)) + (if (ne rm (ext DI imm6)) + (set pc tra))) + +(dshmi brk "Breakpoint instruction" + () + "brk" + (+ (f-op 27) (f-left 63) (f-ext 5) (f-right 63) (f-dest 63) (f-rsvd 0)) + (c-call "sh64_break" pc)) + +(define-pmacro (-byterev-step) + (sequence () + (set result (or (sll result 8) (and source 255))) + (set source (srl source 8))) +) + +(dshmi byterev "Byte reverse" + () + "byterev $rm, $rd" + (+ (f-op 0) rm (f-ext 15) (f-right 63) rd (f-rsvd 0)) + (sequence ((DI source) (DI result)) + (set source rm) + (set result 0) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (-byterev-step) + (set rd result))) + +(dshmi cmpeq "Compare equal" + () + "cmpeq $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 1) rn rd (f-rsvd 0)) + (set rd (if DI (eq rm rn) 1 0))) + +(dshmi cmpgt "Compare greater than" + () + "cmpgt $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 3) rn rd (f-rsvd 0)) + (set rd (if DI (gt rm rn) 1 0))) + +(dshmi cmpgtu "Compare greater than (unsigned comparison)" + () + "cmpgtu $rm,$rn, $rd" + (+ (f-op 0) rm (f-ext 7) rn rd (f-rsvd 0)) + (set rd (if DI (gtu rm rn) 1 0))) + +(dshmi cmveq "Conditional move if equal to zero" + () + "cmveq $rm, $rn, $rd" + (+ (f-op 8) rm (f-ext 1) rn rd (f-rsvd 0)) + (if (eq rm 0) + (set rd rn))) + +(dshmi cmvne "Conditional move if not equal to zero" + () + "cmvne $rm, $rn, $rd" + (+ (f-op 8) rm (f-ext 5) rn rd (f-rsvd 0)) + (if (ne rm 0) + (set rd rn))) + +(dshmi fabsd "Floating point absolute (double)" + () + "fabs.d $drgh, $drf" + (+ (f-op 6) drgh (f-ext 1) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fabsd" drgh))) + +(dshmi fabss "Floating point absolute (single)" + () + "fabs.s $frgh, $frf" + (+ (f-op 6) frgh (f-ext 0) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fabss" frgh))) + +(dshmi faddd "Floating point add (double)" + () + "fadd.d $drg, $drh, $drf" + (+ (f-op 13) drg (f-ext 1) drh drf (f-rsvd 0)) + (set drf (c-call DF "sh64_faddd" drg drh))) + +(dshmi fadds "Floating point add (single)" + () + "fadd.s $frg, $frh, $frf" + (+ (f-op 13) frg (f-ext 0) frh frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fadds" frg frh))) + +(dshmi fcmpeqd "Floating point compare if equal (double)" + () + "fcmpeq.d $drg, $drh, $rd" + (+ (f-op 12) drg (f-ext 9) drh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh)))) + +(dshmi fcmpeqs "Floating point compare if equal (single)" + () + "fcmpeq.s $frg, $frh, $rd" + (+ (f-op 12) frg (f-ext 8) frh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh)))) + +(dshmi fcmpged "Floating compare compare if greater than or equal (double)" + () + "fcmpge.d $drg, $drh, $rd" + (+ (f-op 12) drg (f-ext 15) drh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh)))) + +(dshmi fcmpges "Floating point compare if greater than or equal (single)" + () + "fcmpge.s $frg, $frh, $rd" + (+ (f-op 12) frg (f-ext 14) frh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh)))) + +(dshmi fcmpgtd "Floating point compare if greater than (double)" + () + "fcmpgt.d $drg, $drh, $rd" + (+ (f-op 12) drg (f-ext 13) drh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh)))) + +(dshmi fcmpgts "Floating point compare if greater than (single)" + () + "fcmpgt.s $frg, $frh, $rd" + (+ (f-op 12) frg (f-ext 12) frh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh)))) + +(dshmi fcmpund "Floating point unordered comparison (double)" + () + "fcmpun.d $drg, $drh, $rd" + (+ (f-op 12) drg (f-ext 11) drh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh)))) + +(dshmi fcmpuns "Floating point unordered comparison (single)" + () + "fcmpun.s $frg, $frh, $rd" + (+ (f-op 12) frg (f-ext 10) frh rd (f-rsvd 0)) + (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh)))) + +(dshmi fcnvds "Floating point coversion (double to single)" + () + "fcnv.ds $drgh, $frf" + (+ (f-op 14) drgh (f-ext 7) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fcnvds" drgh))) + +(dshmi fcnvsd "Floating point conversion (single to double)" + () + "fcnv.sd $frgh, $drf" + (+ (f-op 14) frgh (f-ext 6) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fcnvsd" frgh))) + +(dshmi fdivd "Floating point divide (double)" + () + "fdiv.d $drg, $drh, $drf" + (+ (f-op 13) drg (f-ext 5) drh drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fdivd" drg drh))) + +(dshmi fdivs "Floating point divide (single)" + () + "fdiv.s $frg, $frh, $frf" + (+ (f-op 13) frg (f-ext 4) frh frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fdivs" frg frh))) + +(dshmi fgetscr "Floating point get from FPSCR" + () + "fgetscr $frf" + (+ (f-op 7) (f-left 63) (f-ext 2) (f-right 63) frf (f-rsvd 0)) + (unimp "fputscr")) + ; FIXME: this should work! + ; (set frf fpscr)) + +(dshmi fiprs "Floating point inner product (single)" + () + "fipr.s $fvg, $fvh, $frf" + (+ (f-op 5) fvg (f-ext 6) fvh frf (f-rsvd 0)) + (sequence ((UQI g) (UQI h) (SF temp)) + (set g (index-of fvg)) + (set h (index-of fvh)) + (set temp (c-call SF "sh64_fmuls" (reg h-fr g) (reg h-fr h))) + (set temp (c-call SF "sh64_fadds" temp + (c-call SF "sh64_fmuls" (reg h-fr (add g 1)) (reg h-fr (add h 1))))) + (set temp (c-call SF "sh64_fadds" temp + (c-call SF "sh64_fmuls" (reg h-fr (add g 2)) (reg h-fr (add h 2))))) + (set temp (c-call SF "sh64_fadds" temp + (c-call SF "sh64_fmuls" (reg h-fr (add g 3)) (reg h-fr (add h 3))))) + (set frf temp))) + +(dshmi fldd "Floating point load (double)" + () + "fld.d $rm, $disp10x8, $drf" + (+ (f-op 39) rm disp10x8 drf (f-rsvd 0)) + (set drf (mem DF (add rm disp10x8)))) + +(dshmi fldp "Floating point load (pair of singles)" + () + "fld.p $rm, $disp10x8, $fpf" + (+ (f-op 38) rm disp10x8 fpf (f-rsvd 0)) + (sequence ((QI f)) + (set f (index-of fpf)) + (set (reg h-fr f) (mem SF (add rm disp10x8))) + (set (reg h-fr (add f 1)) (mem SF (add rm (add disp10x8 4)))))) + +(dshmi flds "Floating point load (single)" + () + "fld.s $rm, $disp10x4, $frf" + (+ (f-op 37) rm disp10x4 frf (f-rsvd 0)) + (set frf (mem SF (add rm disp10x4)))) + +(dshmi fldxd "Floating point extended load (double)" + () + "fldx.d $rm, $rn, $drf" + (+ (f-op 7) rm (f-ext 9) rn frf (f-rsvd 0)) + (set drf (mem DF (add rm rn)))) + +(dshmi fldxp "Floating point extended load (pair of singles)" + () + "fldx.p $rm, $rn, $fpf" + (+ (f-op 7) rm (f-ext 13) rn fpf (f-rsvd 0)) + (sequence ((QI f)) + (set f (index-of fpf)) + (set (reg h-fr f) (mem SF (add rm rn))) + (set (reg h-fr (add f 1)) (mem SF (add rm (add rn 4)))))) + +(dshmi fldxs "Floating point extended load (single)" + () + "fldx.s $rm, $rn, $frf" + (+ (f-op 7) rm (f-ext 8) rn frf (f-rsvd 0)) + (set frf (mem SF (add rm rn)))) + +(dshmi floatld "Floating point conversion (long to double)" + () + "float.ld $frgh, $drf" + (+ (f-op 14) frgh (f-ext 14) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_floatld" frgh))) + +(dshmi floatls "Floating point conversion (long to single)" + () + "float.ls $frgh, $frf" + (+ (f-op 14) frgh (f-ext 12) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_floatls" frgh))) + +(dshmi floatqd "Floating point conversion (quad to double)" + () + "float.qd $drgh, $drf" + (+ (f-op 14) drgh (f-ext 13) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_floatqd" drgh))) + +(dshmi floatqs "Floating point conversion (quad to single)" + () + "float.qs $drgh, $frf" + (+ (f-op 14) drgh (f-ext 15) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_floatqs" drgh))) + +(dshmi fmacs "Floating point multiply and accumulate (single)" + () + "fmac.s $frg, $frh, $frf" + (+ (f-op 13) frg (f-ext 14) frh frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fadds" frf (c-call SF "sh64_fmuls" frg frh)))) + +(dshmi fmovd "Floating point move double" + () + "fmov.d $drgh, $drf" + (+ (f-op 14) drgh (f-ext 1) drf (f-rsvd 0)) + (set drf drgh)) + +(dshmi fmovdq "Floating point move (double to quad integer)" + () + "fmov.dq $drgh, $rd" + (+ (f-op 12) drgh (f-ext 1) rd (f-rsvd 0)) + (set rd (subword DI drgh 0))) + +(dshmi fmovls "Floating point move (lower to single)" + () + "fmov.ls $rm, $frf" + (+ (f-op 7) rm (f-ext 0) (f-right 63) frf (f-rsvd 0)) + (set frf (subword SF (subword SI rm 1) 0))) + +(dshmi fmovqd "Floating point move (quad to double)" + () + "fmov.qd $rm, $drf" + (+ (f-op 7) rm (f-ext 1) (f-right 63) frf (f-rsvd 0)) + (set drf (subword DF rm 0))) + +(dshmi fmovs "Floating point move (single)" + () + "fmov.s $frgh, $frf" + (+ (f-op 14) frgh (f-ext 0) frf (f-rsvd 0)) + (set frf frgh)) + +(dshmi fmovsl "Floating point move (single to lower)" + () + "fmov.sl $frgh, $rd" + (+ (f-op 12) frgh (f-ext 0) rd (f-rsvd 0)) + (set rd (ext DI (subword SI frgh 1)))) + +(dshmi fmuld "Floating point multiply (double)" + () + "fmul.d $drg, $drh, $drf" + (+ (f-op 13) drg (f-ext 7) drh drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fmuld" drg drh))) + +(dshmi fmuls "Floating point multiply (single)" + () + "fmul.s $frg, $frh, $frf" + (+ (f-op 13) frg (f-ext 6) frh frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fmuls" frg frh))) + +(dshmi fnegd "Floating point negate (double)" + () + "fneg.d $drgh, $drf" + (+ (f-op 6) drgh (f-ext 3) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fnegd" drgh))) + +(dshmi fnegs "Floating point negate (single)" + () + "fneg.s $frgh, $frf" + (+ (f-op 6) frgh (f-ext 2) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fnegs" frgh))) + +(dshmi fputscr "Floating point put to FPSCR" + () + "fputscr $frgh" + (+ (f-op 12) frgh (f-ext 2) (f-dest 63) (f-rsvd 0)) + (unimp "fputscr")) + ; FIXME: this should work! + ; (set fpscr (subword SI frgh 0))) + +(dshmi fsqrtd "Floating point square root (double)" + () + "fsqrt.d $drgh, $drf" + (+ (f-op 14) drgh (f-ext 5) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_fsqrtd" drgh))) + +(dshmi fsqrts "Floating point squart root (single)" + () + "fsqrt.s $frgh, $frf" + (+ (f-op 14) frgh (f-ext 4) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fsqrts" frgh))) + +(dshmi fstd "Floating point store (double)" + () + "fst.d $rm, $disp10x8, $drf" + (+ (f-op 47) rm disp10x8 drf (f-rsvd 0)) + (set (mem DF (add rm disp10x8)) drf)) + +(dshmi fstp "Floating point store (pair of singles)" + () + "fst.p $rm, $disp10x8, $fpf" + (+ (f-op 46) rm disp10x8 fpf (f-rsvd 0)) + (sequence ((QI f)) + (set f (index-of fpf)) + (set (mem SF (add rm disp10x8)) (reg h-fr f)) + (set (mem SF (add rm (add disp10x8 4))) (reg h-fr (add f 1))))) + +(dshmi fsts "Floating point store (single)" + () + "fst.s $rm, $disp10x4, $frf" + (+ (f-op 45) rm disp10x4 frf (f-rsvd 0)) + (set (mem SF (add rm disp10x4)) frf)) + +(dshmi fstxd "Floating point extended store (double)" + () + "fstx.d $rm, $rn, $drf" + (+ (f-op 15) rm (f-ext 9) rn drf (f-rsvd 0)) + (set (mem DF (add rm rn)) drf)) + +(dshmi fstxp "Floating point extended store (pair of singles)" + () + "fstx.p $rm, $rn, $fpf" + (+ (f-op 15) rm (f-ext 13) rn fpf (f-rsvd 0)) + (sequence ((QI f)) + (set f (index-of fpf)) + (set (mem SF (add rm rn)) (reg h-fr f)) + (set (mem SF (add rm (add rn 4))) (reg h-fr (add f 1))))) + +(dshmi fstxs "Floating point extended store (single)" + () + "fstx.s $rm, $rn, $frf" + (+ (f-op 15) rm (f-ext 8) rn frf (f-rsvd 0)) + (set (mem SF (add rm rn)) frf)) + +(dshmi fsubd "Floating point subtract (double)" + () + "fsub.d $drg, $drh, $drf" + (+ (f-op 13) frg (f-ext 3) frh frf (f-rsvd 0)) + (set drf (c-call DF "sh64_fsubd" drg drh))) + +(dshmi fsubs "Floating point subtract (single)" + () + "fsub.s $frg, $frh, $frf" + (+ (f-op 13) frg (f-ext 2) frh frf (f-rsvd 0)) + (set frf (c-call SF "sh64_fsubs" frg frh))) + +(dshmi ftrcdl "Floating point conversion (double to long)" + () + "ftrc.dl $drgh, $frf" + (+ (f-op 14) drgh (f-ext 11) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_ftrcdl" drgh))) + +(dshmi ftrcsl "Floating point conversion (single to long)" + () + "ftrc.sl $frgh, $frf" + (+ (f-op 14) frgh (f-ext 8) frf (f-rsvd 0)) + (set frf (c-call SF "sh64_ftrcsl" frgh))) + +(dshmi ftrcdq "Floating point conversion (double to quad)" + () + "ftrc.dq $drgh, $drf" + (+ (f-op 14) drgh (f-ext 9) frf (f-rsvd 0)) + (set drf (c-call DF "sh64_ftrcdq" drgh))) + +(dshmi ftrcsq "Floating point conversion (single to quad)" + () + "ftrc.sq $frgh, $drf" + (+ (f-op 14) frgh (f-ext 10) drf (f-rsvd 0)) + (set drf (c-call DF "sh64_ftrcsq" frgh))) + +(dshmi ftrvs "Floating point matrix multiply" + () + "ftrv.s $mtrxg, $fvh, $fvf" + (+ (f-op 5) mtrxg (f-ext 14) fvh fvf (f-rsvd 0)) + (c-call "sh64_ftrvs" (index-of mtrxg) (index-of fvh) (index-of fvf))) + +(dshmi getcfg "Get configuration register" + () + "getcfg $rm, $disp6, $rd" + (+ (f-op 48) rm (f-ext 15) disp6 rd (f-rsvd 0)) + (unimp "getcfg")) + +(dshmi getcon "Get control register" + () + "getcon $crk, $rd" + (+ (f-op 9) crk (f-ext 15) (f-right 63) rd (f-rsvd 0)) + (set rd crk)) + +(dshmi gettr "Get target register" + () + "gettr $trb, $rd" + (+ (f-op 17) (f-25 0) trb (f-ext 5) (f-right 63) rd (f-rsvd 0)) + (set rd trb)) + +(dshmi icbi "Invalidate instruction cache block" + () + "icbi $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 5) disp6x32 (f-dest 63) (f-rsvd 0)) + (unimp "icbi")) + +(dshmi ldb "Load byte" + () + "ld.b $rm, $disp10, $rd" + (+ (f-op 32) rm disp10 rd (f-rsvd 0)) + (set rd (ext DI (mem QI (add rm (ext DI disp10)))))) + +(dshmi ldl "Load long word" + () + "ld.l $rm, $disp10x4, $rd" + (+ (f-op 34) rm disp10x4 rd (f-rsvd 0)) + (set rd (ext DI (mem SI (add rm (ext DI disp10x4)))))) + +(dshmi ldq "Load quad word" + () + "ld.q $rm, $disp10x8, $rd" + (+ (f-op 35) rm disp10x8 rd (f-rsvd 0)) + (set rd (mem DI (add rm (ext DI disp10x8))))) + +(dshmi ldub "Load unsigned byte" + () + "ld.ub $rm, $disp10, $rd" + (+ (f-op 36) rm disp10 rd (f-rsvd 0)) + (set rd (zext DI (mem QI (add rm (ext DI disp10)))))) + +(dshmi lduw "Load unsigned word" + () + "ld.uw $rm, $disp10x2, $rd" + (+ (f-op 44) rm disp10 rd (f-rsvd 0)) + (set rd (zext DI (mem HI (add rm (ext DI disp10x2)))))) + +(dshmi ldw "Load word" + () + "ld.w $rm, $disp10x2, $rd" + (+ (f-op 33) rm disp10 rd (f-rsvd 0)) + (set rd (ext DI (mem HI (add rm (ext DI disp10x2)))))) + +(dshmi ldhil "Load high part (long word)" + () + "ldhi.l $rm, $disp6, $rd" + (+ (f-op 48) rm (f-ext 6) disp6 rd (f-rsvd 0)) + ; FIXME. + (unimp "ldhil")) + +(dshmi ldhiq "Load high part (quad word)" + () + "ldhi.q $rm, $disp6, $rd" + (+ (f-op 48) rm (f-ext 7) disp6 rd (f-rsvd 0)) + ; FIXME. + (unimp "ldhiq")) + +(dshmi ldlol "Load low part (long word)" + () + "ldlo.l $rm, $disp6, $rd" + (+ (f-op 48) rm (f-ext 2) disp6 rd (f-rsvd 0)) + ; FIXME. + (unimp "ldlol")) + +(dshmi ldloq "Load low part (quad word)" + () + "ldlo.q $rm, $disp6, $rd" + (+ (f-op 48) rm (f-ext 3) disp6 rd (f-rsvd 0)) + ; FIXME; + (unimp "ldloq")) + +(dshmi ldxb "Load byte (extended displacement)" + () + "ldx.b $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 0) rn rd (f-rsvd 0)) + (set rd (ext DI (mem QI (add rm rn))))) + +(dshmi ldxl "Load long word (extended displacement)" + () + "ldx.l $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 2) rn rd (f-rsvd 0)) + (set rd (ext DI (mem SI (add rm rn))))) + +(dshmi ldxq "Load quad word (extended displacement)" + () + "ldx.q $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 3) rn rd (f-rsvd 0)) + (set rd (mem DI (add rm rn)))) + +(dshmi ldxub "Load unsigned byte (extended displacement)" + () + "ldx.ub $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 4) rn rd (f-rsvd 0)) + (set rd (zext DI (mem UQI (add rm rn))))) + +(dshmi ldxuw "Load unsigned word (extended displacement)" + () + "ldx.uw $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 5) rn rd (f-rsvd 0)) + (set rd (zext DI (mem UHI (add rm rn))))) + +(dshmi ldxw "Load word (extended displacement)" + () + "ldx.w $rm, $rn, $rd" + (+ (f-op 16) rm (f-ext 1) rn rd (f-rsvd 0)) + (set rd (ext DI (mem HI (add rm rn))))) + + +; Macros to facilitate multimedia instructions. + +(define-pmacro (slice-byte expr) + (sequence ((QI result7) (QI result6) (QI result5) (QI result4) + (QI result3) (QI result2) (QI result1) (QI result0)) + (set result0 (expr (subword QI rm 7) (subword QI rn 7))) + (set result1 (expr (subword QI rm 6) (subword QI rn 6))) + (set result2 (expr (subword QI rm 5) (subword QI rn 5))) + (set result3 (expr (subword QI rm 4) (subword QI rn 4))) + (set result4 (expr (subword QI rm 3) (subword QI rn 3))) + (set result5 (expr (subword QI rm 2) (subword QI rn 2))) + (set result6 (expr (subword QI rm 1) (subword QI rn 1))) + (set result7 (expr (subword QI rm 0) (subword QI rn 0))) + (set rd (-join-qi result7 result6 result5 result4 result3 result2 + result1 result0)))) + +(define-pmacro (slice-word expr) + (sequence ((HI result3) (HI result2) (HI result1) (HI result0)) + (set result0 (expr (subword HI rm 3) (subword HI rn 3))) + (set result1 (expr (subword HI rm 2) (subword HI rn 2))) + (set result2 (expr (subword HI rm 1) (subword HI rn 1))) + (set result3 (expr (subword HI rm 0) (subword HI rn 0))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(define-pmacro (slice-word-unop expr) + (sequence ((HI result3) (HI result2) (HI result1) (HI result0)) + (set result0 (expr (subword HI rm 3))) + (set result1 (expr (subword HI rm 2))) + (set result2 (expr (subword HI rm 1))) + (set result3 (expr (subword HI rm 0))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(define-pmacro (slice-long expr) + (sequence ((SI result1) (SI result0)) + (set result0 (expr (subword SI rm 1) (subword SI rn 1))) + (set result1 (expr (subword SI rm 0) (subword SI rn 0))) + (set rd (-join-si result1 result0)))) + +(define-pmacro (slice-long-unop expr) + (sequence ((SI result1) (SI result0)) + (set result0 (expr (subword SI rm 1))) + (set result1 (expr (subword SI rm 0))) + (set rd (-join-si result1 result0)))) + +; Multimedia instructions. + +(dshmi mabsl "Multimedia absolute value (long word)" + () + "mabs.l $rm, $rd" + (+ (f-op 10) rm (f-ext 10) (f-right 63) rd (f-rsvd 0)) + (slice-long-unop abs)) + +(dshmi mabsw "Multimedia absolute value (word)" + () + "mabs.w $rm, $rd" + (+ (f-op 10) rm (f-ext 9) (f-right 63) rd (f-rsvd 0)) + (slice-word-unop abs)) + +(dshmi maddl "Multimedia add (long word)" + () + "madd.l $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 2) rn rd (f-rsvd 0)) + (slice-long add)) + +(dshmi maddw "Multimedia add (word)" + () + "madd.w $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 1) rn rd (f-rsvd 0)) + (slice-word add)) + +(define-pmacro (-maddsl arg1 arg2) (saturate SI 32 (add arg1 arg2))) +(dshmi maddsl "Multimedia add (saturating, long word)" + () + "madds.l $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 6) rn rd (f-rsvd 0)) + (slice-long -maddsl)) + +(define-pmacro (-maddsub arg1 arg2) (usaturate QI 8 (add arg1 arg2))) +(dshmi maddsub "Multimedia add (saturating, unsigned byte)" + () + "madds.ub $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 4) rn rd (f-rsvd 0)) + (slice-byte -maddsub)) + +(define-pmacro (-maddsw arg1 arg2) (saturate HI 16 (add arg1 arg2))) +(dshmi maddsw "Multimedia add (saturating, word)" + () + "madds.w $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 5) rn rd (f-rsvd 0)) + (slice-word -maddsw)) + +(define-pmacro (-mcmpeq mode arg1 arg2) + (if mode (eq arg1 arg2) (inv mode 0) (const mode 0))) + +(define-pmacro (-mcmpeqb arg1 arg2) (-mcmpeq QI arg1 arg2)) +(dshmi mcmpeqb "Multimedia compare equal (byte)" + () + "mcmpeq.b $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 0) rn rd (f-rsvd 0)) + (slice-byte -mcmpeqb)) + +(define-pmacro (-mcmpeql arg1 arg2) (-mcmpeq SI arg1 arg2)) +(dshmi mcmpeql "Multimedia compare equal (long word)" + () + "mcmpeq.l $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 2) rn rd (f-rsvd 0)) + (slice-long -mcmpeql)) + +(define-pmacro (-mcmpeqw arg1 arg2) (-mcmpeq HI arg1 arg2)) +(dshmi mcmpeqw "Multimedia compare equal (word)" + () + "mcmpeq.w $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 1) rn rd (f-rsvd 0)) + (slice-word -mcmpeqw)) + +(define-pmacro (-mcmpgt mode arg1 arg2) + (if mode (gt arg1 arg2) (inv mode 0) (const mode 0))) +(define-pmacro (-mcmpgtu mode arg1 arg2) + (if mode (gtu arg1 arg2) (inv mode 0) (const mode 0))) + +(define-pmacro (-mcmpgtl arg1 arg2) (-mcmpgt SI arg1 arg2)) +(dshmi mcmpgtl "Multimedia compare greater than (long word)" + () + "mcmpgt.l $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 6) rn rd (f-rsvd 0)) + (slice-long -mcmpgtl)) + +(define-pmacro (-mcmpgtub arg1 arg2) (-mcmpgtu QI arg1 arg2)) +(dshmi mcmpgtub "Multimediate compare unsigned greater than (byte)" + () + "mcmpgt.ub $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 4) rn rd (f-rsvd 0)) + (slice-byte -mcmpgtub)) + +(define-pmacro (-mcmpgtw arg1 arg2) (-mcmpgt HI arg1 arg2)) +(dshmi mcmpgtw "Multimedia compare greater than (word)" + () + "mcmpgt.w $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 5) rn rd (f-rsvd 0)) + (slice-word -mcmpgtw)) + +(dshmi mcmv "Multimedia conditional move" + () + "mcmv $rm, $rn, $rd" + (+ (f-op 18) rm (f-ext 3) rn rd (f-rsvd 0)) + (set rd (or (and rm rn) (and rd (inv rn))))) + +(dshmi mcnvslw "Multimedia convert/saturate (long to word)" + () + "mcnvs.lw $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 13) rn rd (f-rsvd 0)) + (sequence ((HI result3) (HI result2) (HI result1) (HI result0)) + (set result0 (saturate HI 16 (subword SI rm 0))) + (set result1 (saturate HI 16 (subword SI rm 1))) + (set result2 (saturate HI 16 (subword SI rn 0))) + (set result3 (saturate HI 16 (subword SI rn 1))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(dshmi mcnvswb "Multimedia convert/saturate (word to byte)" + () + "mcnvs.wb $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 8) rn rd (f-rsvd 0)) + (sequence ((QI result7) (QI result6) (QI result5) (QI result4) + (QI result3) (QI result2) (QI result1) (QI result0)) + (set result0 (saturate QI 8 (subword HI rm 0))) + (set result1 (saturate QI 8 (subword HI rm 1))) + (set result2 (saturate QI 8 (subword HI rm 2))) + (set result3 (saturate QI 8 (subword HI rm 3))) + (set result4 (saturate QI 8 (subword HI rn 0))) + (set result5 (saturate QI 8 (subword HI rn 1))) + (set result6 (saturate QI 8 (subword HI rn 2))) + (set result7 (saturate QI 8 (subword HI rn 3))) + (set rd (-join-qi result7 result6 result5 result4 + result3 result2 result1 result0)))) + +(dshmi mcnvswub "Multimedia convert/saturate (word to unsigned byte)" + () + "mcnvs.wub $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 12) rn rd (f-rsvd 0)) + (sequence ((QI result7) (QI result6) (QI result5) (QI result4) + (QI result3) (QI result2) (QI result1) (QI result0)) + (set result0 (usaturate QI 8 (subword HI rm 0))) + (set result1 (usaturate QI 8 (subword HI rm 1))) + (set result2 (usaturate QI 8 (subword HI rm 2))) + (set result3 (usaturate QI 8 (subword HI rm 3))) + (set result4 (usaturate QI 8 (subword HI rn 0))) + (set result5 (usaturate QI 8 (subword HI rn 1))) + (set result6 (usaturate QI 8 (subword HI rn 2))) + (set result7 (usaturate QI 8 (subword HI rn 3))) + (set rd (-join-qi result7 result6 result5 result4 result3 + result2 result1 result0)))) + +; mexter -- generate an mexterN instruction, where: +; op = primary opcode +; extop = extended opcode + +(define-pmacro (make-mextr n op extop) + (dshmi (.sym mextr n) + (.str "Multimedia extract 64-bit slice (from byte " n ")") + () + (.str "mextr" n " $rm, $rn, $rd") + (+ (f-op op) rm (f-ext extop) rn rd (f-rsvd 0)) + (sequence ((QI count) (DI mask) (DI rhs)) + (set count (mul QI 8 (sub QI 8 n))) + (set mask (sll DI (inv 0) count)) + (set rhs (srl (and rm mask) count)) + (set count (mul QI 8 n)) + (set mask (srl DI (inv 0) count)) + (set rd (or DI rhs (sll DI (and rn mask) count)))))) + +(make-mextr 1 10 7) +(make-mextr 2 10 11) +(make-mextr 3 10 15) +(make-mextr 4 11 3) +(make-mextr 5 11 7) +(make-mextr 6 11 11) +(make-mextr 7 11 15) + +(dshmi mmacfxwl "Multimedia fractional multiply (word to long)" + () + "mmacfx.wl $rm, $rn, $rd" + (+ (f-op 18) rm (f-ext 1) rn rd (f-rsvd 0)) + (sequence ((SI temp) (SI result1) (SI result0)) + (set result0 (subword SI rd 0)) + (set result1 (subword SI rd 1)) + (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set temp (saturate SI 32 (sll temp 1))) + (set result0 (saturate SI 32 (add result0 temp))) + (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))) + (set temp (saturate SI 32 (sll temp 1))) + (set result1 (saturate SI 32 (add result1 temp))) + (set rd (-join-si result1 result0)))) + +(dshmi mmacnfx.wl "Multimedia fractional multiple (word to long)" + () + "mmacnfx.wl $rm, $rn, $rd" + (+ (f-op 18) rn (f-ext 5) rn rd (f-rsvd 0)) + (sequence ((SI temp) (SI result1) (SI result0)) + (set result0 (subword SI rd 0)) + (set result1 (subword SI rd 1)) + (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set temp (saturate SI 32 (sll temp 1))) + (set result0 (saturate SI 32 (sub result0 temp))) + (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))) + (set temp (saturate SI 32 (sll temp 1))) + (set result1 (saturate SI 32 (sub result1 temp))) + (set rd (-join-si result1 result0)))) + +(dshmi mmull "Multimedia multiply (long word)" + () + "mmul.l $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 2) rn rd (f-rsvd 0)) + (slice-long mul)) + +(dshmi mmulw "Multimedia multiply (word)" + () + "mmul.w $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 1) rn rd (f-rsvd 0)) + (slice-word mul)) + +(dshmi mmulfxl "Multimedia fractional multiply (long word)" + () + "mmulfx.l $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 6) rn rd (f-rsvd 0)) + (sequence ((DI temp) (SI result0) (SI result1)) + (set temp (mul (zext DI (subword SI rm 0)) (zext DI (subword SI rn 0)))) + (set result0 (saturate SI 32 (sra temp 31))) + (set temp (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1)))) + (set result1 (saturate SI 32 (sra temp 31))) + (set rd (-join-si result1 result0)))) + +(dshmi mmulfxw "Multimedia fractional multiply (word)" + () + "mmulfx.w $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 5) rn rd (f-rsvd 0)) + (sequence ((SI temp) (HI result0) (HI result1) (HI result2) (HI result3)) + (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set result0 (saturate HI 16 (sra temp 15))) + (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))) + (set result1 (saturate HI 16 (sra temp 15))) + (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))) + (set result2 (saturate HI 16 (sra temp 15))) + (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))) + (set result3 (saturate HI 16 (sra temp 15))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(dshmi mmulfxrpw "Multimedia fractional multiply round positive (word op)" + () + "mmulfxrp.w $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 9) rn rd (f-rsvd 0)) + (sequence ((SI temp) (HI result0) (HI result1) (HI result2) (HI result3) (HI c)) + (set c (sll 1 14)) + (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set result0 (saturate HI 16 (sra (add temp c) 15))) + (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))) + (set result1 (saturate HI 16 (sra (add temp c) 15))) + (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))) + (set result2 (saturate HI 16 (sra (add temp c) 15))) + (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))) + (set result3 (saturate HI 16 (sra (add temp c) 15))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(dshmi mmulhiwl "Multimedia multiply higher halves (word to long)" + () + "mmulhi.wl $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 14) rn rd (f-rsvd 0)) + (sequence ((SI result1) (SI result0)) + (set result0 (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))) + (set result1 (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))) + (set rd (-join-si result1 result0)))) + +(dshmi mmullowl "Multimedia multiply lower halves (word to long)" + () + "mmullo.wl $rm, $rn, $rd" + (+ (f-op 19) rm (f-ext 10) rn rd (f-rsvd 0)) + (sequence ((SI result1) (SI result0)) + (set result0 (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set result1 (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))) + (set rd (-join-si result1 result0)))) + +(dshmi mmulsumwq "Multimedia multiply and accumulate (word to quad)" + () + "mmulsum.wq $rm, $rn, $rd" + (+ (f-op 18) rm (f-ext 9) rn rd (f-rsvd 0)) + (sequence ((DI acc)) + (set acc (mul SI (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0)))) + (set acc (add acc (mul SI (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))) + (set acc (add acc (mul SI (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))) + (set acc (add acc (mul SI (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))) + (set rd (add rd acc)))) + +(dshmi movi "Move immediate" + () + "movi $imm16, $rd" + (+ (f-op 51) imm16 rd (f-rsvd 0)) + (set rd (ext DI imm16))) + +(dshmi mpermw "Multimedia permutate word" + () + "mperm.w $rm, $rn, $rd" + (+ (f-op 10) rm (f-ext 13) rn rd (f-rsvd 0)) + (sequence ((QI control) (HI result3) (HI result2) (HI result1) (HI result0)) + (set control (and QI rn #x3f)) + (set result0 (subword HI rm (sub 3 (and control 3)))) + (set result1 (subword HI rm (sub 3 (and (srl control 2) 3)))) + (set result2 (subword HI rm (sub 3 (and (srl control 4) 3)))) + (set result3 (subword HI rm (sub 3 (and (srl control 6) 3)))) + (set rd (-join-hi result3 result2 result1 result0)))) + +(dshmi msadubq "Multimedia absolute difference (byte)" + () + "msad.ubq $rm, $rn, $rd" + (+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0)) + (sequence ((DI acc)) + (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 1)))) + (set acc (add DI acc (abs (sub (subword QI rm 1) (subword QI rn 1))))) + (set acc (add DI acc (abs (sub (subword QI rm 2) (subword QI rn 2))))) + (set acc (add DI acc (abs (sub (subword QI rm 3) (subword QI rn 3))))) + (set acc (add DI acc (abs (sub (subword QI rm 4) (subword QI rn 4))))) + (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5))))) + (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6))))) + (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7))))) + (set rd (add rd acc)))) + +(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll arg (and rn 31)))) +(dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)" + () + "mshalds.l $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 6) rn rd (f-rsvd 0)) + (slice-long-unop -mshaldsl)) + +(define-pmacro (-mshaldsw arg) (saturate HI 16 (sll arg (and rn 15)))) +(dshmi mshaldsw "Multimedia saturating arithmetic left shift (word)" + () + "mshalds.w $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 5) rn rd (f-rsvd 0)) + (slice-word-unop -mshaldsw)) + +(define-pmacro (-mshardl arg) (sra arg (and rn 31))) +(dshmi mshardl "Multimedia arithmetic right shift (long)" + () + "mshard.l $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 10) rn rd (f-rsvd 0)) + (slice-long-unop -mshardl)) + +(define-pmacro (-mshardw arg) (sra arg (and rn 15))) +(dshmi mshardw "Multimedia arithmetic right shift (word)" + () + "mshard.w $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 9) rn rd (f-rsvd 0)) + (slice-word-unop -mshardw)) + +(dshmi mshardsq "Multimedia saturating arithmetic right shift (quad word)" + () + "mshards.q $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 11) rn rd (f-rsvd 0)) + (set rd (saturate DI 16 (sra rm (and rn 63))))) + +(dshmi mshfhib "Multimedia shuffle higher-half (byte)" + () + "mshfhi.b $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 4) rn rd (f-rsvd 0)) + (sequence ((QI result7) (QI result6) (QI result5) (QI result4) + (QI result3) (QI result2) (QI result1) (QI result0)) + (set result0 (subword QI rm 4)) + (set result1 (subword QI rn 4)) + (set result2 (subword QI rm 5)) + (set result3 (subword QI rn 5)) + (set result4 (subword QI rm 6)) + (set result5 (subword QI rn 6)) + (set result6 (subword QI rm 7)) + (set result7 (subword QI rn 7)) + (set rd (-join-qi result7 result6 result5 result4 result3 + result2 result1 result0)))) + +(dshmi mshfhil "Multimedia shuffle higher-half (long)" + () + "mshfhi.l $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 6) rn rd (f-rsvd 0)) + (sequence ((SI result1) (SI result0)) + (set result0 (subword SI rm 1)) + (set result1 (subword SI rn 1)) + (set rd (-join-si result1 result0)))) + +(dshmi mshfhiw "Multimedia shuffle higher-half (word)" + () + "mshfhi.w $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 5) rn rd (f-rsvd 0)) + (sequence ((HI result3) (HI result2) (HI result1) (HI result0)) + (set result0 (subword HI rm 2)) + (set result1 (subword HI rn 2)) + (set result2 (subword HI rm 3)) + (set result3 (subword HI rn 3)) + (set rd (-join-hi result3 result2 result1 result0)))) + +(dshmi mshflob "Multimedia shuffle lower-half (byte)" + () + "mshflo.b $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 0) rn rd (f-rsvd 0)) + (sequence ((QI result7) (QI result6) (QI result5) (QI result4) + (QI result3) (QI result2) (QI result1) (QI result0)) + (set result0 (subword QI rm 0)) + (set result1 (subword QI rn 0)) + (set result2 (subword QI rm 1)) + (set result3 (subword QI rn 1)) + (set result4 (subword QI rm 2)) + (set result5 (subword QI rn 2)) + (set result6 (subword QI rm 3)) + (set result7 (subword QI rn 3)) + (set rd (-join-qi result7 result6 result5 result4 result3 + result2 result1 result0)))) + +(dshmi mshflol "Multimedia shuffle lower-half (long)" + () + "mshflo.l $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 2) rn rd (f-rsvd 0)) + (sequence ((SI result1) (SI result0)) + (set result0 (subword SI rm 0)) + (set result1 (subword SI rn 0)) + (set rd (-join-si result1 result0)))) + +(dshmi mshflow "Multimedia shuffle lower-half (word)" + () + "mshflo.w $rm, $rn, $rd" + (+ (f-op 11) rm (f-ext 1) rn rd (f-rsvd 0)) + (sequence ((HI result3) (HI result2) (HI result1) (HI result0)) + (set result0 (subword HI rm 0)) + (set result1 (subword HI rn 0)) + (set result2 (subword HI rm 1)) + (set result3 (subword HI rn 1)) + (set rd (-join-hi result3 result2 result1 result0)))) + +(define-pmacro (-mshlldl arg) (sll arg (and rn 31))) +(dshmi mshlldl "Multimedia logical left shift (long word)" + () + "mshlld.l $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 2) rn rd (f-rsvd 0)) + (slice-long-unop -mshlldl)) + +(define-pmacro (-mshlldw arg) (sll arg (and rn 15))) +(dshmi mshlldw "Multimedia logical left shift (word)" + () + "mshlld.w $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 1) rn rd (f-rsvd 0)) + (slice-word-unop -mshlldw)) + +(define-pmacro (-mshlrdl arg) (srl arg (and rn 31))) +(dshmi mshlrdl "Multimedia logical right shift (long word)" + () + "mshlrd.l $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 14) rn rd (f-rsvd 0)) + (slice-long-unop -mshlrdl)) + +(define-pmacro (-mshlrdw arg) (srl arg (and rn 15))) +(dshmi mshlrdw "Multimedia logical right shift (word)" + () + "mshlrd.w $rm, $rn, $rd" + (+ (f-op 3) rm (f-ext 13) rn rd (f-rsvd 0)) + (slice-word-unop -mshlrdw)) + +(dshmi msubl "Multimedia subtract (long word)" + () + "msub.l $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 10) rn rd (f-rsvd 0)) + (slice-long sub)) + +(dshmi msubw "Multimedia add (word)" + () + "msub.w $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 9) rn rd (f-rsvd 0)) + (slice-word sub)) + +(define-pmacro (-msubsl arg1 arg2) (saturate SI 32 (sub arg1 arg2))) +(dshmi msubsl "Multimedia subtract (saturating long)" + () + "msubs.l $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 14) rn rd (f-rsvd 0)) + (slice-long -msubsl)) + +(define-pmacro (-msubsub arg1 arg2) (usaturate QI 8 (sub arg1 arg2))) +(dshmi msubsub "Multimedia subtract (saturating byte)" + () + "msubs.ub $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 12) rn rd (f-rsvd 0)) + (slice-byte -msubsub)) + +(define-pmacro (-msubsw arg1 arg2) (saturate HI 16 (sub arg1 arg2))) +(dshmi msubsw "Multimedia subtract (saturating word)" + () + "msubs.w $rm, $rn, $rd" + (+ (f-op 2) rm (f-ext 13) rn rd (f-rsvd 0)) + (slice-byte -msubsw)) + +(dshmi mulsl "Multiply signed long" + () + "muls.l $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 14) rn rd (f-rsvd 0)) + (set rd (mul (ext DI (subword SI rm 1)) (ext DI (subword SI rn 1))))) + +(dshmi mulul "Multiply unsigned long" + () + "mulu.l $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 14) rn rd (f-rsvd 0)) + (set rd (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1))))) + +(dshmi nop "No operation" + () + "nop" + (+ (f-op 27) (f-left 63) (f-ext 0) (f-right 63) (f-dest 63) (f-rsvd 0)) + (nop)) + +(dshmi nsb "Number of consecutive sign bits" + () + "nsb $rm, $rd" + (+ (f-op 0) rm (f-ext 13) (f-right 63) rd (f-rsvd 0)) + ; Semantics requires a loop construct, so punt to C. + (set rd (c-call DI "sh64_nsb" rm))) + +(dshmi ocbi "Invalidate operand cache block" + () + "ocbi $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 9) disp6x32 (f-dest 63) (f-rsvd 0)) + (unimp "ocbi")) + +(dshmi ocbp "Purge operand cache block" + () + "ocbp $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 8) disp6x32 (f-dest 63) (f-rsvd 0)) + (unimp "ocbp")) + +(dshmi ocbwb "Write-back operand cache block" + () + "ocbwb $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 12) disp6x32 (f-dest 63) (f-rsvd 0)) + (unimp "ocbwb")) + +(dshmi or "OR" + () + "or $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 9) rn rd (f-rsvd 0)) + (set rd (or rm rn))) + +(dshmi ori "OR immediate" + () + "ori $rm, $imm10, $rd" + (+ (f-op 55) rm imm10 rd (f-rsvd 0)) + (set rd (or rm (ext DI imm10)))) + +(dshmi prefi "Prefetch instruction" + () + "prefi $rm, $disp6x32" + (+ (f-op 56) rm (f-ext 1) disp6x32 (f-right 63) (f-rsvd 0)) + (unimp "prefi")) + +(dshmi pta "Prepare target register for SHmedia target" + () + "pta$likely $disp16, $tra" + (+ (f-op 58) disp16 likely (f-8-2 0) tra (f-rsvd 0)) + (set tra (add disp16 1))) + +(dshmi ptabs "Prepare target register with absolute value from register" + () + "ptabs$likely $rn, $tra" + (+ (f-op 26) (f-left 63) (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0)) + (set tra rn)) + +(dshmi ptb "Prepare target register for SHcompact target" + () + "ptb$likely $disp16, $tra" + (+ (f-op 59) disp16 likely (f-8-2 0) tra (f-rsvd 0)) + (set tra disp16)) + +(dshmi ptrel "Prepare target register with relative value from register" + () + "ptrel$likely $rn, $tra" + (+ (f-op 26) (f-left 63) (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0)) + (set tra (add pc rn))) + +(dshmi putcfg "Put configuration register" + () + "putcfg $rm, $disp6, $rd" + (+ (f-op 56) rm (f-ext 15) disp6 rd (f-rsvd 0)) + (unimp "putcfg")) + +(dshmi putcon "Put control register" + () + "putcon $rm, $crj" + (+ (f-op 27) rm (f-ext 15) (f-right 63) crj (f-rsvd 0)) + (set crj rm)) + +(dshmi rte "Return from exception" + () + "rte" + (+ (f-op 27) (f-left 63) (f-ext 3) (f-right 63) (f-dest 63) (f-rsvd 0)) + (unimp "rte")) + +(dshmi shard "Arithmetic right shift" + () + "shard $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 7) rn rd (f-rsvd 0)) + (set rd (sra rm (and rn 63)))) + +(dshmi shardl "Arithmetic right shift (long word)" + () + "shard.l $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 6) rn rd (f-rsvd 0)) + (set rd (ext DI (sra (subword SI rm 1) (and rn 63))))) + +(dshmi shari "Arithmetic right shift (immediate count)" + () + "shari $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 7) uimm6 rd (f-rsvd 0)) + (set rd (sra rm uimm6))) + +(dshmi sharil "Arithmetic right shift (long word, immediate count)" + () + "shari.l $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 6) uimm6 rd (f-rsvd 0)) + (set rd (ext DI (sra (subword SI rm 1) (and uimm6 63))))) + +(dshmi shlld "Logical left shift" + () + "shlld $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 1) rn rd (f-rsvd 0)) + (set rd (sll rm (and rn 63)))) + +(dshmi shlldl "Logical left shift (long word)" + () + "shlld.l $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 0) rn rd (f-rsvd 0)) + (set rd (ext DI (sll (subword SI rm 1) (and rn 63))))) + +(dshmi shlli "Logical left shift (immediate count)" + () + "shlli $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 1) uimm6 rd (f-rsvd 0)) + (set rd (sll rm uimm6))) + +(dshmi shllil "Logical left shift (long word, immediate count)" + () + "shlli.l $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 0) uimm6 rd (f-rsvd 0)) + (set rd (ext DI (sll (subword SI rm 1) (and uimm6 63))))) + +(dshmi shlrd "Logical right shift" + () + "shlrd $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 3) rn rd (f-rsvd 0)) + (set rd (srl rm (and rn 63)))) + +(dshmi shlrdl "Logical right shift (long word)" + () + "shlrd.l $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 2) rn rd (f-rsvd 0)) + (set rd (ext DI (srl (subword SI rm 1) (and rn 63))))) + +(dshmi shlri "Logical right shift (immediate count)" + () + "shlri $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 3) uimm6 rd (f-rsvd 0)) + (set rd (srl rm uimm6))) + +(dshmi shlril "Logical right shift (long word, immediate count)" + () + "shlri.l $rm, $uimm6, $rd" + (+ (f-op 49) rm (f-ext 2) uimm6 rd (f-rsvd 0)) + (set rd (ext DI (srl (subword SI rm 1) (and uimm6 63))))) + +(dshmi shori "Shift-or immediate" + () + "shori $uimm16, $rd" + (+ (f-op 50) uimm16 rd (f-rsvd 0)) + (set rd (or (sll rd 16) (zext DI uimm16)))) + +(dshmi sleep "Sleep" + () + "sleep" + (+ (f-op 27) (f-left 63) (f-ext 7) (f-right 63) (f-dest 63) (f-rsvd 0)) + (unimp "sleep")) + +(dshmi stb "Store byte" + () + "st.b $rm, $disp10, $rd" + (+ (f-op 40) rm disp10 rd (f-rsvd 0)) + (set (mem UQI (add rm (ext DI disp10))) (and QI rd #xff))) + +(dshmi stl "Store long word" + () + "st.l $rm, $disp10x4, $rd" + (+ (f-op 42) rm disp10x4 rd (f-rsvd 0)) + (set (mem SI (add rm (ext DI disp10x4))) (and SI rd #xffffffff))) + +(dshmi stq "Store quad word" + () + "st.q $rm, $disp10x8, $rd" + (+ (f-op 43) rm disp10x8 rd (f-rsvd 0)) + (set (mem DI (add rm (ext DI disp10x8))) rd)) + +(dshmi stw "Store word" + () + "st.w $rm, $disp10x2, $rd" + (+ (f-op 41) rm disp10x2 rd (f-rsvd 0)) + (set (mem HI (add rm (ext DI disp10x2))) (and HI rd #xffff))) + +(define-pmacro (-sthi-byte) + (sequence () + (set (mem UQI addr) (and QI val #xff)) + (set val (srl val 8)) + (set addr (add addr 1)))) + +(dshmi sthil "Store high part (long word)" + () + "sthi.l $rm, $disp6, $rd" + (+ (f-op 56) rm (f-ext 6) disp6 rd (f-rsvd 0)) + (sequence ((DI addr) (QI bytecount) (DI val)) + (set addr (add rm disp6)) + (set bytecount (add (and addr 3) 1)) + (if endian + (set val rd) + (set val (srl rd (sub 32 (mul 8 bytecount))))) + (set addr (add (sub addr bytecount) 1)) + (if (gt bytecount 3) + (-sthi-byte)) + (if (gt bytecount 2) + (-sthi-byte)) + (if (gt bytecount 1) + (-sthi-byte)) + (if (gt bytecount 0) + (-sthi-byte)))) + +(dshmi sthiq "Store high part (quad word)" + () + "sthi.q $rm, $disp6, $rd" + (+ (f-op 56) rm (f-ext 7) disp6 rd (f-rsvd 0)) + (sequence ((DI addr) (QI bytecount) (DI val)) + (set addr (add rm disp6)) + (set bytecount (add (and addr 7) 1)) + (if endian + (set val rd) + (set val (srl rd (sub 64 (mul 8 bytecount))))) + (set addr (add (sub addr bytecount) 1)) + (if (gt bytecount 7) + (-sthi-byte)) + (if (gt bytecount 6) + (-sthi-byte)) + (if (gt bytecount 5) + (-sthi-byte)) + (if (gt bytecount 4) + (-sthi-byte)) + (if (gt bytecount 3) + (-sthi-byte)) + (if (gt bytecount 2) + (-sthi-byte)) + (if (gt bytecount 1) + (-sthi-byte)) + (if (gt bytecount 0) + (-sthi-byte)))) + +(dshmi stlol "Store low part (long word)" + () + "stlo.l $rm, $disp6, $rd" + (+ (f-op 56) rm (f-ext 2) disp6 rd (f-rsvd 0)) + ; FIXME. + (unimp "stlol")) + +(dshmi stloq "Store low part (quad word)" + () + "stlo.q $rm, $disp6, $rd" + (+ (f-op 56) rm (f-ext 3) disp6 rd (f-rsvd 0)) + ; FIXME. + (unimp "stloq")) + +(dshmi stxb "Store byte (extended displacement)" + () + "stx.b $rm, $rn, $rd" + (+ (f-op 24) rm (f-ext 0) rn rd (f-rsvd 0)) + (set (mem UQI (add rm rn)) (subword QI rd 7))) + +(dshmi stxl "Store long (extended displacement)" + () + "stx.l $rm, $rn, $rd" + (+ (f-op 24) rm (f-ext 2) rn rd (f-rsvd 0)) + (set (mem SI (add rm rn)) (subword SI rd 1))) + +(dshmi stxq "Store quad word (extended displacement)" + () + "stx.q $rm, $rn, $rd" + (+ (f-op 24) rm (f-ext 3) rn rd (f-rsvd 0)) + (set (mem DI (add rm rn)) rd)) + +(dshmi stxw "Store word (extended displacement)" + () + "stx.w $rm, $rn, $rd" + (+ (f-op 24) rm (f-ext 1) rn rd (f-rsvd 0)) + (set (mem HI (add rm rn)) (subword HI rd 3))) + +(dshmi sub "Subtract" + () + "sub $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 11) rn rd (f-rsvd 0)) + (set rd (sub rm rn))) + +(dshmi subl "Subtract long" + () + "sub.l $rm, $rn, $rd" + (+ (f-op 0) rm (f-ext 10) rn rd (f-rsvd 0)) + (set rd (ext DI (sub (subword SI rm 1) (subword SI rn 1))))) + +(dshmi swapq "Swap quad words" + () + "swap.q $rm, $rn, $rd" + (+ (f-op 8) rm (f-ext 3) rn rd (f-rsvd 0)) + (sequence ((DI addr) (DI temp)) + (set addr (add rm rn)) + (set temp (mem DI addr)) + (set (mem DI addr) rd) + (set rd temp))) + +(dshmi synci "Synchronise instruction fetch" + () + "synci" + (+ (f-op 27) (f-left 63) (f-ext 2) (f-right 63) (f-dest 63) (f-rsvd 0)) + (unimp "synci")) + +(dshmi synco "Synchronise data operations" + () + "synco" + (+ (f-op 27) (f-left 63) (f-ext 6) (f-right 63) (f-dest 63) (f-rsvd 0)) + (unimp "synco")) + +(dshmi trapa "Trap" + () + "trapa $rm" + (+ (f-op 27) rm (f-ext 1) (f-right 63) (f-dest 63) (f-rsvd 0)) + (c-call "sh64_trapa" rm pc)) + +(dshmi xor "Exclusive OR" + () + "xor $rm, $rn, $rd" + (+ (f-op 1) rm (f-ext 13) rn rd (f-rsvd 0)) + (set rd (xor rm rn))) + +(dshmi xori "Exclusive OR immediate" + () + "xori $rm, $imm6, $rd" + (+ (f-op 49) rm (f-ext 13) rn rd (f-rsvd 0)) + (set rd (xor rm (ext DI imm6)))) diff -uprN binutils-2.14.90.0.8/gas/ChangeLog binutils-2.15.90.0.1/gas/ChangeLog --- binutils-2.14.90.0.8/gas/ChangeLog 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,296 @@ +2004-03-03 H.J. Lu + + * config/tc-ia64.c (dot_align): New. + (ia64_do_align): Make it static. + (md_pseudo_table): Use "dot_align" for "align". + (ia64_md_do_align): Don't set align_frag here. + (ia64_handle_align): Add a stop bit to the previous bundle if + needed. + + * config/tc-ia64.h (ia64_do_align): Removed. + +2003-03-03 Andrew Stubbs + + * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and + -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. + (sh_elf_final_processing): Output BFD type sh4_nofpu if that is + the most general type or the user specifically requested it. + (md_assemble): Add a new error message for when an instruction + is understood, but is not allowed due to an -isa option. + +2004-03-02 H.J. Lu + + * config/tc-ia64.c (align_frag): New. + (md_assemble): Set the tc_frag_data field in align_frag for + IA64_OPCODE_FIRST instructions. + (ia64_md_do_align): Set align_frag. + (ia64_handle_align): Add a stop bit if needed. + + * config/tc-ia64.h (TC_FRAG_TYPE): New. + (TC_FRAG_INIT): New. + +2004-03-01 Richard Sandiford + + * config/tc-frv.c (fr400_audio): New variable. + (md_parse_option, md_show_usage): Add -mcpu=fr405 and -mcpu=fr450. + (md_parse_option): Set fr400_audio for -mcpu=fr400 and -mcpu=fr405. + (target_implements_insn_p): New function. + (md_assemble): Report an error if the processor doesn't implement + the instruction. + +2004-02-27 Kazuhiro Inaoka + + * config/tc-m32r.c (md_longopts): Added -no-bitinst option. + (md_parse_option): Ditto. + (OPTION_NO_SPECIAL_M32R): Added. + (md_show_usage): Document it. + (enable_speial_m32r): Changed a default value from 0 to 1. + * doc/c-m32r.texi: Document the -no-bitinst option. + +2004-02-27 Nick Clifton + + * config/tc-sh.c (get_operand): Revert previous delta. + (tc_gen_reloc): Check for an unknown reloc type before processing + the addend. + +2004-02-27 Hannes Reinecke + + * config/tc-s390.c (s390_insn): Correct range check for opcode in + .insn pseudo operation. + +2004-02-27 Anil Paranjpe + + * config/tc-sh.c (get_operand): In case of #Imm, check has been + added for wrong syntax. + +2004-02-26 Eric Christopher + + * config/tc-mips.c (mips_dwarf2_addr_size): New. + * config/tc-mips.h (DWARF2_ADDR_SIZE): Use. + +2004-02-26 Andrew Stubbs + + * config/tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01 + nibble types to assembler. + +2004-02-25 Fred Fish + + * config/tc-iq2000.c: Add missing \n\ in multiline string literal. + +2004-02-20 James E Wilson + + * config/tc-ia64.c (slot_index): New arg before_relax. Use instead of + finalize_syms. + (fixup_unw_records): New arg before_relax. Pass to slot_index. + (ia64_estimate_size_before_relax): New. + (ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment. + (generate_unwind_image): Pass 1 to fixup_unw_records. + * config/tc-ia64.h (ia64_estimate_size_before_relax): Declare. + (md_estimate_size_before_relax): Call ia64_estimate_size_before_relax. + +2004-02-19 Jakub Jelinek + + * stabs.c (generate_asm_file): Avoid warning about use of + uninitialized variable. + +2004-02-18 David Mosberger + + * config/tc-ia64.c (ia64_flush_insns): In addition to prologue, + body, and endp, allow unwind records which do not have a "t" + (time/instruction) field. + +2004-02-17 Petko Manolov + + * config/tc-arm.c (do_mav_dspsc_1): Correct offset of CRn. + (do_mav_dspsc_2): Likewise. + Fix accumulator registers move opcodes. + +2004-02-13 Hannes Reinecke + Jakub Jelinek + + * dwarf2dbg.c (get_filenum): Do not read beyond allocated memory. + +2004-02-10 Steve Ellcey + + * config/tc-ia64.h (ia64_frob_symbol): New declaration. + (tc_frob_symbol): New macro definition. + * config/tc-ia64.c (ia64_frob_symbol): New routine. + +2004-02-09 Daniel Jacobowitz + + * config/tc-arm.c (md_begin): Mark .note.gnu.arm.ident as + read-only. + +2004-02-09 Nathan Sidwell + + * read.h (IGNORE_OPCODE_CASE): Do not define. Replace with ... + (TC_CASE_SENSITIVE): ... this. + * read.c: Replace IGNORE_OPCODE_CASE with TC_CASE_SENSITIVE. + * doc/internals.texi (TC_CASE_SENSITIVE): Document. + +2004-02-06 James E Wilson + + * config/tc-ia64.c (dot_endp): Delete call to output_endp. + (generate_unwind_image): Re-add it here. + +2004-02-06 Nathan Sidwell + + * dwarf2dbg.c (DWARF2_ADDR_SIZE): Remove trailing ';' + * read.h (SKIP_WHITESPACE): Turn into an expression. + * read.c (read_a_source_file): A pseudo is removed by having a + NULL handler. + +2004-02-05 James E Wilson + + * config/tc-ia64.c (output_endp): New. + (count_bits): Delete. + (ia64_flush_insns, process_one_record, optimize_unw_records): Handle + endp unwind records. + (fixup_unw_records): Handle endp unwind records. Delete code for + shortening prologue regions not followed by a body record. + (dot_endp): Call add_unwind_entry to emit endp unwind record. + * config/tc-ia64.h (unw_record_type): Add endp. + +2004-02-03 James E Wilson + + * config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to + fill padding bytes with zeroes. + (emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that + sets unwind_record slot_number and slot_frag fields. + +2004-02-02 Maciej W. Rozycki + + * config/tc-mips.c (add_got_offset_hilo): New function. + (macro): Use load_register() and add_got_offset_hilo() to load + constants instead of hardcoding code sequences throughout. + +2004-01-28 H.J. Lu + + * config/tc-ia64.c (emit_one_bundle): Add proper indentation. + +2004-01-26 Bernardo Innocenti + + * config/tc-m68k.h (EXTERN_FORCE_RELOC): Handle m68k-uclinux specially, + like m68k-elf. + * config/tc-m68k.c (RELAXABLE_SYMBOL): Use EXTERN_FORCE_RELOC instead + of hard-coded test for TARGET_OS=elf. + +2004-01-24 Chris Demetriou + + * config/tc-mips.c (hilo_interlocks): Change definition + so that MIPS32, MIPS64 and later ISAs are included, along with + the already-included machines. Update comments. + +2004-01-23 Daniel Jacobowitz + + * config/tc-arm.c (tc_gen_reloc): Improve error message for + undefined local labels. + +2004-01-23 Richard Sandiford + + * config/tc-mips.c (load_address, macro): Update comments about + NewABI GP relaxation. + +2004-01-23 Richard Sandiford + + * config/tc-mips.c (macro_build): Remove place and counter arguments. + (mips_build_lui, macro_build_ldst_constoffset): Likewise. + (mips16_macro_build, macro_build_jalr): Remove counter argument. + (set_at, load_register, load_address, move_register): Likewise. + (load_got_offset, add_got_offset): Likewise. + Update all calls and tidy accordingly. + +2004-01-23 Richard Sandiford + + * config/tc-mips.c (RELAX_ENCODE): Remove WARN argument. + (RELAX_FIRST, RELAX_SECOND): Turn into 8-bit quantities. + (RELAX_USE_SECOND): Bump to 0x10000. + (RELAX_SECOND_LONGER, RELAX_NOMACRO, RELAX_DELAY_SLOT): New flags. + (mips_macro_warning): New variable. + (md_assemble): Wrap macro expansion in macro_start() and macro_end(). + (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise. + (relax_close_frag): Set mips_macro_warning.first_frag. Adjust use + of RELAX_ENCODE. + (append_insn): Update mips_macro_warning.sizes. + (macro_start, macro_warning, macro_end): New functions. + (macro_build): Don't emit warnings here. + (macro_build_lui, md_estimate_size_before_relax): ...or here. + (md_convert_frag): Check for cases where one macro alternative + needs a warning and the other doesn't. Emit a warning if the + longer sequence was chosen. + +2004-01-23 Richard Sandiford + + * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): Remove. + * config/tc-mips.c (RELAX_ENCODE): Take three arguments: the size of + the first sequence, the size of the second sequence, and a flag + that says whether we should warn. + (RELAX_OLD, RELAX_NEW, RELAX_RELOC[123]): Delete. + (RELAX_FIRST, RELAX_SECOND): New. + (mips_relax): New variable. + (relax_close_frag, relax_start, relax_switch, relax_end): New fns. + (append_insn): Remove "place" argument. Use mips_relax.sequence + rather than "place" to check whether we're expanding the second + alternative of a relaxable macro. Remove redundant check for + branch relaxation. If generating a normal insn, and there + is not enough room in the current frag, call relax_close_frag() + to close it. Update mips_relax.sizes[]. Emit fixups for the + second version of a relaxable macro. Record the first relaxable + fixup in mips_relax. Remove tc_gen_reloc workaround. + (macro_build): Remove all uses of "place". Use mips_relax.sequence + in the same way as in append_insn. + (mips16_macro_build): Remove "place" argument. + (macro_build_lui): As for macro_build. Don't drop the add_symbol + when generating the second version of a relaxable macro. + (load_got_offset, add_got_offset): New functions. + (load_address, macro): Use new relaxation machinery. Remove + tc_gen_reloc workarounds. + (md_estimate_size_before_relax): Set RELAX_USE_SECOND if the second + version of a relaxable macro is needed. Return -RELAX_SECOND if the + first version is needed. + (tc_gen_reloc): Remove relaxation handling. + (md_convert_frag): Go through the fixups for a relaxable macro and + mark those that belong to the unneeded alternative as done. If the + second alternative is needed, adjust the fixup addresses to account + for the deleted first alternative. + +2004-01-23 Richard Sandiford + + * frags.h (frag_room): Declare. + * frags.c (frag_room): New function. + * doc/internals.texi: Document it. + +2004-01-22 Thiemo Seufer + + * config/tc-mips.c (append_insn): Don't do r3900 interlock + optimization for -mtune=r3900, as this will break on other CPUs. + +2004-01-11 Tom Rix + + * config/tc-m68hc11.c (build_indexed_byte): movb and movw cannot + be relaxed, use fixup. + (md_apply_fix3): Use 5 bit reloc from movb and movw fixup. + +2004-01-19 Jakub Jelinek + + * config/tc-sparc.c (sparc_ip): Disallow %f32-%f63 for single + precision operands. + +2004-01-14 Maciej W. Rozycki + + * config/tc-mips.c (append_insn): Properly detect variant frags + that preclude swapping of relaxed branches. Correctly swap + instructions between frags when dealing with relaxed branches. + +2004-01-14 Maciej W. Rozycki + + * acinclude.m4: Quote names of macros to be defined by AC_DEFUN + throughout. + * aclocal.m4: Regenerate. + * configure: Regenerate. + 2004-01-12 Anil Paranjpe - + * config/tc-h8300.c (build_bytes): Apply relaxation to bit manipulation insns. diff -uprN binutils-2.14.90.0.8/gas/acinclude.m4 binutils-2.15.90.0.1/gas/acinclude.m4 --- binutils-2.14.90.0.8/gas/acinclude.m4 2000-09-02 09:58:12.000000000 -0700 +++ binutils-2.15.90.0.1/gas/acinclude.m4 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ dnl GAS_CHECK_DECL_NEEDED(name, typedefname, typedef, headers) -AC_DEFUN(GAS_CHECK_DECL_NEEDED,[ +AC_DEFUN([GAS_CHECK_DECL_NEEDED],[ AC_MSG_CHECKING(whether declaration is required for $1) AC_CACHE_VAL(gas_cv_decl_needed_$1, AC_TRY_LINK([$4], @@ -19,7 +19,7 @@ dnl Some non-ANSI preprocessors botch re dnl enough, but on some of those systems, the assert macro relies on requoting dnl working properly! dnl GAS_WORKING_ASSERT -AC_DEFUN(GAS_WORKING_ASSERT, +AC_DEFUN([GAS_WORKING_ASSERT], [AC_MSG_CHECKING([for working assert macro]) AC_CACHE_VAL(gas_cv_assert_ok, AC_TRY_LINK([#include @@ -39,7 +39,7 @@ dnl dnl Since many Bourne shell implementations lack subroutines, use this dnl hack to simplify the code in configure.in. dnl GAS_UNIQ(listvar) -AC_DEFUN(GAS_UNIQ, +AC_DEFUN([GAS_UNIQ], [_gas_uniq_list="[$]$1" _gas_uniq_newlist="" dnl Protect against empty input list. diff -uprN binutils-2.14.90.0.8/gas/config/tc-arm.c binutils-2.15.90.0.1/gas/config/tc-arm.c --- binutils-2.14.90.0.8/gas/config/tc-arm.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-arm.c 2004-03-03 12:24:34.000000000 -0800 @@ -4,6 +4,8 @@ Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modified by David Taylor (dtaylor@armltd.co.uk) Cirrus coprocessor mods by Aldy Hernandez (aldyh@redhat.com) + Cirrus coprocessor fixes by Petko Manolov (petkan@nucleusys.com) + Cirrus coprocessor fixes by Vladimir Ivanov (vladitx@nucleusys.com) This file is part of GAS, the GNU Assembler. @@ -1111,8 +1113,8 @@ static int cp_byte_address_required_here /* "INSN X,Y" where X:bit16, Y:bit12. */ #define MAV_MODE2 0x0c10 -/* "INSN X,Y" where X:0, Y:bit16. */ -#define MAV_MODE3 0x1000 +/* "INSN X,Y" where X:bit12, Y:bit16. */ +#define MAV_MODE3 0x100c /* "INSN X,Y,Z" where X:16, Y:0, Z:12. */ #define MAV_MODE4 0x0c0010 @@ -2175,18 +2177,18 @@ static const struct asm_opcode insns[] = {"cfmvr64l", 0xee100510, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c}, {"cfmv64hr", 0xee000530, 8, ARM_CEXT_MAVERICK, do_mav_binops_2c}, {"cfmvr64h", 0xee100530, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c}, - {"cfmval32", 0xee100610, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, - {"cfmv32al", 0xee000610, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, - {"cfmvam32", 0xee100630, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, - {"cfmv32am", 0xee000630, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, - {"cfmvah32", 0xee100650, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, - {"cfmv32ah", 0xee000650, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, - {"cfmva32", 0xee100670, 7, ARM_CEXT_MAVERICK, do_mav_binops_3a}, - {"cfmv32a", 0xee000670, 7, ARM_CEXT_MAVERICK, do_mav_binops_3b}, - {"cfmva64", 0xee100690, 7, ARM_CEXT_MAVERICK, do_mav_binops_3c}, - {"cfmv64a", 0xee000690, 7, ARM_CEXT_MAVERICK, do_mav_binops_3d}, - {"cfmvsc32", 0xee1006b0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_1}, - {"cfmv32sc", 0xee0006b0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_2}, + {"cfmval32", 0xee200440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, + {"cfmv32al", 0xee100440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, + {"cfmvam32", 0xee200460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, + {"cfmv32am", 0xee100460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, + {"cfmvah32", 0xee200480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a}, + {"cfmv32ah", 0xee100480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b}, + {"cfmva32", 0xee2004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3a}, + {"cfmv32a", 0xee1004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3b}, + {"cfmva64", 0xee2004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3c}, + {"cfmv64a", 0xee1004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3d}, + {"cfmvsc32", 0xee2004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_1}, + {"cfmv32sc", 0xee1004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_2}, {"cfcpys", 0xee000400, 6, ARM_CEXT_MAVERICK, do_mav_binops_1d}, {"cfcpyd", 0xee000420, 6, ARM_CEXT_MAVERICK, do_mav_binops_1e}, {"cfcvtsd", 0xee000460, 7, ARM_CEXT_MAVERICK, do_mav_binops_1f}, @@ -10575,7 +10577,7 @@ do_mav_quad_6b (str) REG_TYPE_MVFX); } -/* cfmvsc32 DSPSC,MVFX[15:0]. */ +/* cfmvsc32 DSPSC,MVDX[15:0]. */ static void do_mav_dspsc_1 (str) char * str; @@ -10585,7 +10587,7 @@ do_mav_dspsc_1 (str) /* cfmvsc32. */ if (mav_reg_required_here (&str, -1, REG_TYPE_DSPSC) == FAIL || skip_past_comma (&str) == FAIL - || mav_reg_required_here (&str, 16, REG_TYPE_MVFX) == FAIL) + || mav_reg_required_here (&str, 12, REG_TYPE_MVDX) == FAIL) { if (!inst.error) inst.error = BAD_ARGS; @@ -10596,7 +10598,7 @@ do_mav_dspsc_1 (str) end_of_line (str); } -/* cfmv32sc MVFX[15:0],DSPSC. */ +/* cfmv32sc MVDX[15:0],DSPSC. */ static void do_mav_dspsc_2 (str) char * str; @@ -10604,7 +10606,7 @@ do_mav_dspsc_2 (str) skip_whitespace (str); /* cfmv32sc. */ - if (mav_reg_required_here (&str, 0, REG_TYPE_MVFX) == FAIL + if (mav_reg_required_here (&str, 12, REG_TYPE_MVDX) == FAIL || skip_past_comma (&str) == FAIL || mav_reg_required_here (&str, -1, REG_TYPE_DSPSC) == FAIL) { @@ -11809,6 +11811,9 @@ md_begin () bfd_set_section_flags (stdoutput, arm_arch, SEC_DATA | SEC_ALLOC | SEC_LOAD | SEC_LINK_ONCE \ | SEC_HAS_CONTENTS); +#else + bfd_set_section_flags (stdoutput, arm_arch, + SEC_READONLY | SEC_HAS_CONTENTS); #endif arm_arch->output_section = arm_arch; subseg_set (arm_arch, 0); @@ -12823,6 +12828,16 @@ tc_gen_reloc (section, fixp) return NULL; case BFD_RELOC_ARM_OFFSET_IMM: + if (fixp->fx_addsy != NULL + && !S_IS_DEFINED (fixp->fx_addsy) + && S_IS_LOCAL (fixp->fx_addsy)) + { + as_bad_where (fixp->fx_file, fixp->fx_line, + _("undefined local label `%s'"), + S_GET_NAME (fixp->fx_addsy)); + return NULL; + } + as_bad_where (fixp->fx_file, fixp->fx_line, _("internal_relocation (type: OFFSET_IMM) not fixed up")); return NULL; diff -uprN binutils-2.14.90.0.8/gas/config/tc-frv.c binutils-2.15.90.0.1/gas/config/tc-frv.c --- binutils-2.14.90.0.8/gas/config/tc-frv.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-frv.c 2004-03-03 12:24:34.000000000 -0800 @@ -163,6 +163,7 @@ static FRV_VLIW vliw; #endif static unsigned long frv_mach = bfd_mach_frv; +static bfd_boolean fr400_audio; /* Flags to set in the elf header */ static flagword frv_flags = DEFAULT_FLAGS; @@ -354,10 +355,24 @@ md_parse_option (c, arg) frv_mach = bfd_mach_fr550; } + else if (strcmp (p, "fr450") == 0) + { + cpu_flags = EF_FRV_CPU_FR450; + frv_mach = bfd_mach_fr450; + } + + else if (strcmp (p, "fr405") == 0) + { + cpu_flags = EF_FRV_CPU_FR405; + frv_mach = bfd_mach_fr400; + fr400_audio = TRUE; + } + else if (strcmp (p, "fr400") == 0) { cpu_flags = EF_FRV_CPU_FR400; frv_mach = bfd_mach_fr400; + fr400_audio = FALSE; } else if (strcmp (p, "fr300") == 0) @@ -446,7 +461,7 @@ md_show_usage (stream) fprintf (stream, _("-mpic Note small position independent code\n")); fprintf (stream, _("-mPIC Note large position independent code\n")); fprintf (stream, _("-mlibrary-pic Compile library for large position indepedent code\n")); - fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr300|frv|simple|tomcat}\n")); + fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n")); fprintf (stream, _(" Record the cpu type\n")); fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n")); fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n")); @@ -1042,6 +1057,36 @@ fr550_check_acc_range (FRV_VLIW *vliw, f return 0; /* all is ok */ } +/* Return true if the target implements instruction INSN. */ + +static bfd_boolean +target_implements_insn_p (const CGEN_INSN *insn) +{ + switch (frv_mach) + { + default: + /* bfd_mach_frv or generic. */ + return TRUE; + + case bfd_mach_fr300: + case bfd_mach_frvsimple: + return CGEN_INSN_MACH_HAS_P (insn, MACH_SIMPLE); + + case bfd_mach_fr400: + return ((fr400_audio || !CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_AUDIO)) + && CGEN_INSN_MACH_HAS_P (insn, MACH_FR400)); + + case bfd_mach_fr450: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR450); + + case bfd_mach_fr500: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR500); + + case bfd_mach_fr550: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR550); + } +} + void md_assemble (str) char * str; @@ -1125,6 +1170,11 @@ md_assemble (str) instructions, don't do vliw checking. */ else if (frv_mach != bfd_mach_frv) { + if (!target_implements_insn_p (insn.insn)) + { + as_bad (_("Instruction not supported by this architecture")); + return; + } packing_constraint = frv_vliw_add_insn (& vliw, insn.insn); if (frv_mach == bfd_mach_fr550 && ! packing_constraint) packing_constraint = fr550_check_acc_range (& vliw, & insn); diff -uprN binutils-2.14.90.0.8/gas/config/tc-ia64.c binutils-2.15.90.0.1/gas/config/tc-ia64.c --- binutils-2.14.90.0.8/gas/config/tc-ia64.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-ia64.c 2004-03-03 12:24:34.000000000 -0800 @@ -636,6 +636,9 @@ static struct gr { valueT value; } gr_values[128] = {{ 1, 0, 0 }}; +/* Remember the alignment frag. */ +static fragS *align_frag; + /* These are the routines required to output the various types of unwind records. */ @@ -702,6 +705,7 @@ static int ar_is_in_integer_unit PARAMS static void set_section PARAMS ((char *name)); static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, unsigned int, unsigned int)); +static void dot_align (int); static void dot_radix PARAMS ((int)); static void dot_special_section PARAMS ((int)); static void dot_proc PARAMS ((int)); @@ -822,6 +826,7 @@ static void output_X2_format PARAMS ((vb static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, unsigned long)); static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); +static unw_rec_list *output_endp PARAMS ((void)); static unw_rec_list *output_prologue PARAMS ((void)); static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); static unw_rec_list *output_body PARAMS ((void)); @@ -896,11 +901,11 @@ static void process_one_record PARAMS (( static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); static int calc_record_size PARAMS ((unw_rec_list *)); static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); -static int count_bits PARAMS ((unsigned long)); static unsigned long slot_index PARAMS ((unsigned long, fragS *, - unsigned long, fragS *)); + unsigned long, fragS *, + int)); static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); -static void fixup_unw_records PARAMS ((unw_rec_list *)); +static void fixup_unw_records PARAMS ((unw_rec_list *, int)); static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); static void generate_unwind_image PARAMS ((const char *)); @@ -1088,18 +1093,40 @@ ia64_flush_insns () CURR_SLOT.tag_fixups = 0; /* In case there are unwind directives following the last instruction, - resolve those now. We only handle body and prologue directives here. - Give an error for others. */ + resolve those now. We only handle prologue, body, and endp directives + here. Give an error for others. */ for (ptr = unwind.current_entry; ptr; ptr = ptr->next) { - if (ptr->r.type == prologue || ptr->r.type == prologue_gr - || ptr->r.type == body) + switch (ptr->r.type) { + case prologue: + case prologue_gr: + case body: + case endp: ptr->slot_number = (unsigned long) frag_more (0); ptr->slot_frag = frag_now; + break; + + /* Allow any record which doesn't have a "t" field (i.e., + doesn't relate to a particular instruction). */ + case unwabi: + case br_gr: + case copy_state: + case fr_mem: + case frgr_mem: + case gr_gr: + case gr_mem: + case label_state: + case rp_br: + case spill_base: + case spill_mask: + /* nothing */ + break; + + default: + as_bad (_("Unwind directive not followed by an instruction.")); + break; } - else - as_bad (_("Unwind directive not followed by an instruction.")); } unwind.current_entry = NULL; @@ -1109,9 +1136,8 @@ ia64_flush_insns () as_bad ("qualifying predicate not followed by instruction"); } -void -ia64_do_align (nbytes) - int nbytes; +static void +ia64_do_align (int nbytes) { char *saved_input_line_pointer = input_line_pointer; @@ -1712,6 +1738,16 @@ alloc_record (unw_record_type t) return ptr; } +/* Dummy unwind record used for calculating the length of the last prologue or + body region. */ + +static unw_rec_list * +output_endp () +{ + unw_rec_list *ptr = alloc_record (endp); + return ptr; +} + static unw_rec_list * output_prologue () { @@ -2332,6 +2368,10 @@ process_one_record (ptr, f) switch (ptr->r.type) { + /* This is a dummy record that takes up no space in the output. */ + case endp: + break; + case gr_mem: case fr_mem: case br_mem: @@ -2574,29 +2614,18 @@ set_imask (region, regmask, t, type) } } -static int -count_bits (unsigned long mask) -{ - int n = 0; - - while (mask) - { - mask &= mask - 1; - ++n; - } - return n; -} - /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag - containing FIRST_ADDR. */ + containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates + for frag sizes. */ unsigned long -slot_index (slot_addr, slot_frag, first_addr, first_frag) +slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) unsigned long slot_addr; fragS *slot_frag; unsigned long first_addr; fragS *first_frag; + int before_relax; { unsigned long index = 0; @@ -2611,10 +2640,10 @@ slot_index (slot_addr, slot_frag, first_ { unsigned long start_addr = (unsigned long) &first_frag->fr_literal; - if (finalize_syms) + if (! before_relax) { - /* We can get the final addresses only after relaxation is - done. */ + /* We can get the final addresses only during and after + relaxation. */ if (first_frag->fr_next && first_frag->fr_next->fr_address) index += 3 * ((first_frag->fr_next->fr_address - first_frag->fr_address @@ -2680,8 +2709,8 @@ optimize_unw_records (list) /* If the only unwind record is ".prologue" or ".prologue" followed by ".body", then we can optimize the unwind directives away. */ if (list->r.type == prologue - && (list->next == NULL - || (list->next->r.type == body && list->next->next == NULL))) + && (list->next->r.type == endp + || (list->next->r.type == body && list->next->next->r.type == endp))) return NULL; return list; @@ -2693,8 +2722,9 @@ optimize_unw_records (list) within each record to generate an image. */ static void -fixup_unw_records (list) +fixup_unw_records (list, before_relax) unw_rec_list *list; + int before_relax; { unw_rec_list *ptr, *region = 0; unsigned long first_addr = 0, rlen = 0, t; @@ -2705,7 +2735,7 @@ fixup_unw_records (list) if (ptr->slot_number == SLOT_NUM_NOT_SET) as_bad (" Insn slot not set in unwind record."); t = slot_index (ptr->slot_number, ptr->slot_frag, - first_addr, first_frag); + first_addr, first_frag, before_relax); switch (ptr->r.type) { case prologue: @@ -2713,59 +2743,24 @@ fixup_unw_records (list) case body: { unw_rec_list *last; - int size, dir_len = 0; - unsigned long last_addr; - fragS *last_frag; + int size; + unsigned long last_addr = 0; + fragS *last_frag = NULL; first_addr = ptr->slot_number; first_frag = ptr->slot_frag; /* Find either the next body/prologue start, or the end of - the list, and determine the size of the region. */ - last_addr = list->next_slot_number; - last_frag = list->next_slot_frag; + the function, and determine the size of the region. */ for (last = ptr->next; last != NULL; last = last->next) if (last->r.type == prologue || last->r.type == prologue_gr - || last->r.type == body) + || last->r.type == body || last->r.type == endp) { last_addr = last->slot_number; last_frag = last->slot_frag; break; } - else if (!last->next) - { - /* In the absence of an explicit .body directive, - the prologue ends after the last instruction - covered by an unwind directive. */ - if (ptr->r.type != body) - { - last_addr = last->slot_number; - last_frag = last->slot_frag; - switch (last->r.type) - { - case frgr_mem: - dir_len = (count_bits (last->r.record.p.frmask) - + count_bits (last->r.record.p.grmask)); - break; - case fr_mem: - case gr_mem: - dir_len += count_bits (last->r.record.p.rmask); - break; - case br_mem: - case br_gr: - dir_len += count_bits (last->r.record.p.brmask); - break; - case gr_gr: - dir_len += count_bits (last->r.record.p.grmask); - break; - default: - dir_len = 1; - break; - } - } - break; - } - size = (slot_index (last_addr, last_frag, first_addr, first_frag) - + dir_len); + size = slot_index (last_addr, last_frag, first_addr, first_frag, + before_relax); rlen = ptr->r.record.r.rlen = size; if (ptr->r.type == body) /* End of region. */ @@ -2865,6 +2860,35 @@ fixup_unw_records (list) } } +/* Estimate the size of a frag before relaxing. We only have one type of frag + to handle here, which is the unwind info frag. */ + +int +ia64_estimate_size_before_relax (fragS *frag, + asection *segtype ATTRIBUTE_UNUSED) +{ + unw_rec_list *list; + int len, size, pad; + + /* ??? This code is identical to the first part of ia64_convert_frag. */ + list = (unw_rec_list *) frag->fr_opcode; + fixup_unw_records (list, 0); + + len = calc_record_size (list); + /* pad to pointer-size boundary. */ + pad = len % md.pointer_size; + if (pad != 0) + len += md.pointer_size - pad; + /* Add 8 for the header + a pointer for the personality offset. */ + size = len + 8 + md.pointer_size; + + /* fr_var carries the max_chars that we created the fragment with. + We must, of course, have allocated enough memory earlier. */ + assert (frag->fr_var >= size); + + return frag->fr_fix + size; +} + /* This function converts a rs_machine_dependent variant frag into a normal fill frag with the unwind image from the the record list. */ void @@ -2874,8 +2898,9 @@ ia64_convert_frag (fragS *frag) int len, size, pad; valueT flag_value; + /* ??? This code is identical to ia64_estimate_size_before_relax. */ list = (unw_rec_list *) frag->fr_opcode; - fixup_unw_records (list); + fixup_unw_records (list, 0); len = calc_record_size (list); /* pad to pointer-size boundary. */ @@ -2911,6 +2936,12 @@ ia64_convert_frag (fragS *frag) /* Skip the header. */ vbyte_mem_ptr = frag->fr_literal + 8; process_unw_records (list, output_vbyte_mem); + + /* Fill the padding bytes with zeros. */ + if (pad != 0) + md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, + md.pointer_size - pad); + frag->fr_fix += size; frag->fr_type = rs_fill; frag->fr_var = 0; @@ -3003,6 +3034,14 @@ convert_expr_to_xy_reg (e, xy, regp) } static void +dot_align (int arg) +{ + /* The current frag is an alignment frag. */ + align_frag = frag_now; + s_align_bytes (arg); +} + +static void dot_radix (dummy) int dummy ATTRIBUTE_UNUSED; { @@ -3283,13 +3322,17 @@ generate_unwind_image (text_name) int size, pad; unw_rec_list *list; + /* Mark the end of the unwind info, so that we can compute the size of the + last unwind region. */ + add_unwind_entry (output_endp ()); + /* Force out pending instructions, to make sure all unwind records have a valid slot_number field. */ ia64_flush_insns (); /* Generate the unwind record. */ list = optimize_unw_records (unwind.list); - fixup_unw_records (list); + fixup_unw_records (list, 1); size = calc_record_size (list); if (size > 0 || unwind.force_unwind_entry) @@ -4925,7 +4968,7 @@ const pseudo_typeS md_pseudo_table[] = { "lb", dot_scope, 0 }, { "le", dot_scope, 1 }, #endif - { "align", s_align_bytes, 0 }, + { "align", dot_align, 0 }, { "regstk", dot_regstk, 0 }, { "rotr", dot_rot, DYNREG_GR }, { "rotf", dot_rot, DYNREG_FR }, @@ -6032,7 +6075,7 @@ emit_one_bundle () struct ia64_opcode *idesc; int end_of_insn_group = 0, user_template = -1; int n, i, j, first, curr; - unw_rec_list *ptr; + unw_rec_list *ptr, *last_ptr, *end_ptr; bfd_vma t0 = 0, t1 = 0; struct label_fix *lfix; struct insn_fix *ifix; @@ -6076,18 +6119,39 @@ emit_one_bundle () end_of_insn_group = 0; for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) { - /* Set the slot number for prologue/body records now as those - refer to the current point, not the point after the - instruction has been issued: */ - /* Don't try to delete prologue/body records here, as that will cause - them to also be deleted from the master list of unwind records. */ - for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next) - if (ptr->r.type == prologue || ptr->r.type == prologue_gr - || ptr->r.type == body) - { - ptr->slot_number = (unsigned long) f + i; - ptr->slot_frag = frag_now; - } + /* If we have unwind records, we may need to update some now. */ + ptr = md.slot[curr].unwind_record; + if (ptr) + { + /* Find the last prologue/body record in the list for the current + insn, and set the slot number for all records up to that point. + This needs to be done now, because prologue/body records refer to + the current point, not the point after the instruction has been + issued. This matters because there may have been nops emitted + meanwhile. Any non-prologue non-body record followed by a + prologue/body record must also refer to the current point. */ + last_ptr = NULL; + end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; + for (; ptr != end_ptr; ptr = ptr->next) + if (ptr->r.type == prologue || ptr->r.type == prologue_gr + || ptr->r.type == body) + last_ptr = ptr; + if (last_ptr) + { + /* Make last_ptr point one after the last prologue/body + record. */ + last_ptr = last_ptr->next; + for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; + ptr = ptr->next) + { + ptr->slot_number = (unsigned long) f + i; + ptr->slot_frag = frag_now; + } + /* Remove the initialized records, so that we won't accidentally + update them again if we insert a nop and continue. */ + md.slot[curr].unwind_record = last_ptr; + } + } if (idesc->flags & IA64_OPCODE_SLOT2) { @@ -6292,15 +6356,20 @@ emit_one_bundle () build_insn (md.slot + curr, insn + i); - /* Set slot counts for non prologue/body unwind records. */ - for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next) - if (ptr->r.type != prologue && ptr->r.type != prologue_gr - && ptr->r.type != body) - { - ptr->slot_number = (unsigned long) f + i; - ptr->slot_frag = frag_now; - } - md.slot[curr].unwind_record = NULL; + ptr = md.slot[curr].unwind_record; + if (ptr) + { + /* Set slot numbers for all remaining unwind records belonging to the + current insn. There can not be any prologue/body unwind records + here. */ + end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; + for (; ptr != end_ptr; ptr = ptr->next) + { + ptr->slot_number = (unsigned long) f + i; + ptr->slot_frag = frag_now; + } + md.slot[curr].unwind_record = NULL; + } if (required_unit == IA64_UNIT_L) { @@ -6375,8 +6444,8 @@ emit_one_bundle () if (unwind.list) { - unwind.list->next_slot_number = (unsigned long) f + 16; - unwind.list->next_slot_frag = frag_now; + unwind.list->next_slot_number = (unsigned long) f + 16; + unwind.list->next_slot_frag = frag_now; } } @@ -7118,6 +7187,23 @@ ia64_frob_label (sym) } } +#ifdef TE_HPUX +/* The HP-UX linker will give unresolved symbol errors for symbols + that are declared but unused. This routine removes declared, + unused symbols from an object. */ +int +ia64_frob_symbol (sym) + struct symbol *sym; +{ + if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && + ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) + || (S_GET_SEGMENT (sym) == &bfd_abs_section + && ! S_IS_EXTERNAL (sym))) + return 1; + return 0; +} +#endif + void ia64_flush_pending_output () { @@ -9915,7 +10001,24 @@ md_assemble (str) flags = idesc->flags; if ((flags & IA64_OPCODE_FIRST) != 0) - insn_group_break (1, 0, 0); + { + /* The alignment frag has to end with a stop bit only if the + next instruction after the alignment directive has to be + the first instruction in an instruction group. */ + if (align_frag) + { + while (align_frag->fr_type != rs_align_code) + { + align_frag = align_frag->fr_next; + assert (align_frag); + } + if (align_frag->fr_next == frag_now) + align_frag->tc_frag_data = 1; + } + + insn_group_break (1, 0, 0); + } + align_frag = NULL; if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) { @@ -10748,16 +10851,35 @@ ia64_handle_align (fragp) static const unsigned char le_nop[] = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; + static const unsigned char le_nop_stop[] + = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; int bytes; char *p; + const unsigned char *nop; if (fragp->fr_type != rs_align_code) return; + /* Check if this frag has to end with a stop bit. */ + nop = fragp->tc_frag_data ? le_nop_stop : le_nop; + bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; p = fragp->fr_literal + fragp->fr_fix; + /* If no paddings are needed, we check if we need a stop bit. */ + if (!bytes && fragp->tc_frag_data) + { + if (fragp->fr_fix < 16) + as_bad_where (fragp->fr_file, fragp->fr_line, + _("Can't add stop bit to mark end of instruction group")); + else + /* Bundles are always in little-endian byte order. Make sure + the previous bundle has the stop bit. */ + *(p - 16) |= 1; + } + /* Make sure we are on a 16-byte boundary, in case someone has been putting data into a text section. */ if (bytes & 15) @@ -10770,7 +10892,7 @@ ia64_handle_align (fragp) } /* Instruction bundles are always little-endian. */ - memcpy (p, le_nop, 16); + memcpy (p, nop, 16); fragp->fr_var = 16; } diff -uprN binutils-2.14.90.0.8/gas/config/tc-ia64.h binutils-2.15.90.0.1/gas/config/tc-ia64.h --- binutils-2.14.90.0.8/gas/config/tc-ia64.h 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-ia64.h 2004-03-03 12:24:34.000000000 -0800 @@ -86,11 +86,13 @@ struct ia64_fix enum ia64_opnd opnd; }; -extern void ia64_do_align PARAMS((int n)); extern void ia64_end_of_source PARAMS((void)); extern void ia64_start_line PARAMS((void)); extern int ia64_unrecognized_line PARAMS((int ch)); extern void ia64_frob_label PARAMS((struct symbol *sym)); +#ifdef TE_HPUX +extern int ia64_frob_symbol PARAMS((struct symbol *sym)); +#endif extern void ia64_flush_pending_output PARAMS((void)); extern int ia64_parse_name (char *name, expressionS *e); extern int ia64_optimize_expr PARAMS((expressionS *l, operatorT op, @@ -112,12 +114,16 @@ extern void ia64_handle_align PARAMS ((f extern void ia64_after_parse_args PARAMS ((void)); extern void ia64_dwarf2_emit_offset PARAMS ((symbolS *, unsigned int)); extern void ia64_check_label PARAMS ((symbolS *)); +extern int ia64_estimate_size_before_relax (fragS *, asection *); extern void ia64_convert_frag (fragS *); #define md_end() ia64_end_of_source () #define md_start_line_hook() ia64_start_line () #define tc_unrecognized_line(ch) ia64_unrecognized_line (ch) #define tc_frob_label(s) ia64_frob_label (s) +#ifdef TE_HPUX +#define tc_frob_symbol(s,p) p |= ia64_frob_symbol (s) +#endif /* TE_HPUX */ #define md_flush_pending_output() ia64_flush_pending_output () #define md_parse_name(s,e,c) ia64_parse_name (s, e) #define tc_canonicalize_symbol_name(s) ia64_canonicalize_symbol_name (s) @@ -132,7 +138,7 @@ extern void ia64_convert_frag (fragS *); #define md_create_short_jump(p,f,t,fr,s) \ as_fatal ("ia64_create_short_jump") #define md_estimate_size_before_relax(f,s) \ - (f)->fr_var + ia64_estimate_size_before_relax(f,s) #define md_elf_section_letter ia64_elf_section_letter #define md_elf_section_flags ia64_elf_section_flags #define TC_FIX_TYPE struct ia64_fix @@ -148,6 +154,10 @@ extern void ia64_convert_frag (fragS *); #define TC_DWARF2_EMIT_OFFSET ia64_dwarf2_emit_offset #define tc_check_label(l) ia64_check_label (l) +/* Record if an alignment frag should end with a stop bit. */ +#define TC_FRAG_TYPE int +#define TC_FRAG_INIT(FRAGP) do {(FRAGP)->tc_frag_data = 0;}while (0) + #define MAX_MEM_FOR_RS_ALIGN_CODE (15 + 16) #define WORKING_DOT_WORD /* don't do broken word processing for now */ @@ -202,7 +212,7 @@ typedef enum bspstore_gr, bspstore_psprel, bspstore_sprel, rnat_when, rnat_gr, rnat_psprel, rnat_sprel, epilogue, label_state, copy_state, spill_psprel, spill_sprel, spill_reg, spill_psprel_p, spill_sprel_p, - spill_reg_p, unwabi + spill_reg_p, unwabi, endp } unw_record_type; /* These structures declare the fields that can be used in each of the diff -uprN binutils-2.14.90.0.8/gas/config/tc-iq2000.c binutils-2.15.90.0.1/gas/config/tc-iq2000.c --- binutils-2.14.90.0.8/gas/config/tc-iq2000.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-iq2000.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* tc-iq2000.c -- Assembler for the Sitera IQ2000. - Copyright (C) 2003 Free Software Foundation. + Copyright (C) 2003, 2004 Free Software Foundation. This file is part of GAS, the GNU Assembler. @@ -357,7 +357,7 @@ static const char * li_expn = "\n\ ori \\rt,%0,\\imm\n\ .elseif (\\imm & 0xffff0000 == 0xffff0000)\n\ addi \\rt,%0,\\imm\n\ - .elseif (\\imm & 0x0000ffff == 0) + .elseif (\\imm & 0x0000ffff == 0)\n\ lui \\rt,%uhi(\\imm)\n\ .else\n\ lui \\rt,%uhi(\\imm)\n\ diff -uprN binutils-2.14.90.0.8/gas/config/tc-m32r.c binutils-2.15.90.0.1/gas/config/tc-m32r.c --- binutils-2.14.90.0.8/gas/config/tc-m32r.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-m32r.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* tc-m32r.c -- Assembler for the Renesas M32R. - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -109,7 +109,7 @@ static int enable_special = 0; /* Non-zero if -bitinst has been specified, in which case support for extended M32R bit-field instruction set should be enabled. */ -static int enable_special_m32r = 0; +static int enable_special_m32r = 1; /* Non-zero if -float has been specified, in which case support for extended M32R floating point instruction set should be enabled. */ @@ -216,7 +216,8 @@ struct option md_longopts[] = #define OPTION_NO_IGNORE_PARALLEL (OPTION_IGNORE_PARALLEL + 1) #define OPTION_SPECIAL (OPTION_NO_IGNORE_PARALLEL + 1) #define OPTION_SPECIAL_M32R (OPTION_SPECIAL + 1) -#define OPTION_SPECIAL_FLOAT (OPTION_SPECIAL_M32R + 1) +#define OPTION_NO_SPECIAL_M32R (OPTION_SPECIAL_M32R + 1) +#define OPTION_SPECIAL_FLOAT (OPTION_NO_SPECIAL_M32R + 1) #define OPTION_WARN_UNMATCHED (OPTION_SPECIAL_FLOAT + 1) #define OPTION_NO_WARN_UNMATCHED (OPTION_WARN_UNMATCHED + 1) {"m32r", no_argument, NULL, OPTION_M32R}, @@ -238,6 +239,7 @@ struct option md_longopts[] = {"nIp", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL}, {"hidden", no_argument, NULL, OPTION_SPECIAL}, {"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R}, + {"no-bitinst", no_argument, NULL, OPTION_NO_SPECIAL_M32R}, {"float", no_argument, NULL, OPTION_SPECIAL_FLOAT}, /* Sigh. I guess all warnings must now have both variants. */ {"warn-unmatched-high", no_argument, NULL, OPTION_WARN_UNMATCHED}, @@ -353,6 +355,10 @@ md_parse_option (c, arg) enable_special_m32r = 1; break; + case OPTION_NO_SPECIAL_M32R: + enable_special_m32r = 0; + break; + case OPTION_SPECIAL_FLOAT: enable_special_float = 1; break; @@ -410,6 +416,8 @@ md_show_usage (stream) fprintf (stream, _("\ -no-parallel disable -parallel\n")); fprintf (stream, _("\ + -no-bitinst disallow the M32R2's extended bit-field instructions\n")); + fprintf (stream, _("\ -O try to optimize code. Implies -parallel\n")); fprintf (stream, _("\ diff -uprN binutils-2.14.90.0.8/gas/config/tc-m68hc11.c binutils-2.15.90.0.1/gas/config/tc-m68hc11.c --- binutils-2.14.90.0.8/gas/config/tc-m68hc11.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-m68hc11.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12. - Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Written by Stephane Carrez (stcarrez@nerim.fr) This file is part of GAS, the GNU Assembler. @@ -1951,18 +1951,43 @@ build_indexed_byte (operand *op, int for sym = make_expr_symbol (&op->exp); off = 0; } - frag_var (rs_machine_dependent, 2, 2, - ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF), - sym, off, f); + /* movb/movw cannot be relaxed. */ + if (move_insn) + { + byte <<= 6; + number_to_chars_bigendian (f, byte, 1); + fix_new (frag_now, f - frag_now->fr_literal, 1, + sym, off, 0, BFD_RELOC_M68HC12_5B); + return 1; + } + else + { + number_to_chars_bigendian (f, byte, 1); + frag_var (rs_machine_dependent, 2, 2, + ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF), + sym, off, f); + } } else { f = frag_more (1); - number_to_chars_bigendian (f, byte, 1); - frag_var (rs_machine_dependent, 2, 2, - ENCODE_RELAX (STATE_INDEXED_PCREL, STATE_UNDF), - op->exp.X_add_symbol, - op->exp.X_add_number, f); + /* movb/movw cannot be relaxed. */ + if (move_insn) + { + byte <<= 6; + number_to_chars_bigendian (f, byte, 1); + fix_new (frag_now, f - frag_now->fr_literal, 1, + op->exp.X_add_symbol, op->exp.X_add_number, 0, BFD_RELOC_M68HC12_5B); + return 1; + } + else + { + number_to_chars_bigendian (f, byte, 1); + frag_var (rs_machine_dependent, 2, 2, + ENCODE_RELAX (STATE_INDEXED_PCREL, STATE_UNDF), + op->exp.X_add_symbol, + op->exp.X_add_number, f); + } } return 3; } @@ -3287,6 +3312,17 @@ md_apply_fix3 (fixS *fixP, valueT *valP, where[0] = where[0] | (value & 0x07); break; + case BFD_RELOC_M68HC12_5B: + if (value < -16 || value > 15) + as_bad_where (fixP->fx_file, fixP->fx_line, + _("Offset out of 5-bit range for movw/movb insn: %ld"), + value); + if (value >= 0) + where[0] |= value; + else + where[0] |= (0x10 | (16 + value)); + break; + case BFD_RELOC_M68HC11_RL_JUMP: case BFD_RELOC_M68HC11_RL_GROUP: case BFD_RELOC_VTABLE_INHERIT: diff -uprN binutils-2.14.90.0.8/gas/config/tc-m68k.c binutils-2.15.90.0.1/gas/config/tc-m68k.c --- binutils-2.14.90.0.8/gas/config/tc-m68k.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-m68k.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* tc-m68k.c -- Assemble for the m68k family Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -732,7 +732,7 @@ tc_coff_fix2rtype (fixP) libraries, and we can relax any external sym. */ #define relaxable_symbol(symbol) \ - (!((S_IS_EXTERNAL (symbol) && strcmp (TARGET_OS, "elf") != 0) \ + (!((S_IS_EXTERNAL (symbol) && EXTERN_FORCE_RELOC) \ || S_IS_WEAK (symbol))) /* Compute the relocation code for a fixup of SIZE bytes, using pc diff -uprN binutils-2.14.90.0.8/gas/config/tc-m68k.h binutils-2.15.90.0.1/gas/config/tc-m68k.h --- binutils-2.14.90.0.8/gas/config/tc-m68k.h 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-m68k.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* This file is tc-m68k.h Copyright 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, - 1998, 1999, 2000, 2001, 2002, 2003 + 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -169,8 +169,11 @@ while (0) #define tc_fix_adjustable(X) tc_m68k_fix_adjustable(X) extern int tc_m68k_fix_adjustable PARAMS ((struct fix *)); -/* Target *-*-elf implies an embedded target. No shared libs. */ -#define EXTERN_FORCE_RELOC (strcmp (TARGET_OS, "elf") != 0) +/* Target *-*-elf implies an embedded target. No shared libs. + *-*-uclinux also requires special casing to prevent GAS from + generating unsupported R_68K_PC16 relocs. */ +#define EXTERN_FORCE_RELOC \ + ((strcmp (TARGET_OS, "elf") != 0) && (strcmp (TARGET_OS, "uclinux") != 0)) /* Values passed to md_apply_fix3 don't include symbol values. */ #define MD_APPLY_SYM_VALUE(FIX) 0 diff -uprN binutils-2.14.90.0.8/gas/config/tc-mips.c binutils-2.15.90.0.1/gas/config/tc-mips.c --- binutils-2.14.90.0.8/gas/config/tc-mips.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-mips.c 2004-03-03 12:24:34.000000000 -0800 @@ -325,15 +325,30 @@ static int mips_32bitmode = 0; /* True if CPU has a ror instruction. */ #define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU) -/* Whether the processor uses hardware interlocks to protect - reads from the HI and LO registers, and thus does not - require nops to be inserted. */ - -#define hilo_interlocks (mips_opts.arch == CPU_R4010 \ - || mips_opts.arch == CPU_VR5500 \ - || mips_opts.arch == CPU_RM7000 \ - || mips_opts.arch == CPU_SB1 \ - ) +/* True if mflo and mfhi can be immediately followed by instructions + which write to the HI and LO registers. + + According to MIPS specifications, MIPS ISAs I, II, and III need + (at least) two instructions between the reads of HI/LO and + instructions which write them, and later ISAs do not. Contradicting + the MIPS specifications, some MIPS IV processor user manuals (e.g. + the UM for the NEC Vr5000) document needing the instructions between + HI/LO reads and writes, as well. Therefore, we declare only MIPS32, + MIPS64 and later ISAs to have the interlocks, plus any specific + earlier-ISA CPUs for which CPU documentation declares that the + instructions are really interlocked. */ +#define hilo_interlocks \ + (mips_opts.isa == ISA_MIPS32 \ + || mips_opts.isa == ISA_MIPS32R2 \ + || mips_opts.isa == ISA_MIPS64 \ + || mips_opts.isa == ISA_MIPS64R2 \ + || mips_opts.arch == CPU_R4010 \ + || mips_opts.arch == CPU_R10000 \ + || mips_opts.arch == CPU_R12000 \ + || mips_opts.arch == CPU_RM7000 \ + || mips_opts.arch == CPU_SB1 \ + || mips_opts.arch == CPU_VR5500 \ + ) /* Whether the processor uses hardware interlocks to protect reads from the GPRs after they are loaded from memory, and thus does not @@ -616,81 +631,61 @@ static int mips_fix_4122_bugs; static int mips_relax_branch; -/* Since the MIPS does not have multiple forms of PC relative - instructions, we do not have to do relaxing as is done on other - platforms. However, we do have to handle GP relative addressing - correctly, which turns out to be a similar problem. - - Every macro that refers to a symbol can occur in (at least) two - forms, one with GP relative addressing and one without. For - example, loading a global variable into a register generally uses - a macro instruction like this: - lw $4,i - If i can be addressed off the GP register (this is true if it is in - the .sbss or .sdata section, or if it is known to be smaller than - the -G argument) this will generate the following instruction: - lw $4,i($gp) - This instruction will use a GPREL reloc. If i can not be addressed - off the GP register, the following instruction sequence will be used: - lui $at,i - lw $4,i($at) - In this case the first instruction will have a HI16 reloc, and the - second reloc will have a LO16 reloc. Both relocs will be against - the symbol i. - - The issue here is that we may not know whether i is GP addressable - until after we see the instruction that uses it. Therefore, we - want to be able to choose the final instruction sequence only at - the end of the assembly. This is similar to the way other - platforms choose the size of a PC relative instruction only at the - end of assembly. - - When generating position independent code we do not use GP - addressing in quite the same way, but the issue still arises as - external symbols and local symbols must be handled differently. - - We handle these issues by actually generating both possible - instruction sequences. The longer one is put in a frag_var with - type rs_machine_dependent. We encode what to do with the frag in - the subtype field. We encode (1) the number of existing bytes to - replace, (2) the number of new bytes to use, (3) the offset from - the start of the existing bytes to the first reloc we must generate - (that is, the offset is applied from the start of the existing - bytes after they are replaced by the new bytes, if any), (4) the - offset from the start of the existing bytes to the second reloc, - (5) whether a third reloc is needed (the third reloc is always four - bytes after the second reloc), and (6) whether to warn if this - variant is used (this is sometimes needed if .set nomacro or .set - noat is in effect). All these numbers are reasonably small. - - Generating two instruction sequences must be handled carefully to - ensure that delay slots are handled correctly. Fortunately, there - are a limited number of cases. When the second instruction - sequence is generated, append_insn is directed to maintain the - existing delay slot information, so it continues to apply to any - code after the second instruction sequence. This means that the - second instruction sequence must not impose any requirements not - required by the first instruction sequence. - - These variant frags are then handled in functions called by the - machine independent code. md_estimate_size_before_relax returns - the final size of the frag. md_convert_frag sets up the final form - of the frag. tc_gen_reloc adjust the first reloc and adds a second - one if needed. */ -#define RELAX_ENCODE(old, new, reloc1, reloc2, reloc3, warn) \ - ((relax_substateT) \ - (((old) << 23) \ - | ((new) << 16) \ - | (((reloc1) + 64) << 9) \ - | (((reloc2) + 64) << 2) \ - | ((reloc3) ? (1 << 1) : 0) \ - | ((warn) ? 1 : 0))) -#define RELAX_OLD(i) (((i) >> 23) & 0x7f) -#define RELAX_NEW(i) (((i) >> 16) & 0x7f) -#define RELAX_RELOC1(i) ((valueT) (((i) >> 9) & 0x7f) - 64) -#define RELAX_RELOC2(i) ((valueT) (((i) >> 2) & 0x7f) - 64) -#define RELAX_RELOC3(i) (((i) >> 1) & 1) -#define RELAX_WARN(i) ((i) & 1) +/* The expansion of many macros depends on the type of symbol that + they refer to. For example, when generating position-dependent code, + a macro that refers to a symbol may have two different expansions, + one which uses GP-relative addresses and one which uses absolute + addresses. When generating SVR4-style PIC, a macro may have + different expansions for local and global symbols. + + We handle these situations by generating both sequences and putting + them in variant frags. In position-dependent code, the first sequence + will be the GP-relative one and the second sequence will be the + absolute one. In SVR4 PIC, the first sequence will be for global + symbols and the second will be for local symbols. + + The frag's "subtype" is RELAX_ENCODE (FIRST, SECOND), where FIRST and + SECOND are the lengths of the two sequences in bytes. These fields + can be extracted using RELAX_FIRST() and RELAX_SECOND(). In addition, + the subtype has the following flags: + + RELAX_USE_SECOND + Set if it has been decided that we should use the second + sequence instead of the first. + + RELAX_SECOND_LONGER + Set in the first variant frag if the macro's second implementation + is longer than its first. This refers to the macro as a whole, + not an individual relaxation. + + RELAX_NOMACRO + Set in the first variant frag if the macro appeared in a .set nomacro + block and if one alternative requires a warning but the other does not. + + RELAX_DELAY_SLOT + Like RELAX_NOMACRO, but indicates that the macro appears in a branch + delay slot. + + The frag's "opcode" points to the first fixup for relaxable code. + + Relaxable macros are generated using a sequence such as: + + relax_start (SYMBOL); + ... generate first expansion ... + relax_switch (); + ... generate second expansion ... + relax_end (); + + The code and fixups for the unwanted alternative are discarded + by md_convert_frag. */ +#define RELAX_ENCODE(FIRST, SECOND) (((FIRST) << 8) | (SECOND)) + +#define RELAX_FIRST(X) (((X) >> 8) & 0xff) +#define RELAX_SECOND(X) ((X) & 0xff) +#define RELAX_USE_SECOND 0x10000 +#define RELAX_SECOND_LONGER 0x20000 +#define RELAX_NOMACRO 0x40000 +#define RELAX_DELAY_SLOT 0x80000 /* Branch without likely bit. If label is out of range, we turn: @@ -823,6 +818,42 @@ static int mips_relax_branch; || (((x) &~ (offsetT) 0x7fff) == ~ (offsetT) 0x7fff)) +/* Global variables used when generating relaxable macros. See the + comment above RELAX_ENCODE for more details about how relaxation + is used. */ +static struct { + /* 0 if we're not emitting a relaxable macro. + 1 if we're emitting the first of the two relaxation alternatives. + 2 if we're emitting the second alternative. */ + int sequence; + + /* The first relaxable fixup in the current frag. (In other words, + the first fixup that refers to relaxable code.) */ + fixS *first_fixup; + + /* sizes[0] says how many bytes of the first alternative are stored in + the current frag. Likewise sizes[1] for the second alternative. */ + unsigned int sizes[2]; + + /* The symbol on which the choice of sequence depends. */ + symbolS *symbol; +} mips_relax; + +/* Global variables used to decide whether a macro needs a warning. */ +static struct { + /* True if the macro is in a branch delay slot. */ + bfd_boolean delay_slot_p; + + /* For relaxable macros, sizes[0] is the length of the first alternative + in bytes and sizes[1] is the length of the second alternative. + For non-relaxable macros, both elements give the length of the + macro in bytes. */ + unsigned int sizes[2]; + + /* The first variant frag for this macro. */ + fragS *first_frag; +} mips_macro_warning; + /* Prototypes for static functions. */ #define internalError() \ @@ -831,12 +862,13 @@ static int mips_relax_branch; enum mips_regclass { MIPS_GR_REG, MIPS_FP_REG, MIPS16_REG }; static void append_insn - (char *place, struct mips_cl_insn *ip, expressionS *p, - bfd_reloc_code_real_type *r); + (struct mips_cl_insn *ip, expressionS *p, bfd_reloc_code_real_type *r); static void mips_no_prev_insn (int); static void mips16_macro_build - (char *, int *, expressionS *, const char *, const char *, va_list); -static void load_register (int *, int, expressionS *, int); + (expressionS *, const char *, const char *, va_list); +static void load_register (int, expressionS *, int); +static void macro_start (void); +static void macro_end (void); static void macro (struct mips_cl_insn * ip); static void mips16_macro (struct mips_cl_insn * ip); #ifdef LOSING_COMPILER @@ -1354,19 +1386,21 @@ md_assemble (char *str) if (insn.insn_mo->pinfo == INSN_MACRO) { + macro_start (); if (mips_opts.mips16) mips16_macro (&insn); else macro (&insn); + macro_end (); } else { if (imm_expr.X_op != O_absent) - append_insn (NULL, &insn, &imm_expr, imm_reloc); + append_insn (&insn, &imm_expr, imm_reloc); else if (offset_expr.X_op != O_absent) - append_insn (NULL, &insn, &offset_expr, offset_reloc); + append_insn (&insn, &offset_expr, offset_reloc); else - append_insn (NULL, &insn, NULL, unused_reloc); + append_insn (&insn, NULL, unused_reloc); } } @@ -1526,19 +1560,66 @@ mips16_mark_labels (void) } } -/* Output an instruction. PLACE is where to put the instruction; if - it is NULL, this uses frag_more to get room. IP is the instruction - information. ADDRESS_EXPR is an operand of the instruction to be - used with RELOC_TYPE. */ +/* End the current frag. Make it a variant frag and record the + relaxation info. */ + +static void +relax_close_frag (void) +{ + mips_macro_warning.first_frag = frag_now; + frag_var (rs_machine_dependent, 0, 0, + RELAX_ENCODE (mips_relax.sizes[0], mips_relax.sizes[1]), + mips_relax.symbol, 0, (char *) mips_relax.first_fixup); + + memset (&mips_relax.sizes, 0, sizeof (mips_relax.sizes)); + mips_relax.first_fixup = 0; +} + +/* Start a new relaxation sequence whose expansion depends on SYMBOL. + See the comment above RELAX_ENCODE for more details. */ + +static void +relax_start (symbolS *symbol) +{ + assert (mips_relax.sequence == 0); + mips_relax.sequence = 1; + mips_relax.symbol = symbol; +} + +/* Start generating the second version of a relaxable sequence. + See the comment above RELAX_ENCODE for more details. */ static void -append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr, +relax_switch (void) +{ + assert (mips_relax.sequence == 1); + mips_relax.sequence = 2; +} + +/* End the current relaxable sequence. */ + +static void +relax_end (void) +{ + assert (mips_relax.sequence == 2); + relax_close_frag (); + mips_relax.sequence = 0; +} + +/* Output an instruction. IP is the instruction information. + ADDRESS_EXPR is an operand of the instruction to be used with + RELOC_TYPE. */ + +static void +append_insn (struct mips_cl_insn *ip, expressionS *address_expr, bfd_reloc_code_real_type *reloc_type) { register unsigned long prev_pinfo, pinfo; char *f; fixS *fixp[3]; int nops = 0; + relax_stateT prev_insn_frag_type = 0; + bfd_boolean relaxed_branch = FALSE; bfd_boolean force_new_frag = FALSE; /* Mark instruction labels in mips16 mode. */ @@ -1547,7 +1628,8 @@ append_insn (char *place, struct mips_cl prev_pinfo = prev_insn.insn_mo->pinfo; pinfo = ip->insn_mo->pinfo; - if (place == NULL && (! mips_opts.noreorder || prev_nop_frag != NULL)) + if (mips_relax.sequence != 2 + && (!mips_opts.noreorder || prev_nop_frag != NULL)) { int prev_prev_nop; @@ -1706,7 +1788,7 @@ append_insn (char *place, struct mips_cl though the tx39's divide insns still do require the delay. */ if (! (hilo_interlocks - || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT))) + || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT))) && (mips_optimize == 0 || (pinfo & INSN_WRITE_LO))) nops += 2; @@ -1728,7 +1810,7 @@ append_insn (char *place, struct mips_cl insert a NOP. Some newer processors have interlocks. Also the note tx39's multiply above. */ if (! (hilo_interlocks - || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT))) + || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT))) && (mips_optimize == 0 || (pinfo & INSN_WRITE_HI))) nops += 2; @@ -1766,11 +1848,11 @@ append_insn (char *place, struct mips_cl || ((prev_prev_insn.insn_mo->pinfo & INSN_READ_LO) && (pinfo & INSN_WRITE_LO) && ! (hilo_interlocks - || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT)))) + || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT)))) || ((prev_prev_insn.insn_mo->pinfo & INSN_READ_HI) && (pinfo & INSN_WRITE_HI) && ! (hilo_interlocks - || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT))))) + || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT))))) prev_prev_nop = 1; else prev_prev_nop = 0; @@ -1919,8 +2001,11 @@ append_insn (char *place, struct mips_cl } } - if (place == NULL - && address_expr + /* Record the frag type before frag_var. */ + if (prev_insn_frag) + prev_insn_frag_type = prev_insn_frag->fr_type; + + if (address_expr && *reloc_type == BFD_RELOC_16_PCREL_S2 && (pinfo & INSN_UNCOND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_LIKELY) @@ -1932,6 +2017,7 @@ append_insn (char *place, struct mips_cl && !(mips_opts.noat && mips_pic != NO_PIC) && !mips_opts.mips16) { + relaxed_branch = TRUE; f = frag_var (rs_machine_dependent, relaxed_branch_length (NULL, NULL, @@ -1960,8 +2046,6 @@ append_insn (char *place, struct mips_cl == BFD_RELOC_MIPS16_JMP)), make_expr_symbol (address_expr), 0, NULL); } - else if (place != NULL) - f = place; else if (mips_opts.mips16 && ! ip->use_extend && *reloc_type != BFD_RELOC_MIPS16_JMP) @@ -1978,6 +2062,21 @@ append_insn (char *place, struct mips_cl && (prev_pinfo & INSN_UNCOND_BRANCH_DELAY) != 0) as_warn (_("extended instruction in delay slot")); + if (mips_relax.sequence) + { + /* If we've reached the end of this frag, turn it into a variant + frag and record the information for the instructions we've + written so far. */ + if (frag_room () < 4) + relax_close_frag (); + mips_relax.sizes[mips_relax.sequence - 1] += 4; + } + + if (mips_relax.sequence != 2) + mips_macro_warning.sizes[0] += 4; + if (mips_relax.sequence != 1) + mips_macro_warning.sizes[1] += 4; + f = frag_more (4); } @@ -2051,84 +2150,85 @@ append_insn (char *place, struct mips_cl } } else - { need_reloc: - /* Don't generate a reloc if we are writing into a variant frag. */ - if (place == NULL) - { - reloc_howto_type *howto; - int i; + { + reloc_howto_type *howto; + int i; - /* In a compound relocation, it is the final (outermost) - operator that determines the relocated field. */ - for (i = 1; i < 3; i++) - if (reloc_type[i] == BFD_RELOC_UNUSED) - break; + /* In a compound relocation, it is the final (outermost) + operator that determines the relocated field. */ + for (i = 1; i < 3; i++) + if (reloc_type[i] == BFD_RELOC_UNUSED) + break; - howto = bfd_reloc_type_lookup (stdoutput, reloc_type[i - 1]); - fixp[0] = fix_new_exp (frag_now, f - frag_now->fr_literal, - bfd_get_reloc_size(howto), - address_expr, - reloc_type[0] == BFD_RELOC_16_PCREL_S2, - reloc_type[0]); - - /* These relocations can have an addend that won't fit in - 4 octets for 64bit assembly. */ - if (HAVE_64BIT_GPRS - && ! howto->partial_inplace - && (reloc_type[0] == BFD_RELOC_16 - || reloc_type[0] == BFD_RELOC_32 - || reloc_type[0] == BFD_RELOC_MIPS_JMP - || reloc_type[0] == BFD_RELOC_HI16_S - || reloc_type[0] == BFD_RELOC_LO16 - || reloc_type[0] == BFD_RELOC_GPREL16 - || reloc_type[0] == BFD_RELOC_MIPS_LITERAL - || reloc_type[0] == BFD_RELOC_GPREL32 - || reloc_type[0] == BFD_RELOC_64 - || reloc_type[0] == BFD_RELOC_CTOR - || reloc_type[0] == BFD_RELOC_MIPS_SUB - || reloc_type[0] == BFD_RELOC_MIPS_HIGHEST - || reloc_type[0] == BFD_RELOC_MIPS_HIGHER - || reloc_type[0] == BFD_RELOC_MIPS_SCN_DISP - || reloc_type[0] == BFD_RELOC_MIPS_REL16 - || reloc_type[0] == BFD_RELOC_MIPS_RELGOT)) - fixp[0]->fx_no_overflow = 1; - - if (reloc_needs_lo_p (*reloc_type)) - { - struct mips_hi_fixup *hi_fixup; - - /* Reuse the last entry if it already has a matching %lo. */ - hi_fixup = mips_hi_fixup_list; - if (hi_fixup == 0 - || !fixup_has_matching_lo_p (hi_fixup->fixp)) - { - hi_fixup = ((struct mips_hi_fixup *) - xmalloc (sizeof (struct mips_hi_fixup))); - hi_fixup->next = mips_hi_fixup_list; - mips_hi_fixup_list = hi_fixup; - } - hi_fixup->fixp = fixp[0]; - hi_fixup->seg = now_seg; - } - - /* Add fixups for the second and third relocations, if given. - Note that the ABI allows the second relocation to be - against RSS_UNDEF, RSS_GP, RSS_GP0 or RSS_LOC. At the - moment we only use RSS_UNDEF, but we could add support - for the others if it ever becomes necessary. */ - for (i = 1; i < 3; i++) - if (reloc_type[i] != BFD_RELOC_UNUSED) - { - address_expr->X_op = O_absent; - address_expr->X_add_symbol = 0; - address_expr->X_add_number = 0; - - fixp[i] = fix_new_exp (frag_now, fixp[0]->fx_where, - fixp[0]->fx_size, address_expr, - FALSE, reloc_type[i]); - } - } + howto = bfd_reloc_type_lookup (stdoutput, reloc_type[i - 1]); + fixp[0] = fix_new_exp (frag_now, f - frag_now->fr_literal, + bfd_get_reloc_size(howto), + address_expr, + reloc_type[0] == BFD_RELOC_16_PCREL_S2, + reloc_type[0]); + + /* These relocations can have an addend that won't fit in + 4 octets for 64bit assembly. */ + if (HAVE_64BIT_GPRS + && ! howto->partial_inplace + && (reloc_type[0] == BFD_RELOC_16 + || reloc_type[0] == BFD_RELOC_32 + || reloc_type[0] == BFD_RELOC_MIPS_JMP + || reloc_type[0] == BFD_RELOC_HI16_S + || reloc_type[0] == BFD_RELOC_LO16 + || reloc_type[0] == BFD_RELOC_GPREL16 + || reloc_type[0] == BFD_RELOC_MIPS_LITERAL + || reloc_type[0] == BFD_RELOC_GPREL32 + || reloc_type[0] == BFD_RELOC_64 + || reloc_type[0] == BFD_RELOC_CTOR + || reloc_type[0] == BFD_RELOC_MIPS_SUB + || reloc_type[0] == BFD_RELOC_MIPS_HIGHEST + || reloc_type[0] == BFD_RELOC_MIPS_HIGHER + || reloc_type[0] == BFD_RELOC_MIPS_SCN_DISP + || reloc_type[0] == BFD_RELOC_MIPS_REL16 + || reloc_type[0] == BFD_RELOC_MIPS_RELGOT)) + fixp[0]->fx_no_overflow = 1; + + if (mips_relax.sequence) + { + if (mips_relax.first_fixup == 0) + mips_relax.first_fixup = fixp[0]; + } + else if (reloc_needs_lo_p (*reloc_type)) + { + struct mips_hi_fixup *hi_fixup; + + /* Reuse the last entry if it already has a matching %lo. */ + hi_fixup = mips_hi_fixup_list; + if (hi_fixup == 0 + || !fixup_has_matching_lo_p (hi_fixup->fixp)) + { + hi_fixup = ((struct mips_hi_fixup *) + xmalloc (sizeof (struct mips_hi_fixup))); + hi_fixup->next = mips_hi_fixup_list; + mips_hi_fixup_list = hi_fixup; + } + hi_fixup->fixp = fixp[0]; + hi_fixup->seg = now_seg; + } + + /* Add fixups for the second and third relocations, if given. + Note that the ABI allows the second relocation to be + against RSS_UNDEF, RSS_GP, RSS_GP0 or RSS_LOC. At the + moment we only use RSS_UNDEF, but we could add support + for the others if it ever becomes necessary. */ + for (i = 1; i < 3; i++) + if (reloc_type[i] != BFD_RELOC_UNUSED) + { + address_expr->X_op = O_absent; + address_expr->X_add_symbol = 0; + address_expr->X_add_number = 0; + + fixp[i] = fix_new_exp (frag_now, fixp[0]->fx_where, + fixp[0]->fx_size, address_expr, + FALSE, reloc_type[i]); + } } } @@ -2216,7 +2316,7 @@ append_insn (char *place, struct mips_cl & MIPS16OP_MASK_REGR32); } - if (place == NULL && ! mips_opts.noreorder) + if (mips_relax.sequence != 2 && !mips_opts.noreorder) { /* Filling the branch delay slot is more complex. We try to switch the branch with the previous instruction, which we can @@ -2262,12 +2362,12 @@ append_insn (char *place, struct mips_cl there are any branches to anything other than a label, users must use .set noreorder. */ || insn_labels != NULL - /* If the previous instruction is in a variant frag, we - can not do the swap. This does not apply to the - mips16, which uses variant frags for different - purposes. */ + /* If the previous instruction is in a variant frag + other than this branch's one, we cannot do the swap. + This does not apply to the mips16, which uses variant + frags for different purposes. */ || (! mips_opts.mips16 - && prev_insn_frag->fr_type == rs_machine_dependent) + && prev_insn_frag_type == rs_machine_dependent) /* If the branch reads the condition codes, we don't even try to swap, because in the sequence ctc1 $X,$31 @@ -2290,7 +2390,7 @@ append_insn (char *place, struct mips_cl | INSN_WRITE_COND_CODE)) && ! cop_interlocks) || (! (hilo_interlocks - || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT))) + || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT))) && (prev_pinfo & (INSN_READ_LO | INSN_READ_HI))) @@ -2452,9 +2552,29 @@ append_insn (char *place, struct mips_cl char temp[4]; prev_f = prev_insn_frag->fr_literal + prev_insn_where; - memcpy (temp, prev_f, 4); - memcpy (prev_f, f, 4); - memcpy (f, temp, 4); + if (!relaxed_branch) + { + /* If this is not a relaxed branch, then just + swap the instructions. */ + memcpy (temp, prev_f, 4); + memcpy (prev_f, f, 4); + memcpy (f, temp, 4); + } + else + { + /* If this is a relaxed branch, then we move the + instruction to be placed in the delay slot to + the current frag, shrinking the fixed part of + the originating frag. If the branch occupies + the tail of the latter, we move it backwards, + into the space freed by the moved instruction. */ + f = frag_more (4); + memcpy (f, prev_f, 4); + prev_insn_frag->fr_fix -= 4; + if (prev_insn_frag->fr_type == rs_machine_dependent) + memmove (prev_f, prev_f + 4, prev_insn_frag->fr_var); + } + if (prev_insn_fixp[0]) { prev_insn_fixp[0]->fx_frag = frag_now; @@ -2482,20 +2602,33 @@ append_insn (char *place, struct mips_cl frag. */ force_new_frag = TRUE; } - if (fixp[0]) - { - fixp[0]->fx_frag = prev_insn_frag; - fixp[0]->fx_where = prev_insn_where; - } - if (fixp[1]) + + if (!relaxed_branch) { - fixp[1]->fx_frag = prev_insn_frag; - fixp[1]->fx_where = prev_insn_where; + if (fixp[0]) + { + fixp[0]->fx_frag = prev_insn_frag; + fixp[0]->fx_where = prev_insn_where; + } + if (fixp[1]) + { + fixp[1]->fx_frag = prev_insn_frag; + fixp[1]->fx_where = prev_insn_where; + } + if (fixp[2]) + { + fixp[2]->fx_frag = prev_insn_frag; + fixp[2]->fx_where = prev_insn_where; + } } - if (fixp[2]) + else if (prev_insn_frag->fr_type == rs_machine_dependent) { - fixp[2]->fx_frag = prev_insn_frag; - fixp[2]->fx_where = prev_insn_where; + if (fixp[0]) + fixp[0]->fx_where -= 4; + if (fixp[1]) + fixp[1]->fx_where -= 4; + if (fixp[2]) + fixp[2]->fx_where -= 4; } } else @@ -2607,7 +2740,7 @@ append_insn (char *place, struct mips_cl prev_insn_where = f - frag_now->fr_literal; prev_insn_valid = 1; } - else if (place == NULL) + else if (mips_relax.sequence != 2) { /* We need to record a bit of information even when we are not reordering, in order to determine the base address for mips16 @@ -2623,15 +2756,6 @@ append_insn (char *place, struct mips_cl /* We just output an insn, so the next one doesn't have a label. */ mips_clear_insn_labels (); - - /* We must ensure that the frag to which an instruction that was - moved from a non-variant frag doesn't become a variant frag, - otherwise tc_gen_reloc may get confused. */ - if (force_new_frag) - { - frag_wane (frag_now); - frag_new (0); - } } /* This function forgets that there was any previous instruction or @@ -2779,14 +2903,78 @@ mips_emit_delays (bfd_boolean insns) mips_no_prev_insn (insns); } +/* Set up global variables for the start of a new macro. */ + +static void +macro_start (void) +{ + memset (&mips_macro_warning.sizes, 0, sizeof (mips_macro_warning.sizes)); + mips_macro_warning.delay_slot_p = (mips_opts.noreorder + && (prev_insn.insn_mo->pinfo + & (INSN_UNCOND_BRANCH_DELAY + | INSN_COND_BRANCH_DELAY + | INSN_COND_BRANCH_LIKELY)) != 0); +} + +/* Given that a macro is longer than 4 bytes, return the appropriate warning + for it. Return null if no warning is needed. SUBTYPE is a bitmask of + RELAX_DELAY_SLOT and RELAX_NOMACRO. */ + +static const char * +macro_warning (relax_substateT subtype) +{ + if (subtype & RELAX_DELAY_SLOT) + return _("Macro instruction expanded into multiple instructions" + " in a branch delay slot"); + else if (subtype & RELAX_NOMACRO) + return _("Macro instruction expanded into multiple instructions"); + else + return 0; +} + +/* Finish up a macro. Emit warnings as appropriate. */ + +static void +macro_end (void) +{ + if (mips_macro_warning.sizes[0] > 4 || mips_macro_warning.sizes[1] > 4) + { + relax_substateT subtype; + + /* Set up the relaxation warning flags. */ + subtype = 0; + if (mips_macro_warning.sizes[1] > mips_macro_warning.sizes[0]) + subtype |= RELAX_SECOND_LONGER; + if (mips_opts.warn_about_macros) + subtype |= RELAX_NOMACRO; + if (mips_macro_warning.delay_slot_p) + subtype |= RELAX_DELAY_SLOT; + + if (mips_macro_warning.sizes[0] > 4 && mips_macro_warning.sizes[1] > 4) + { + /* Either the macro has a single implementation or both + implementations are longer than 4 bytes. Emit the + warning now. */ + const char *msg = macro_warning (subtype); + if (msg != 0) + as_warn (msg); + } + else + { + /* One implementation might need a warning but the other + definitely doesn't. */ + mips_macro_warning.first_frag->fr_subtype |= subtype; + } + } +} + /* Build an instruction created by a macro expansion. This is passed a pointer to the count of instructions created so far, an expression, the name of the instruction to build, an operand format string, and corresponding arguments. */ static void -macro_build (char *place, int *counter, expressionS *ep, const char *name, - const char *fmt, ...) +macro_build (expressionS *ep, const char *name, const char *fmt, ...) { struct mips_cl_insn insn; bfd_reloc_code_real_type r[3]; @@ -2794,32 +2982,9 @@ macro_build (char *place, int *counter, va_start (args, fmt); - /* - * If the macro is about to expand into a second instruction, - * print a warning if needed. We need to pass ip as a parameter - * to generate a better warning message here... - */ - if (mips_opts.warn_about_macros && place == NULL && *counter == 1) - as_warn (_("Macro instruction expanded into multiple instructions")); - - /* - * If the macro is about to expand into a second instruction, - * and it is in a delay slot, print a warning. - */ - if (place == NULL - && *counter == 1 - && mips_opts.noreorder - && (prev_prev_insn.insn_mo->pinfo - & (INSN_UNCOND_BRANCH_DELAY | INSN_COND_BRANCH_DELAY - | INSN_COND_BRANCH_LIKELY)) != 0) - as_warn (_("Macro instruction expanded into multiple instructions in a branch delay slot")); - - if (place == NULL) - ++*counter; /* bump instruction counter */ - if (mips_opts.mips16) { - mips16_macro_build (place, counter, ep, name, fmt, args); + mips16_macro_build (ep, name, fmt, args); va_end (args); return; } @@ -3033,12 +3198,11 @@ macro_build (char *place, int *counter, va_end (args); assert (*r == BFD_RELOC_UNUSED ? ep == NULL : ep != NULL); - append_insn (place, &insn, ep, r); + append_insn (&insn, ep, r); } static void -mips16_macro_build (char *place, int *counter ATTRIBUTE_UNUSED, - expressionS *ep, const char *name, const char *fmt, +mips16_macro_build (expressionS *ep, const char *name, const char *fmt, va_list args) { struct mips_cl_insn insn; @@ -3155,7 +3319,7 @@ mips16_macro_build (char *place, int *co assert (*r == BFD_RELOC_UNUSED ? ep == NULL : ep != NULL); - append_insn (place, &insn, ep, r); + append_insn (&insn, ep, r); } /* @@ -3163,7 +3327,7 @@ mips16_macro_build (char *place, int *co * function. This occurs in NewABI PIC code. */ static void -macro_build_jalr (int icnt, expressionS *ep) +macro_build_jalr (expressionS *ep) { char *f = NULL; @@ -3172,7 +3336,7 @@ macro_build_jalr (int icnt, expressionS frag_grow (8); f = frag_more (0); } - macro_build (NULL, &icnt, NULL, "jalr", "d,s", RA, PIC_CALL_REG); + macro_build (NULL, "jalr", "d,s", RA, PIC_CALL_REG); if (HAVE_NEWABI) fix_new_exp (frag_now, f - frag_now->fr_literal, 4, ep, FALSE, BFD_RELOC_MIPS_JALR); @@ -3182,7 +3346,7 @@ macro_build_jalr (int icnt, expressionS * Generate a "lui" instruction. */ static void -macro_build_lui (char *place, int *counter, expressionS *ep, int regnum) +macro_build_lui (expressionS *ep, int regnum) { expressionS high_expr; struct mips_cl_insn insn; @@ -3193,13 +3357,7 @@ macro_build_lui (char *place, int *count assert (! mips_opts.mips16); - if (place == NULL) - high_expr = *ep; - else - { - high_expr.X_op = O_constant; - high_expr.X_add_number = ep->X_add_number; - } + high_expr = *ep; if (high_expr.X_op == O_constant) { @@ -3218,17 +3376,6 @@ macro_build_lui (char *place, int *count *r = BFD_RELOC_HI16_S; } - /* - * If the macro is about to expand into a second instruction, - * print a warning if needed. We need to pass ip as a parameter - * to generate a better warning message here... - */ - if (mips_opts.warn_about_macros && place == NULL && *counter == 1) - as_warn (_("Macro instruction expanded into multiple instructions")); - - if (place == NULL) - ++*counter; /* bump instruction counter */ - insn.insn_mo = (struct mips_opcode *) hash_find (op_hash, name); assert (insn.insn_mo); assert (strcmp (name, insn.insn_mo->name) == 0); @@ -3238,18 +3385,18 @@ macro_build_lui (char *place, int *count if (*r == BFD_RELOC_UNUSED) { insn.insn_opcode |= high_expr.X_add_number; - append_insn (place, &insn, NULL, r); + append_insn (&insn, NULL, r); } else - append_insn (place, &insn, &high_expr, r); + append_insn (&insn, &high_expr, r); } /* Generate a sequence of instructions to do a load or store from a constant offset off of a base register (breg) into/from a target register (treg), using AT if necessary. */ static void -macro_build_ldst_constoffset (char *place, int *counter, expressionS *ep, - const char *op, int treg, int breg, int dbl) +macro_build_ldst_constoffset (expressionS *ep, const char *op, + int treg, int breg, int dbl) { assert (ep->X_op == O_constant); @@ -3271,8 +3418,7 @@ macro_build_ldst_constoffset (char *plac if (IS_SEXT_16BIT_NUM(ep->X_add_number)) { /* Signed 16-bit offset will fit in the op. Easy! */ - macro_build (place, counter, ep, op, "t,o(b)", treg, BFD_RELOC_LO16, - breg); + macro_build (ep, op, "t,o(b)", treg, BFD_RELOC_LO16, breg); } else { @@ -3281,15 +3427,9 @@ macro_build_ldst_constoffset (char *plac addu $tempreg,$tempreg,$breg $treg,const_lo($tempreg) (BFD_RELOC_LO16) to handle the complete offset. */ - macro_build_lui (place, counter, ep, AT); - if (place != NULL) - place += 4; - macro_build (place, counter, NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, - breg); - if (place != NULL) - place += 4; - macro_build (place, counter, ep, op, "t,o(b)", treg, BFD_RELOC_LO16, - AT); + macro_build_lui (ep, AT); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg); + macro_build (ep, op, "t,o(b)", treg, BFD_RELOC_LO16, AT); if (mips_opts.noat) as_warn (_("Macro used $at after \".set noat\"")); @@ -3301,18 +3441,17 @@ macro_build_ldst_constoffset (char *plac * if reg is less than the immediate expression. */ static void -set_at (int *counter, int reg, int unsignedp) +set_at (int reg, int unsignedp) { if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= -0x8000 && imm_expr.X_add_number < 0x8000) - macro_build (NULL, counter, &imm_expr, unsignedp ? "sltiu" : "slti", - "t,r,j", AT, reg, BFD_RELOC_LO16); + macro_build (&imm_expr, unsignedp ? "sltiu" : "slti", "t,r,j", + AT, reg, BFD_RELOC_LO16); else { - load_register (counter, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, counter, NULL, unsignedp ? "sltu" : "slt", - "d,v,t", AT, reg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, unsignedp ? "sltu" : "slt", "d,v,t", AT, reg, AT); } } @@ -3418,7 +3557,7 @@ check_absolute_expr (struct mips_cl_insn * an absolute expression value into a register. */ static void -load_register (int *counter, int reg, expressionS *ep, int dbl) +load_register (int reg, expressionS *ep, int dbl) { int freg; expressionS hi32, lo32; @@ -3443,25 +3582,22 @@ load_register (int *counter, int reg, ex /* We can handle 16 bit signed values with an addiu to $zero. No need to ever use daddiu here, since $zero and the result are always correct in 32 bit mode. */ - macro_build (NULL, counter, ep, "addiu", "t,r,j", reg, 0, - BFD_RELOC_LO16); + macro_build (ep, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16); return; } else if (ep->X_add_number >= 0 && ep->X_add_number < 0x10000) { /* We can handle 16 bit unsigned values with an ori to $zero. */ - macro_build (NULL, counter, ep, "ori", "t,r,i", reg, 0, - BFD_RELOC_LO16); + macro_build (ep, "ori", "t,r,i", reg, 0, BFD_RELOC_LO16); return; } else if ((IS_SEXT_32BIT_NUM (ep->X_add_number))) { /* 32 bit values require an lui. */ - macro_build (NULL, counter, ep, "lui", "t,u", reg, BFD_RELOC_HI16); + macro_build (ep, "lui", "t,u", reg, BFD_RELOC_HI16); if ((ep->X_add_number & 0xffff) != 0) - macro_build (NULL, counter, ep, "ori", "t,r,i", reg, reg, - BFD_RELOC_LO16); + macro_build (ep, "ori", "t,r,i", reg, reg, BFD_RELOC_LO16); return; } } @@ -3472,8 +3608,7 @@ load_register (int *counter, int reg, ex { as_bad (_("Number (0x%lx) larger than 32 bits"), (unsigned long) ep->X_add_number); - macro_build (NULL, counter, ep, "addiu", "t,r,j", reg, 0, - BFD_RELOC_LO16); + macro_build (ep, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16); return; } @@ -3510,17 +3645,14 @@ load_register (int *counter, int reg, ex { if ((lo32.X_add_number & 0xffff8000) == 0xffff8000) { - macro_build (NULL, counter, &lo32, "addiu", "t,r,j", reg, 0, - BFD_RELOC_LO16); + macro_build (&lo32, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16); return; } if (lo32.X_add_number & 0x80000000) { - macro_build (NULL, counter, &lo32, "lui", "t,u", reg, - BFD_RELOC_HI16); + macro_build (&lo32, "lui", "t,u", reg, BFD_RELOC_HI16); if (lo32.X_add_number & 0xffff) - macro_build (NULL, counter, &lo32, "ori", "t,r,i", reg, reg, - BFD_RELOC_LO16); + macro_build (&lo32, "ori", "t,r,i", reg, reg, BFD_RELOC_LO16); return; } } @@ -3554,12 +3686,9 @@ load_register (int *counter, int reg, ex | (lo32.X_add_number >> shift)); else tmp.X_add_number = hi32.X_add_number >> (shift - 32); - macro_build (NULL, counter, &tmp, "ori", "t,r,i", reg, 0, - BFD_RELOC_LO16); - macro_build (NULL, counter, NULL, - (shift >= 32) ? "dsll32" : "dsll", - "d,w,<", reg, reg, - (shift >= 32) ? shift - 32 : shift); + macro_build (&tmp, "ori", "t,r,i", reg, 0, BFD_RELOC_LO16); + macro_build (NULL, (shift >= 32) ? "dsll32" : "dsll", "d,w,<", + reg, reg, (shift >= 32) ? shift - 32 : shift); return; } ++shift; @@ -3606,20 +3735,15 @@ load_register (int *counter, int reg, ex ones. */ tmp.X_op = O_constant; tmp.X_add_number = (offsetT) -1; - macro_build (NULL, counter, &tmp, "addiu", "t,r,j", reg, 0, - BFD_RELOC_LO16); + macro_build (&tmp, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16); if (bit != 0) { bit += shift; - macro_build (NULL, counter, NULL, - (bit >= 32) ? "dsll32" : "dsll", - "d,w,<", reg, reg, - (bit >= 32) ? bit - 32 : bit); - } - macro_build (NULL, counter, NULL, - (shift >= 32) ? "dsrl32" : "dsrl", - "d,w,<", reg, reg, - (shift >= 32) ? shift - 32 : shift); + macro_build (NULL, (bit >= 32) ? "dsll32" : "dsll", "d,w,<", + reg, reg, (bit >= 32) ? bit - 32 : bit); + } + macro_build (NULL, (shift >= 32) ? "dsrl32" : "dsrl", "d,w,<", + reg, reg, (shift >= 32) ? shift - 32 : shift); return; } } @@ -3628,14 +3752,14 @@ load_register (int *counter, int reg, ex generally get better code when we load a sign extended value. */ if ((hi32.X_add_number & 0x80000000) != 0) hi32.X_add_number |= ~(offsetT) 0xffffffff; - load_register (counter, reg, &hi32, 0); + load_register (reg, &hi32, 0); freg = reg; } if ((lo32.X_add_number & 0xffff0000) == 0) { if (freg != 0) { - macro_build (NULL, counter, NULL, "dsll32", "d,w,<", reg, freg, 0); + macro_build (NULL, "dsll32", "d,w,<", reg, freg, 0); freg = reg; } } @@ -3645,36 +3769,31 @@ load_register (int *counter, int reg, ex if ((freg == 0) && (lo32.X_add_number == (offsetT) 0xffffffff)) { - macro_build (NULL, counter, &lo32, "lui", "t,u", reg, - BFD_RELOC_HI16); - macro_build (NULL, counter, NULL, "dsrl32", "d,w,<", reg, reg, 0); + macro_build (&lo32, "lui", "t,u", reg, BFD_RELOC_HI16); + macro_build (NULL, "dsrl32", "d,w,<", reg, reg, 0); return; } if (freg != 0) { - macro_build (NULL, counter, NULL, "dsll", "d,w,<", reg, freg, 16); + macro_build (NULL, "dsll", "d,w,<", reg, freg, 16); freg = reg; } mid16 = lo32; mid16.X_add_number >>= 16; - macro_build (NULL, counter, &mid16, "ori", "t,r,i", reg, freg, - BFD_RELOC_LO16); - macro_build (NULL, counter, NULL, "dsll", "d,w,<", reg, reg, 16); + macro_build (&mid16, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16); + macro_build (NULL, "dsll", "d,w,<", reg, reg, 16); freg = reg; } if ((lo32.X_add_number & 0xffff) != 0) - macro_build (NULL, counter, &lo32, "ori", "t,r,i", reg, freg, - BFD_RELOC_LO16); + macro_build (&lo32, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16); } /* Load an address into a register. */ static void -load_address (int *counter, int reg, expressionS *ep, int *used_at) +load_address (int reg, expressionS *ep, int *used_at) { - char *p = NULL; - if (ep->X_op != O_constant && ep->X_op != O_symbol) { @@ -3684,7 +3803,7 @@ load_address (int *counter, int reg, exp if (ep->X_op == O_constant) { - load_register (counter, reg, ep, HAVE_64BIT_ADDRESSES); + load_register (reg, ep, HAVE_64BIT_ADDRESSES); return; } @@ -3716,35 +3835,30 @@ load_address (int *counter, int reg, exp */ if (HAVE_64BIT_ADDRESSES) { - /* We don't do GP optimization for now because RELAX_ENCODE can't - hold the data for such large chunks. */ + /* ??? We don't provide a GP-relative alternative for these macros. + It used not to be possible with the original relaxation code, + but it could be done now. */ if (*used_at == 0 && ! mips_opts.noat) { - macro_build (p, counter, ep, "lui", "t,u", - reg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, counter, ep, "lui", "t,u", - AT, BFD_RELOC_HI16_S); - macro_build (p, counter, ep, "daddiu", "t,r,j", - reg, reg, BFD_RELOC_MIPS_HIGHER); - macro_build (p, counter, ep, "daddiu", "t,r,j", - AT, AT, BFD_RELOC_LO16); - macro_build (p, counter, NULL, "dsll32", "d,w,<", reg, reg, 0); - macro_build (p, counter, NULL, "daddu", "d,v,t", reg, reg, AT); + macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_HIGHEST); + macro_build (ep, "lui", "t,u", AT, BFD_RELOC_HI16_S); + macro_build (ep, "daddiu", "t,r,j", reg, reg, + BFD_RELOC_MIPS_HIGHER); + macro_build (ep, "daddiu", "t,r,j", AT, AT, BFD_RELOC_LO16); + macro_build (NULL, "dsll32", "d,w,<", reg, reg, 0); + macro_build (NULL, "daddu", "d,v,t", reg, reg, AT); *used_at = 1; } else { - macro_build (p, counter, ep, "lui", "t,u", - reg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, counter, ep, "daddiu", "t,r,j", - reg, reg, BFD_RELOC_MIPS_HIGHER); - macro_build (p, counter, NULL, "dsll", "d,w,<", reg, reg, 16); - macro_build (p, counter, ep, "daddiu", "t,r,j", - reg, reg, BFD_RELOC_HI16_S); - macro_build (p, counter, NULL, "dsll", "d,w,<", reg, reg, 16); - macro_build (p, counter, ep, "daddiu", "t,r,j", - reg, reg, BFD_RELOC_LO16); + macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_HIGHEST); + macro_build (ep, "daddiu", "t,r,j", reg, reg, + BFD_RELOC_MIPS_HIGHER); + macro_build (NULL, "dsll", "d,w,<", reg, reg, 16); + macro_build (ep, "daddiu", "t,r,j", reg, reg, BFD_RELOC_HI16_S); + macro_build (NULL, "dsll", "d,w,<", reg, reg, 16); + macro_build (ep, "daddiu", "t,r,j", reg, reg, BFD_RELOC_LO16); } } else @@ -3752,19 +3866,16 @@ load_address (int *counter, int reg, exp if ((valueT) ep->X_add_number <= MAX_GPREL_OFFSET && ! nopic_need_relax (ep->X_add_symbol, 1)) { - frag_grow (20); - macro_build (NULL, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, + relax_start (ep->X_add_symbol); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, mips_gp_register, BFD_RELOC_GPREL16); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (4, 8, 0, 4, 0, - mips_opts.warn_about_macros), - ep->X_add_symbol, 0, NULL); - } - macro_build_lui (p, counter, ep, reg); - if (p != NULL) - p += 4; - macro_build (p, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, - BFD_RELOC_LO16); + relax_switch (); + } + macro_build_lui (ep, reg); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", + reg, reg, BFD_RELOC_LO16); + if (mips_relax.sequence) + relax_end (); } } else if (mips_pic == SVR4_PIC && ! mips_big_got) @@ -3785,59 +3896,45 @@ load_address (int *counter, int reg, exp offset, in which case cst must be added separately. */ if (HAVE_NEWABI) { - frag_grow (12); - if (ep->X_add_number) { - frag_now->tc_frag_data.tc_fr_offset = - ex.X_add_number = ep->X_add_number; + ex.X_add_number = ep->X_add_number; ep->X_add_number = 0; - macro_build (NULL, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", - reg, BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + relax_start (ep->X_add_symbol); + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, + BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); ex.X_op = O_constant; - macro_build (NULL, counter, &ex, ADDRESS_ADDI_INSN, "t,r,j", + macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, BFD_RELOC_LO16); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (8, 4, 0, 0, 0, - mips_opts.warn_about_macros), - ep->X_add_symbol, 0, NULL); ep->X_add_number = ex.X_add_number; + relax_switch (); } - - macro_build (p, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); - - if (! p) - { - /* To avoid confusion in tc_gen_reloc, we must ensure - that this does not become a variant frag. */ - frag_wane (frag_now); - frag_new (0); - } + if (mips_relax.sequence) + relax_end (); } else { ex.X_add_number = ep->X_add_number; ep->X_add_number = 0; - frag_grow (20); - macro_build (NULL, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, - BFD_RELOC_MIPS_GOT16, - mips_gp_register); - macro_build (NULL, counter, NULL, "nop", ""); - p = frag_var (rs_machine_dependent, 4, 0, - RELAX_ENCODE (0, 4, -8, 0, 0, mips_opts.warn_about_macros), - ep->X_add_symbol, 0, NULL); - macro_build (p, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, + BFD_RELOC_MIPS_GOT16, mips_gp_register); + macro_build (NULL, "nop", ""); + relax_start (ep->X_add_symbol); + relax_switch (); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, BFD_RELOC_LO16); + relax_end (); if (ex.X_add_number != 0) { if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); ex.X_op = O_constant; - macro_build (NULL, counter, &ex, ADDRESS_ADDI_INSN, "t,r,j", + macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, BFD_RELOC_LO16); } } @@ -3845,7 +3942,6 @@ load_address (int *counter, int reg, exp else if (mips_pic == SVR4_PIC) { expressionS ex; - int off; /* This is the large GOT case. If this is a reference to an external symbol, we want @@ -3865,79 +3961,64 @@ load_address (int *counter, int reg, exp */ if (HAVE_NEWABI) { - frag_grow (24); - - frag_now->tc_frag_data.tc_fr_offset = - ex.X_add_number = ep->X_add_number; + ex.X_add_number = ep->X_add_number; ep->X_add_number = 0; - macro_build (NULL, counter, ep, "lui", "t,u", reg, - BFD_RELOC_MIPS_GOT_HI16); - macro_build (NULL, counter, NULL, ADDRESS_ADD_INSN, "d,v,t", reg, - reg, mips_gp_register); - macro_build (NULL, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, - BFD_RELOC_MIPS_GOT_LO16, reg); + relax_start (ep->X_add_symbol); + macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_GOT_HI16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + reg, reg, mips_gp_register); + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", + reg, BFD_RELOC_MIPS_GOT_LO16, reg); if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); else if (ex.X_add_number) { ex.X_op = O_constant; - macro_build (NULL, counter, &ex, ADDRESS_ADDI_INSN, "t,r,j", - reg, reg, BFD_RELOC_LO16); + macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, + BFD_RELOC_LO16); } ep->X_add_number = ex.X_add_number; - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (ex.X_add_number ? 16 : 12, 8, 0, 4, 0, - mips_opts.warn_about_macros), - ep->X_add_symbol, 0, NULL); - macro_build (p, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, + relax_switch (); + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); - macro_build (p + 4, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, - reg, BFD_RELOC_MIPS_GOT_OFST); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, + BFD_RELOC_MIPS_GOT_OFST); + relax_end (); } else { ex.X_add_number = ep->X_add_number; ep->X_add_number = 0; + relax_start (ep->X_add_symbol); + macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_GOT_HI16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + reg, reg, mips_gp_register); + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", + reg, BFD_RELOC_MIPS_GOT_LO16, reg); + relax_switch (); if (reg_needs_delay (mips_gp_register)) - off = 4; - else - off = 0; - frag_grow (32); - macro_build (NULL, counter, ep, "lui", "t,u", reg, - BFD_RELOC_MIPS_GOT_HI16); - macro_build (NULL, counter, NULL, ADDRESS_ADD_INSN, "d,v,t", reg, - reg, mips_gp_register); - macro_build (NULL, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, - BFD_RELOC_MIPS_GOT_LO16, reg); - p = frag_var (rs_machine_dependent, 12 + off, 0, - RELAX_ENCODE (12, 12 + off, off, 8 + off, 0, - mips_opts.warn_about_macros), - ep->X_add_symbol, 0, NULL); - if (off > 0) { /* We need a nop before loading from $gp. This special check is required because the lui which starts the main instruction stream does not refer to $gp, and so will not insert the nop which may be required. */ - macro_build (p, counter, NULL, "nop", ""); - p += 4; + macro_build (NULL, "nop", ""); } - macro_build (p, counter, ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, + macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - p += 4; - macro_build (p, counter, NULL, "nop", ""); - p += 4; - macro_build (p, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, + macro_build (NULL, "nop", ""); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, BFD_RELOC_LO16); + relax_end (); if (ex.X_add_number != 0) { if (ex.X_add_number < -0x8000 || ex.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); ex.X_op = O_constant; - macro_build (NULL, counter, &ex, ADDRESS_ADDI_INSN, "t,r,j", - reg, reg, BFD_RELOC_LO16); + macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, + BFD_RELOC_LO16); } } } @@ -3946,8 +4027,8 @@ load_address (int *counter, int reg, exp /* We always do addiu $reg,$gp, (BFD_RELOC_GPREL16) */ - macro_build (NULL, counter, ep, ADDRESS_ADDI_INSN, "t,r,j", reg, - mips_gp_register, BFD_RELOC_GPREL16); + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", + reg, mips_gp_register, BFD_RELOC_GPREL16); } else abort (); @@ -3956,10 +4037,85 @@ load_address (int *counter, int reg, exp /* Move the contents of register SOURCE into register DEST. */ static void -move_register (int *counter, int dest, int source) +move_register (int dest, int source) +{ + macro_build (NULL, HAVE_32BIT_GPRS ? "addu" : "daddu", "d,v,t", + dest, source, 0); +} + +/* Emit an SVR4 PIC sequence to load address LOCAL into DEST, where + LOCAL is the sum of a symbol and a 16-bit or 32-bit displacement. + The two alternatives are: + + Global symbol Local sybmol + ------------- ------------ + lw DEST,%got(SYMBOL) lw DEST,%got(SYMBOL + OFFSET) + ... ... + addiu DEST,DEST,OFFSET addiu DEST,DEST,%lo(SYMBOL + OFFSET) + + load_got_offset emits the first instruction and add_got_offset + emits the second for a 16-bit offset or add_got_offset_hilo emits + a sequence to add a 32-bit offset using a scratch register. */ + +static void +load_got_offset (int dest, expressionS *local) +{ + expressionS global; + + global = *local; + global.X_add_number = 0; + + relax_start (local->X_add_symbol); + macro_build (&global, ADDRESS_LOAD_INSN, "t,o(b)", dest, + BFD_RELOC_MIPS_GOT16, mips_gp_register); + relax_switch (); + macro_build (local, ADDRESS_LOAD_INSN, "t,o(b)", dest, + BFD_RELOC_MIPS_GOT16, mips_gp_register); + relax_end (); +} + +static void +add_got_offset (int dest, expressionS *local) +{ + expressionS global; + + global.X_op = O_constant; + global.X_op_symbol = NULL; + global.X_add_symbol = NULL; + global.X_add_number = local->X_add_number; + + relax_start (local->X_add_symbol); + macro_build (&global, ADDRESS_ADDI_INSN, "t,r,j", + dest, dest, BFD_RELOC_LO16); + relax_switch (); + macro_build (local, ADDRESS_ADDI_INSN, "t,r,j", dest, dest, BFD_RELOC_LO16); + relax_end (); +} + +static void +add_got_offset_hilo (int dest, expressionS *local, int tmp) { - macro_build (NULL, counter, NULL, HAVE_32BIT_GPRS ? "addu" : "daddu", - "d,v,t", dest, source, 0); + expressionS global; + int hold_mips_optimize; + + global.X_op = O_constant; + global.X_op_symbol = NULL; + global.X_add_symbol = NULL; + global.X_add_number = local->X_add_number; + + relax_start (local->X_add_symbol); + load_register (tmp, &global, HAVE_64BIT_ADDRESSES); + relax_switch (); + /* Set mips_optimize around the lui instruction to avoid + inserting an unnecessary nop after the lw. */ + hold_mips_optimize = mips_optimize; + mips_optimize = 2; + macro_build_lui (&global, tmp); + mips_optimize = hold_mips_optimize; + macro_build (local, ADDRESS_ADDI_INSN, "t,r,j", tmp, tmp, BFD_RELOC_LO16); + relax_end (); + + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", dest, dest, tmp); } /* @@ -3986,7 +4142,6 @@ macro (struct mips_cl_insn *ip) register int treg, sreg, dreg, breg; int tempreg; int mask; - int icnt = 0; int used_at = 0; expressionS expr1; const char *s; @@ -3998,8 +4153,8 @@ macro (struct mips_cl_insn *ip) int lr = 0; int imm = 0; int call = 0; - offsetT maxnum; int off; + offsetT maxnum; bfd_reloc_code_real_type r; int hold_mips_optimize; @@ -4015,30 +4170,6 @@ macro (struct mips_cl_insn *ip) expr1.X_add_symbol = NULL; expr1.X_add_number = 1; - /* Unmatched fixups should not be put in the same frag as a relaxable - macro. For example, suppose we have: - - lui $4,%hi(l1) # 1 - la $5,l2 # 2 - addiu $4,$4,%lo(l1) # 3 - - If instructions 1 and 2 were put in the same frag, md_frob_file would - move the fixup for #1 after the fixups for the "unrelaxed" version of - #2. This would confuse tc_gen_reloc, which expects the relocations - for #2 to be the last for that frag. - - Also, if tc_gen_reloc sees certain relocations in a variant frag, - it assumes that they belong to a relaxable macro. We mustn't put - other uses of such relocations into a variant frag. - - To avoid both problems, finish the current frag it contains a - %reloc() operator. The macro then goes into a new frag. */ - if (prev_reloc_op_frag == frag_now) - { - frag_wane (frag_now); - frag_new (0); - } - switch (mask) { case M_DABS: @@ -4054,13 +4185,12 @@ macro (struct mips_cl_insn *ip) mips_any_noreorder = 1; expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "bgez", "s,p", sreg); + macro_build (&expr1, "bgez", "s,p", sreg); if (dreg == sreg) - macro_build (NULL, &icnt, NULL, "nop", "", 0); + macro_build (NULL, "nop", "", 0); else - move_register (&icnt, dreg, sreg); - macro_build (NULL, &icnt, NULL, dbl ? "dsub" : "sub", "d,v,t", dreg, 0, - sreg); + move_register (dreg, sreg); + macro_build (NULL, dbl ? "dsub" : "sub", "d,v,t", dreg, 0, sreg); --mips_opts.noreorder; return; @@ -4087,12 +4217,11 @@ macro (struct mips_cl_insn *ip) && imm_expr.X_add_number >= -0x8000 && imm_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &imm_expr, s, "t,r,j", treg, sreg, - BFD_RELOC_LO16); + macro_build (&imm_expr, s, "t,r,j", treg, sreg, BFD_RELOC_LO16); return; } - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, s2, "d,v,t", treg, sreg, AT); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, s2, "d,v,t", treg, sreg, AT); break; case M_AND_I: @@ -4116,19 +4245,18 @@ macro (struct mips_cl_insn *ip) && imm_expr.X_add_number < 0x10000) { if (mask != M_NOR_I) - macro_build (NULL, &icnt, &imm_expr, s, "t,r,i", treg, sreg, - BFD_RELOC_LO16); + macro_build (&imm_expr, s, "t,r,i", treg, sreg, BFD_RELOC_LO16); else { - macro_build (NULL, &icnt, &imm_expr, "ori", "t,r,i", treg, sreg, - BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, "nor", "d,v,t", treg, treg, 0); + macro_build (&imm_expr, "ori", "t,r,i", + treg, sreg, BFD_RELOC_LO16); + macro_build (NULL, "nor", "d,v,t", treg, treg, 0); } return; } - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, s2, "d,v,t", treg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, s2, "d,v,t", treg, sreg, AT); break; case M_BEQ_I: @@ -4147,11 +4275,11 @@ macro (struct mips_cl_insn *ip) beq_i: if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 0) { - macro_build (NULL, &icnt, &offset_expr, s, "s,t,p", sreg, 0); + macro_build (&offset_expr, s, "s,t,p", sreg, 0); return; } - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, &offset_expr, s, "s,t,p", sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (&offset_expr, s, "s,t,p", sreg, AT); break; case M_BGEL: @@ -4159,19 +4287,16 @@ macro (struct mips_cl_insn *ip) case M_BGE: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgezl" : "bgez", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bgezl" : "bgez", "s,p", sreg); return; } if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "blezl" : "blez", - "s,p", treg); + macro_build (&offset_expr, likely ? "blezl" : "blez", "s,p", treg); return; } - macro_build (NULL, &icnt, NULL, "slt", "d,v,t", AT, sreg, treg); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + macro_build (NULL, "slt", "d,v,t", AT, sreg, treg); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BGTL_I: @@ -4193,9 +4318,9 @@ macro (struct mips_cl_insn *ip) do_false: /* result is always false */ if (! likely) - macro_build (NULL, &icnt, NULL, "nop", "", 0); + macro_build (NULL, "nop", "", 0); else - macro_build (NULL, &icnt, &offset_expr, "bnel", "s,t,p", 0, 0); + macro_build (&offset_expr, "bnel", "s,t,p", 0, 0); return; } if (imm_expr.X_op != O_constant) @@ -4208,14 +4333,12 @@ macro (struct mips_cl_insn *ip) likely = 1; if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgezl" : "bgez", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bgezl" : "bgez", "s,p", sreg); return; } if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 1) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgtzl" : "bgtz", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bgtzl" : "bgtz", "s,p", sreg); return; } maxnum = 0x7fffffff; @@ -4234,12 +4357,11 @@ macro (struct mips_cl_insn *ip) do_true: /* result is always true */ as_warn (_("Branch %s is always true"), ip->insn_mo->name); - macro_build (NULL, &icnt, &offset_expr, "b", "p"); + macro_build (&offset_expr, "b", "p"); return; } - set_at (&icnt, sreg, 0); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + set_at (sreg, 0); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BGEUL: @@ -4249,13 +4371,12 @@ macro (struct mips_cl_insn *ip) goto do_true; if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", 0, treg); return; } - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", AT, sreg, treg); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + macro_build (NULL, "sltu", "d,v,t", AT, sreg, treg); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BGTUL_I: @@ -4278,13 +4399,12 @@ macro (struct mips_cl_insn *ip) goto do_true; if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 1) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", sreg, 0); return; } - set_at (&icnt, sreg, 1); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + set_at (sreg, 1); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BGTL: @@ -4292,19 +4412,16 @@ macro (struct mips_cl_insn *ip) case M_BGT: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgtzl" : "bgtz", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bgtzl" : "bgtz", "s,p", sreg); return; } if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bltzl" : "bltz", - "s,p", treg); + macro_build (&offset_expr, likely ? "bltzl" : "bltz", "s,p", treg); return; } - macro_build (NULL, &icnt, NULL, "slt", "d,v,t", AT, treg, sreg); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + macro_build (NULL, "slt", "d,v,t", AT, treg, sreg); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_BGTUL: @@ -4312,15 +4429,14 @@ macro (struct mips_cl_insn *ip) case M_BGTU: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", sreg, 0); return; } if (sreg == 0) goto do_false; - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", AT, treg, sreg); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + macro_build (NULL, "sltu", "d,v,t", AT, treg, sreg); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_BLEL: @@ -4328,19 +4444,16 @@ macro (struct mips_cl_insn *ip) case M_BLE: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "blezl" : "blez", - "s,p", sreg); + macro_build (&offset_expr, likely ? "blezl" : "blez", "s,p", sreg); return; } if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgezl" : "bgez", - "s,p", treg); + macro_build (&offset_expr, likely ? "bgezl" : "bgez", "s,p", treg); return; } - macro_build (NULL, &icnt, NULL, "slt", "d,v,t", AT, treg, sreg); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + macro_build (NULL, "slt", "d,v,t", AT, treg, sreg); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BLEL_I: @@ -4368,19 +4481,16 @@ macro (struct mips_cl_insn *ip) likely = 1; if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bltzl" : "bltz", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bltzl" : "bltz", "s,p", sreg); return; } if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 1) { - macro_build (NULL, &icnt, &offset_expr, likely ? "blezl" : "blez", - "s,p", sreg); + macro_build (&offset_expr, likely ? "blezl" : "blez", "s,p", sreg); return; } - set_at (&icnt, sreg, 0); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + set_at (sreg, 0); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_BLEUL: @@ -4388,15 +4498,14 @@ macro (struct mips_cl_insn *ip) case M_BLEU: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", sreg, 0); return; } if (sreg == 0) goto do_true; - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", AT, treg, sreg); - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", - "s,t,p", AT, 0); + macro_build (NULL, "sltu", "d,v,t", AT, treg, sreg); + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", AT, 0); break; case M_BLEUL_I: @@ -4419,13 +4528,12 @@ macro (struct mips_cl_insn *ip) goto do_false; if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 1) { - macro_build (NULL, &icnt, &offset_expr, likely ? "beql" : "beq", + macro_build (&offset_expr, likely ? "beql" : "beq", "s,t,p", sreg, 0); return; } - set_at (&icnt, sreg, 1); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + set_at (sreg, 1); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_BLTL: @@ -4433,19 +4541,16 @@ macro (struct mips_cl_insn *ip) case M_BLT: if (treg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bltzl" : "bltz", - "s,p", sreg); + macro_build (&offset_expr, likely ? "bltzl" : "bltz", "s,p", sreg); return; } if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bgtzl" : "bgtz", - "s,p", treg); + macro_build (&offset_expr, likely ? "bgtzl" : "bgtz", "s,p", treg); return; } - macro_build (NULL, &icnt, NULL, "slt", "d,v,t", AT, sreg, treg); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + macro_build (NULL, "slt", "d,v,t", AT, sreg, treg); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_BLTUL: @@ -4455,13 +4560,12 @@ macro (struct mips_cl_insn *ip) goto do_false; if (sreg == 0) { - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", 0, treg); return; } - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", AT, sreg, treg); - macro_build (NULL, &icnt, &offset_expr, likely ? "bnel" : "bne", - "s,t,p", AT, 0); + macro_build (NULL, "sltu", "d,v,t", AT, sreg, treg); + macro_build (&offset_expr, likely ? "bnel" : "bne", "s,t,p", AT, 0); break; case M_DEXT: @@ -4508,8 +4612,7 @@ macro (struct mips_cl_insn *ip) s = "dextm"; fmt = "t,r,+A,+G"; } - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, - fmt, treg, sreg, pos, size - 1); + macro_build ((expressionS *) NULL, s, fmt, treg, sreg, pos, size - 1); } return; @@ -4557,8 +4660,8 @@ macro (struct mips_cl_insn *ip) s = "dinsm"; fmt = "t,r,+A,+F"; } - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, s, - fmt, treg, sreg, pos, pos + size - 1); + macro_build ((expressionS *) NULL, s, fmt, treg, sreg, pos, + pos + size - 1); } return; @@ -4576,9 +4679,9 @@ macro (struct mips_cl_insn *ip) { as_warn (_("Divide by zero.")); if (mips_trap) - macro_build (NULL, &icnt, NULL, "teq", "s,t,q", 0, 0, 7); + macro_build (NULL, "teq", "s,t,q", 0, 0, 7); else - macro_build (NULL, &icnt, NULL, "break", "c", 7); + macro_build (NULL, "break", "c", 7); return; } @@ -4587,39 +4690,34 @@ macro (struct mips_cl_insn *ip) mips_any_noreorder = 1; if (mips_trap) { - macro_build (NULL, &icnt, NULL, "teq", "s,t,q", treg, 0, 7); - macro_build (NULL, &icnt, NULL, dbl ? "ddiv" : "div", "z,s,t", - sreg, treg); + macro_build (NULL, "teq", "s,t,q", treg, 0, 7); + macro_build (NULL, dbl ? "ddiv" : "div", "z,s,t", sreg, treg); } else { expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "bne", "s,t,p", treg, 0); - macro_build (NULL, &icnt, NULL, dbl ? "ddiv" : "div", "z,s,t", - sreg, treg); - macro_build (NULL, &icnt, NULL, "break", "c", 7); + macro_build (&expr1, "bne", "s,t,p", treg, 0); + macro_build (NULL, dbl ? "ddiv" : "div", "z,s,t", sreg, treg); + macro_build (NULL, "break", "c", 7); } expr1.X_add_number = -1; - macro_build (NULL, &icnt, &expr1, dbl ? "daddiu" : "addiu", "t,r,j", - AT, 0, BFD_RELOC_LO16); + load_register (AT, &expr1, dbl); expr1.X_add_number = mips_trap ? (dbl ? 12 : 8) : (dbl ? 20 : 16); - macro_build (NULL, &icnt, &expr1, "bne", "s,t,p", treg, AT); + macro_build (&expr1, "bne", "s,t,p", treg, AT); if (dbl) { expr1.X_add_number = 1; - macro_build (NULL, &icnt, &expr1, "daddiu", "t,r,j", AT, 0, - BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, "dsll32", "d,w,<", AT, AT, 31); + load_register (AT, &expr1, dbl); + macro_build (NULL, "dsll32", "d,w,<", AT, AT, 31); } else { expr1.X_add_number = 0x80000000; - macro_build (NULL, &icnt, &expr1, "lui", "t,u", AT, - BFD_RELOC_HI16); + macro_build (&expr1, "lui", "t,u", AT, BFD_RELOC_HI16); } if (mips_trap) { - macro_build (NULL, &icnt, NULL, "teq", "s,t,q", sreg, AT, 6); + macro_build (NULL, "teq", "s,t,q", sreg, AT, 6); /* We want to close the noreorder block as soon as possible, so that later insns are available for delay slot filling. */ --mips_opts.noreorder; @@ -4627,16 +4725,16 @@ macro (struct mips_cl_insn *ip) else { expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "bne", "s,t,p", sreg, AT); - macro_build (NULL, &icnt, NULL, "nop", "", 0); + macro_build (&expr1, "bne", "s,t,p", sreg, AT); + macro_build (NULL, "nop", "", 0); /* We want to close the noreorder block as soon as possible, so that later insns are available for delay slot filling. */ --mips_opts.noreorder; - macro_build (NULL, &icnt, NULL, "break", "c", 6); + macro_build (NULL, "break", "c", 6); } - macro_build (NULL, &icnt, NULL, s, "d", dreg); + macro_build (NULL, s, "d", dreg); break; case M_DIV_3I: @@ -4679,17 +4777,17 @@ macro (struct mips_cl_insn *ip) { as_warn (_("Divide by zero.")); if (mips_trap) - macro_build (NULL, &icnt, NULL, "teq", "s,t,q", 0, 0, 7); + macro_build (NULL, "teq", "s,t,q", 0, 0, 7); else - macro_build (NULL, &icnt, NULL, "break", "c", 7); + macro_build (NULL, "break", "c", 7); return; } if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 1) { if (strcmp (s2, "mflo") == 0) - move_register (&icnt, dreg, sreg); + move_register (dreg, sreg); else - move_register (&icnt, dreg, 0); + move_register (dreg, 0); return; } if (imm_expr.X_op == O_constant @@ -4698,17 +4796,16 @@ macro (struct mips_cl_insn *ip) { if (strcmp (s2, "mflo") == 0) { - macro_build (NULL, &icnt, NULL, dbl ? "dneg" : "neg", "d,w", - dreg, sreg); + macro_build (NULL, dbl ? "dneg" : "neg", "d,w", dreg, sreg); } else - move_register (&icnt, dreg, 0); + move_register (dreg, 0); return; } - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, s, "z,s,t", sreg, AT); - macro_build (NULL, &icnt, NULL, s2, "d", dreg); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, s, "z,s,t", sreg, AT); + macro_build (NULL, s2, "d", dreg); break; case M_DIVU_3: @@ -4732,8 +4829,8 @@ macro (struct mips_cl_insn *ip) mips_any_noreorder = 1; if (mips_trap) { - macro_build (NULL, &icnt, NULL, "teq", "s,t,q", treg, 0, 7); - macro_build (NULL, &icnt, NULL, s, "z,s,t", sreg, treg); + macro_build (NULL, "teq", "s,t,q", treg, 0, 7); + macro_build (NULL, s, "z,s,t", sreg, treg); /* We want to close the noreorder block as soon as possible, so that later insns are available for delay slot filling. */ --mips_opts.noreorder; @@ -4741,15 +4838,15 @@ macro (struct mips_cl_insn *ip) else { expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "bne", "s,t,p", treg, 0); - macro_build (NULL, &icnt, NULL, s, "z,s,t", sreg, treg); + macro_build (&expr1, "bne", "s,t,p", treg, 0); + macro_build (NULL, s, "z,s,t", sreg, treg); /* We want to close the noreorder block as soon as possible, so that later insns are available for delay slot filling. */ --mips_opts.noreorder; - macro_build (NULL, &icnt, NULL, "break", "c", 7); + macro_build (NULL, "break", "c", 7); } - macro_build (NULL, &icnt, NULL, s2, "d", dreg); + macro_build (NULL, s2, "d", dreg); return; case M_DLCA_AB: @@ -4774,7 +4871,7 @@ macro (struct mips_cl_insn *ip) && offset_expr.X_add_number >= -0x8000 && offset_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &offset_expr, + macro_build (&offset_expr, (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu", "t,r,j", treg, sreg, BFD_RELOC_LO16); return; @@ -4816,18 +4913,18 @@ macro (struct mips_cl_insn *ip) { tempreg = treg; used_at = 0; - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", tempreg, - BFD_RELOC_PCREL_HI16_S); + macro_build (&offset_expr, "lui", "t,u", + tempreg, BFD_RELOC_PCREL_HI16_S); } else { - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", tempreg, - BFD_RELOC_PCREL_HI16_S); - macro_build (NULL, &icnt, NULL, + macro_build (&offset_expr, "lui", "t,u", + tempreg, BFD_RELOC_PCREL_HI16_S); + macro_build (NULL, (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu", "d,v,t", tempreg, tempreg, breg); } - macro_build (NULL, &icnt, &offset_expr, + macro_build (&offset_expr, (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu", "t,r,j", treg, tempreg, BFD_RELOC_PCREL_LO16); if (! used_at) @@ -4843,7 +4940,7 @@ macro (struct mips_cl_insn *ip) } if (offset_expr.X_op == O_constant) - load_register (&icnt, tempreg, &offset_expr, + load_register (tempreg, &offset_expr, ((mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC) ? (dbl || HAVE_64BIT_ADDRESSES) : HAVE_64BIT_ADDRESSES)); @@ -4874,41 +4971,37 @@ macro (struct mips_cl_insn *ip) dsll $tempreg,16 daddiu $tempreg, (BFD_RELOC_LO16) */ - char *p = NULL; if (HAVE_64BIT_ADDRESSES) { - /* We don't do GP optimization for now because RELAX_ENCODE can't - hold the data for such large chunks. */ + /* ??? We don't provide a GP-relative alternative for + these macros. It used not to be possible with the + original relaxation code, but it could be done now. */ if (used_at == 0 && ! mips_opts.noat) { - macro_build (p, &icnt, &offset_expr, "lui", "t,u", + macro_build (&offset_expr, "lui", "t,u", tempreg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, &icnt, &offset_expr, "lui", "t,u", + macro_build (&offset_expr, "lui", "t,u", AT, BFD_RELOC_HI16_S); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, tempreg, BFD_RELOC_MIPS_HIGHER); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", + macro_build (&offset_expr, "daddiu", "t,r,j", AT, AT, BFD_RELOC_LO16); - macro_build (p, &icnt, NULL, "dsll32", "d,w,<", - tempreg, tempreg, 0); - macro_build (p, &icnt, NULL, "daddu", "d,v,t", - tempreg, tempreg, AT); + macro_build (NULL, "dsll32", "d,w,<", tempreg, tempreg, 0); + macro_build (NULL, "daddu", "d,v,t", tempreg, tempreg, AT); used_at = 1; } else { - macro_build (p, &icnt, &offset_expr, "lui", "t,u", + macro_build (&offset_expr, "lui", "t,u", tempreg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, tempreg, BFD_RELOC_MIPS_HIGHER); - macro_build (p, &icnt, NULL, "dsll", "d,w,<", - tempreg, tempreg, 16); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", + macro_build (NULL, "dsll", "d,w,<", tempreg, tempreg, 16); + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, tempreg, BFD_RELOC_HI16_S); - macro_build (p, &icnt, NULL, "dsll", "d,w,<", - tempreg, tempreg, 16); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", + macro_build (NULL, "dsll", "d,w,<", tempreg, tempreg, 16); + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); } } @@ -4917,20 +5010,16 @@ macro (struct mips_cl_insn *ip) if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET && ! nopic_need_relax (offset_expr.X_add_symbol, 1)) { - frag_grow (20); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, mips_gp_register, - BFD_RELOC_GPREL16); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (4, 8, 0, 4, 0, - mips_opts.warn_about_macros), - offset_expr.X_add_symbol, 0, NULL); - } - macro_build_lui (p, &icnt, &offset_expr, tempreg); - if (p != NULL) - p += 4; - macro_build (p, &icnt, &offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, mips_gp_register, BFD_RELOC_GPREL16); + relax_switch (); + } + macro_build_lui (&offset_expr, tempreg); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, tempreg, BFD_RELOC_LO16); + if (mips_relax.sequence) + relax_end (); } } else if (mips_pic == SVR4_PIC && ! mips_big_got && ! HAVE_NEWABI) @@ -4967,60 +5056,46 @@ macro (struct mips_cl_insn *ip) addiu instruction. */ - expr1.X_add_number = offset_expr.X_add_number; - offset_expr.X_add_number = 0; - frag_grow (32); - if (expr1.X_add_number == 0 && breg == 0 - && (call || tempreg == PIC_CALL_REG)) - lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16; - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, lw_reloc_type, mips_gp_register); - if (expr1.X_add_number == 0) + if (offset_expr.X_add_number == 0) { - int off; - char *p; + if (breg == 0 && (call || tempreg == PIC_CALL_REG)) + lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16; - if (breg == 0) - off = 0; - else + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + lw_reloc_type, mips_gp_register); + if (breg != 0) { /* We're going to put in an addu instruction using tempreg, so we may as well insert the nop right now. */ - macro_build (NULL, &icnt, NULL, "nop", ""); - off = 4; + macro_build (NULL, "nop", ""); } - p = frag_var (rs_machine_dependent, 8 - off, 0, - RELAX_ENCODE (0, 8 - off, -4 - off, 4 - off, 0, - (breg == 0 - ? mips_opts.warn_about_macros - : 0)), - offset_expr.X_add_symbol, 0, NULL); - if (breg == 0) - { - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - } - macro_build (p, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); + relax_switch (); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + tempreg, BFD_RELOC_MIPS_GOT16, mips_gp_register); + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, tempreg, BFD_RELOC_LO16); + relax_end (); /* FIXME: If breg == 0, and the next instruction uses $tempreg, then if this variant case is used an extra nop will be generated. */ } - else if (expr1.X_add_number >= -0x8000 - && expr1.X_add_number < 0x8000) + else if (offset_expr.X_add_number >= -0x8000 + && offset_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, NULL, "nop", ""); - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); - frag_var (rs_machine_dependent, 0, 0, - RELAX_ENCODE (0, 0, -12, -4, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + load_got_offset (tempreg, &offset_expr); + macro_build (NULL, "nop", ""); + add_got_offset (tempreg, &offset_expr); } else { - int off1; - + expr1.X_add_number = offset_expr.X_add_number; + offset_expr.X_add_number = + ((offset_expr.X_add_number + 0x8000) & 0xffff) - 0x8000; + load_got_offset (tempreg, &offset_expr); + offset_expr.X_add_number = expr1.X_add_number; /* If we are going to add in a base register, and the target register and the base register are the same, then we are using AT as a temporary register. Since @@ -5028,40 +5103,21 @@ macro (struct mips_cl_insn *ip) current AT (from the global offset table) and the register into the register now, and pretend we were not using a base register. */ - if (breg != treg) - off1 = 0; - else + if (breg == treg) { - macro_build (NULL, &icnt, NULL, "nop", ""); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, "nop", ""); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); breg = 0; tempreg = treg; - off1 = -8; } - - /* Set mips_optimize around the lui instruction to avoid - inserting an unnecessary nop after the lw. */ - hold_mips_optimize = mips_optimize; - mips_optimize = 2; - macro_build_lui (NULL, &icnt, &expr1, AT); - mips_optimize = hold_mips_optimize; - - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, "t,r,j", - AT, AT, BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, AT); - frag_var (rs_machine_dependent, 0, 0, - RELAX_ENCODE (0, 0, -16 + off1, -8, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + add_got_offset_hilo (tempreg, &offset_expr, AT); used_at = 1; } } else if (mips_pic == SVR4_PIC && ! mips_big_got && HAVE_NEWABI) { - char *p = NULL; - int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_DISP; - int adj = 0; + int add_breg_early = 0; /* If this is a reference to an external, and there is no constant, or local symbol (*), with or without a @@ -5086,28 +5142,20 @@ macro (struct mips_cl_insn *ip) local symbols, even though it introduces an additional instruction. */ - frag_grow (28); - if (offset_expr.X_add_number == 0 && breg == 0 - && (call || tempreg == PIC_CALL_REG)) - lw_reloc_type = (int) BFD_RELOC_MIPS_CALL16; if (offset_expr.X_add_number) { - frag_now->tc_frag_data.tc_fr_offset = - expr1.X_add_number = offset_expr.X_add_number; + expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", tempreg, lw_reloc_type, - mips_gp_register); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); - p = frag_var (rs_machine_dependent, 4, 0, - RELAX_ENCODE (8, 4, 0, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + macro_build (&expr1, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, tempreg, BFD_RELOC_LO16); } else if (IS_SEXT_32BIT_NUM (expr1.X_add_number + 0x8000)) { @@ -5125,64 +5173,54 @@ macro (struct mips_cl_insn *ip) else { assert (tempreg == AT); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, - "d,v,t", treg, AT, breg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + treg, AT, breg); dreg = treg; - adj = 4; + add_breg_early = 1; } - macro_build_lui (NULL, &icnt, &expr1, AT); - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", AT, AT, BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + load_register (AT, &expr1, HAVE_64BIT_ADDRESSES); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", dreg, dreg, AT); - p = frag_var (rs_machine_dependent, 4 + adj, 0, - RELAX_ENCODE (16 + adj, 4 + adj, - 0, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - used_at = 1; } else as_bad (_("PIC code offset overflow (max 32 signed bits)")); + relax_switch (); offset_expr.X_add_number = expr1.X_add_number; - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT_DISP, - mips_gp_register); - if (adj) + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + if (add_breg_early) { - macro_build (p + 4, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, tempreg, breg); breg = 0; tempreg = treg; } + relax_end (); } - else + else if (breg == 0 && (call || tempreg == PIC_CALL_REG)) { - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", tempreg, lw_reloc_type, - mips_gp_register); - if (lw_reloc_type != BFD_RELOC_MIPS_GOT_DISP) - p = frag_var (rs_machine_dependent, 0, 0, - RELAX_ENCODE (0, 0, -4, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_CALL16, mips_gp_register); + relax_switch (); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); + relax_end (); } - - if (! p) + else { - /* To avoid confusion in tc_gen_reloc, we must ensure - that this does not become a variant frag. */ - frag_wane (frag_now); - frag_new (0); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); } } else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI) { - int gpdel; - char *p; + int gpdelay; int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16; int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_LO16; int local_reloc_type = (int) BFD_RELOC_MIPS_GOT16; @@ -5230,63 +5268,39 @@ macro (struct mips_cl_insn *ip) expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; - frag_grow (52); - if (reg_needs_delay (mips_gp_register)) - gpdel = 4; - else - gpdel = 0; + relax_start (offset_expr.X_add_symbol); + gpdelay = reg_needs_delay (mips_gp_register); if (expr1.X_add_number == 0 && breg == 0 && (call || tempreg == PIC_CALL_REG)) { lui_reloc_type = (int) BFD_RELOC_MIPS_CALL_HI16; lw_reloc_type = (int) BFD_RELOC_MIPS_CALL_LO16; } - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", - tempreg, lui_reloc_type); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (&offset_expr, "lui", "t,u", tempreg, lui_reloc_type); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, lw_reloc_type, tempreg); if (expr1.X_add_number == 0) { - int off; - - if (breg == 0) - off = 0; - else + if (breg != 0) { /* We're going to put in an addu instruction using tempreg, so we may as well insert the nop right now. */ - macro_build (NULL, &icnt, NULL, "nop", ""); - off = 4; + macro_build (NULL, "nop", ""); } - - p = frag_var (rs_machine_dependent, 12 + gpdel, 0, - RELAX_ENCODE (12 + off, 12 + gpdel, gpdel, - 8 + gpdel, 0, - (breg == 0 - ? mips_opts.warn_about_macros - : 0)), - offset_expr.X_add_symbol, 0, NULL); } else if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (NULL, &icnt, NULL, "nop", ""); - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, "t,r,j", + macro_build (NULL, "nop", ""); + macro_build (&expr1, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); - - p = frag_var (rs_machine_dependent, 12 + gpdel, 0, - RELAX_ENCODE (20, 12 + gpdel, gpdel, 8 + gpdel, 0, - (breg == 0 - ? mips_opts.warn_about_macros - : 0)), - offset_expr.X_add_symbol, 0, NULL); } else { - int adj, dreg; + int dreg; /* If we are going to add in a base register, and the target register and the base register are the same, @@ -5296,61 +5310,40 @@ macro (struct mips_cl_insn *ip) register into the register now, and pretend we were not using a base register. */ if (breg != treg) - { - adj = 0; - dreg = tempreg; - } + dreg = tempreg; else { assert (tempreg == AT); - macro_build (NULL, &icnt, NULL, "nop", ""); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, "nop", ""); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); dreg = treg; - adj = 8; } - /* Set mips_optimize around the lui instruction to avoid - inserting an unnecessary nop after the lw. */ - hold_mips_optimize = mips_optimize; - mips_optimize = 2; - macro_build_lui (NULL, &icnt, &expr1, AT); - mips_optimize = hold_mips_optimize; - - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, "t,r,j", - AT, AT, BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - dreg, dreg, AT); - - p = frag_var (rs_machine_dependent, 16 + gpdel + adj, 0, - RELAX_ENCODE (24 + adj, 16 + gpdel + adj, gpdel, - 8 + gpdel, 0, - (breg == 0 - ? mips_opts.warn_about_macros - : 0)), - offset_expr.X_add_symbol, 0, NULL); + load_register (AT, &expr1, HAVE_64BIT_ADDRESSES); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", dreg, dreg, AT); used_at = 1; } + offset_expr.X_add_number = + ((expr1.X_add_number + 0x8000) & 0xffff) - 0x8000; + relax_switch (); - if (gpdel > 0) + if (gpdelay) { /* This is needed because this instruction uses $gp, but the first instruction on the main stream does not. */ - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; + macro_build (NULL, "nop", ""); } - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, local_reloc_type, mips_gp_register); - p += 4; + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + local_reloc_type, mips_gp_register); if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - macro_build (p, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, tempreg, BFD_RELOC_LO16); /* FIXME: If add_number is 0, and there was no base register, the external symbol case ended with a load, so if the symbol turns out to not be external, and @@ -5364,33 +5357,28 @@ macro (struct mips_cl_insn *ip) /* We must add in the base register now, as in the external symbol case. */ assert (tempreg == AT); - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - macro_build (p, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, "nop", ""); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); - p += 4; tempreg = treg; /* We set breg to 0 because we have arranged to add it in in both cases. */ breg = 0; } - macro_build_lui (p, &icnt, &expr1, AT); - p += 4; - macro_build (p, &icnt, &expr1, ADDRESS_ADDI_INSN, "t,r,j", + macro_build_lui (&expr1, AT); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", AT, AT, BFD_RELOC_LO16); - p += 4; - macro_build (p, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, AT); - p += 4; } + relax_end (); } else if (mips_pic == SVR4_PIC && HAVE_NEWABI) { - char *p = NULL; int lui_reloc_type = (int) BFD_RELOC_MIPS_GOT_HI16; int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT_LO16; - int adj = 0; + int add_breg_early = 0; /* This is the large GOT case. If this is a reference to an external symbol, and there is no constant, we want @@ -5423,10 +5411,9 @@ macro (struct mips_cl_insn *ip) addiu $reg,$reg, (BFD_RELOC_MIPS_GOT_OFST) otherwise we have to resort to GOT_HI16/GOT_LO16. */ - frag_grow (40); + relax_start (offset_expr.X_add_symbol); - frag_now->tc_frag_data.tc_fr_offset = - expr1.X_add_number = offset_expr.X_add_number; + expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; if (expr1.X_add_number == 0 && breg == 0 @@ -5435,29 +5422,19 @@ macro (struct mips_cl_insn *ip) lui_reloc_type = (int) BFD_RELOC_MIPS_CALL_HI16; lw_reloc_type = (int) BFD_RELOC_MIPS_CALL_LO16; } - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", - tempreg, lui_reloc_type); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (&offset_expr, "lui", "t,u", tempreg, lui_reloc_type); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", tempreg, lw_reloc_type, tempreg); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + tempreg, lw_reloc_type, tempreg); if (expr1.X_add_number == 0) - { - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (12, 8, 0, 4, 0, - mips_opts.warn_about_macros), - offset_expr.X_add_symbol, 0, NULL); - } + ; else if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, "t,r,j", + macro_build (&expr1, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (16, 8, 0, 4, 0, - mips_opts.warn_about_macros), - offset_expr.X_add_symbol, 0, NULL); } else if (IS_SEXT_32BIT_NUM (expr1.X_add_number + 0x8000)) { @@ -5475,53 +5452,42 @@ macro (struct mips_cl_insn *ip) else { assert (tempreg == AT); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); dreg = treg; - adj = 4; + add_breg_early = 1; } - /* Set mips_optimize around the lui instruction to avoid - inserting an unnecessary nop after the lw. */ - macro_build_lui (NULL, &icnt, &expr1, AT); - macro_build (NULL, &icnt, &expr1, ADDRESS_ADDI_INSN, - "t,r,j", AT, AT, BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - dreg, dreg, AT); - - p = frag_var (rs_machine_dependent, 8 + adj, 0, - RELAX_ENCODE (24 + adj, 8 + adj, - 0, 4, 0, - (breg == 0 - ? mips_opts.warn_about_macros - : 0)), - offset_expr.X_add_symbol, 0, NULL); + load_register (AT, &expr1, HAVE_64BIT_ADDRESSES); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", dreg, dreg, AT); used_at = 1; } else as_bad (_("PIC code offset overflow (max 32 signed bits)")); + relax_switch (); offset_expr.X_add_number = expr1.X_add_number; - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); - macro_build (p + 4, &icnt, &offset_expr, ADDRESS_ADDI_INSN, "t,r,j", - tempreg, tempreg, BFD_RELOC_MIPS_GOT_OFST); - if (adj) + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, + tempreg, BFD_RELOC_MIPS_GOT_OFST); + if (add_breg_early) { - macro_build (p + 8, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, tempreg, breg); breg = 0; tempreg = treg; } + relax_end (); } else if (mips_pic == EMBEDDED_PIC) { /* We use addiu $tempreg,$gp, (BFD_RELOC_GPREL16) */ - macro_build (NULL, &icnt, &offset_expr, ADDRESS_ADDI_INSN, "t,r,j", - tempreg, mips_gp_register, BFD_RELOC_GPREL16); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, + mips_gp_register, BFD_RELOC_GPREL16); } else abort (); @@ -5535,7 +5501,7 @@ macro (struct mips_cl_insn *ip) else s = ADDRESS_ADD_INSN; - macro_build (NULL, &icnt, NULL, s, "d,v,t", treg, tempreg, breg); + macro_build (NULL, s, "d,v,t", treg, tempreg, breg); } if (! used_at) @@ -5548,9 +5514,9 @@ macro (struct mips_cl_insn *ip) requires an absolute address. We convert it to a b instruction. */ if (mips_pic == NO_PIC) - macro_build (NULL, &icnt, &offset_expr, "j", "a"); + macro_build (&offset_expr, "j", "a"); else - macro_build (NULL, &icnt, &offset_expr, "b", "p"); + macro_build (&offset_expr, "b", "p"); return; /* The jal instructions must be handled as macros because when @@ -5562,13 +5528,13 @@ macro (struct mips_cl_insn *ip) case M_JAL_2: if (mips_pic == NO_PIC || mips_pic == EMBEDDED_PIC) - macro_build (NULL, &icnt, NULL, "jalr", "d,s", dreg, sreg); + macro_build (NULL, "jalr", "d,s", dreg, sreg); else if (mips_pic == SVR4_PIC) { if (sreg != PIC_CALL_REG) as_warn (_("MIPS PIC call to register other than $25")); - macro_build (NULL, &icnt, NULL, "jalr", "d,s", dreg, sreg); + macro_build (NULL, "jalr", "d,s", dreg, sreg); if (! HAVE_NEWABI) { if (mips_cprestore_offset < 0) @@ -5588,8 +5554,7 @@ macro (struct mips_cl_insn *ip) mips_cprestore_valid = 1; } expr1.X_add_number = mips_cprestore_offset; - macro_build_ldst_constoffset (NULL, &icnt, &expr1, - ADDRESS_LOAD_INSN, + macro_build_ldst_constoffset (&expr1, ADDRESS_LOAD_INSN, mips_gp_register, mips_frame_reg, HAVE_64BIT_ADDRESSES); @@ -5603,11 +5568,9 @@ macro (struct mips_cl_insn *ip) case M_JAL_A: if (mips_pic == NO_PIC) - macro_build (NULL, &icnt, &offset_expr, "jal", "a"); + macro_build (&offset_expr, "jal", "a"); else if (mips_pic == SVR4_PIC) { - char *p; - /* If this is a reference to an external symbol, and we are using a small GOT, we want lw $25,($gp) (BFD_RELOC_MIPS_CALL16) @@ -5640,86 +5603,74 @@ macro (struct mips_cl_insn *ip) { if (! mips_big_got) { - frag_grow (4); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_CALL16, + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_CALL16, + mips_gp_register); + relax_switch (); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_GOT_DISP, mips_gp_register); - frag_var (rs_machine_dependent, 0, 0, - RELAX_ENCODE (0, 0, -4, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + relax_end (); } else { - frag_grow (20); - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", - PIC_CALL_REG, BFD_RELOC_MIPS_CALL_HI16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - PIC_CALL_REG, PIC_CALL_REG, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, - BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (12, 8, 0, 4, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, - BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); - macro_build (p + 4, &icnt, &offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", PIC_CALL_REG, PIC_CALL_REG, + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, "lui", "t,u", PIC_CALL_REG, + BFD_RELOC_MIPS_CALL_HI16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", PIC_CALL_REG, + PIC_CALL_REG, mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_CALL_LO16, + PIC_CALL_REG); + relax_switch (); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_GOT_PAGE, + mips_gp_register); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + PIC_CALL_REG, PIC_CALL_REG, BFD_RELOC_MIPS_GOT_OFST); + relax_end (); } - macro_build_jalr (icnt, &offset_expr); + macro_build_jalr (&offset_expr); } else { - frag_grow (40); + relax_start (offset_expr.X_add_symbol); if (! mips_big_got) { - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_CALL16, + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_CALL16, mips_gp_register); - macro_build (NULL, &icnt, NULL, "nop", ""); - p = frag_var (rs_machine_dependent, 4, 0, - RELAX_ENCODE (0, 4, -8, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); + macro_build (NULL, "nop", ""); + relax_switch (); } else { - int gpdel; + int gpdelay; - if (reg_needs_delay (mips_gp_register)) - gpdel = 4; - else - gpdel = 0; - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", - PIC_CALL_REG, BFD_RELOC_MIPS_CALL_HI16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - PIC_CALL_REG, PIC_CALL_REG, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, - BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG); - macro_build (NULL, &icnt, NULL, "nop", ""); - p = frag_var (rs_machine_dependent, 12 + gpdel, 0, - RELAX_ENCODE (16, 12 + gpdel, gpdel, - 8 + gpdel, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - if (gpdel > 0) - { - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - } - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_GOT16, - mips_gp_register); - p += 4; - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; + gpdelay = reg_needs_delay (mips_gp_register); + macro_build (&offset_expr, "lui", "t,u", PIC_CALL_REG, + BFD_RELOC_MIPS_CALL_HI16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", PIC_CALL_REG, + PIC_CALL_REG, mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_CALL_LO16, + PIC_CALL_REG); + macro_build (NULL, "nop", ""); + relax_switch (); + if (gpdelay) + macro_build (NULL, "nop", ""); } - macro_build (p, &icnt, &offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", PIC_CALL_REG, PIC_CALL_REG, - BFD_RELOC_LO16); - macro_build_jalr (icnt, &offset_expr); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + PIC_CALL_REG, BFD_RELOC_MIPS_GOT16, + mips_gp_register); + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + PIC_CALL_REG, PIC_CALL_REG, BFD_RELOC_LO16); + relax_end (); + macro_build_jalr (&offset_expr); if (mips_cprestore_offset < 0) as_warn (_("No .cprestore pseudo-op used in PIC code")); @@ -5738,10 +5689,9 @@ macro (struct mips_cl_insn *ip) mips_cprestore_valid = 1; } if (mips_opts.noreorder) - macro_build (NULL, &icnt, NULL, "nop", ""); + macro_build (NULL, "nop", ""); expr1.X_add_number = mips_cprestore_offset; - macro_build_ldst_constoffset (NULL, &icnt, &expr1, - ADDRESS_LOAD_INSN, + macro_build_ldst_constoffset (&expr1, ADDRESS_LOAD_INSN, mips_gp_register, mips_frame_reg, HAVE_64BIT_ADDRESSES); @@ -5750,7 +5700,7 @@ macro (struct mips_cl_insn *ip) } else if (mips_pic == EMBEDDED_PIC) { - macro_build (NULL, &icnt, &offset_expr, "bal", "p"); + macro_build (&offset_expr, "bal", "p"); /* The linker may expand the call to a longer sequence which uses $at, so we must break rather than return. */ break; @@ -5976,15 +5926,15 @@ macro (struct mips_cl_insn *ip) nice to emit: $treg,($breg) (BFD_RELOC_PCREL_LO16) instead, but that seems quite difficult. */ - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", tempreg, + macro_build (&offset_expr, "lui", "t,u", tempreg, BFD_RELOC_PCREL_HI16_S); - macro_build (NULL, &icnt, NULL, - ((bfd_arch_bits_per_address (stdoutput) == 32 - || ! ISA_HAS_64BIT_REGS (mips_opts.isa)) - ? "addu" : "daddu"), - "d,v,t", tempreg, tempreg, breg); - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, - BFD_RELOC_PCREL_LO16, tempreg); + macro_build (NULL, + ((bfd_arch_bits_per_address (stdoutput) == 32 + || ! ISA_HAS_64BIT_REGS (mips_opts.isa)) + ? "addu" : "daddu"), + "d,v,t", tempreg, tempreg, breg); + macro_build (&offset_expr, s, fmt, treg, + BFD_RELOC_PCREL_LO16, tempreg); if (! used_at) return; break; @@ -6002,8 +5952,6 @@ macro (struct mips_cl_insn *ip) if (mips_pic == NO_PIC || offset_expr.X_op == O_constant) { - char *p; - /* If this is a reference to a GP relative symbol, and there is no base register, we want $treg,($gp) (BFD_RELOC_GPREL16) @@ -6089,46 +6037,40 @@ macro (struct mips_cl_insn *ip) && offset_expr.X_op == O_constant && ! IS_SEXT_32BIT_NUM (offset_expr.X_add_number + 0x8000))) { - p = NULL; - - /* We don't do GP optimization for now because RELAX_ENCODE can't - hold the data for such large chunks. */ + /* ??? We don't provide a GP-relative alternative for + these macros. It used not to be possible with the + original relaxation code, but it could be done now. */ if (used_at == 0 && ! mips_opts.noat) { - macro_build (p, &icnt, &offset_expr, "lui", "t,u", - tempreg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, &icnt, &offset_expr, "lui", "t,u", - AT, BFD_RELOC_HI16_S); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", - tempreg, tempreg, BFD_RELOC_MIPS_HIGHER); + macro_build (&offset_expr, "lui", "t,u", tempreg, + BFD_RELOC_MIPS_HIGHEST); + macro_build (&offset_expr, "lui", "t,u", AT, + BFD_RELOC_HI16_S); + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, + tempreg, BFD_RELOC_MIPS_HIGHER); if (breg != 0) - macro_build (p, &icnt, NULL, "daddu", "d,v,t", - AT, AT, breg); - macro_build (p, &icnt, NULL, "dsll32", "d,w,<", - tempreg, tempreg, 0); - macro_build (p, &icnt, NULL, "daddu", "d,v,t", - tempreg, tempreg, AT); - macro_build (p, &icnt, &offset_expr, s, fmt, treg, - BFD_RELOC_LO16, tempreg); + macro_build (NULL, "daddu", "d,v,t", AT, AT, breg); + macro_build (NULL, "dsll32", "d,w,<", tempreg, tempreg, 0); + macro_build (NULL, "daddu", "d,v,t", tempreg, tempreg, AT); + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, + tempreg); used_at = 1; } else { - macro_build (p, &icnt, &offset_expr, "lui", "t,u", - tempreg, BFD_RELOC_MIPS_HIGHEST); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", - tempreg, tempreg, BFD_RELOC_MIPS_HIGHER); - macro_build (p, &icnt, NULL, "dsll", "d,w,<", - tempreg, tempreg, 16); - macro_build (p, &icnt, &offset_expr, "daddiu", "t,r,j", - tempreg, tempreg, BFD_RELOC_HI16_S); - macro_build (p, &icnt, NULL, "dsll", "d,w,<", - tempreg, tempreg, 16); + macro_build (&offset_expr, "lui", "t,u", tempreg, + BFD_RELOC_MIPS_HIGHEST); + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, + tempreg, BFD_RELOC_MIPS_HIGHER); + macro_build (NULL, "dsll", "d,w,<", tempreg, tempreg, 16); + macro_build (&offset_expr, "daddiu", "t,r,j", tempreg, + tempreg, BFD_RELOC_HI16_S); + macro_build (NULL, "dsll", "d,w,<", tempreg, tempreg, 16); if (breg != 0) - macro_build (p, &icnt, NULL, "daddu", "d,v,t", + macro_build (NULL, "daddu", "d,v,t", tempreg, tempreg, breg); - macro_build (p, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, tempreg); } @@ -6141,58 +6083,44 @@ macro (struct mips_cl_insn *ip) if (breg == 0) { - if ((valueT) offset_expr.X_add_number > MAX_GPREL_OFFSET - || nopic_need_relax (offset_expr.X_add_symbol, 1)) - p = NULL; - else + if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET + && ! nopic_need_relax (offset_expr.X_add_symbol, 1)) { - frag_grow (20); - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, - BFD_RELOC_GPREL16, mips_gp_register); - p = frag_var (rs_machine_dependent, 8, 0, - RELAX_ENCODE (4, 8, 0, 4, 0, - (mips_opts.warn_about_macros - || (used_at - && mips_opts.noat))), - offset_expr.X_add_symbol, 0, NULL); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_GPREL16, + mips_gp_register); + relax_switch (); used_at = 0; } - macro_build_lui (p, &icnt, &offset_expr, tempreg); - if (p != NULL) - p += 4; - macro_build (p, &icnt, &offset_expr, s, fmt, treg, + macro_build_lui (&offset_expr, tempreg); + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, tempreg); + if (mips_relax.sequence) + relax_end (); } else { - if ((valueT) offset_expr.X_add_number > MAX_GPREL_OFFSET - || nopic_need_relax (offset_expr.X_add_symbol, 1)) - p = NULL; - else + if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET + && ! nopic_need_relax (offset_expr.X_add_symbol, 1)) { - frag_grow (28); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + relax_start (offset_expr.X_add_symbol); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, breg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_GPREL16, tempreg); - p = frag_var (rs_machine_dependent, 12, 0, - RELAX_ENCODE (8, 12, 0, 8, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - } - macro_build_lui (p, &icnt, &offset_expr, tempreg); - if (p != NULL) - p += 4; - macro_build (p, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + relax_switch (); + } + macro_build_lui (&offset_expr, tempreg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - if (p != NULL) - p += 4; - macro_build (p, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, tempreg); + if (mips_relax.sequence) + relax_end (); } } else if (mips_pic == SVR4_PIC && ! mips_big_got) { - char *p; int lw_reloc_type = (int) BFD_RELOC_MIPS_GOT16; /* If this is a reference to an external symbol, we want @@ -6218,13 +6146,12 @@ macro (struct mips_cl_insn *ip) assert (offset_expr.X_op == O_symbol); if (HAVE_NEWABI) { - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT_PAGE, - mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_MIPS_GOT_OFST, tempreg); if (! used_at) @@ -6237,25 +6164,22 @@ macro (struct mips_cl_insn *ip) if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - frag_grow (20); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, lw_reloc_type, mips_gp_register); - macro_build (NULL, &icnt, NULL, "nop", ""); - p = frag_var (rs_machine_dependent, 4, 0, - RELAX_ENCODE (0, 4, -8, 0, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - macro_build (p, &icnt, &offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + lw_reloc_type, mips_gp_register); + macro_build (NULL, "nop", ""); + relax_start (offset_expr.X_add_symbol); + relax_switch (); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, + tempreg, BFD_RELOC_LO16); + relax_end (); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - macro_build (NULL, &icnt, &expr1, s, fmt, treg, BFD_RELOC_LO16, - tempreg); + macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg); } else if (mips_pic == SVR4_PIC && ! HAVE_NEWABI) { - int gpdel; - char *p; + int gpdelay; /* If this is a reference to an external symbol, we want lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) @@ -6279,43 +6203,31 @@ macro (struct mips_cl_insn *ip) if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - if (reg_needs_delay (mips_gp_register)) - gpdel = 4; - else - gpdel = 0; - frag_grow (36); - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", tempreg, + gpdelay = reg_needs_delay (mips_gp_register); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, "lui", "t,u", tempreg, BFD_RELOC_MIPS_GOT_HI16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, BFD_RELOC_MIPS_GOT_LO16, tempreg); - p = frag_var (rs_machine_dependent, 12 + gpdel, 0, - RELAX_ENCODE (12, 12 + gpdel, gpdel, 8 + gpdel, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - if (gpdel > 0) - { - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - } - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - p += 4; - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - macro_build (p, &icnt, &offset_expr, ADDRESS_ADDI_INSN, "t,r,j", - tempreg, tempreg, BFD_RELOC_LO16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, + mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_LO16, tempreg); + relax_switch (); + if (gpdelay) + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT16, mips_gp_register); + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, + tempreg, BFD_RELOC_LO16); + relax_end (); + if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - macro_build (NULL, &icnt, &expr1, s, fmt, treg, BFD_RELOC_LO16, - tempreg); + macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg); } else if (mips_pic == SVR4_PIC && HAVE_NEWABI) { - char *p; - int bregsz = breg != 0 ? 4 : 0; - /* If this is a reference to an external symbol, we want lui $tempreg, (BFD_RELOC_MIPS_GOT_HI16) add $tempreg,$tempreg,$gp @@ -6325,37 +6237,33 @@ macro (struct mips_cl_insn *ip) lw $tempreg,($gp) (BFD_RELOC_MIPS_GOT_PAGE) $treg,($tempreg) (BFD_RELOC_MIPS_GOT_OFST) */ assert (offset_expr.X_op == O_symbol); - frag_grow (36); - frag_now->tc_frag_data.tc_fr_offset = - expr1.X_add_number = offset_expr.X_add_number; + expr1.X_add_number = offset_expr.X_add_number; offset_expr.X_add_number = 0; if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", tempreg, + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, "lui", "t,u", tempreg, BFD_RELOC_MIPS_GOT_HI16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, BFD_RELOC_MIPS_GOT_LO16, tempreg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, + mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_LO16, tempreg); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - macro_build (NULL, &icnt, &expr1, s, fmt, treg, BFD_RELOC_LO16, - tempreg); + macro_build (&expr1, s, fmt, treg, BFD_RELOC_LO16, tempreg); + relax_switch (); offset_expr.X_add_number = expr1.X_add_number; - p = frag_var (rs_machine_dependent, 12 + bregsz, 0, - RELAX_ENCODE (16 + bregsz, 8 + bregsz, - 0, 4 + bregsz, 0, 0), - offset_expr.X_add_symbol, 0, NULL); - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - tempreg, BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, + BFD_RELOC_MIPS_GOT_PAGE, mips_gp_register); if (breg != 0) - macro_build (p + 4, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, tempreg, breg); - macro_build (p + 4 + bregsz, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_MIPS_GOT_OFST, tempreg); + relax_end (); } else if (mips_pic == EMBEDDED_PIC) { @@ -6368,15 +6276,15 @@ macro (struct mips_cl_insn *ip) assert (offset_expr.X_op == O_symbol); if (breg == 0) { - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, - BFD_RELOC_GPREL16, mips_gp_register); + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_GPREL16, + mips_gp_register); used_at = 0; } else { - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", tempreg, breg, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, s, fmt, treg, + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_GPREL16, tempreg); } } @@ -6390,18 +6298,18 @@ macro (struct mips_cl_insn *ip) case M_LI: case M_LI_S: - load_register (&icnt, treg, &imm_expr, 0); + load_register (treg, &imm_expr, 0); return; case M_DLI: - load_register (&icnt, treg, &imm_expr, 1); + load_register (treg, &imm_expr, 1); return; case M_LI_SS: if (imm_expr.X_op == O_constant) { - load_register (&icnt, AT, &imm_expr, 0); - macro_build (NULL, &icnt, NULL, "mtc1", "t,G", AT, treg); + load_register (AT, &imm_expr, 0); + macro_build (NULL, "mtc1", "t,G", AT, treg); break; } else @@ -6411,7 +6319,7 @@ macro (struct mips_cl_insn *ip) (offset_expr.X_add_symbol)), ".lit4") == 0 && offset_expr.X_add_number == 0); - macro_build (NULL, &icnt, &offset_expr, "lwc1", "T,o(b)", treg, + macro_build (&offset_expr, "lwc1", "T,o(b)", treg, BFD_RELOC_MIPS_LITERAL, mips_gp_register); return; } @@ -6424,7 +6332,7 @@ macro (struct mips_cl_insn *ip) if (imm_expr.X_op == O_constant || imm_expr.X_op == O_big) { if (HAVE_64BIT_GPRS) - load_register (&icnt, treg, &imm_expr, 1); + load_register (treg, &imm_expr, 1); else { int hreg, lreg; @@ -6441,15 +6349,15 @@ macro (struct mips_cl_insn *ip) } if (hreg <= 31) - load_register (&icnt, hreg, &imm_expr, 0); + load_register (hreg, &imm_expr, 0); if (lreg <= 31) { if (offset_expr.X_op == O_absent) - move_register (&icnt, lreg, 0); + move_register (lreg, 0); else { assert (offset_expr.X_op == O_constant); - load_register (&icnt, lreg, &offset_expr, 0); + load_register (lreg, &offset_expr, 0); } } } @@ -6460,19 +6368,19 @@ macro (struct mips_cl_insn *ip) upper 16 bits of the address. */ if (mips_pic == NO_PIC) { - macro_build_lui (NULL, &icnt, &offset_expr, AT); + macro_build_lui (&offset_expr, AT); } else if (mips_pic == SVR4_PIC) { - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - AT, BFD_RELOC_MIPS_GOT16, mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, + BFD_RELOC_MIPS_GOT16, mips_gp_register); } else if (mips_pic == EMBEDDED_PIC) { /* For embedded PIC we pick up the entire address off $gp in a single instruction. */ - macro_build (NULL, &icnt, &offset_expr, ADDRESS_ADDI_INSN, "t,r,j", - AT, mips_gp_register, BFD_RELOC_GPREL16); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", AT, + mips_gp_register, BFD_RELOC_GPREL16); offset_expr.X_op = O_constant; offset_expr.X_add_number = 0; } @@ -6481,27 +6389,19 @@ macro (struct mips_cl_insn *ip) /* Now we load the register(s). */ if (HAVE_64BIT_GPRS) - macro_build (NULL, &icnt, &offset_expr, "ld", "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&offset_expr, "ld", "t,o(b)", treg, BFD_RELOC_LO16, AT); else { - macro_build (NULL, &icnt, &offset_expr, "lw", "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&offset_expr, "lw", "t,o(b)", treg, BFD_RELOC_LO16, AT); if (treg != RA) { /* FIXME: How in the world do we deal with the possible overflow here? */ offset_expr.X_add_number += 4; - macro_build (NULL, &icnt, &offset_expr, "lw", "t,o(b)", + macro_build (&offset_expr, "lw", "t,o(b)", treg + 1, BFD_RELOC_LO16, AT); } } - - /* To avoid confusion in tc_gen_reloc, we must ensure that this - does not become a variant frag. */ - frag_wane (frag_now); - frag_new (0); - break; case M_LI_DD: @@ -6512,22 +6412,22 @@ macro (struct mips_cl_insn *ip) OFFSET_EXPR. */ if (imm_expr.X_op == O_constant || imm_expr.X_op == O_big) { - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_FPRS); + load_register (AT, &imm_expr, HAVE_64BIT_FPRS); if (HAVE_64BIT_FPRS) { assert (HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, "dmtc1", "t,S", AT, treg); + macro_build (NULL, "dmtc1", "t,S", AT, treg); } else { - macro_build (NULL, &icnt, NULL, "mtc1", "t,G", AT, treg + 1); + macro_build (NULL, "mtc1", "t,G", AT, treg + 1); if (offset_expr.X_op == O_absent) - macro_build (NULL, &icnt, NULL, "mtc1", "t,G", 0, treg); + macro_build (NULL, "mtc1", "t,G", 0, treg); else { assert (offset_expr.X_op == O_constant); - load_register (&icnt, AT, &offset_expr, 0); - macro_build (NULL, &icnt, NULL, "mtc1", "t,G", AT, treg); + load_register (AT, &offset_expr, 0); + macro_build (NULL, "mtc1", "t,G", AT, treg); } } break; @@ -6540,7 +6440,7 @@ macro (struct mips_cl_insn *ip) { if (mips_opts.isa != ISA_MIPS1) { - macro_build (NULL, &icnt, &offset_expr, "ldc1", "T,o(b)", treg, + macro_build (&offset_expr, "ldc1", "T,o(b)", treg, BFD_RELOC_MIPS_LITERAL, mips_gp_register); return; } @@ -6552,25 +6452,18 @@ macro (struct mips_cl_insn *ip) { assert (strcmp (s, RDATA_SECTION_NAME) == 0); if (mips_pic == SVR4_PIC) - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, - "t,o(b)", AT, BFD_RELOC_MIPS_GOT16, - mips_gp_register); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, + BFD_RELOC_MIPS_GOT16, mips_gp_register); else { /* FIXME: This won't work for a 64 bit address. */ - macro_build_lui (NULL, &icnt, &offset_expr, AT); + macro_build_lui (&offset_expr, AT); } if (mips_opts.isa != ISA_MIPS1) { - macro_build (NULL, &icnt, &offset_expr, "ldc1", "T,o(b)", treg, - BFD_RELOC_LO16, AT); - - /* To avoid confusion in tc_gen_reloc, we must ensure - that this does not become a variant frag. */ - frag_wane (frag_now); - frag_new (0); - + macro_build (&offset_expr, "ldc1", "T,o(b)", + treg, BFD_RELOC_LO16, AT); break; } breg = AT; @@ -6589,19 +6482,14 @@ macro (struct mips_cl_insn *ip) r = BFD_RELOC_LO16; dob: assert (mips_opts.isa == ISA_MIPS1); - macro_build (NULL, &icnt, &offset_expr, "lwc1", "T,o(b)", + macro_build (&offset_expr, "lwc1", "T,o(b)", target_big_endian ? treg + 1 : treg, r, breg); /* FIXME: A possible overflow which I don't know how to deal with. */ offset_expr.X_add_number += 4; - macro_build (NULL, &icnt, &offset_expr, "lwc1", "T,o(b)", + macro_build (&offset_expr, "lwc1", "T,o(b)", target_big_endian ? treg : treg + 1, r, breg); - /* To avoid confusion in tc_gen_reloc, we must ensure that this - does not become a variant frag. */ - frag_wane (frag_now); - frag_new (0); - if (breg != AT) return; break; @@ -6698,8 +6586,6 @@ macro (struct mips_cl_insn *ip) if (mips_pic == NO_PIC || offset_expr.X_op == O_constant) { - char *p; - /* If this is a reference to a GP relative symbol, we want $treg,($gp) (BFD_RELOC_GPREL16) $treg+1,+4($gp) (BFD_RELOC_GPREL16) @@ -6716,34 +6602,25 @@ macro (struct mips_cl_insn *ip) the last case. */ if ((valueT) offset_expr.X_add_number > MAX_GPREL_OFFSET || nopic_need_relax (offset_expr.X_add_symbol, 1)) - { - p = NULL; - used_at = 1; - } + used_at = 1; else { - int off; - + relax_start (offset_expr.X_add_symbol); if (breg == 0) { - frag_grow (28); tempreg = mips_gp_register; - off = 0; used_at = 0; } else { - frag_grow (36); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, mips_gp_register); tempreg = AT; - off = 4; used_at = 1; } /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &offset_expr, s, fmt, - coproc ? treg + 1 : treg, + macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_GPREL16, tempreg); offset_expr.X_add_number += 4; @@ -6752,15 +6629,11 @@ macro (struct mips_cl_insn *ip) hold_mips_optimize = mips_optimize; mips_optimize = 2; /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &offset_expr, s, fmt, - coproc ? treg : treg + 1, + macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, BFD_RELOC_GPREL16, tempreg); mips_optimize = hold_mips_optimize; - p = frag_var (rs_machine_dependent, 12 + off, 0, - RELAX_ENCODE (8 + off, 12 + off, 0, 4 + off, 1, - used_at && mips_opts.noat), - offset_expr.X_add_symbol, 0, NULL); + relax_switch (); /* We just generated two relocs. When tc_gen_reloc handles this case, it will skip the first reloc and @@ -6783,33 +6656,22 @@ macro (struct mips_cl_insn *ip) offset_expr.X_op = O_constant; } } - macro_build_lui (p, &icnt, &offset_expr, AT); - if (p != NULL) - p += 4; + macro_build_lui (&offset_expr, AT); if (breg != 0) - { - macro_build (p, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, breg, AT); - if (p != NULL) - p += 4; - } + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ - macro_build (p, &icnt, &offset_expr, s, fmt, - coproc ? treg + 1 : treg, + macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_LO16, AT); - if (p != NULL) - p += 4; /* FIXME: How do we handle overflow here? */ offset_expr.X_add_number += 4; /* Itbl support may require additional care here. */ - macro_build (p, &icnt, &offset_expr, s, fmt, - coproc ? treg : treg + 1, + macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, BFD_RELOC_LO16, AT); + if (mips_relax.sequence) + relax_end (); } else if (mips_pic == SVR4_PIC && ! mips_big_got) { - int off; - /* If this is a reference to an external symbol, we want lw $at,($gp) (BFD_RELOC_MIPS_GOT16) nop @@ -6825,43 +6687,39 @@ macro (struct mips_cl_insn *ip) in the lwc1 instructions. */ used_at = 1; expr1.X_add_number = offset_expr.X_add_number; - offset_expr.X_add_number = 0; if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000 - 4) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - if (breg == 0) - off = 0; - else - off = 4; - frag_grow (24 + off); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - AT, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, &icnt, NULL, "nop", ""); + load_got_offset (AT, &offset_expr); + macro_build (NULL, "nop", ""); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, breg, AT); - /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &expr1, s, fmt, coproc ? treg + 1 : treg, - BFD_RELOC_LO16, AT); - expr1.X_add_number += 4; + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Set mips_optimize to 2 to avoid inserting an undesired nop. */ hold_mips_optimize = mips_optimize; mips_optimize = 2; + /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &expr1, s, fmt, coproc ? treg : treg + 1, + relax_start (offset_expr.X_add_symbol); + macro_build (&expr1, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_LO16, AT); - mips_optimize = hold_mips_optimize; + expr1.X_add_number += 4; + macro_build (&expr1, s, fmt, coproc ? treg : treg + 1, + BFD_RELOC_LO16, AT); + relax_switch (); + macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, + BFD_RELOC_LO16, AT); + offset_expr.X_add_number += 4; + macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, + BFD_RELOC_LO16, AT); + relax_end (); - (void) frag_var (rs_machine_dependent, 0, 0, - RELAX_ENCODE (0, 0, -16 - off, -8, 1, 0), - offset_expr.X_add_symbol, 0, NULL); + mips_optimize = hold_mips_optimize; } else if (mips_pic == SVR4_PIC) { - int gpdel, off; - char *p; + int gpdelay; /* If this is a reference to an external symbol, we want lui $at, (BFD_RELOC_MIPS_GOT_HI16) @@ -6884,27 +6742,19 @@ macro (struct mips_cl_insn *ip) if (expr1.X_add_number < -0x8000 || expr1.X_add_number >= 0x8000 - 4) as_bad (_("PIC code offset overflow (max 16 signed bits)")); - if (reg_needs_delay (mips_gp_register)) - gpdel = 4; - else - gpdel = 0; - if (breg == 0) - off = 0; - else - off = 4; - frag_grow (56); - macro_build (NULL, &icnt, &offset_expr, "lui", "t,u", AT, - BFD_RELOC_MIPS_GOT_HI16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + gpdelay = reg_needs_delay (mips_gp_register); + relax_start (offset_expr.X_add_symbol); + macro_build (&offset_expr, "lui", "t,u", + AT, BFD_RELOC_MIPS_GOT_HI16); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, mips_gp_register); - macro_build (NULL, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, BFD_RELOC_MIPS_GOT_LO16, AT); - macro_build (NULL, &icnt, NULL, "nop", ""); + macro_build (NULL, "nop", ""); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, breg, AT); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &expr1, s, fmt, coproc ? treg + 1 : treg, + macro_build (&expr1, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_LO16, AT); expr1.X_add_number += 4; @@ -6913,45 +6763,34 @@ macro (struct mips_cl_insn *ip) hold_mips_optimize = mips_optimize; mips_optimize = 2; /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &expr1, s, fmt, coproc ? treg : treg + 1, + macro_build (&expr1, s, fmt, coproc ? treg : treg + 1, BFD_RELOC_LO16, AT); mips_optimize = hold_mips_optimize; expr1.X_add_number -= 4; - p = frag_var (rs_machine_dependent, 16 + gpdel + off, 0, - RELAX_ENCODE (24 + off, 16 + gpdel + off, gpdel, - 8 + gpdel + off, 1, 0), - offset_expr.X_add_symbol, 0, NULL); - if (gpdel > 0) - { - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; - } - macro_build (p, &icnt, &offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", - AT, BFD_RELOC_MIPS_GOT16, mips_gp_register); - p += 4; - macro_build (p, &icnt, NULL, "nop", ""); - p += 4; + relax_switch (); + offset_expr.X_add_number = expr1.X_add_number; + if (gpdelay) + macro_build (NULL, "nop", ""); + macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, + BFD_RELOC_MIPS_GOT16, mips_gp_register); + macro_build (NULL, "nop", ""); if (breg != 0) - { - macro_build (p, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, breg, AT); - p += 4; - } + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ - macro_build (p, &icnt, &expr1, s, fmt, coproc ? treg + 1 : treg, + macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_LO16, AT); - p += 4; - expr1.X_add_number += 4; + offset_expr.X_add_number += 4; /* Set mips_optimize to 2 to avoid inserting an undesired nop. */ hold_mips_optimize = mips_optimize; mips_optimize = 2; /* Itbl support may require additional care here. */ - macro_build (p, &icnt, &expr1, s, fmt, coproc ? treg : treg + 1, + macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, BFD_RELOC_LO16, AT); mips_optimize = hold_mips_optimize; + relax_end (); } else if (mips_pic == EMBEDDED_PIC) { @@ -6970,20 +6809,18 @@ macro (struct mips_cl_insn *ip) } else { - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, mips_gp_register); tempreg = AT; used_at = 1; } /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &offset_expr, s, fmt, - coproc ? treg + 1 : treg, + macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, BFD_RELOC_GPREL16, tempreg); offset_expr.X_add_number += 4; /* Itbl support may require additional care here. */ - macro_build (NULL, &icnt, &offset_expr, s, fmt, - coproc ? treg : treg + 1, + macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, BFD_RELOC_GPREL16, tempreg); } else @@ -7001,11 +6838,9 @@ macro (struct mips_cl_insn *ip) s = "sw"; sd_ob: assert (HAVE_32BIT_ADDRESSES); - macro_build (NULL, &icnt, &offset_expr, s, "t,o(b)", treg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, "t,o(b)", treg, BFD_RELOC_LO16, breg); offset_expr.X_add_number += 4; - macro_build (NULL, &icnt, &offset_expr, s, "t,o(b)", treg + 1, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, "t,o(b)", treg + 1, BFD_RELOC_LO16, breg); return; /* New code added to support COPZ instructions. @@ -7039,11 +6874,11 @@ macro (struct mips_cl_insn *ip) copz: /* For now we just do C (same as Cz). The parameter will be stored in insn_opcode by mips_ip. */ - macro_build (NULL, &icnt, NULL, s, "C", ip->insn_opcode); + macro_build (NULL, s, "C", ip->insn_opcode); return; case M_MOVE: - move_register (&icnt, dreg, sreg); + move_register (dreg, sreg); return; #ifdef LOSING_COMPILER @@ -7062,7 +6897,7 @@ macro (struct mips_cl_insn *ip) s = ip->insn_mo->name; s2 = "cop3"; coproc = ITBL_DECODE_PNUM (immed_expr);; - macro_build (NULL, &icnt, &immed_expr, s, "C"); + macro_build (&immed_expr, s, "C"); return; } macro2 (ip); @@ -7078,7 +6913,6 @@ macro2 (struct mips_cl_insn *ip) register int treg, sreg, dreg, breg; int tempreg; int mask; - int icnt = 0; int used_at; expressionS expr1; const char *s; @@ -7092,7 +6926,6 @@ macro2 (struct mips_cl_insn *ip) int off; offsetT maxnum; bfd_reloc_code_real_type r; - char *p; treg = (ip->insn_opcode >> 16) & 0x1f; dreg = (ip->insn_opcode >> 11) & 0x1f; @@ -7111,9 +6944,8 @@ macro2 (struct mips_cl_insn *ip) case M_DMUL: dbl = 1; case M_MUL: - macro_build (NULL, &icnt, NULL, dbl ? "dmultu" : "multu", "s,t", - sreg, treg); - macro_build (NULL, &icnt, NULL, "mflo", "d", dreg); + macro_build (NULL, dbl ? "dmultu" : "multu", "s,t", sreg, treg); + macro_build (NULL, "mflo", "d", dreg); return; case M_DMUL_I: @@ -7122,10 +6954,9 @@ macro2 (struct mips_cl_insn *ip) /* The MIPS assembler some times generates shifts and adds. I'm not trying to be that fancy. GCC should do this for us anyway. */ - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, dbl ? "dmult" : "mult", "s,t", - sreg, AT); - macro_build (NULL, &icnt, NULL, "mflo", "d", dreg); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, dbl ? "dmult" : "mult", "s,t", sreg, AT); + macro_build (NULL, "mflo", "d", dreg); break; case M_DMULO_I: @@ -7142,24 +6973,22 @@ macro2 (struct mips_cl_insn *ip) ++mips_opts.noreorder; mips_any_noreorder = 1; if (imm) - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, dbl ? "dmult" : "mult", "s,t", - sreg, imm ? AT : treg); - macro_build (NULL, &icnt, NULL, "mflo", "d", dreg); - macro_build (NULL, &icnt, NULL, dbl ? "dsra32" : "sra", "d,w,<", - dreg, dreg, RA); - macro_build (NULL, &icnt, NULL, "mfhi", "d", AT); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, dbl ? "dmult" : "mult", "s,t", sreg, imm ? AT : treg); + macro_build (NULL, "mflo", "d", dreg); + macro_build (NULL, dbl ? "dsra32" : "sra", "d,w,<", dreg, dreg, RA); + macro_build (NULL, "mfhi", "d", AT); if (mips_trap) - macro_build (NULL, &icnt, NULL, "tne", "s,t,q", dreg, AT, 6); + macro_build (NULL, "tne", "s,t,q", dreg, AT, 6); else { expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "beq", "s,t,p", dreg, AT); - macro_build (NULL, &icnt, NULL, "nop", "", 0); - macro_build (NULL, &icnt, NULL, "break", "c", 6); + macro_build (&expr1, "beq", "s,t,p", dreg, AT); + macro_build (NULL, "nop", "", 0); + macro_build (NULL, "break", "c", 6); } --mips_opts.noreorder; - macro_build (NULL, &icnt, NULL, "mflo", "d", dreg); + macro_build (NULL, "mflo", "d", dreg); break; case M_DMULOU_I: @@ -7176,19 +7005,19 @@ macro2 (struct mips_cl_insn *ip) ++mips_opts.noreorder; mips_any_noreorder = 1; if (imm) - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, dbl ? "dmultu" : "multu", "s,t", + load_register (AT, &imm_expr, dbl); + macro_build (NULL, dbl ? "dmultu" : "multu", "s,t", sreg, imm ? AT : treg); - macro_build (NULL, &icnt, NULL, "mfhi", "d", AT); - macro_build (NULL, &icnt, NULL, "mflo", "d", dreg); + macro_build (NULL, "mfhi", "d", AT); + macro_build (NULL, "mflo", "d", dreg); if (mips_trap) - macro_build (NULL, &icnt, NULL, "tne", "s,t,q", AT, 0, 6); + macro_build (NULL, "tne", "s,t,q", AT, 0, 6); else { expr1.X_add_number = 8; - macro_build (NULL, &icnt, &expr1, "beq", "s,t,p", AT, 0); - macro_build (NULL, &icnt, NULL, "nop", "", 0); - macro_build (NULL, &icnt, NULL, "break", "c", 6); + macro_build (&expr1, "beq", "s,t,p", AT, 0); + macro_build (NULL, "nop", "", 0); + macro_build (NULL, "break", "c", 6); } --mips_opts.noreorder; break; @@ -7206,17 +7035,16 @@ macro2 (struct mips_cl_insn *ip) tempreg = dreg; used_at = 0; } - macro_build (NULL, &icnt, NULL, "dnegu", "d,w", tempreg, treg); - macro_build (NULL, &icnt, NULL, "drorv", "d,t,s", dreg, sreg, - tempreg); + macro_build (NULL, "dnegu", "d,w", tempreg, treg); + macro_build (NULL, "drorv", "d,t,s", dreg, sreg, tempreg); if (used_at) break; return; } - macro_build (NULL, &icnt, NULL, "dsubu", "d,v,t", AT, 0, treg); - macro_build (NULL, &icnt, NULL, "dsrlv", "d,t,s", AT, sreg, AT); - macro_build (NULL, &icnt, NULL, "dsllv", "d,t,s", dreg, sreg, treg); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "dsubu", "d,v,t", AT, 0, treg); + macro_build (NULL, "dsrlv", "d,t,s", AT, sreg, AT); + macro_build (NULL, "dsllv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); break; case M_ROL: @@ -7232,17 +7060,16 @@ macro2 (struct mips_cl_insn *ip) tempreg = dreg; used_at = 0; } - macro_build (NULL, &icnt, NULL, "negu", "d,w", tempreg, treg); - macro_build (NULL, &icnt, NULL, "rorv", "d,t,s", dreg, sreg, - tempreg); + macro_build (NULL, "negu", "d,w", tempreg, treg); + macro_build (NULL, "rorv", "d,t,s", dreg, sreg, tempreg); if (used_at) break; return; } - macro_build (NULL, &icnt, NULL, "subu", "d,v,t", AT, 0, treg); - macro_build (NULL, &icnt, NULL, "srlv", "d,t,s", AT, sreg, AT); - macro_build (NULL, &icnt, NULL, "sllv", "d,t,s", dreg, sreg, treg); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "subu", "d,v,t", AT, 0, treg); + macro_build (NULL, "srlv", "d,t,s", AT, sreg, AT); + macro_build (NULL, "sllv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); break; case M_DROL_I: @@ -7257,25 +7084,22 @@ macro2 (struct mips_cl_insn *ip) { rot = (64 - rot) & 0x3f; if (rot >= 32) - macro_build (NULL, &icnt, NULL, "dror32", "d,w,<", - dreg, sreg, rot - 32); + macro_build (NULL, "dror32", "d,w,<", dreg, sreg, rot - 32); else - macro_build (NULL, &icnt, NULL, "dror", "d,w,<", - dreg, sreg, rot); + macro_build (NULL, "dror", "d,w,<", dreg, sreg, rot); return; } if (rot == 0) { - macro_build (NULL, &icnt, NULL, "dsrl", "d,w,<", dreg, sreg, 0); + macro_build (NULL, "dsrl", "d,w,<", dreg, sreg, 0); return; } l = (rot < 0x20) ? "dsll" : "dsll32"; r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; rot &= 0x1f; - macro_build (NULL, &icnt, NULL, l, "d,w,<", AT, sreg, rot); - macro_build (NULL, &icnt, NULL, r, "d,w,<", dreg, sreg, - (0x20 - rot) & 0x1f); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, l, "d,w,<", AT, sreg, rot); + macro_build (NULL, r, "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); } break; @@ -7288,44 +7112,42 @@ macro2 (struct mips_cl_insn *ip) rot = imm_expr.X_add_number & 0x1f; if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) { - macro_build (NULL, &icnt, NULL, "ror", "d,w,<", dreg, sreg, - (32 - rot) & 0x1f); + macro_build (NULL, "ror", "d,w,<", dreg, sreg, (32 - rot) & 0x1f); return; } if (rot == 0) { - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", dreg, sreg, 0); + macro_build (NULL, "srl", "d,w,<", dreg, sreg, 0); return; } - macro_build (NULL, &icnt, NULL, "sll", "d,w,<", AT, sreg, rot); - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", dreg, sreg, - (0x20 - rot) & 0x1f); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "sll", "d,w,<", AT, sreg, rot); + macro_build (NULL, "srl", "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); } break; case M_DROR: if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) { - macro_build (NULL, &icnt, NULL, "drorv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "drorv", "d,t,s", dreg, sreg, treg); return; } - macro_build (NULL, &icnt, NULL, "dsubu", "d,v,t", AT, 0, treg); - macro_build (NULL, &icnt, NULL, "dsllv", "d,t,s", AT, sreg, AT); - macro_build (NULL, &icnt, NULL, "dsrlv", "d,t,s", dreg, sreg, treg); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "dsubu", "d,v,t", AT, 0, treg); + macro_build (NULL, "dsllv", "d,t,s", AT, sreg, AT); + macro_build (NULL, "dsrlv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); break; case M_ROR: if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) { - macro_build (NULL, &icnt, NULL, "rorv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "rorv", "d,t,s", dreg, sreg, treg); return; } - macro_build (NULL, &icnt, NULL, "subu", "d,v,t", AT, 0, treg); - macro_build (NULL, &icnt, NULL, "sllv", "d,t,s", AT, sreg, AT); - macro_build (NULL, &icnt, NULL, "srlv", "d,t,s", dreg, sreg, treg); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "subu", "d,v,t", AT, 0, treg); + macro_build (NULL, "sllv", "d,t,s", AT, sreg, AT); + macro_build (NULL, "srlv", "d,t,s", dreg, sreg, treg); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); break; case M_DROR_I: @@ -7339,25 +7161,22 @@ macro2 (struct mips_cl_insn *ip) if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) { if (rot >= 32) - macro_build (NULL, &icnt, NULL, "dror32", "d,w,<", - dreg, sreg, rot - 32); + macro_build (NULL, "dror32", "d,w,<", dreg, sreg, rot - 32); else - macro_build (NULL, &icnt, NULL, "dror", "d,w,<", - dreg, sreg, rot); + macro_build (NULL, "dror", "d,w,<", dreg, sreg, rot); return; } if (rot == 0) { - macro_build (NULL, &icnt, NULL, "dsrl", "d,w,<", dreg, sreg, 0); + macro_build (NULL, "dsrl", "d,w,<", dreg, sreg, 0); return; } r = (rot < 0x20) ? "dsrl" : "dsrl32"; l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; rot &= 0x1f; - macro_build (NULL, &icnt, NULL, r, "d,w,<", AT, sreg, rot); - macro_build (NULL, &icnt, NULL, l, "d,w,<", dreg, sreg, - (0x20 - rot) & 0x1f); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, r, "d,w,<", AT, sreg, rot); + macro_build (NULL, l, "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); } break; @@ -7370,18 +7189,17 @@ macro2 (struct mips_cl_insn *ip) rot = imm_expr.X_add_number & 0x1f; if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) { - macro_build (NULL, &icnt, NULL, "ror", "d,w,<", dreg, sreg, rot); + macro_build (NULL, "ror", "d,w,<", dreg, sreg, rot); return; } if (rot == 0) { - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", dreg, sreg, 0); + macro_build (NULL, "srl", "d,w,<", dreg, sreg, 0); return; } - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", AT, sreg, rot); - macro_build (NULL, &icnt, NULL, "sll", "d,w,<", dreg, sreg, - (0x20 - rot) & 0x1f); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", dreg, dreg, AT); + macro_build (NULL, "srl", "d,w,<", AT, sreg, rot); + macro_build (NULL, "sll", "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build (NULL, "or", "d,v,t", dreg, dreg, AT); } break; @@ -7394,50 +7212,43 @@ macro2 (struct mips_cl_insn *ip) assert (mips_opts.isa == ISA_MIPS1); /* Even on a big endian machine $fn comes before $fn+1. We have to adjust when storing to memory. */ - macro_build (NULL, &icnt, &offset_expr, "swc1", "T,o(b)", - target_big_endian ? treg + 1 : treg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, "swc1", "T,o(b)", + target_big_endian ? treg + 1 : treg, BFD_RELOC_LO16, breg); offset_expr.X_add_number += 4; - macro_build (NULL, &icnt, &offset_expr, "swc1", "T,o(b)", - target_big_endian ? treg : treg + 1, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, "swc1", "T,o(b)", + target_big_endian ? treg : treg + 1, BFD_RELOC_LO16, breg); return; case M_SEQ: if (sreg == 0) - macro_build (NULL, &icnt, &expr1, "sltiu", "t,r,j", dreg, treg, - BFD_RELOC_LO16); + macro_build (&expr1, "sltiu", "t,r,j", dreg, treg, BFD_RELOC_LO16); else if (treg == 0) - macro_build (NULL, &icnt, &expr1, "sltiu", "t,r,j", dreg, sreg, - BFD_RELOC_LO16); + macro_build (&expr1, "sltiu", "t,r,j", dreg, sreg, BFD_RELOC_LO16); else { - macro_build (NULL, &icnt, NULL, "xor", "d,v,t", dreg, sreg, treg); - macro_build (NULL, &icnt, &expr1, "sltiu", "t,r,j", dreg, dreg, - BFD_RELOC_LO16); + macro_build (NULL, "xor", "d,v,t", dreg, sreg, treg); + macro_build (&expr1, "sltiu", "t,r,j", dreg, dreg, BFD_RELOC_LO16); } return; case M_SEQ_I: if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 0) { - macro_build (NULL, &icnt, &expr1, "sltiu", "t,r,j", dreg, sreg, - BFD_RELOC_LO16); + macro_build (&expr1, "sltiu", "t,r,j", dreg, sreg, BFD_RELOC_LO16); return; } if (sreg == 0) { as_warn (_("Instruction %s: result is always false"), ip->insn_mo->name); - move_register (&icnt, dreg, 0); + move_register (dreg, 0); return; } if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= 0 && imm_expr.X_add_number < 0x10000) { - macro_build (NULL, &icnt, &imm_expr, "xori", "t,r,i", dreg, sreg, - BFD_RELOC_LO16); + macro_build (&imm_expr, "xori", "t,r,i", dreg, sreg, BFD_RELOC_LO16); used_at = 0; } else if (imm_expr.X_op == O_constant @@ -7445,19 +7256,17 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number < 0) { imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, - HAVE_32BIT_GPRS ? "addiu" : "daddiu", + macro_build (&imm_expr, HAVE_32BIT_GPRS ? "addiu" : "daddiu", "t,r,j", dreg, sreg, BFD_RELOC_LO16); used_at = 0; } else { - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, "xor", "d,v,t", dreg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, "xor", "d,v,t", dreg, sreg, AT); used_at = 1; } - macro_build (NULL, &icnt, &expr1, "sltiu", "t,r,j", dreg, dreg, - BFD_RELOC_LO16); + macro_build (&expr1, "sltiu", "t,r,j", dreg, dreg, BFD_RELOC_LO16); if (used_at) break; return; @@ -7468,9 +7277,8 @@ macro2 (struct mips_cl_insn *ip) case M_SGEU: s = "sltu"; sge: - macro_build (NULL, &icnt, NULL, s, "d,v,t", dreg, sreg, treg); - macro_build (NULL, &icnt, &expr1, "xori", "t,r,i", dreg, dreg, - BFD_RELOC_LO16); + macro_build (NULL, s, "d,v,t", dreg, sreg, treg); + macro_build (&expr1, "xori", "t,r,i", dreg, dreg, BFD_RELOC_LO16); return; case M_SGE_I: /* sreg >= I <==> not (sreg < I) */ @@ -7479,20 +7287,18 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number >= -0x8000 && imm_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &imm_expr, - mask == M_SGE_I ? "slti" : "sltiu", - "t,r,j", dreg, sreg, BFD_RELOC_LO16); + macro_build (&imm_expr, mask == M_SGE_I ? "slti" : "sltiu", "t,r,j", + dreg, sreg, BFD_RELOC_LO16); used_at = 0; } else { - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, mask == M_SGE_I ? "slt" : "sltu", - "d,v,t", dreg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, mask == M_SGE_I ? "slt" : "sltu", "d,v,t", + dreg, sreg, AT); used_at = 1; } - macro_build (NULL, &icnt, &expr1, "xori", "t,r,i", dreg, dreg, - BFD_RELOC_LO16); + macro_build (&expr1, "xori", "t,r,i", dreg, dreg, BFD_RELOC_LO16); if (used_at) break; return; @@ -7503,7 +7309,7 @@ macro2 (struct mips_cl_insn *ip) case M_SGTU: s = "sltu"; sgt: - macro_build (NULL, &icnt, NULL, s, "d,v,t", dreg, treg, sreg); + macro_build (NULL, s, "d,v,t", dreg, treg, sreg); return; case M_SGT_I: /* sreg > I <==> I < sreg */ @@ -7512,8 +7318,8 @@ macro2 (struct mips_cl_insn *ip) case M_SGTU_I: s = "sltu"; sgti: - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, s, "d,v,t", dreg, AT, sreg); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, s, "d,v,t", dreg, AT, sreg); break; case M_SLE: /* sreg <= treg <==> treg >= sreg <==> not (treg < sreg) */ @@ -7522,9 +7328,8 @@ macro2 (struct mips_cl_insn *ip) case M_SLEU: s = "sltu"; sle: - macro_build (NULL, &icnt, NULL, s, "d,v,t", dreg, treg, sreg); - macro_build (NULL, &icnt, &expr1, "xori", "t,r,i", dreg, dreg, - BFD_RELOC_LO16); + macro_build (NULL, s, "d,v,t", dreg, treg, sreg); + macro_build (&expr1, "xori", "t,r,i", dreg, dreg, BFD_RELOC_LO16); return; case M_SLE_I: /* sreg <= I <==> I >= sreg <==> not (I < sreg) */ @@ -7533,10 +7338,9 @@ macro2 (struct mips_cl_insn *ip) case M_SLEU_I: s = "sltu"; slei: - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, s, "d,v,t", dreg, AT, sreg); - macro_build (NULL, &icnt, &expr1, "xori", "t,r,i", dreg, dreg, - BFD_RELOC_LO16); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, s, "d,v,t", dreg, AT, sreg); + macro_build (&expr1, "xori", "t,r,i", dreg, dreg, BFD_RELOC_LO16); break; case M_SLT_I: @@ -7544,12 +7348,11 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number >= -0x8000 && imm_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &imm_expr, "slti", "t,r,j", dreg, sreg, - BFD_RELOC_LO16); + macro_build (&imm_expr, "slti", "t,r,j", dreg, sreg, BFD_RELOC_LO16); return; } - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, "slt", "d,v,t", dreg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, "slt", "d,v,t", dreg, sreg, AT); break; case M_SLTU_I: @@ -7557,47 +7360,45 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number >= -0x8000 && imm_expr.X_add_number < 0x8000) { - macro_build (NULL, &icnt, &imm_expr, "sltiu", "t,r,j", dreg, sreg, + macro_build (&imm_expr, "sltiu", "t,r,j", dreg, sreg, BFD_RELOC_LO16); return; } - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", dreg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, "sltu", "d,v,t", dreg, sreg, AT); break; case M_SNE: if (sreg == 0) - macro_build (NULL, &icnt, NULL, "sltu","d,v,t", dreg, 0, treg); + macro_build (NULL, "sltu", "d,v,t", dreg, 0, treg); else if (treg == 0) - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", dreg, 0, sreg); + macro_build (NULL, "sltu", "d,v,t", dreg, 0, sreg); else { - macro_build (NULL, &icnt, NULL, "xor", "d,v,t", dreg, sreg, treg); - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", dreg, 0, dreg); + macro_build (NULL, "xor", "d,v,t", dreg, sreg, treg); + macro_build (NULL, "sltu", "d,v,t", dreg, 0, dreg); } return; case M_SNE_I: if (imm_expr.X_op == O_constant && imm_expr.X_add_number == 0) { - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", dreg, 0, sreg); + macro_build (NULL, "sltu", "d,v,t", dreg, 0, sreg); return; } if (sreg == 0) { as_warn (_("Instruction %s: result is always true"), ip->insn_mo->name); - macro_build (NULL, &icnt, &expr1, - HAVE_32BIT_GPRS ? "addiu" : "daddiu", - "t,r,j", dreg, 0, BFD_RELOC_LO16); + macro_build (&expr1, HAVE_32BIT_GPRS ? "addiu" : "daddiu", "t,r,j", + dreg, 0, BFD_RELOC_LO16); return; } if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= 0 && imm_expr.X_add_number < 0x10000) { - macro_build (NULL, &icnt, &imm_expr, "xori", "t,r,i", dreg, sreg, - BFD_RELOC_LO16); + macro_build (&imm_expr, "xori", "t,r,i", dreg, sreg, BFD_RELOC_LO16); used_at = 0; } else if (imm_expr.X_op == O_constant @@ -7605,18 +7406,17 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number < 0) { imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, - HAVE_32BIT_GPRS ? "addiu" : "daddiu", + macro_build (&imm_expr, HAVE_32BIT_GPRS ? "addiu" : "daddiu", "t,r,j", dreg, sreg, BFD_RELOC_LO16); used_at = 0; } else { - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, "xor", "d,v,t", dreg, sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, "xor", "d,v,t", dreg, sreg, AT); used_at = 1; } - macro_build (NULL, &icnt, NULL, "sltu", "d,v,t", dreg, 0, dreg); + macro_build (NULL, "sltu", "d,v,t", dreg, 0, dreg); if (used_at) break; return; @@ -7629,13 +7429,12 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number <= 0x8000) { imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, dbl ? "daddi" : "addi", - "t,r,j", dreg, sreg, BFD_RELOC_LO16); + macro_build (&imm_expr, dbl ? "daddi" : "addi", "t,r,j", + dreg, sreg, BFD_RELOC_LO16); return; } - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, dbl ? "dsub" : "sub", "d,v,t", - dreg, sreg, AT); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, dbl ? "dsub" : "sub", "d,v,t", dreg, sreg, AT); break; case M_DSUBU_I: @@ -7646,13 +7445,12 @@ macro2 (struct mips_cl_insn *ip) && imm_expr.X_add_number <= 0x8000) { imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, dbl ? "daddiu" : "addiu", - "t,r,j", dreg, sreg, BFD_RELOC_LO16); + macro_build (&imm_expr, dbl ? "daddiu" : "addiu", "t,r,j", + dreg, sreg, BFD_RELOC_LO16); return; } - load_register (&icnt, AT, &imm_expr, dbl); - macro_build (NULL, &icnt, NULL, dbl ? "dsubu" : "subu", "d,v,t", - dreg, sreg, AT); + load_register (AT, &imm_expr, dbl); + macro_build (NULL, dbl ? "dsubu" : "subu", "d,v,t", dreg, sreg, AT); break; case M_TEQ_I: @@ -7673,8 +7471,8 @@ macro2 (struct mips_cl_insn *ip) case M_TNE_I: s = "tne"; trap: - load_register (&icnt, AT, &imm_expr, HAVE_64BIT_GPRS); - macro_build (NULL, &icnt, NULL, s, "s,t", sreg, AT); + load_register (AT, &imm_expr, HAVE_64BIT_GPRS); + macro_build (NULL, s, "s,t", sreg, AT); break; case M_TRUNCWS: @@ -7690,22 +7488,19 @@ macro2 (struct mips_cl_insn *ip) mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; - macro_build (NULL, &icnt, NULL, "cfc1", "t,G", treg, RA); - macro_build (NULL, &icnt, NULL, "cfc1", "t,G", treg, RA); - macro_build (NULL, &icnt, NULL, "nop", ""); + macro_build (NULL, "cfc1", "t,G", treg, RA); + macro_build (NULL, "cfc1", "t,G", treg, RA); + macro_build (NULL, "nop", ""); expr1.X_add_number = 3; - macro_build (NULL, &icnt, &expr1, "ori", "t,r,i", AT, treg, - BFD_RELOC_LO16); + macro_build (&expr1, "ori", "t,r,i", AT, treg, BFD_RELOC_LO16); expr1.X_add_number = 2; - macro_build (NULL, &icnt, &expr1, "xori", "t,r,i", AT, AT, - BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, "ctc1", "t,G", AT, RA); - macro_build (NULL, &icnt, NULL, "nop", ""); - macro_build (NULL, &icnt, NULL, - mask == M_TRUNCWD ? "cvt.w.d" : "cvt.w.s", - "D,S", dreg, sreg); - macro_build (NULL, &icnt, NULL, "ctc1", "t,G", treg, RA); - macro_build (NULL, &icnt, NULL, "nop", ""); + macro_build (&expr1, "xori", "t,r,i", AT, AT, BFD_RELOC_LO16); + macro_build (NULL, "ctc1", "t,G", AT, RA); + macro_build (NULL, "nop", ""); + macro_build (NULL, mask == M_TRUNCWD ? "cvt.w.d" : "cvt.w.s", "D,S", + dreg, sreg); + macro_build (NULL, "ctc1", "t,G", treg, RA); + macro_build (NULL, "nop", ""); --mips_opts.noreorder; break; @@ -7719,16 +7514,14 @@ macro2 (struct mips_cl_insn *ip) as_bad (_("operand overflow")); if (! target_big_endian) ++offset_expr.X_add_number; - macro_build (NULL, &icnt, &offset_expr, s, "t,o(b)", AT, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, "t,o(b)", AT, BFD_RELOC_LO16, breg); if (! target_big_endian) --offset_expr.X_add_number; else ++offset_expr.X_add_number; - macro_build (NULL, &icnt, &offset_expr, "lbu", "t,o(b)", treg, - BFD_RELOC_LO16, breg); - macro_build (NULL, &icnt, NULL, "sll", "d,w,<", AT, AT, 8); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", treg, treg, AT); + macro_build (&offset_expr, "lbu", "t,o(b)", treg, BFD_RELOC_LO16, breg); + macro_build (NULL, "sll", "d,w,<", AT, AT, 8); + macro_build (NULL, "or", "d,v,t", treg, treg, AT); break; case M_ULD: @@ -7749,22 +7542,20 @@ macro2 (struct mips_cl_insn *ip) tempreg = AT; if (! target_big_endian) offset_expr.X_add_number += off; - macro_build (NULL, &icnt, &offset_expr, s, "t,o(b)", tempreg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); if (! target_big_endian) offset_expr.X_add_number -= off; else offset_expr.X_add_number += off; - macro_build (NULL, &icnt, &offset_expr, s2, "t,o(b)", tempreg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s2, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); /* If necessary, move the result in tempreg the final destination. */ if (treg == tempreg) return; /* Protect second load's delay slot. */ if (!gpr_interlocks) - macro_build (NULL, &icnt, NULL, "nop", ""); - move_register (&icnt, treg, tempreg); + macro_build (NULL, "nop", ""); + move_register (treg, tempreg); break; case M_ULD_A: @@ -7778,44 +7569,38 @@ macro2 (struct mips_cl_insn *ip) off = 3; ulwa: used_at = 1; - load_address (&icnt, AT, &offset_expr, &used_at); + load_address (AT, &offset_expr, &used_at); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, AT, breg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = off; else expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, s, "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&expr1, s, "t,o(b)", treg, BFD_RELOC_LO16, AT); if (! target_big_endian) expr1.X_add_number = 0; else expr1.X_add_number = off; - macro_build (NULL, &icnt, &expr1, s2, "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&expr1, s2, "t,o(b)", treg, BFD_RELOC_LO16, AT); break; case M_ULH_A: case M_ULHU_A: used_at = 1; - load_address (&icnt, AT, &offset_expr, &used_at); + load_address (AT, &offset_expr, &used_at); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, AT, breg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg); if (target_big_endian) expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, - mask == M_ULH_A ? "lb" : "lbu", "t,o(b)", + macro_build (&expr1, mask == M_ULH_A ? "lb" : "lbu", "t,o(b)", treg, BFD_RELOC_LO16, AT); if (target_big_endian) expr1.X_add_number = 1; else expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, "lbu", "t,o(b)", - AT, BFD_RELOC_LO16, AT); - macro_build (NULL, &icnt, NULL, "sll", "d,w,<", treg, treg, 8); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", treg, treg, AT); + macro_build (&expr1, "lbu", "t,o(b)", AT, BFD_RELOC_LO16, AT); + macro_build (NULL, "sll", "d,w,<", treg, treg, 8); + macro_build (NULL, "or", "d,v,t", treg, treg, AT); break; case M_USH: @@ -7823,15 +7608,13 @@ macro2 (struct mips_cl_insn *ip) as_bad (_("operand overflow")); if (target_big_endian) ++offset_expr.X_add_number; - macro_build (NULL, &icnt, &offset_expr, "sb", "t,o(b)", treg, - BFD_RELOC_LO16, breg); - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", AT, treg, 8); + macro_build (&offset_expr, "sb", "t,o(b)", treg, BFD_RELOC_LO16, breg); + macro_build (NULL, "srl", "d,w,<", AT, treg, 8); if (target_big_endian) --offset_expr.X_add_number; else ++offset_expr.X_add_number; - macro_build (NULL, &icnt, &offset_expr, "sb", "t,o(b)", AT, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, "sb", "t,o(b)", AT, BFD_RELOC_LO16, breg); break; case M_USD: @@ -7848,14 +7631,12 @@ macro2 (struct mips_cl_insn *ip) as_bad (_("operand overflow")); if (! target_big_endian) offset_expr.X_add_number += off; - macro_build (NULL, &icnt, &offset_expr, s, "t,o(b)", treg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, "t,o(b)", treg, BFD_RELOC_LO16, breg); if (! target_big_endian) offset_expr.X_add_number -= off; else offset_expr.X_add_number += off; - macro_build (NULL, &icnt, &offset_expr, s2, "t,o(b)", treg, - BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s2, "t,o(b)", treg, BFD_RELOC_LO16, breg); return; case M_USD_A: @@ -7869,49 +7650,42 @@ macro2 (struct mips_cl_insn *ip) off = 3; uswa: used_at = 1; - load_address (&icnt, AT, &offset_expr, &used_at); + load_address (AT, &offset_expr, &used_at); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, AT, breg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = off; else expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, s, "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&expr1, s, "t,o(b)", treg, BFD_RELOC_LO16, AT); if (! target_big_endian) expr1.X_add_number = 0; else expr1.X_add_number = off; - macro_build (NULL, &icnt, &expr1, s2, "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&expr1, s2, "t,o(b)", treg, BFD_RELOC_LO16, AT); break; case M_USH_A: used_at = 1; - load_address (&icnt, AT, &offset_expr, &used_at); + load_address (AT, &offset_expr, &used_at); if (breg != 0) - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, AT, breg); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg); if (! target_big_endian) expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, "sb", "t,o(b)", treg, - BFD_RELOC_LO16, AT); - macro_build (NULL, &icnt, NULL, "srl", "d,w,<", treg, treg, 8); + macro_build (&expr1, "sb", "t,o(b)", treg, BFD_RELOC_LO16, AT); + macro_build (NULL, "srl", "d,w,<", treg, treg, 8); if (! target_big_endian) expr1.X_add_number = 1; else expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, "sb", "t,o(b)", treg, - BFD_RELOC_LO16, AT); + macro_build (&expr1, "sb", "t,o(b)", treg, BFD_RELOC_LO16, AT); if (! target_big_endian) expr1.X_add_number = 0; else expr1.X_add_number = 1; - macro_build (NULL, &icnt, &expr1, "lbu", "t,o(b)", AT, - BFD_RELOC_LO16, AT); - macro_build (NULL, &icnt, NULL, "sll", "d,w,<", treg, treg, 8); - macro_build (NULL, &icnt, NULL, "or", "d,v,t", treg, treg, AT); + macro_build (&expr1, "lbu", "t,o(b)", AT, BFD_RELOC_LO16, AT); + macro_build (NULL, "sll", "d,w,<", treg, treg, 8); + macro_build (NULL, "or", "d,v,t", treg, treg, AT); break; default: @@ -7931,7 +7705,6 @@ mips16_macro (struct mips_cl_insn *ip) { int mask; int xreg, yreg, zreg, tmp; - int icnt; expressionS expr1; int dbl; const char *s, *s2, *s3; @@ -7942,8 +7715,6 @@ mips16_macro (struct mips_cl_insn *ip) yreg = (ip->insn_opcode >> MIPS16OP_SH_RY) & MIPS16OP_MASK_RY; zreg = (ip->insn_opcode >> MIPS16OP_SH_RZ) & MIPS16OP_MASK_RZ; - icnt = 0; - expr1.X_op = O_constant; expr1.X_op_symbol = NULL; expr1.X_add_symbol = NULL; @@ -7969,18 +7740,17 @@ mips16_macro (struct mips_cl_insn *ip) mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; - macro_build (NULL, &icnt, NULL, dbl ? "ddiv" : "div", "0,x,y", - xreg, yreg); + macro_build (NULL, dbl ? "ddiv" : "div", "0,x,y", xreg, yreg); expr1.X_add_number = 2; - macro_build (NULL, &icnt, &expr1, "bnez", "x,p", yreg); - macro_build (NULL, &icnt, NULL, "break", "6", 7); + macro_build (&expr1, "bnez", "x,p", yreg); + macro_build (NULL, "break", "6", 7); /* FIXME: The normal code checks for of -1 / -0x80000000 here, since that causes an overflow. We should do that as well, but I don't see how to do the comparisons without a temporary register. */ --mips_opts.noreorder; - macro_build (NULL, &icnt, NULL, s, "x", zreg); + macro_build (NULL, s, "x", zreg); break; case M_DIVU_3: @@ -8002,20 +7772,19 @@ mips16_macro (struct mips_cl_insn *ip) mips_emit_delays (TRUE); ++mips_opts.noreorder; mips_any_noreorder = 1; - macro_build (NULL, &icnt, NULL, s, "0,x,y", xreg, yreg); + macro_build (NULL, s, "0,x,y", xreg, yreg); expr1.X_add_number = 2; - macro_build (NULL, &icnt, &expr1, "bnez", "x,p", yreg); - macro_build (NULL, &icnt, NULL, "break", "6", 7); + macro_build (&expr1, "bnez", "x,p", yreg); + macro_build (NULL, "break", "6", 7); --mips_opts.noreorder; - macro_build (NULL, &icnt, NULL, s2, "x", zreg); + macro_build (NULL, s2, "x", zreg); break; case M_DMUL: dbl = 1; case M_MUL: - macro_build (NULL, &icnt, NULL, dbl ? "dmultu" : "multu", "x,y", - xreg, yreg); - macro_build (NULL, &icnt, NULL, "mflo", "x", zreg); + macro_build (NULL, dbl ? "dmultu" : "multu", "x,y", xreg, yreg); + macro_build (NULL, "mflo", "x", zreg); return; case M_DSUBU_I: @@ -8026,22 +7795,21 @@ mips16_macro (struct mips_cl_insn *ip) if (imm_expr.X_op != O_constant) as_bad (_("Unsupported large constant")); imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, dbl ? "daddiu" : "addiu", "y,x,4", - yreg, xreg); + macro_build (&imm_expr, dbl ? "daddiu" : "addiu", "y,x,4", yreg, xreg); break; case M_SUBU_I_2: if (imm_expr.X_op != O_constant) as_bad (_("Unsupported large constant")); imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, "addiu", "x,k", xreg); + macro_build (&imm_expr, "addiu", "x,k", xreg); break; case M_DSUBU_I_2: if (imm_expr.X_op != O_constant) as_bad (_("Unsupported large constant")); imm_expr.X_add_number = -imm_expr.X_add_number; - macro_build (NULL, &icnt, &imm_expr, "daddiu", "y,j", yreg); + macro_build (&imm_expr, "daddiu", "y,j", yreg); break; case M_BEQ: @@ -8090,8 +7858,8 @@ mips16_macro (struct mips_cl_insn *ip) yreg = tmp; do_branch: - macro_build (NULL, &icnt, NULL, s, "x,y", xreg, yreg); - macro_build (NULL, &icnt, &offset_expr, s2, "p"); + macro_build (NULL, s, "x,y", xreg, yreg); + macro_build (&offset_expr, s2, "p"); break; case M_BEQ_I: @@ -8150,18 +7918,18 @@ mips16_macro (struct mips_cl_insn *ip) ++imm_expr.X_add_number; do_branch_i: - macro_build (NULL, &icnt, &imm_expr, s, s3, xreg); - macro_build (NULL, &icnt, &offset_expr, s2, "p"); + macro_build (&imm_expr, s, s3, xreg); + macro_build (&offset_expr, s2, "p"); break; case M_ABS: expr1.X_add_number = 0; - macro_build (NULL, &icnt, &expr1, "slti", "x,8", yreg); + macro_build (&expr1, "slti", "x,8", yreg); if (xreg != yreg) - move_register (&icnt, xreg, yreg); + move_register (xreg, yreg); expr1.X_add_number = 2; - macro_build (NULL, &icnt, &expr1, "bteqz", "p"); - macro_build (NULL, &icnt, NULL, "neg", "x,w", xreg, xreg); + macro_build (&expr1, "bteqz", "p"); + macro_build (NULL, "neg", "x,w", xreg, xreg); } } @@ -12278,7 +12046,6 @@ static void s_cpload (int ignore ATTRIBUTE_UNUSED) { expressionS ex; - int icnt = 0; /* If we are not generating SVR4 PIC code, or if this is NewABI code, .cpload is ignored. */ @@ -12300,12 +12067,13 @@ s_cpload (int ignore ATTRIBUTE_UNUSED) /* In ELF, this symbol is implicitly an STT_OBJECT symbol. */ symbol_get_bfdsym (ex.X_add_symbol)->flags |= BSF_OBJECT; - macro_build_lui (NULL, &icnt, &ex, mips_gp_register); - macro_build (NULL, &icnt, &ex, "addiu", "t,r,j", mips_gp_register, + macro_start (); + macro_build_lui (&ex, mips_gp_register); + macro_build (&ex, "addiu", "t,r,j", mips_gp_register, mips_gp_register, BFD_RELOC_LO16); - - macro_build (NULL, &icnt, NULL, "addu", "d,v,t", mips_gp_register, + macro_build (NULL, "addu", "d,v,t", mips_gp_register, mips_gp_register, tc_get_register (0)); + macro_end (); demand_empty_rest_of_line (); } @@ -12331,7 +12099,6 @@ s_cpsetup (int ignore ATTRIBUTE_UNUSED) expressionS ex_off; expressionS ex_sym; int reg1; - int icnt = 0; char *f; /* If we are not generating SVR4 PIC code, .cpsetup is ignored. @@ -12373,6 +12140,7 @@ s_cpsetup (int ignore ATTRIBUTE_UNUSED) SKIP_WHITESPACE (); expression (&ex_sym); + macro_start (); if (mips_cpreturn_register == -1) { ex_off.X_op = O_constant; @@ -12380,34 +12148,34 @@ s_cpsetup (int ignore ATTRIBUTE_UNUSED) ex_off.X_op_symbol = NULL; ex_off.X_add_number = mips_cpreturn_offset; - macro_build (NULL, &icnt, &ex_off, "sd", "t,o(b)", mips_gp_register, + macro_build (&ex_off, "sd", "t,o(b)", mips_gp_register, BFD_RELOC_LO16, SP); } else - macro_build (NULL, &icnt, NULL, "daddu", "d,v,t", mips_cpreturn_register, + macro_build (NULL, "daddu", "d,v,t", mips_cpreturn_register, mips_gp_register, 0); /* Ensure there's room for the next two instructions, so that `f' doesn't end up with an address in the wrong frag. */ frag_grow (8); f = frag_more (0); - macro_build (NULL, &icnt, &ex_sym, "lui", "t,u", mips_gp_register, - BFD_RELOC_GPREL16); + macro_build (&ex_sym, "lui", "t,u", mips_gp_register, BFD_RELOC_GPREL16); fix_new (frag_now, f - frag_now->fr_literal, 8, NULL, 0, 0, BFD_RELOC_MIPS_SUB); fix_new (frag_now, f - frag_now->fr_literal, 4, NULL, 0, 0, BFD_RELOC_HI16_S); f = frag_more (0); - macro_build (NULL, &icnt, &ex_sym, "addiu", "t,r,j", mips_gp_register, + macro_build (&ex_sym, "addiu", "t,r,j", mips_gp_register, mips_gp_register, BFD_RELOC_GPREL16); fix_new (frag_now, f - frag_now->fr_literal, 8, NULL, 0, 0, BFD_RELOC_MIPS_SUB); fix_new (frag_now, f - frag_now->fr_literal, 4, NULL, 0, 0, BFD_RELOC_LO16); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", mips_gp_register, + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", mips_gp_register, mips_gp_register, reg1); + macro_end (); demand_empty_rest_of_line (); } @@ -12435,7 +12203,6 @@ static void s_cprestore (int ignore ATTRIBUTE_UNUSED) { expressionS ex; - int icnt = 0; /* If we are not generating SVR4 PIC code, or if this is NewABI code, .cprestore is ignored. */ @@ -12453,8 +12220,10 @@ s_cprestore (int ignore ATTRIBUTE_UNUSED ex.X_op_symbol = NULL; ex.X_add_number = mips_cprestore_offset; - macro_build_ldst_constoffset (NULL, &icnt, &ex, ADDRESS_STORE_INSN, - mips_gp_register, SP, HAVE_64BIT_ADDRESSES); + macro_start (); + macro_build_ldst_constoffset (&ex, ADDRESS_STORE_INSN, mips_gp_register, + SP, HAVE_64BIT_ADDRESSES); + macro_end (); demand_empty_rest_of_line (); } @@ -12470,7 +12239,6 @@ static void s_cpreturn (int ignore ATTRIBUTE_UNUSED) { expressionS ex; - int icnt = 0; /* If we are not generating SVR4 PIC code, .cpreturn is ignored. We also need NewABI support. */ @@ -12480,6 +12248,7 @@ s_cpreturn (int ignore ATTRIBUTE_UNUSED) return; } + macro_start (); if (mips_cpreturn_register == -1) { ex.X_op = O_constant; @@ -12487,12 +12256,12 @@ s_cpreturn (int ignore ATTRIBUTE_UNUSED) ex.X_op_symbol = NULL; ex.X_add_number = mips_cpreturn_offset; - macro_build (NULL, &icnt, &ex, "ld", "t,o(b)", mips_gp_register, - BFD_RELOC_LO16, SP); + macro_build (&ex, "ld", "t,o(b)", mips_gp_register, BFD_RELOC_LO16, SP); } else - macro_build (NULL, &icnt, NULL, "daddu", "d,v,t", mips_gp_register, + macro_build (NULL, "daddu", "d,v,t", mips_gp_register, mips_cpreturn_register, 0); + macro_end (); demand_empty_rest_of_line (); } @@ -12604,7 +12373,6 @@ s_gpdword (int ignore ATTRIBUTE_UNUSED) static void s_cpadd (int ignore ATTRIBUTE_UNUSED) { - int icnt = 0; int reg; /* This is ignored when not generating SVR4 PIC code. */ @@ -12615,9 +12383,10 @@ s_cpadd (int ignore ATTRIBUTE_UNUSED) } /* Add $gp to the register named as an argument. */ + macro_start (); reg = tc_get_register (0); - macro_build (NULL, &icnt, NULL, ADDRESS_ADD_INSN, "d,v,t", - reg, reg, mips_gp_register); + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", reg, reg, mips_gp_register); + macro_end (); demand_empty_rest_of_line (); } @@ -13224,22 +12993,11 @@ md_estimate_size_before_relax (fragS *fr if (change) { - /* Record the offset to the first reloc in the fr_opcode field. - This lets md_convert_frag and tc_gen_reloc know that the code - must be expanded. */ - fragp->fr_opcode = (fragp->fr_literal - + fragp->fr_fix - - RELAX_OLD (fragp->fr_subtype) - + RELAX_RELOC1 (fragp->fr_subtype)); - /* FIXME: This really needs as_warn_where. */ - if (RELAX_WARN (fragp->fr_subtype)) - as_warn (_("AT used after \".set noat\" or macro used after " - "\".set nomacro\"")); - - return RELAX_NEW (fragp->fr_subtype) - RELAX_OLD (fragp->fr_subtype); + fragp->fr_subtype |= RELAX_USE_SECOND; + return -RELAX_FIRST (fragp->fr_subtype); } - - return 0; + else + return -RELAX_SECOND (fragp->fr_subtype); } /* This is called to see whether a reloc against a defined symbol @@ -13343,112 +13101,6 @@ tc_gen_reloc (asection *section ATTRIBUT else reloc->addend = fixp->fx_addnumber; - /* If this is a variant frag, we may need to adjust the existing - reloc and generate a new one. */ - if (fixp->fx_frag->fr_opcode != NULL - && ((fixp->fx_r_type == BFD_RELOC_GPREL16 - && ! HAVE_NEWABI) - || (fixp->fx_r_type == BFD_RELOC_MIPS_GOT_DISP - && HAVE_NEWABI) - || fixp->fx_r_type == BFD_RELOC_MIPS_GOT16 - || fixp->fx_r_type == BFD_RELOC_MIPS_CALL16 - || fixp->fx_r_type == BFD_RELOC_MIPS_GOT_HI16 - || fixp->fx_r_type == BFD_RELOC_MIPS_GOT_LO16 - || fixp->fx_r_type == BFD_RELOC_MIPS_CALL_HI16 - || fixp->fx_r_type == BFD_RELOC_MIPS_CALL_LO16) - ) - { - arelent *reloc2; - - assert (! RELAX_MIPS16_P (fixp->fx_frag->fr_subtype)); - - /* If this is not the last reloc in this frag, then we have two - GPREL relocs, or a GOT_HI16/GOT_LO16 pair, or a - CALL_HI16/CALL_LO16, both of which are being replaced. Let - the second one handle all of them. */ - if (fixp->fx_next != NULL - && fixp->fx_frag == fixp->fx_next->fx_frag) - { - assert ((fixp->fx_r_type == BFD_RELOC_GPREL16 - && fixp->fx_next->fx_r_type == BFD_RELOC_GPREL16) - || (fixp->fx_r_type == BFD_RELOC_MIPS_GOT_HI16 - && (fixp->fx_next->fx_r_type - == BFD_RELOC_MIPS_GOT_LO16)) - || (fixp->fx_r_type == BFD_RELOC_MIPS_CALL_HI16 - && (fixp->fx_next->fx_r_type - == BFD_RELOC_MIPS_CALL_LO16))); - retval[0] = NULL; - return retval; - } - - fixp->fx_where = fixp->fx_frag->fr_opcode - fixp->fx_frag->fr_literal; - reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; - reloc->addend += fixp->fx_frag->tc_frag_data.tc_fr_offset; - reloc2 = retval[1] = (arelent *) xmalloc (sizeof (arelent)); - reloc2->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); - *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); - reloc2->address = (reloc->address - + (RELAX_RELOC2 (fixp->fx_frag->fr_subtype) - - RELAX_RELOC1 (fixp->fx_frag->fr_subtype))); - reloc2->addend = reloc->addend; - reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO16); - assert (reloc2->howto != NULL); - - if (RELAX_RELOC3 (fixp->fx_frag->fr_subtype)) - { - arelent *reloc3; - - reloc3 = retval[2] = (arelent *) xmalloc (sizeof (arelent)); - *reloc3 = *reloc2; - reloc3->address += 4; - } - - if (mips_pic == NO_PIC) - { - assert (fixp->fx_r_type == BFD_RELOC_GPREL16); - fixp->fx_r_type = BFD_RELOC_HI16_S; - } - else if (mips_pic == SVR4_PIC) - { - switch (fixp->fx_r_type) - { - default: - abort (); - case BFD_RELOC_MIPS_GOT16: - break; - case BFD_RELOC_MIPS_GOT_LO16: - case BFD_RELOC_MIPS_CALL_LO16: - if (HAVE_NEWABI) - { - fixp->fx_r_type = BFD_RELOC_MIPS_GOT_PAGE; - reloc2->howto = bfd_reloc_type_lookup - (stdoutput, BFD_RELOC_MIPS_GOT_OFST); - } - else - fixp->fx_r_type = BFD_RELOC_MIPS_GOT16; - break; - case BFD_RELOC_MIPS_CALL16: - case BFD_RELOC_MIPS_GOT_OFST: - case BFD_RELOC_MIPS_GOT_DISP: - if (HAVE_NEWABI) - { - /* It may seem nonsensical to relax GOT_DISP to - GOT_DISP, but we're actually turning a GOT_DISP - without offset into a GOT_DISP with an offset, - getting rid of the separate addition, which we can - do when the symbol is found to be local. */ - fixp->fx_r_type = BFD_RELOC_MIPS_GOT_DISP; - retval[1] = NULL; - } - else - fixp->fx_r_type = BFD_RELOC_MIPS_GOT16; - break; - } - } - else - abort (); - } - /* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable entry to be used in the relocation's section offset. */ if (! HAVE_NEWABI && fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) @@ -13556,9 +13208,6 @@ mips_relax_frag (asection *sec, fragS *f void md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp) { - int old, new; - char *fixptr; - if (RELAX_BRANCH_P (fragp->fr_subtype)) { bfd_byte *buf; @@ -13858,17 +13507,57 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU } else { - if (fragp->fr_opcode == NULL) - return; + int first, second; + fixS *fixp; + + first = RELAX_FIRST (fragp->fr_subtype); + second = RELAX_SECOND (fragp->fr_subtype); + fixp = (fixS *) fragp->fr_opcode; - old = RELAX_OLD (fragp->fr_subtype); - new = RELAX_NEW (fragp->fr_subtype); - fixptr = fragp->fr_literal + fragp->fr_fix; + /* Possibly emit a warning if we've chosen the longer option. */ + if (((fragp->fr_subtype & RELAX_USE_SECOND) != 0) + == ((fragp->fr_subtype & RELAX_SECOND_LONGER) != 0)) + { + const char *msg = macro_warning (fragp->fr_subtype); + if (msg != 0) + as_warn_where (fragp->fr_file, fragp->fr_line, msg); + } - if (new > 0) - memmove (fixptr - old, fixptr, new); + /* Go through all the fixups for the first sequence. Disable them + (by marking them as done) if we're going to use the second + sequence instead. */ + while (fixp + && fixp->fx_frag == fragp + && fixp->fx_where < fragp->fr_fix - second) + { + if (fragp->fr_subtype & RELAX_USE_SECOND) + fixp->fx_done = 1; + fixp = fixp->fx_next; + } - fragp->fr_fix += new - old; + /* Go through the fixups for the second sequence. Disable them if + we're going to use the first sequence, otherwise adjust their + addresses to account for the relaxation. */ + while (fixp && fixp->fx_frag == fragp) + { + if (fragp->fr_subtype & RELAX_USE_SECOND) + fixp->fx_where -= first; + else + fixp->fx_done = 1; + fixp = fixp->fx_next; + } + + /* Now modify the frag contents. */ + if (fragp->fr_subtype & RELAX_USE_SECOND) + { + char *start; + + start = fragp->fr_literal + fragp->fr_fix - first - second; + memmove (start, start + first, second); + fragp->fr_fix -= first; + } + else + fragp->fr_fix -= second; } } @@ -14730,3 +14419,16 @@ mips_dwarf2_format (void) else return dwarf2_format_32bit; } + +int +mips_dwarf2_addr_size (void) +{ + if (mips_abi == N64_ABI) + return 8; + /* GCC for 64-bit targets turns on mlong64 giving + us 64-bit addresses. */ + else if (mips_abi == EABI_ABI && !file_mips_gp32) + return 8; + else + return 4; +} diff -uprN binutils-2.14.90.0.8/gas/config/tc-mips.h binutils-2.15.90.0.1/gas/config/tc-mips.h --- binutils-2.14.90.0.8/gas/config/tc-mips.h 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-mips.h 2004-03-03 12:24:34.000000000 -0800 @@ -183,12 +183,6 @@ extern void mips_enable_auto_align (void extern enum dwarf2_format mips_dwarf2_format (void); #define DWARF2_FORMAT() mips_dwarf2_format () -#define DWARF2_ADDR_SIZE(bfd) \ - (DWARF2_FORMAT () == dwarf2_format_32bit ? 4 : 8) - -typedef struct { - offsetT tc_fr_offset; -} tc_frag_data_type; -#define TC_FRAG_TYPE tc_frag_data_type +#define DWARF2_ADDR_SIZE(bfd) mips_dwarf2_addr_size () #endif /* TC_MIPS */ diff -uprN binutils-2.14.90.0.8/gas/config/tc-s390.c binutils-2.15.90.0.1/gas/config/tc-s390.c --- binutils-2.14.90.0.8/gas/config/tc-s390.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-s390.c 2004-03-03 12:24:34.000000000 -0800 @@ -1614,9 +1614,15 @@ s390_insn (ignore) expression (&exp); if (exp.X_op == O_constant) { - if ( (opformat->oplen == 6 && exp.X_op > 0 && exp.X_op < (1ULL << 48)) - || (opformat->oplen == 4 && exp.X_op > 0 && exp.X_op < (1ULL << 32)) - || (opformat->oplen == 2 && exp.X_op > 0 && exp.X_op < (1ULL << 16))) + if ( ( opformat->oplen == 6 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 48)) + || ( opformat->oplen == 4 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 32)) + || ( opformat->oplen == 2 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 16))) md_number_to_chars (insn, exp.X_add_number, opformat->oplen); else as_bad (_("Invalid .insn format\n")); diff -uprN binutils-2.14.90.0.8/gas/config/tc-sh.c binutils-2.15.90.0.1/gas/config/tc-sh.c --- binutils-2.14.90.0.8/gas/config/tc-sh.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-sh.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* tc-sh.c -- Assemble code for the Renesas / SuperH SH - Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, + 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -2142,6 +2142,7 @@ build_Mytes (sh_opcode_info *opcode, sh_ switch (i) { case REG_N: + case REG_N_D: nbuf[index] = reg_n; break; case REG_M: @@ -2158,6 +2159,9 @@ build_Mytes (sh_opcode_info *opcode, sh_ case REG_B: nbuf[index] = reg_b | 0x08; break; + case REG_N_B01: + nbuf[index] = reg_n | 0x01; + break; case IMM0_4BY4: insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); break; @@ -2583,6 +2587,7 @@ md_assemble (char *str) sh_operand_info operand[3]; sh_opcode_info *opcode; unsigned int size = 0; + char *initial_str = str; #ifdef HAVE_SH64 if (sh64_isa_mode == sh64_isa_shmedia) @@ -2609,7 +2614,45 @@ md_assemble (char *str) if (opcode == NULL) { - as_bad (_("unknown opcode")); + /* The opcode is not in the hash table. + This means we definately have an assembly failure, + but the instruction may be valid in another CPU variant. + In this case emit something better than 'unknown opcode'. + Search the full table in sh-opc.h to check. */ + + char *name = initial_str; + int name_length = 0; + const sh_opcode_info *op; + int found = 0; + + /* identify opcode in string */ + while (isspace (*name)) + { + name++; + } + while (!isspace (name[name_length])) + { + name_length++; + } + + /* search for opcode in full list */ + for (op = sh_table; op->name; op++) + { + if (strncasecmp (op->name, name, name_length) == 0) + { + found = 1; + break; + } + } + + if ( found ) + { + as_bad (_("opcode not valid for this cpu variant")); + } + else + { + as_bad (_("unknown opcode")); + } return; } @@ -2891,6 +2934,10 @@ md_parse_option (int c, char *arg ATTRIB case OPTION_ISA: if (strcasecmp (arg, "sh4") == 0) preset_target_arch = arch_sh4; + else if (strcasecmp (arg, "sh4-nofpu") == 0) + preset_target_arch = arch_sh4_nofpu; + else if (strcasecmp (arg, "sh4-nommu-nofpu") == 0) + preset_target_arch = arch_sh4_nommu_nofpu; else if (strcasecmp (arg, "sh4a") == 0) preset_target_arch = arch_sh4a; else if (strcasecmp (arg, "dsp") == 0) @@ -2972,17 +3019,20 @@ SH options:\n\ -big generate big endian code\n\ -relax alter jump instructions for long displacements\n\ -small align sections to 4 byte boundaries, not 16\n\ --dsp enable sh-dsp insns, and disable floating-point ISAs.\n")); -#ifdef HAVE_SH64 - fprintf (stream, _("\ +-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ -isa=[sh4\n\ - | sh4a\n\ - | dsp same as '-dsp'\n\ + | sh4-nofpu sh4 with fpu disabled\n\ + | sh4-nommu-nofpu sh4 with no MMU or FPU\n\ + | sh4a\n\ + | dsp same as '-dsp'\n\ | fp\n\ - | shmedia set as the default instruction set for SH64\n\ + | any] use most appropriate isa\n")); +#ifdef HAVE_SH64 + fprintf (stream, _("\ +-isa=[shmedia set as the default instruction set for SH64\n\ | SHmedia\n\ | shcompact\n\ - | SHcompact\n")); + | SHcompact]\n")); fprintf (stream, _("\ -abi=[32|64] set size of expanded SHmedia operands and object\n\ file type\n\ @@ -2993,13 +3043,6 @@ SH options:\n\ -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ to 32 bits only\n")); -#else - fprintf (stream, _("\ --isa=[sh4\n\ - | sh4a\n\ - | dsp same as '-dsp'\n\ - | fp\n\ - | any]\n")); #endif /* HAVE_SH64 */ } @@ -3559,6 +3602,8 @@ sh_elf_final_processing (void) val = EF_SH3_DSP; else if (valid_arch & arch_sh3e) val = EF_SH3E; + else if (valid_arch & arch_sh4_nommu_nofpu) + val = EF_SH4_NOMMU_NOFPU; else if (valid_arch & arch_sh4_nofpu) val = EF_SH4_NOFPU; else if (valid_arch & arch_sh4) @@ -4187,10 +4232,7 @@ tc_gen_reloc (asection *section ATTRIBUT rel->addend = 0; rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); -#ifdef OBJ_ELF - if (rel->howto->type == R_SH_IND12W) - rel->addend += fixp->fx_offset - 4; -#endif + if (rel->howto == NULL) { as_bad_where (fixp->fx_file, fixp->fx_line, @@ -4200,6 +4242,10 @@ tc_gen_reloc (asection *section ATTRIBUT rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); assert (rel->howto != NULL); } +#ifdef OBJ_ELF + else if (rel->howto->type == R_SH_IND12W) + rel->addend += fixp->fx_offset - 4; +#endif return rel; } diff -uprN binutils-2.14.90.0.8/gas/config/tc-sparc.c binutils-2.15.90.0.1/gas/config/tc-sparc.c --- binutils-2.14.90.0.8/gas/config/tc-sparc.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/config/tc-sparc.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* tc-sparc.c -- Assemble for the SPARC Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003 + 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -2146,6 +2146,12 @@ sparc_ip (str, pinsn) { if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) { + if (*args == 'e' || *args == 'f' || *args == 'g') + { + error_message + = _(": There are only 32 single precision f registers; [0-31]"); + goto error; + } v9_arg_p = 1; mask -= 31; /* wrap high bit */ } diff -uprN binutils-2.14.90.0.8/gas/doc/c-m32r.texi binutils-2.15.90.0.1/gas/doc/c-m32r.texi --- binutils-2.14.90.0.8/gas/doc/c-m32r.texi 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/doc/c-m32r.texi 2004-03-03 12:24:34.000000000 -0800 @@ -1,4 +1,5 @@ -@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2003 +@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, +@c 2003, 2004 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -91,6 +92,12 @@ do so. @cindex @code{-no-parallel} option, M32RX This option disables a previously enabled @emph{-parallel} option. +@item -no-bitinst +@cindex @samp{-no-bitinst}, M32R2 +This option disables the support for the extended bit-field +instructions provided by the M32R2. If this support needs to be +re-enabled the @emph{-bitinst} switch can be used to restore it. + @item -O @cindex @code{-O} option, M32RX This option tells the assembler to attempt to optimize the diff -uprN binutils-2.14.90.0.8/gas/doc/internals.texi binutils-2.15.90.0.1/gas/doc/internals.texi --- binutils-2.14.90.0.8/gas/doc/internals.texi 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/doc/internals.texi 2004-03-03 12:24:34.000000000 -0800 @@ -704,9 +704,10 @@ processing. After this point, it is saf The assembler always has a current frag, named @code{frag_now}. More space is allocated for the current frag using the @code{frag_more} function; this -returns a pointer to the amount of requested space. Relaxing is done using -variant frags allocated by @code{frag_var} or @code{frag_variant} -(@pxref{Relaxation}). +returns a pointer to the amount of requested space. The function +@code{frag_room} says by how much the current frag can be extended. +Relaxing is done using variant frags allocated by @code{frag_var} +or @code{frag_variant} (@pxref{Relaxation}). @node GAS processing @section What GAS does when it runs @@ -1032,6 +1033,11 @@ arguments, the character before the @kbd If you define this macro, it should return nonzero if the current input line pointer should be treated as the end of a line. +@item TC_CASE_SENSITIVE +@cindex TC_CASE_SENSITIVE +Define this macro if instruction mnemonics and pseudos are case sensitive. +The default is to have it undefined giving case insensitive names. + @item md_parse_name @cindex md_parse_name If this macro is defined, GAS will call it for any symbol found in an diff -uprN binutils-2.14.90.0.8/gas/dwarf2dbg.c binutils-2.15.90.0.1/gas/dwarf2dbg.c --- binutils-2.14.90.0.8/gas/dwarf2dbg.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/dwarf2dbg.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* dwarf2dbg.c - DWARF2 debug support - Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by David Mosberger-Tang This file is part of GAS, the GNU Assembler. @@ -49,7 +49,7 @@ #endif #ifndef DWARF2_ADDR_SIZE -# define DWARF2_ADDR_SIZE(bfd) (bfd_arch_bits_per_address (bfd) / 8); +# define DWARF2_ADDR_SIZE(bfd) (bfd_arch_bits_per_address (bfd) / 8) #endif #ifdef BFD_ASSEMBLER @@ -372,7 +372,7 @@ get_filenum (const char *filename, unsig { --dir_len; for (dir = 1; dir < dirs_in_use; ++dir) - if (memcmp (filename, dirs[dir], dir_len) == 0 + if (strncmp (filename, dirs[dir], dir_len) == 0 && dirs[dir][dir_len] == '\0') break; diff -uprN binutils-2.14.90.0.8/gas/frags.c binutils-2.15.90.0.1/gas/frags.c --- binutils-2.14.90.0.8/gas/frags.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/frags.c 2004-03-03 12:24:34.000000000 -0800 @@ -262,6 +262,14 @@ frag_wane (register fragS *fragP) fragP->fr_var = 0; } +/* Return the number of bytes by which the current frag can be grown. */ + +int +frag_room (void) +{ + return obstack_room (&frchain_now->frch_obstack); +} + /* Make an alignment frag. The size of this frag will be adjusted to force the next frag to have the appropriate alignment. ALIGNMENT is the power of two to which to align. FILL_CHARACTER is the diff -uprN binutils-2.14.90.0.8/gas/frags.h binutils-2.15.90.0.1/gas/frags.h --- binutils-2.14.90.0.8/gas/frags.h 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/frags.h 2004-03-03 12:24:34.000000000 -0800 @@ -141,6 +141,7 @@ void frag_align_pattern (int alignment, void frag_align_code (int alignment, int max); void frag_new (int old_frags_var_max_size); void frag_wane (fragS * fragP); +int frag_room (void); char *frag_variant (relax_stateT type, int max_chars, diff -uprN binutils-2.14.90.0.8/gas/read.c binutils-2.15.90.0.1/gas/read.c --- binutils-2.14.90.0.8/gas/read.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/read.c 2004-03-03 12:24:34.000000000 -0800 @@ -155,7 +155,7 @@ char is_end_of_line[256] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 /* */ }; -#ifdef IGNORE_OPCODE_CASE +#ifndef TC_CASE_SENSITIVE char original_case_string[128]; #endif @@ -720,7 +720,7 @@ read_a_source_file (char *name) /* Expect pseudo-op or machine instruction. */ pop = NULL; -#ifdef IGNORE_OPCODE_CASE +#ifndef TC_CASE_SENSITIVE { char *s2 = s; @@ -754,6 +754,8 @@ read_a_source_file (char *name) if (pop == NULL) pop = (pseudo_typeS *) hash_find (po_hash, s + 1); + if (pop && !pop->poc_handler) + pop = NULL; /* In MRI mode, we may need to insert an automatic alignment directive. What a hack diff -uprN binutils-2.14.90.0.8/gas/read.h binutils-2.15.90.0.1/gas/read.h --- binutils-2.14.90.0.8/gas/read.h 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/read.h 2004-03-03 12:24:34.000000000 -0800 @@ -30,10 +30,7 @@ extern char *input_line_pointer; /* -> c #ifdef PERMIT_WHITESPACE #define SKIP_WHITESPACE() \ - { \ - if (* input_line_pointer == ' ') \ - ++ input_line_pointer; \ - } + ((*input_line_pointer == ' ') ? ++input_line_pointer : 0) #else #define SKIP_WHITESPACE() know(*input_line_pointer != ' ' ) #endif @@ -93,8 +90,7 @@ enum linkonce_type { LINKONCE_SAME_CONTENTS }; -#define IGNORE_OPCODE_CASE -#ifdef IGNORE_OPCODE_CASE +#ifndef TC_CASE_SENSITIVE extern char original_case_string[]; #endif diff -uprN binutils-2.14.90.0.8/gas/stabs.c binutils-2.15.90.0.1/gas/stabs.c --- binutils-2.14.90.0.8/gas/stabs.c 2004-01-14 13:07:45.000000000 -0800 +++ binutils-2.15.90.0.1/gas/stabs.c 2004-03-03 12:24:34.000000000 -0800 @@ -520,7 +520,7 @@ generate_asm_file (int type, char *file) char *buf; char *tmp = file; char *endp = file + strlen (file); - char *bufp = buf; + char *bufp; if (last_file != NULL && strcmp (last_file, file) == 0) diff -uprN binutils-2.14.90.0.8/gas/testsuite/ChangeLog binutils-2.15.90.0.1/gas/testsuite/ChangeLog --- binutils-2.14.90.0.8/gas/testsuite/ChangeLog 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,108 @@ +2004-03-01 Richard Sandiford + + * gas/frv/fr405-insn.[sdl]: New test. + * gas/frv/fr450-spr.[sd]: New test. + * gas/frv/fr450-insn.[sdl]: New test. + * gas/frv/fr450-media-issue.[sl]: New test. + * gas/frv/allinsn.exp: Run new tests. Ensure fr405 instructions + aren't accepted for -mcpu=fr400 or -mcpu=fr500. Ensure fr450 + instructions aren't accepted for -mcpu=fr400, -mcpu=fr405 or + -mcpu=fr500. + +2004-03-01 Richard Sandiford + + * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops. + (rstbf, rsthf, rstf, rstdf, rstqf): Likewise. + * gas/frv/allinsn.d: Update accordingly. + +2004-02-17 Petko Manolov + + * gas/arm/maverick.c: DSPSC to/from opcode fixes. + * gas/arm/maverick.d: Likewise. + * gas/arm/maverick.s: Likewise. + +2004-02-09 Kaz Kojima + + * gas/sh/basic.exp: Don't do sh4a tests for sh5. + +2004-02-06 Nathan Sidwell + + * gas/macros/test2.s: Lowercase it. + +2004-02-02 Maciej W. Rozycki + + * gas/mips/div.d: Update to accomodate changes in macro + expansions. + gas/mips/elf-rel-got-n32.d: Likewise. + gas/mips/elf-rel-got-n64.d: Likewise. + gas/mips/elf-rel-xgot-n32.d: Likewise. + gas/mips/elf-rel-xgot-n64.d: Likewise. + gas/mips/la-svr4pic.d: Likewise. + gas/mips/la-xgot.d: Likewise. + gas/mips/lca-svr4pic.d: Likewise. + gas/mips/lca-xgot.d: Likewise. + +2004-02-01 Kaz Kojima + + * gas/sh/sh4a-fp.d: Fix opcode name fssra to fsrra. + * gas/sh/sh4a-fp.s: Likewise. + * gas/sh/err-sh4a-fp.s: Likewise. + +2004-01-24 Chris Demetriou + + * gas/mips/relax-swap1.s: Add extra space at end, so the + disassembly will consistently have "..." at its end. + * gas/mips/relax-swap2.s: Likewise. + * gas/mips/relax-swap1-mips2.d: Expect "..." at end of disassembly. + +2004-01-23 Daniel Jacobowitz + + * gas/arm/arm.exp: Add "undefined" test. + * gas/arm/undefined.s, gas/arm/undefined.l: New files. + +2004-01-23 Richard Sandiford + + * gas/mips/macro-warn-[1234].[sdl]: New tests. + * gas/mips/macro-warn-[12]-n32.[dl]: New tests. + * gas/mips/mips.exp: Run them. + +2004-01-23 Richard Sandiford + + * gas/mips/elf-rel19.[sd]: New test. + * gas/mips/mips.exp: Run it. + +2004-01-11 Tom Rix + + * gas/m68hc11/movb.s: Add m68hc12 movb and movw dump test. + * gas/m68hc11/movb.d: Likewise. + * gas/m68hc11/m68hc11.exp: Likewise. Add more movb failure tests. + +2004-01-19 Alan Modra + + * gas/i386/katmai.d: Adjust for changed sib printing. + * gas/i386/prescott.d: Likewise. + * gas/i386/sse2.d: Likewise. + * gas/i386/ssemmx2.d: Likewise. + +2004-01-16 Alexandre Oliva + + * gas/mn10300/mov5.s: New. + * gas/mn10300/basic.exp (do_mov5): New. + +2004-01-14 Maciej W. Rozycki + + * gas/mips/relax-swap1-mips1.d: New test for branch relaxation + with swapping for MIPS1. + * gas/mips/relax-swap1-mips2.d: New test for branch relaxation + with swapping for MIPS2. + * gas/mips/relax-swap1.l: Stderr output for the new tests. + * gas/mips/relax-swap1.s: Source for the new tests. + * gas/mips/relax-swap2.d: New test for branch likely relaxation + with swapping. + * gas/mips/relax-swap2.l: Stderr output for the new test. + * gas/mips/relax-swap2.s: Source for the new test. + * gas/mips/mips.exp: Run the new tests. + 2004-01-13 Ian Lance Taylor * gas/mips/mips16-64.d: New test. diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/arm.exp binutils-2.15.90.0.1/gas/testsuite/gas/arm/arm.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/arm.exp 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/arm.exp 2004-03-03 12:24:34.000000000 -0800 @@ -86,6 +86,8 @@ if {[istarget *arm*-*-*] || [istarget "x } gas_test "offset.s" "" $stdoptlist "OFFSET_IMM regression" + + run_errors_test "undefined" "" "Undefined local label error" } # Not all arm targets are bi-endian, so only run this test on ones diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.c binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.c --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.c 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.c 2004-03-03 12:24:34.000000000 -0800 @@ -360,8 +360,8 @@ MVfxa (am32, 32am, 1); MVfxa (ah32, 32ah, 2); MVfxa (a32, 32a, 3); MVdxa (a64, 64a, 4); -MCRC2 (mvsc32, 6, 0, 1, 5, dspsc, mvreg ("fx", 16)); -MCRC2 (mv32sc, 6, 0, 0, 5, mvreg ("fx", 0), dspsc); +MCRC2 (mvsc32, 4, 1, 0, 7, dspsc, mvreg ("dx", 12)); +MCRC2 (mv32sc, 4, 0, 1, 7, mvreg ("dx", 12), dspsc); CDP2 (cpys, , 4, 0, 0, "f", "f"); CDP2 (cpyd, , 4, 0, 1, "d", "d"); diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.d binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.d --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.d 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.d 2004-03-03 12:24:34.000000000 -0800 @@ -179,66 +179,66 @@ Disassembly of section .text: 0*29c 1e ?16 ?65 ?30 ? * cfmvr64hne r6, ?mvdx6 0*2a0 be ?17 ?05 ?30 ? * cfmvr64hlt r0, ?mvdx7 0*2a4 5e ?13 ?75 ?30 ? * cfmvr64hpl r7, ?mvdx3 -0*2a8 ce ?11 ?06 ?11 ? * cfmval32gt mvax1, ?mvfx1 -0*2ac 8e ?1d ?06 ?13 ? * cfmval32hi mvax3, ?mvfx13 -0*2b0 6e ?14 ?06 ?13 ? * cfmval32vs mvax3, ?mvfx4 -0*2b4 2e ?10 ?06 ?11 ? * cfmval32cs mvax1, ?mvfx0 -0*2b8 5e ?1a ?06 ?13 ? * cfmval32pl mvax3, ?mvfx10 -0*2bc 9e ?01 ?06 ?14 ? * cfmv32alls mvfx4, ?mvax1 -0*2c0 3e ?03 ?06 ?18 ? * cfmv32alcc mvfx8, ?mvax3 -0*2c4 7e ?03 ?06 ?12 ? * cfmv32alvc mvfx2, ?mvax3 -0*2c8 ce ?01 ?06 ?16 ? * cfmv32algt mvfx6, ?mvax1 -0*2cc 0e ?03 ?06 ?17 ? * cfmv32aleq mvfx7, ?mvax3 -0*2d0 ee ?1c ?06 ?32 ? * cfmvam32 mvax2, ?mvfx12 -0*2d4 ae ?18 ?06 ?33 ? * cfmvam32ge mvax3, ?mvfx8 -0*2d8 ee ?16 ?06 ?32 ? * cfmvam32 mvax2, ?mvfx6 -0*2dc be ?12 ?06 ?32 ? * cfmvam32lt mvax2, ?mvfx2 -0*2e0 9e ?15 ?06 ?30 ? * cfmvam32ls mvax0, ?mvfx5 -0*2e4 ee ?02 ?06 ?3a ? * cfmv32am mvfx10, ?mvax2 -0*2e8 4e ?03 ?06 ?3e ? * cfmv32ammi mvfx14, ?mvax3 -0*2ec 8e ?02 ?06 ?3d ? * cfmv32amhi mvfx13, ?mvax2 -0*2f0 2e ?02 ?06 ?31 ? * cfmv32amcs mvfx1, ?mvax2 -0*2f4 6e ?00 ?06 ?3b ? * cfmv32amvs mvfx11, ?mvax0 -0*2f8 7e ?1e ?06 ?53 ? * cfmvah32vc mvax3, ?mvfx14 -0*2fc 3e ?1a ?06 ?50 ? * cfmvah32cc mvax0, ?mvfx10 -0*300 1e ?1f ?06 ?51 ? * cfmvah32ne mvax1, ?mvfx15 -0*304 de ?1b ?06 ?50 ? * cfmvah32le mvax0, ?mvfx11 -0*308 4e ?19 ?06 ?50 ? * cfmvah32mi mvax0, ?mvfx9 -0*30c 0e ?03 ?06 ?55 ? * cfmv32aheq mvfx5, ?mvax3 -0*310 ae ?00 ?06 ?59 ? * cfmv32ahge mvfx9, ?mvax0 -0*314 ee ?01 ?06 ?53 ? * cfmv32ah mvfx3, ?mvax1 -0*318 de ?00 ?06 ?57 ? * cfmv32ahle mvfx7, ?mvax0 -0*31c 1e ?00 ?06 ?5c ? * cfmv32ahne mvfx12, ?mvax0 -0*320 be ?17 ?06 ?70 ? * cfmva32lt mvax0, ?mvfx7 -0*324 5e ?13 ?06 ?72 ? * cfmva32pl mvax2, ?mvfx3 -0*328 ce ?11 ?06 ?71 ? * cfmva32gt mvax1, ?mvfx1 -0*32c 8e ?1d ?06 ?73 ? * cfmva32hi mvax3, ?mvfx13 -0*330 6e ?14 ?06 ?73 ? * cfmva32vs mvax3, ?mvfx4 -0*334 2e ?00 ?06 ?79 ? * cfmv32acs mvfx9, ?mvax0 -0*338 5e ?02 ?06 ?7f ? * cfmv32apl mvfx15, ?mvax2 -0*33c 9e ?01 ?06 ?74 ? * cfmv32als mvfx4, ?mvax1 -0*340 3e ?03 ?06 ?78 ? * cfmv32acc mvfx8, ?mvax3 -0*344 7e ?03 ?06 ?72 ? * cfmv32avc mvfx2, ?mvax3 -0*348 ce ?1b ?06 ?90 ? * cfmva64gt mvax0, ?mvdx11 -0*34c 0e ?15 ?06 ?91 ? * cfmva64eq mvax1, ?mvdx5 -0*350 ee ?1c ?06 ?92 ? * cfmva64 mvax2, ?mvdx12 -0*354 ae ?18 ?06 ?93 ? * cfmva64ge mvax3, ?mvdx8 -0*358 ee ?16 ?06 ?92 ? * cfmva64 mvax2, ?mvdx6 -0*35c be ?00 ?06 ?94 ? * cfmv64alt mvdx4, ?mvax0 -0*360 9e ?01 ?06 ?90 ? * cfmv64als mvdx0, ?mvax1 -0*364 ee ?02 ?06 ?9a ? * cfmv64a mvdx10, ?mvax2 -0*368 4e ?03 ?06 ?9e ? * cfmv64ami mvdx14, ?mvax3 -0*36c 8e ?02 ?06 ?9d ? * cfmv64ahi mvdx13, ?mvax2 -0*370 2e ?1c ?06 ?b0 ? * cfmvsc32cs dspsc, ?mvfx12 -0*374 6e ?10 ?06 ?b0 ? * cfmvsc32vs dspsc, ?mvfx0 -0*378 7e ?1e ?06 ?b0 ? * cfmvsc32vc dspsc, ?mvfx14 -0*37c 3e ?1a ?06 ?b0 ? * cfmvsc32cc dspsc, ?mvfx10 -0*380 1e ?1f ?06 ?b0 ? * cfmvsc32ne dspsc, ?mvfx15 -0*384 de ?00 ?06 ?b6 ? * cfmv32scle mvfx6, ?dspsc -0*388 4e ?00 ?06 ?b2 ? * cfmv32scmi mvfx2, ?dspsc -0*38c 0e ?00 ?06 ?b5 ? * cfmv32sceq mvfx5, ?dspsc -0*390 ae ?00 ?06 ?b9 ? * cfmv32scge mvfx9, ?dspsc -0*394 ee ?00 ?06 ?b3 ? * cfmv32sc mvfx3, ?dspsc +0*2a8 ce ?21 ?14 ?40 ? * cfmval32gt mvax1, ?mvfx1 +0*2ac 8e ?2d ?34 ?40 ? * cfmval32hi mvax3, ?mvfx13 +0*2b0 6e ?24 ?34 ?40 ? * cfmval32vs mvax3, ?mvfx4 +0*2b4 2e ?20 ?14 ?40 ? * cfmval32cs mvax1, ?mvfx0 +0*2b8 5e ?2a ?34 ?40 ? * cfmval32pl mvax3, ?mvfx10 +0*2bc 9e ?11 ?44 ?40 ? * cfmv32alls mvfx4, ?mvax1 +0*2c0 3e ?13 ?84 ?40 ? * cfmv32alcc mvfx8, ?mvax3 +0*2c4 7e ?13 ?24 ?40 ? * cfmv32alvc mvfx2, ?mvax3 +0*2c8 ce ?11 ?64 ?40 ? * cfmv32algt mvfx6, ?mvax1 +0*2cc 0e ?13 ?74 ?40 ? * cfmv32aleq mvfx7, ?mvax3 +0*2d0 ee ?2c ?24 ?60 ? * cfmvam32 mvax2, ?mvfx12 +0*2d4 ae ?28 ?34 ?60 ? * cfmvam32ge mvax3, ?mvfx8 +0*2d8 ee ?26 ?24 ?60 ? * cfmvam32 mvax2, ?mvfx6 +0*2dc be ?22 ?24 ?60 ? * cfmvam32lt mvax2, ?mvfx2 +0*2e0 9e ?25 ?04 ?60 ? * cfmvam32ls mvax0, ?mvfx5 +0*2e4 ee ?12 ?a4 ?60 ? * cfmv32am mvfx10, ?mvax2 +0*2e8 4e ?13 ?e4 ?60 ? * cfmv32ammi mvfx14, ?mvax3 +0*2ec 8e ?12 ?d4 ?60 ? * cfmv32amhi mvfx13, ?mvax2 +0*2f0 2e ?12 ?14 ?60 ? * cfmv32amcs mvfx1, ?mvax2 +0*2f4 6e ?10 ?b4 ?60 ? * cfmv32amvs mvfx11, ?mvax0 +0*2f8 7e ?2e ?34 ?80 ? * cfmvah32vc mvax3, ?mvfx14 +0*2fc 3e ?2a ?04 ?80 ? * cfmvah32cc mvax0, ?mvfx10 +0*300 1e ?2f ?14 ?80 ? * cfmvah32ne mvax1, ?mvfx15 +0*304 de ?2b ?04 ?80 ? * cfmvah32le mvax0, ?mvfx11 +0*308 4e ?29 ?04 ?80 ? * cfmvah32mi mvax0, ?mvfx9 +0*30c 0e ?13 ?54 ?80 ? * cfmv32aheq mvfx5, ?mvax3 +0*310 ae ?10 ?94 ?80 ? * cfmv32ahge mvfx9, ?mvax0 +0*314 ee ?11 ?34 ?80 ? * cfmv32ah mvfx3, ?mvax1 +0*318 de ?10 ?74 ?80 ? * cfmv32ahle mvfx7, ?mvax0 +0*31c 1e ?10 ?c4 ?80 ? * cfmv32ahne mvfx12, ?mvax0 +0*320 be ?27 ?04 ?a0 ? * cfmva32lt mvax0, ?mvfx7 +0*324 5e ?23 ?24 ?a0 ? * cfmva32pl mvax2, ?mvfx3 +0*328 ce ?21 ?14 ?a0 ? * cfmva32gt mvax1, ?mvfx1 +0*32c 8e ?2d ?34 ?a0 ? * cfmva32hi mvax3, ?mvfx13 +0*330 6e ?24 ?34 ?a0 ? * cfmva32vs mvax3, ?mvfx4 +0*334 2e ?10 ?94 ?a0 ? * cfmv32acs mvfx9, ?mvax0 +0*338 5e ?12 ?f4 ?a0 ? * cfmv32apl mvfx15, ?mvax2 +0*33c 9e ?11 ?44 ?a0 ? * cfmv32als mvfx4, ?mvax1 +0*340 3e ?13 ?84 ?a0 ? * cfmv32acc mvfx8, ?mvax3 +0*344 7e ?13 ?24 ?a0 ? * cfmv32avc mvfx2, ?mvax3 +0*348 ce ?2b ?04 ?c0 ? * cfmva64gt mvax0, ?mvdx11 +0*34c 0e ?25 ?14 ?c0 ? * cfmva64eq mvax1, ?mvdx5 +0*350 ee ?2c ?24 ?c0 ? * cfmva64 mvax2, ?mvdx12 +0*354 ae ?28 ?34 ?c0 ? * cfmva64ge mvax3, ?mvdx8 +0*358 ee ?26 ?24 ?c0 ? * cfmva64 mvax2, ?mvdx6 +0*35c be ?10 ?44 ?c0 ? * cfmv64alt mvdx4, ?mvax0 +0*360 9e ?11 ?04 ?c0 ? * cfmv64als mvdx0, ?mvax1 +0*364 ee ?12 ?a4 ?c0 ? * cfmv64a mvdx10, ?mvax2 +0*368 4e ?13 ?e4 ?c0 ? * cfmv64ami mvdx14, ?mvax3 +0*36c 8e ?12 ?d4 ?c0 ? * cfmv64ahi mvdx13, ?mvax2 +0*370 2e ?20 ?c4 ?e0 ? * cfmvsc32cs dspsc, ?mvdx12 +0*374 6e ?20 ?04 ?e0 ? * cfmvsc32vs dspsc, ?mvdx0 +0*378 7e ?20 ?e4 ?e0 ? * cfmvsc32vc dspsc, ?mvdx14 +0*37c 3e ?20 ?a4 ?e0 ? * cfmvsc32cc dspsc, ?mvdx10 +0*380 1e ?20 ?f4 ?e0 ? * cfmvsc32ne dspsc, ?mvdx15 +0*384 de ?10 ?64 ?e0 ? * cfmv32scle mvdx6, ?dspsc +0*388 4e ?10 ?24 ?e0 ? * cfmv32scmi mvdx2, ?dspsc +0*38c 0e ?10 ?54 ?e0 ? * cfmv32sceq mvdx5, ?dspsc +0*390 ae ?10 ?94 ?e0 ? * cfmv32scge mvdx9, ?dspsc +0*394 ee ?10 ?34 ?e0 ? * cfmv32sc mvdx3, ?dspsc 0*398 de ?02 ?74 ?00 ? * cfcpysle mvf7, ?mvf2 0*39c 1e ?06 ?c4 ?00 ? * cfcpysne mvf12, ?mvf6 0*3a0 be ?07 ?04 ?00 ? * cfcpyslt mvf0, ?mvf7 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.s binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.s --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/maverick.s 2003-05-05 14:46:48.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/maverick.s 2004-03-03 12:24:34.000000000 -0800 @@ -222,16 +222,16 @@ move: cfmv64a mvdx10, mvax2 cfmv64ami mvdx14, mvax3 cfmv64ahi mvdx13, mvax2 - cfmvsc32cs dspsc, mvfx12 - cfmvsc32vs dspsc, mvfx0 - cfmvsc32vc dspsc, mvfx14 - cfmvsc32cc dspsc, mvfx10 - cfmvsc32ne dspsc, mvfx15 - cfmv32scle mvfx6, dspsc - cfmv32scmi mvfx2, dspsc - cfmv32sceq mvfx5, dspsc - cfmv32scge mvfx9, dspsc - cfmv32scal mvfx3, dspsc + cfmvsc32cs dspsc, mvdx12 + cfmvsc32vs dspsc, mvdx0 + cfmvsc32vc dspsc, mvdx14 + cfmvsc32cc dspsc, mvdx10 + cfmvsc32ne dspsc, mvdx15 + cfmv32scle mvdx6, dspsc + cfmv32scmi mvdx2, dspsc + cfmv32sceq mvdx5, dspsc + cfmv32scge mvdx9, dspsc + cfmv32scal mvdx3, dspsc cfcpysle mvf7, mvf2 cfcpysne mvf12, mvf6 cfcpyslt mvf0, mvf7 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/undefined.l binutils-2.15.90.0.1/gas/testsuite/gas/arm/undefined.l --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/undefined.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/undefined.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +[^:]*:1: Error: undefined local label `\.Lval' diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/arm/undefined.s binutils-2.15.90.0.1/gas/testsuite/gas/arm/undefined.s --- binutils-2.14.90.0.8/gas/testsuite/gas/arm/undefined.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/arm/undefined.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ + ldr a1, .Lval diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.d binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.d --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.d 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.d 2004-03-03 12:24:34.000000000 -0800 @@ -514,22 +514,22 @@ Disassembly of section .text: 2a0: 80 0c 19 41 stc cpr0,@\(sp,sp\) 000002a4 : - 2a4: 82 0c 18 01 rstb sp,@\(sp,sp\) + 2a4: 80 88 00 00 nop 000002a8 : - 2a8: 82 0c 18 41 rsth sp,@\(sp,sp\) + 2a8: 80 88 00 00 nop 000002ac : - 2ac: 82 0c 18 81 rst sp,@\(sp,sp\) + 2ac: 80 88 00 00 nop 000002b0 : - 2b0: 80 0c 1a 01 rstbf fr0,@\(sp,sp\) + 2b0: 80 88 00 00 nop 000002b4 : - 2b4: 80 0c 1a 41 rsthf fr0,@\(sp,sp\) + 2b4: 80 88 00 00 nop 000002b8 : - 2b8: 80 0c 1a 81 rstf fr0,@\(sp,sp\) + 2b8: 80 88 00 00 nop 000002bc : 2bc: 84 0c 10 c1 std fp,@\(sp,sp\) @@ -541,10 +541,10 @@ Disassembly of section .text: 2c4: 80 0c 19 81 stdc cpr0,@\(sp,sp\) 000002c8 : - 2c8: 84 0c 18 c1 rstd fp,@\(sp,sp\) + 2c8: 80 88 00 00 nop 000002cc : - 2cc: 80 0c 1a c1 rstdf fr0,@\(sp,sp\) + 2cc: 80 88 00 00 nop 000002d0 : 2d0: 82 0c 11 01 stq sp,@\(sp,sp\) @@ -556,10 +556,10 @@ Disassembly of section .text: 2d8: 80 0c 19 c1 stqc cpr0,@\(sp,sp\) 000002dc : - 2dc: 82 0c 19 01 rstq sp,@\(sp,sp\) + 2dc: 80 88 00 00 nop 000002e0 : - 2e0: 80 0c 1b 01 rstqf fr0,@\(sp,sp\) + 2e0: 80 88 00 00 nop 000002e4 : 2e4: 82 0c 14 01 stbu sp,@\(sp,sp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.exp binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.exp 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.exp 2004-03-03 12:24:34.000000000 -0800 @@ -1,8 +1,30 @@ # FRV assembler testsuite. +proc run_list_test { name opts } { + global srcdir subdir + set testname "$name error test ($opts)" + gas_run $name.s $opts >&dump.out + if {[regexp_diff dump.out $srcdir/$subdir/$name.l]} { + fail $testname + verbose "output is [file_contents dump.out]" 2 + return + } + pass $testname +} + if [istarget frv*-*-*] { run_dump_test "allinsn" run_dump_test "fdpic" run_dump_test "reloc1" + run_dump_test "fr405-insn" + run_list_test "fr405-insn" "-mcpu=fr400" + run_list_test "fr405-insn" "-mcpu=fr500" + + run_dump_test "fr450-spr" + run_dump_test "fr450-insn" + run_list_test "fr450-insn" "-mcpu=fr405" + run_list_test "fr450-insn" "-mcpu=fr400" + run_list_test "fr450-insn" "-mcpu=fr500" + run_list_test "fr450-media-issue" "-mcpu=fr450" } diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.s binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.s --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/allinsn.s 2004-01-14 13:07:46.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/allinsn.s 2004-03-03 12:24:34.000000000 -0800 @@ -681,27 +681,27 @@ stc: .text .global rstb rstb: - rstb sp,@(sp,sp) + nop .text .global rsth rsth: - rsth sp,@(sp,sp) + nop .text .global rst rst: - rst sp,@(sp,sp) + nop .text .global rstbf rstbf: - rstbf fr0,@(sp,sp) + nop .text .global rsthf rsthf: - rsthf fr0,@(sp,sp) + nop .text .global rstf rstf: - rstf fr0,@(sp,sp) + nop .text .global std std: @@ -717,11 +717,11 @@ stdc: .text .global rstd rstd: - rstd fp,@(sp,sp) + nop .text .global rstdf rstdf: - rstdf fr0,@(sp,sp) + nop .text .global stq stq: @@ -737,11 +737,11 @@ stqc: .text .global rstq rstq: - rstq sp,@(sp,sp) + nop .text .global rstqf rstqf: - rstqf fr0,@(sp,sp) + nop .text .global stbu stbu: diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.d binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.d --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,15 @@ +#as: -mcpu=fr405 +#objdump: -dr + +.*: file format elf32-frv + +Disassembly of section \.text: + +00000000 <.*>: +.*: 81 18 41 45 smu gr4,gr5 +.*: 81 18 41 85 smass gr4,gr5 +.*: 81 18 41 c5 smsss gr4,gr5 +.*: 8d 18 40 85 slass gr4,gr5,gr6 +.*: 8b 18 01 04 scutss gr4,gr5 +.*: 8d 18 40 05 addss gr4,gr5,gr6 +.*: 8d 18 40 45 subss gr4,gr5,gr6 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.l binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.l --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ +.*: Assembler messages: +.*:1: Error: Instruction not supported by this architecture +.*:2: Error: Instruction not supported by this architecture +.*:3: Error: Instruction not supported by this architecture +.*:4: Error: Instruction not supported by this architecture +.*:5: Error: Instruction not supported by this architecture +.*:6: Error: Instruction not supported by this architecture +.*:7: Error: Instruction not supported by this architecture diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.s binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.s --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr405-insn.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr405-insn.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,7 @@ + smu gr4,gr5 + smass gr4,gr5 + smsss gr4,gr5 + slass gr4,gr5,gr6 + scutss gr4,gr5 + addss gr4,gr5,gr6 + subss gr4,gr5,gr6 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.d binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.d --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,41 @@ +#as: -mcpu=fr450 +#objdump: -dr + +.*: file format elf32-frv + +Disassembly of section \.text: + +00000000 <.*>: +# +.*: 80 0d f8 00 lrai gr31,gr0,0x0,0x0,0x0 +.*: be 0c 08 00 lrai gr0,gr31,0x0,0x0,0x0 +.*: 80 0c 08 20 lrai gr0,gr0,0x1,0x0,0x0 +.*: 80 0c 08 10 lrai gr0,gr0,0x0,0x1,0x0 +.*: 80 0c 08 08 lrai gr0,gr0,0x0,0x0,0x1 +# +.*: 80 0d f8 40 lrad gr31,gr0,0x0,0x0,0x0 +.*: be 0c 08 40 lrad gr0,gr31,0x0,0x0,0x0 +.*: 80 0c 08 60 lrad gr0,gr0,0x1,0x0,0x0 +.*: 80 0c 08 50 lrad gr0,gr0,0x0,0x1,0x0 +.*: 80 0c 08 48 lrad gr0,gr0,0x0,0x0,0x1 +# +.*: 80 0d f9 00 tlbpr gr31,gr0,0x0,0x0 +.*: 80 0c 09 1f tlbpr gr0,gr31,0x0,0x0 +.*: 9c 0c 09 00 tlbpr gr0,gr0,0x7,0x0 +.*: 82 0c 09 00 tlbpr gr0,gr0,0x0,0x1 +# +.*: 81 e1 e4 00 mqlclrhs fr30,fr0,fr0 +.*: 81 e0 04 1e mqlclrhs fr0,fr30,fr0 +.*: bd e0 04 00 mqlclrhs fr0,fr0,fr30 +# +.*: 81 e1 e5 00 mqlmths fr30,fr0,fr0 +.*: 81 e0 05 1e mqlmths fr0,fr30,fr0 +.*: bd e0 05 00 mqlmths fr0,fr0,fr30 +# +.*: 81 e1 e4 40 mqsllhi fr30,0x0,fr0 +.*: 81 e0 04 7f mqsllhi fr0,0x3f,fr0 +.*: bd e0 04 40 mqsllhi fr0,0x0,fr30 +# +.*: 81 e1 e4 c0 mqsrahi fr30,0x0,fr0 +.*: 81 e0 04 ff mqsrahi fr0,0x3f,fr0 +.*: bd e0 04 c0 mqsrahi fr0,0x0,fr30 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.l binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.l --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,33 @@ +.*: Assembler messages: +.*:1: Error: Instruction not supported by this architecture +.*:2: Error: Instruction not supported by this architecture +.*:3: Error: Instruction not supported by this architecture +.*:4: Error: Instruction not supported by this architecture +.*:5: Error: Instruction not supported by this architecture +# +.*:7: Error: Instruction not supported by this architecture +.*:8: Error: Instruction not supported by this architecture +.*:9: Error: Instruction not supported by this architecture +.*:10: Error: Instruction not supported by this architecture +.*:11: Error: Instruction not supported by this architecture +# +.*:13: Error: Instruction not supported by this architecture +.*:14: Error: Instruction not supported by this architecture +.*:15: Error: Instruction not supported by this architecture +.*:16: Error: Instruction not supported by this architecture +# +.*:18: Error: Instruction not supported by this architecture +.*:19: Error: Instruction not supported by this architecture +.*:20: Error: Instruction not supported by this architecture +# +.*:22: Error: Instruction not supported by this architecture +.*:23: Error: Instruction not supported by this architecture +.*:24: Error: Instruction not supported by this architecture +# +.*:26: Error: Instruction not supported by this architecture +.*:27: Error: Instruction not supported by this architecture +.*:28: Error: Instruction not supported by this architecture +# +.*:30: Error: Instruction not supported by this architecture +.*:31: Error: Instruction not supported by this architecture +.*:32: Error: Instruction not supported by this architecture diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.s binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.s --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-insn.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-insn.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,32 @@ + lrai gr31,gr0,#0,#0,#0 + lrai gr0,gr31,#0,#0,#0 + lrai gr0,gr0,#1,#0,#0 + lrai gr0,gr0,#0,#1,#0 + lrai gr0,gr0,#0,#0,#1 + + lrad gr31,gr0,#0,#0,#0 + lrad gr0,gr31,#0,#0,#0 + lrad gr0,gr0,#1,#0,#0 + lrad gr0,gr0,#0,#1,#0 + lrad gr0,gr0,#0,#0,#1 + + tlbpr gr31,gr0,#0,#0 + tlbpr gr0,gr31,#0,#0 + tlbpr gr0,gr0,#7,#0 + tlbpr gr0,gr0,#0,#1 + + mqlclrhs fr30,fr0,fr0 + mqlclrhs fr0,fr30,fr0 + mqlclrhs fr0,fr0,fr30 + + mqlmths fr30,fr0,fr0 + mqlmths fr0,fr30,fr0 + mqlmths fr0,fr0,fr30 + + mqsllhi fr30,#0,fr0 + mqsllhi fr0,#63,fr0 + mqsllhi fr0,#0,fr30 + + mqsrahi fr30,#0,fr0 + mqsrahi fr0,#63,fr0 + mqsrahi fr0,#0,fr30 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-media-issue.l binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-media-issue.l --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-media-issue.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-media-issue.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,31 @@ +.*: Assembler messages: +.*:5: Error: VLIW packing constraint violation +.*:9: Error: VLIW packing constraint violation +.*:13: Error: VLIW packing constraint violation +# +.*:17: Error: VLIW packing constraint violation +.*:19: Error: VLIW packing constraint violation +.*:21: Error: VLIW packing constraint violation +.*:23: Error: VLIW packing constraint violation +.*:25: Error: VLIW packing constraint violation +.*:27: Error: VLIW packing constraint violation +# +.*:33: Error: VLIW packing constraint violation +.*:37: Error: VLIW packing constraint violation +.*:41: Error: VLIW packing constraint violation +# +.*:45: Error: VLIW packing constraint violation +.*:47: Error: VLIW packing constraint violation +.*:49: Error: VLIW packing constraint violation +.*:51: Error: VLIW packing constraint violation +# +.*:61: Error: VLIW packing constraint violation +.*:65: Error: VLIW packing constraint violation +.*:69: Error: VLIW packing constraint violation +# +.*:73: Error: VLIW packing constraint violation +.*:75: Error: VLIW packing constraint violation +.*:77: Error: VLIW packing constraint violation +.*:79: Error: VLIW packing constraint violation +.*:81: Error: VLIW packing constraint violation +.*:83: Error: VLIW packing constraint violation diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-media-issue.s binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-media-issue.s --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-media-issue.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-media-issue.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,83 @@ + ; M-1 first + mand.p fr0,fr1,fr2 ; M1 + mpackh fr4,fr5,fr6 ; M1 -- ok + mand.p fr0,fr1,fr2 ; M1 + mcpli fr4,#1,fr6 ; M2 -- error + mand.p fr0,fr1,fr2 ; M1 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mand.p fr0,fr1,fr2 ; M1 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mand.p fr0,fr1,fr2 ; M1 + mcuti acc8,#2,fr8 ; M5 -- ok + mand.p fr0,fr1,fr2 ; M1 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-2 first + mqaddhss.p fr0,fr2,fr2 ; M2 + mpackh fr4,fr5,fr6 ; M1 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mcpli fr4,#1,fr6 ; M2 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mmulhu fr4,fr6,acc8 ; M3 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mcuti acc8,#2,fr8 ; M5 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-3 first + mwtacc.p fr0,acc0 ; M3 + mpackh fr4,fr5,fr6 ; M1 -- ok + mwtacc.p fr0,acc0 ; M3 + mcpli fr4,#1,fr6 ; M2 -- error + mwtacc.p fr0,acc0 ; M3 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mwtacc.p fr0,acc0 ; M3 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mwtacc.p fr0,acc0 ; M3 + mcuti acc8,#2,fr8 ; M5 -- ok + mwtacc.p fr0,acc0 ; M3 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-4 first + mqcpxrs.p fr0,fr2,acc0 ; M4 + mpackh fr4,fr5,fr6 ; M1 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mcpli fr4,#1,fr6 ; M2 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mmulhu fr4,fr6,acc8 ; M3 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mcuti acc8,#2,fr8 ; M5 -- ok + mqcpxrs.p fr0,fr2,acc0 ; M4 + mdcutssi acc8,#2,fr8 ; M6 -- ok + + ; M-5 first + mrdacc.p acc0,fr0 ; M5 + mpackh fr4,fr5,fr6 ; M1 -- ok + mrdacc.p acc0,fr0 ; M5 + mcpli fr4,#1,fr6 ; M2 -- error + mrdacc.p acc0,fr0 ; M5 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mrdacc.p acc0,fr0 ; M5 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mrdacc.p acc0,fr0 ; M5 + mcuti acc8,#2,fr8 ; M5 -- ok + mrdacc.p acc0,fr0 ; M5 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-6 first + mdcutssi.p acc0,#3,fr0 ; M6 + mpackh fr4,fr5,fr6 ; M1 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mcpli fr4,#1,fr6 ; M2 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mmulhu fr4,fr6,acc8 ; M3 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mcuti acc8,#2,fr8 ; M5 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mdcutssi acc8,#2,fr8 ; M6 -- error diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-spr.d binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-spr.d --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-spr.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-spr.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,107 @@ +#as: -mcpu=fr450 +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +.* <\.text>: +.*: 80 0c 01 84 movgs gr4,psr +.*: 80 0c 11 84 movgs gr4,pcsr +.*: 80 0c 21 84 movgs gr4,bpcsr +.*: 80 0c 31 84 movgs gr4,tbr +.*: 80 0c 41 84 movgs gr4,bpsr +.*: 80 0d 01 84 movgs gr4,hsr0 +.*: 88 0c 01 84 movgs gr4,ccr +.*: 88 0c 71 84 movgs gr4,cccr +.*: 88 0d 01 84 movgs gr4,lr +.*: 88 0d 11 84 movgs gr4,lcr +.*: 88 0d 81 84 movgs gr4,iacc0h +.*: 88 0d 91 84 movgs gr4,iacc0l +.*: 88 0e 01 84 movgs gr4,isr +.*: 90 0c 01 84 movgs gr4,epcr0 +.*: 92 0c 01 84 movgs gr4,esr0 +.*: 92 0c e1 84 movgs gr4,esr14 +.*: 92 0c f1 84 movgs gr4,esr15 +.*: 94 0e 11 84 movgs gr4,esfr1 +.*: 9a 0c 01 84 movgs gr4,scr0 +.*: 9a 0c 11 84 movgs gr4,scr1 +.*: 9a 0c 21 84 movgs gr4,scr2 +.*: 9a 0c 31 84 movgs gr4,scr3 +.*: a8 0c 01 84 movgs gr4,msr0 +.*: a8 0c 11 84 movgs gr4,msr1 +.*: b0 0c 01 84 movgs gr4,ear0 +.*: b0 0c f1 84 movgs gr4,ear15 +.*: b4 0c 01 84 movgs gr4,iamlr0 +.*: b4 0c 11 84 movgs gr4,iamlr1 +.*: b4 0c 21 84 movgs gr4,iamlr2 +.*: b4 0c 31 84 movgs gr4,iamlr3 +.*: b4 0c 41 84 movgs gr4,iamlr4 +.*: b4 0c 51 84 movgs gr4,iamlr5 +.*: b4 0c 61 84 movgs gr4,iamlr6 +.*: b4 0c 71 84 movgs gr4,iamlr7 +.*: b6 0c 01 84 movgs gr4,iampr0 +.*: b6 0c 11 84 movgs gr4,iampr1 +.*: b6 0c 21 84 movgs gr4,iampr2 +.*: b6 0c 31 84 movgs gr4,iampr3 +.*: b6 0c 41 84 movgs gr4,iampr4 +.*: b6 0c 51 84 movgs gr4,iampr5 +.*: b6 0c 61 84 movgs gr4,iampr6 +.*: b6 0c 71 84 movgs gr4,iampr7 +.*: b8 0c 01 84 movgs gr4,damlr0 +.*: b8 0c 11 84 movgs gr4,damlr1 +.*: b8 0c 21 84 movgs gr4,damlr2 +.*: b8 0c 31 84 movgs gr4,damlr3 +.*: b8 0c 41 84 movgs gr4,damlr4 +.*: b8 0c 51 84 movgs gr4,damlr5 +.*: b8 0c 61 84 movgs gr4,damlr6 +.*: b8 0c 71 84 movgs gr4,damlr7 +.*: b8 0c 81 84 movgs gr4,damlr8 +.*: b8 0c 91 84 movgs gr4,damlr9 +.*: b8 0c a1 84 movgs gr4,damlr10 +.*: b8 0c b1 84 movgs gr4,damlr11 +.*: ba 0c 01 84 movgs gr4,dampr0 +.*: ba 0c 11 84 movgs gr4,dampr1 +.*: ba 0c 21 84 movgs gr4,dampr2 +.*: ba 0c 31 84 movgs gr4,dampr3 +.*: ba 0c 41 84 movgs gr4,dampr4 +.*: ba 0c 51 84 movgs gr4,dampr5 +.*: ba 0c 61 84 movgs gr4,dampr6 +.*: ba 0c 71 84 movgs gr4,dampr7 +.*: ba 0c 81 84 movgs gr4,dampr8 +.*: ba 0c 91 84 movgs gr4,dampr9 +.*: ba 0c a1 84 movgs gr4,dampr10 +.*: ba 0c b1 84 movgs gr4,dampr11 +.*: bc 0c 01 84 movgs gr4,amcr +.*: bc 0c 51 84 movgs gr4,iamvr1 +.*: bc 0c 71 84 movgs gr4,damvr1 +.*: bc 0d 01 84 movgs gr4,cxnr +.*: bc 0d 11 84 movgs gr4,ttbr +.*: bc 0d 21 84 movgs gr4,tplr +.*: bc 0d 31 84 movgs gr4,tppr +.*: bc 0d 41 84 movgs gr4,tpxr +.*: bc 0e 01 84 movgs gr4,timerh +.*: bc 0e 11 84 movgs gr4,timerl +.*: bc 0e 21 84 movgs gr4,timerd +.*: c0 0c 01 84 movgs gr4,dcr +.*: c0 0c 11 84 movgs gr4,brr +.*: c0 0c 21 84 movgs gr4,nmar +.*: c0 0c 31 84 movgs gr4,btbr +.*: c0 0c 41 84 movgs gr4,ibar0 +.*: c0 0c 51 84 movgs gr4,ibar1 +.*: c0 0c 61 84 movgs gr4,ibar2 +.*: c0 0c 71 84 movgs gr4,ibar3 +.*: c0 0c 81 84 movgs gr4,dbar0 +.*: c0 0c 91 84 movgs gr4,dbar1 +.*: c0 0c a1 84 movgs gr4,dbar2 +.*: c0 0c b1 84 movgs gr4,dbar3 +.*: c0 0c c1 84 movgs gr4,dbdr00 +.*: c0 0c d1 84 movgs gr4,dbdr01 +.*: c0 0c e1 84 movgs gr4,dbdr02 +.*: c0 0c f1 84 movgs gr4,dbdr03 +.*: c0 0d 01 84 movgs gr4,dbdr10 +.*: c0 0d 11 84 movgs gr4,dbdr11 +.*: c0 0d c1 84 movgs gr4,dbmr00 +.*: c0 0d d1 84 movgs gr4,dbmr01 +.*: c0 0e 01 84 movgs gr4,dbmr10 +.*: c0 0e 11 84 movgs gr4,dbmr11 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-spr.s binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-spr.s --- binutils-2.14.90.0.8/gas/testsuite/gas/frv/fr450-spr.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/frv/fr450-spr.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,99 @@ + movgs gr4, psr ; 0x000 00000 + movgs gr4, pcsr ; 0x001 00001 + movgs gr4, bpcsr ; 0x002 00002 + movgs gr4, tbr ; 0x003 00003 + movgs gr4, bpsr ; 0x004 00004 + movgs gr4, hsr0 ; 0x010 00020 + movgs gr4, ccr ; 0x100 00400 + movgs gr4, cccr ; 0x107 00407 + movgs gr4, lr ; 0x110 00420 + movgs gr4, lcr ; 0x111 00421 + movgs gr4, iacc0h ; 0x118 00430 + movgs gr4, iacc0l ; 0x119 00431 + movgs gr4, isr ; 0x120 00440 + movgs gr4, epcr0 ; 0x200 01000 + movgs gr4, esr0 ; 0x240 01100 + movgs gr4, esr14 ; 0x24e 01116 + movgs gr4, esr15 ; 0x24f 01117 + movgs gr4, esfr1 ; 0x2a1 01241 + movgs gr4, scr0 ; 0x340 01500 + movgs gr4, scr1 ; 0x341 01501 + movgs gr4, scr2 ; 0x342 01502 + movgs gr4, scr3 ; 0x343 01503 + movgs gr4, msr0 ; 0x500 02400 + movgs gr4, msr1 ; 0x501 02401 + movgs gr4, ear0 ; 0x600 03000 + movgs gr4, ear15 ; 0x60f 03017 + movgs gr4, iamlr0 ; 0x680 03200 + movgs gr4, iamlr1 ; 0x681 03201 + movgs gr4, iamlr2 ; 0x682 03202 + movgs gr4, iamlr3 ; 0x683 03203 + movgs gr4, iamlr4 ; 0x684 03204 + movgs gr4, iamlr5 ; 0x685 03205 + movgs gr4, iamlr6 ; 0x686 03206 + movgs gr4, iamlr7 ; 0x687 03207 + movgs gr4, iampr0 ; 0x6c0 03300 + movgs gr4, iampr1 ; 0x6c1 03301 + movgs gr4, iampr2 ; 0x6c2 03302 + movgs gr4, iampr3 ; 0x6c3 03303 + movgs gr4, iampr4 ; 0x6c4 03304 + movgs gr4, iampr5 ; 0x6c5 03305 + movgs gr4, iampr6 ; 0x6c6 03306 + movgs gr4, iampr7 ; 0x6c7 03307 + movgs gr4, damlr0 ; 0x700 03400 + movgs gr4, damlr1 ; 0x701 03401 + movgs gr4, damlr2 ; 0x702 03402 + movgs gr4, damlr3 ; 0x703 03403 + movgs gr4, damlr4 ; 0x704 03404 + movgs gr4, damlr5 ; 0x705 03405 + movgs gr4, damlr6 ; 0x706 03406 + movgs gr4, damlr7 ; 0x707 03407 + movgs gr4, damlr8 ; 0x708 03410 + movgs gr4, damlr9 ; 0x709 03411 + movgs gr4, damlr10 ; 0x70a 03412 + movgs gr4, damlr11 ; 0x70b 03413 + movgs gr4, dampr0 ; 0x740 03500 + movgs gr4, dampr1 ; 0x741 03501 + movgs gr4, dampr2 ; 0x742 03502 + movgs gr4, dampr3 ; 0x743 03503 + movgs gr4, dampr4 ; 0x744 03504 + movgs gr4, dampr5 ; 0x745 03505 + movgs gr4, dampr6 ; 0x746 03506 + movgs gr4, dampr7 ; 0x747 03507 + movgs gr4, dampr8 ; 0x748 03510 + movgs gr4, dampr9 ; 0x749 03511 + movgs gr4, dampr10 ; 0x74a 03512 + movgs gr4, dampr11 ; 0x74b 03513 + movgs gr4, amcr ; 0x780 03600 + movgs gr4, iamvr1 ; 0x785 03605 + movgs gr4, damvr1 ; 0x787 03607 + movgs gr4, cxnr ; 0x790 03620 + movgs gr4, ttbr ; 0x791 03621 + movgs gr4, tplr ; 0x792 03622 + movgs gr4, tppr ; 0x793 03623 + movgs gr4, tpxr ; 0x794 03624 + movgs gr4, timerh ; 0x7a0 03640 + movgs gr4, timerl ; 0x7a1 03641 + movgs gr4, timerd ; 0x7a2 03642 + movgs gr4, dcr ; 0x800 04000 + movgs gr4, brr ; 0x801 04001 + movgs gr4, nmar ; 0x802 04002 + movgs gr4, btbr ; 0x803 04003 + movgs gr4, ibar0 ; 0x804 04004 + movgs gr4, ibar1 ; 0x805 04005 + movgs gr4, ibar2 ; 0x806 04006 + movgs gr4, ibar3 ; 0x807 04007 + movgs gr4, dbar0 ; 0x808 04010 + movgs gr4, dbar1 ; 0x809 04011 + movgs gr4, dbar2 ; 0x80A 04012 + movgs gr4, dbar3 ; 0x80B 04013 + movgs gr4, dbdr00 ; 0x80C 04014 + movgs gr4, dbdr01 ; 0x80D 04015 + movgs gr4, dbdr02 ; 0x80E 04016 + movgs gr4, dbdr03 ; 0x80F 04017 + movgs gr4, dbdr10 ; 0x810 04020 + movgs gr4, dbdr11 ; 0x811 04021 + movgs gr4, dbmr00 ; 0x81C 04034 + movgs gr4, dbmr01 ; 0x81D 04035 + movgs gr4, dbmr10 ; 0x820 04040 + movgs gr4, dbmr11 ; 0x821 04041 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/i386/katmai.d binutils-2.15.90.0.1/gas/testsuite/gas/i386/katmai.d --- binutils-2.14.90.0.8/gas/testsuite/gas/i386/katmai.d 2001-05-12 00:07:15.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/i386/katmai.d 2004-03-03 12:24:34.000000000 -0800 @@ -17,7 +17,7 @@ Disassembly of section .text: 1b: 0f c2 c1 02 [ ]*cmpleps %xmm1,%xmm0 1f: 0f c2 0a 03 [ ]*cmpunordps \(%edx\),%xmm1 23: f3 0f c2 d2 04 [ ]*cmpneqss %xmm2,%xmm2 - 28: f3 0f c2 1c 24 05 [ ]*cmpnltss \(%esp,1\),%xmm3 + 28: f3 0f c2 1c 24 05 [ ]*cmpnltss \(%esp\),%xmm3 2e: 0f c2 e5 06 [ ]*cmpnleps %xmm5,%xmm4 32: 0f c2 2e 07 [ ]*cmpordps \(%esi\),%xmm5 36: f3 0f c2 f7 00 [ ]*cmpeqss %xmm7,%xmm6 @@ -25,7 +25,7 @@ Disassembly of section .text: 40: 0f c2 c1 00 [ ]*cmpeqps %xmm1,%xmm0 44: 0f c2 0a 00 [ ]*cmpeqps \(%edx\),%xmm1 48: f3 0f c2 d2 00 [ ]*cmpeqss %xmm2,%xmm2 - 4d: f3 0f c2 1c 24 00 [ ]*cmpeqss \(%esp,1\),%xmm3 + 4d: f3 0f c2 1c 24 00 [ ]*cmpeqss \(%esp\),%xmm3 53: 0f c2 e5 01 [ ]*cmpltps %xmm5,%xmm4 57: 0f c2 2e 01 [ ]*cmpltps \(%esi\),%xmm5 5b: f3 0f c2 f7 01 [ ]*cmpltss %xmm7,%xmm6 @@ -41,7 +41,7 @@ Disassembly of section .text: 8a: 0f c2 c1 04 [ ]*cmpneqps %xmm1,%xmm0 8e: 0f c2 0a 04 [ ]*cmpneqps \(%edx\),%xmm1 92: f3 0f c2 d2 04 [ ]*cmpneqss %xmm2,%xmm2 - 97: f3 0f c2 1c 24 04 [ ]*cmpneqss \(%esp,1\),%xmm3 + 97: f3 0f c2 1c 24 04 [ ]*cmpneqss \(%esp\),%xmm3 9d: 0f c2 e5 05 [ ]*cmpnltps %xmm5,%xmm4 a1: 0f c2 2e 05 [ ]*cmpnltps \(%esi\),%xmm5 a5: f3 0f c2 f7 05 [ ]*cmpnltss %xmm7,%xmm6 @@ -57,7 +57,7 @@ Disassembly of section .text: d4: 0f 2f c1 [ ]*comiss %xmm1,%xmm0 d7: 0f 2f 0a [ ]*comiss \(%edx\),%xmm1 da: 0f 2a d3 [ ]*cvtpi2ps %mm3,%xmm2 - dd: 0f 2a 1c 24 [ ]*cvtpi2ps \(%esp,1\),%xmm3 + dd: 0f 2a 1c 24 [ ]*cvtpi2ps \(%esp\),%xmm3 e1: f3 0f 2a e5 [ ]*cvtsi2ss %ebp,%xmm4 e5: f3 0f 2a 2e [ ]*cvtsi2ss \(%esi\),%xmm5 e9: 0f 2d f7 [ ]*cvtps2pi %xmm7,%mm6 @@ -71,14 +71,14 @@ Disassembly of section .text: 106: 0f 5e c1 [ ]*divps %xmm1,%xmm0 109: 0f 5e 0a [ ]*divps \(%edx\),%xmm1 10c: f3 0f 5e d3 [ ]*divss %xmm3,%xmm2 - 110: f3 0f 5e 1c 24 [ ]*divss \(%esp,1\),%xmm3 + 110: f3 0f 5e 1c 24 [ ]*divss \(%esp\),%xmm3 115: 0f ae 55 00 [ ]*ldmxcsr 0x0\(%ebp\) 119: 0f ae 1e [ ]*stmxcsr \(%esi\) 11c: 0f ae f8 [ ]*sfence 11f: 0f 5f c1 [ ]*maxps %xmm1,%xmm0 122: 0f 5f 0a [ ]*maxps \(%edx\),%xmm1 125: f3 0f 5f d3 [ ]*maxss %xmm3,%xmm2 - 129: f3 0f 5f 1c 24 [ ]*maxss \(%esp,1\),%xmm3 + 129: f3 0f 5f 1c 24 [ ]*maxss \(%esp\),%xmm3 12e: 0f 5d e5 [ ]*minps %xmm5,%xmm4 131: 0f 5d 2e [ ]*minps \(%esi\),%xmm5 134: f3 0f 5d f7 [ ]*minss %xmm7,%xmm6 @@ -87,7 +87,7 @@ Disassembly of section .text: 13f: 0f 29 11 [ ]*movaps %xmm2,\(%ecx\) 142: 0f 28 12 [ ]*movaps \(%edx\),%xmm2 145: 0f 16 dc [ ]*movlhps %xmm4,%xmm3 - 148: 0f 17 2c 24 [ ]*movhps %xmm5,\(%esp,1\) + 148: 0f 17 2c 24 [ ]*movhps %xmm5,\(%esp\) 14c: 0f 16 2e [ ]*movhps \(%esi\),%xmm5 14f: 0f 12 f7 [ ]*movhlps %xmm7,%xmm6 152: 0f 13 07 [ ]*movlps %xmm0,\(%edi\) @@ -102,7 +102,7 @@ Disassembly of section .text: 171: 0f 59 c1 [ ]*mulps %xmm1,%xmm0 174: 0f 59 0a [ ]*mulps \(%edx\),%xmm1 177: f3 0f 59 d2 [ ]*mulss %xmm2,%xmm2 - 17b: f3 0f 59 1c 24 [ ]*mulss \(%esp,1\),%xmm3 + 17b: f3 0f 59 1c 24 [ ]*mulss \(%esp\),%xmm3 180: 0f 56 e5 [ ]*orps %xmm5,%xmm4 183: 0f 56 2e [ ]*orps \(%esi\),%xmm5 186: 0f 53 f7 [ ]*rcpps %xmm7,%xmm6 @@ -118,7 +118,7 @@ Disassembly of section .text: 1ab: 0f 51 c1 [ ]*sqrtps %xmm1,%xmm0 1ae: 0f 51 0a [ ]*sqrtps \(%edx\),%xmm1 1b1: f3 0f 51 d2 [ ]*sqrtss %xmm2,%xmm2 - 1b5: f3 0f 51 1c 24 [ ]*sqrtss \(%esp,1\),%xmm3 + 1b5: f3 0f 51 1c 24 [ ]*sqrtss \(%esp\),%xmm3 1ba: 0f 5c e5 [ ]*subps %xmm5,%xmm4 1bd: 0f 5c 2e [ ]*subps \(%esi\),%xmm5 1c0: f3 0f 5c f7 [ ]*subss %xmm7,%xmm6 @@ -134,14 +134,14 @@ Disassembly of section .text: 1e1: 0f e0 c1 [ ]*pavgb %mm1,%mm0 1e4: 0f e0 0a [ ]*pavgb \(%edx\),%mm1 1e7: 0f e3 d3 [ ]*pavgw %mm3,%mm2 - 1ea: 0f e3 1c 24 [ ]*pavgw \(%esp,1\),%mm3 + 1ea: 0f e3 1c 24 [ ]*pavgw \(%esp\),%mm3 1ee: 0f c5 c1 00 [ ]*pextrw \$0x0,%mm1,%eax 1f2: 0f c4 09 01 [ ]*pinsrw \$0x1,\(%ecx\),%mm1 1f6: 0f c4 d2 02 [ ]*pinsrw \$0x2,%edx,%mm2 1fa: 0f ee c1 [ ]*pmaxsw %mm1,%mm0 1fd: 0f ee 0a [ ]*pmaxsw \(%edx\),%mm1 200: 0f de d2 [ ]*pmaxub %mm2,%mm2 - 203: 0f de 1c 24 [ ]*pmaxub \(%esp,1\),%mm3 + 203: 0f de 1c 24 [ ]*pmaxub \(%esp\),%mm3 207: 0f ea e5 [ ]*pminsw %mm5,%mm4 20a: 0f ea 2e [ ]*pminsw \(%esi\),%mm5 20d: 0f da f7 [ ]*pminub %mm7,%mm6 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/i386/prescott.d binutils-2.15.90.0.1/gas/testsuite/gas/i386/prescott.d --- binutils-2.14.90.0.8/gas/testsuite/gas/i386/prescott.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/i386/prescott.d 2004-03-03 12:24:34.000000000 -0800 @@ -22,7 +22,7 @@ Disassembly of section .text: 3f: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0 43: 66 0f 7d 0a [ ]*hsubpd \(%edx\),%xmm1 47: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2 - 4b: f2 0f 7d 1c 24 [ ]*hsubps \(%esp,1\),%xmm3 + 4b: f2 0f 7d 1c 24 [ ]*hsubps \(%esp\),%xmm3 50: f2 0f f0 2e [ ]*lddqu \(%esi\),%xmm5 54: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx 57: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/i386/sse2.d binutils-2.15.90.0.1/gas/testsuite/gas/i386/sse2.d --- binutils-2.14.90.0.8/gas/testsuite/gas/i386/sse2.d 2001-05-12 08:03:37.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/i386/sse2.d 2004-03-03 12:24:34.000000000 -0800 @@ -22,7 +22,7 @@ Disassembly of section .text: [ ]+2d: 66 0f c2 c1 02[ ]+cmplepd %xmm1,%xmm0 [ ]+32: 66 0f c2 0a 03[ ]+cmpunordpd \(%edx\),%xmm1 [ ]+37: f2 0f c2 d2 04[ ]+cmpneqsd %xmm2,%xmm2 -[ ]+3c: f2 0f c2 1c 24 05[ ]+cmpnltsd \(%esp,1\),%xmm3 +[ ]+3c: f2 0f c2 1c 24 05[ ]+cmpnltsd \(%esp\),%xmm3 [ ]+42: 66 0f c2 e5 06[ ]+cmpnlepd %xmm5,%xmm4 [ ]+47: 66 0f c2 2e 07[ ]+cmpordpd \(%esi\),%xmm5 [ ]+4c: f2 0f c2 f7 00[ ]+cmpeqsd %xmm7,%xmm6 @@ -30,7 +30,7 @@ Disassembly of section .text: [ ]+56: 66 0f c2 c1 00[ ]+cmpeqpd %xmm1,%xmm0 [ ]+5b: 66 0f c2 0a 00[ ]+cmpeqpd \(%edx\),%xmm1 [ ]+60: f2 0f c2 d2 00[ ]+cmpeqsd %xmm2,%xmm2 -[ ]+65: f2 0f c2 1c 24 00[ ]+cmpeqsd \(%esp,1\),%xmm3 +[ ]+65: f2 0f c2 1c 24 00[ ]+cmpeqsd \(%esp\),%xmm3 [ ]+6b: 66 0f c2 e5 01[ ]+cmpltpd %xmm5,%xmm4 [ ]+70: 66 0f c2 2e 01[ ]+cmpltpd \(%esi\),%xmm5 [ ]+75: f2 0f c2 f7 01[ ]+cmpltsd %xmm7,%xmm6 @@ -46,7 +46,7 @@ Disassembly of section .text: [ ]+a8: 66 0f c2 c1 04[ ]+cmpneqpd %xmm1,%xmm0 [ ]+ad: 66 0f c2 0a 04[ ]+cmpneqpd \(%edx\),%xmm1 [ ]+b2: f2 0f c2 d2 04[ ]+cmpneqsd %xmm2,%xmm2 -[ ]+b7: f2 0f c2 1c 24 04[ ]+cmpneqsd \(%esp,1\),%xmm3 +[ ]+b7: f2 0f c2 1c 24 04[ ]+cmpneqsd \(%esp\),%xmm3 [ ]+bd: 66 0f c2 e5 05[ ]+cmpnltpd %xmm5,%xmm4 [ ]+c2: 66 0f c2 2e 05[ ]+cmpnltpd \(%esi\),%xmm5 [ ]+c7: f2 0f c2 f7 05[ ]+cmpnltsd %xmm7,%xmm6 @@ -62,7 +62,7 @@ Disassembly of section .text: [ ]+fa: 66 0f 2f c1[ ]+comisd %xmm1,%xmm0 [ ]+fe: 66 0f 2f 0a[ ]+comisd \(%edx\),%xmm1 102: 66 0f 2a d3[ ]+cvtpi2pd %xmm3,%xmm2 - 106: 66 0f 2a 1c 24[ ]+cvtpi2pd \(%esp,1\),%xmm3 + 106: 66 0f 2a 1c 24[ ]+cvtpi2pd \(%esp\),%xmm3 10b: f2 0f 2a e5[ ]+cvtsi2sd %ebp,%xmm4 10f: f2 0f 2a 2e[ ]+cvtsi2sd \(%esi\),%xmm5 113: 66 0f 2d f7[ ]+cvtpd2pi %xmm7,%xmm6 @@ -76,14 +76,14 @@ Disassembly of section .text: 134: 66 0f 5e c1[ ]+divpd[ ]+%xmm1,%xmm0 138: 66 0f 5e 0a[ ]+divpd[ ]+\(%edx\),%xmm1 13c: f2 0f 5e d3[ ]+divsd[ ]+%xmm3,%xmm2 - 140: f2 0f 5e 1c 24[ ]+divsd[ ]+\(%esp,1\),%xmm3 + 140: f2 0f 5e 1c 24[ ]+divsd[ ]+\(%esp\),%xmm3 145: 0f ae 55 00[ ]+ldmxcsr 0x0\(%ebp\) 149: 0f ae 1e[ ]+stmxcsr \(%esi\) 14c: 0f ae f8[ ]+sfence 14f: 66 0f 5f c1[ ]+maxpd[ ]+%xmm1,%xmm0 153: 66 0f 5f 0a[ ]+maxpd[ ]+\(%edx\),%xmm1 157: f2 0f 5f d3[ ]+maxsd[ ]+%xmm3,%xmm2 - 15b: f2 0f 5f 1c 24[ ]+maxsd[ ]+\(%esp,1\),%xmm3 + 15b: f2 0f 5f 1c 24[ ]+maxsd[ ]+\(%esp\),%xmm3 160: 66 0f 5d e5[ ]+minpd[ ]+%xmm5,%xmm4 164: 66 0f 5d 2e[ ]+minpd[ ]+\(%esi\),%xmm5 168: f2 0f 5d f7[ ]+minsd[ ]+%xmm7,%xmm6 @@ -91,7 +91,7 @@ Disassembly of section .text: 170: 66 0f 28 c1[ ]+movapd %xmm1,%xmm0 174: 66 0f 29 11[ ]+movapd %xmm2,\(%ecx\) 178: 66 0f 28 12[ ]+movapd \(%edx\),%xmm2 - 17c: 66 0f 17 2c 24[ ]+movhpd %xmm5,\(%esp,1\) + 17c: 66 0f 17 2c 24[ ]+movhpd %xmm5,\(%esp\) 181: 66 0f 16 2e[ ]+movhpd \(%esi\),%xmm5 185: 66 0f 13 07[ ]+movlpd %xmm0,\(%edi\) 189: 66 0f 12 00[ ]+movlpd \(%eax\),%xmm0 @@ -105,7 +105,7 @@ Disassembly of section .text: 1aa: 66 0f 59 c1[ ]+mulpd[ ]+%xmm1,%xmm0 1ae: 66 0f 59 0a[ ]+mulpd[ ]+\(%edx\),%xmm1 1b2: f2 0f 59 d2[ ]+mulsd[ ]+%xmm2,%xmm2 - 1b6: f2 0f 59 1c 24[ ]+mulsd[ ]+\(%esp,1\),%xmm3 + 1b6: f2 0f 59 1c 24[ ]+mulsd[ ]+\(%esp\),%xmm3 1bb: 66 0f 56 e5[ ]+orpd[ ]+%xmm5,%xmm4 1bf: 66 0f 56 2e[ ]+orpd[ ]+\(%esi\),%xmm5 1c3: 66 0f c6 37 02[ ]+shufpd \$0x2,\(%edi\),%xmm6 @@ -113,7 +113,7 @@ Disassembly of section .text: 1cd: 66 0f 51 c1[ ]+sqrtpd %xmm1,%xmm0 1d1: 66 0f 51 0a[ ]+sqrtpd \(%edx\),%xmm1 1d5: f2 0f 51 d2[ ]+sqrtsd %xmm2,%xmm2 - 1d9: f2 0f 51 1c 24[ ]+sqrtsd \(%esp,1\),%xmm3 + 1d9: f2 0f 51 1c 24[ ]+sqrtsd \(%esp\),%xmm3 1de: 66 0f 5c e5[ ]+subpd[ ]+%xmm5,%xmm4 1e2: 66 0f 5c 2e[ ]+subpd[ ]+\(%esi\),%xmm5 1e6: f2 0f 5c f7[ ]+subsd[ ]+%xmm7,%xmm6 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/i386/ssemmx2.d binutils-2.15.90.0.1/gas/testsuite/gas/i386/ssemmx2.d --- binutils-2.14.90.0.8/gas/testsuite/gas/i386/ssemmx2.d 2001-05-12 08:03:37.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/i386/ssemmx2.d 2004-03-03 12:24:34.000000000 -0800 @@ -10,14 +10,14 @@ Disassembly of section .text: [ ]+0: 66 0f e0 c1[ ]+pavgb[ ]+%xmm1,%xmm0 [ ]+4: 66 0f e0 0a[ ]+pavgb[ ]+\(%edx\),%xmm1 [ ]+8: 66 0f e3 d3[ ]+pavgw[ ]+%xmm3,%xmm2 -[ ]+c: 66 0f e3 1c 24[ ]+pavgw[ ]+\(%esp,1\),%xmm3 +[ ]+c: 66 0f e3 1c 24[ ]+pavgw[ ]+\(%esp\),%xmm3 [ ]+11: 66 0f c5 c1 00[ ]+pextrw \$0x0,%xmm1,%eax [ ]+16: 66 0f c4 09 01[ ]+pinsrw \$0x1,\(%ecx\),%xmm1 [ ]+1b: 66 0f c4 d2 02[ ]+pinsrw \$0x2,%edx,%xmm2 [ ]+20: 66 0f ee c1[ ]+pmaxsw %xmm1,%xmm0 [ ]+24: 66 0f ee 0a[ ]+pmaxsw \(%edx\),%xmm1 [ ]+28: 66 0f de d2[ ]+pmaxub %xmm2,%xmm2 -[ ]+2c: 66 0f de 1c 24[ ]+pmaxub \(%esp,1\),%xmm3 +[ ]+2c: 66 0f de 1c 24[ ]+pmaxub \(%esp\),%xmm3 [ ]+31: 66 0f ea e5[ ]+pminsw %xmm5,%xmm4 [ ]+35: 66 0f ea 2e[ ]+pminsw \(%esi\),%xmm5 [ ]+39: 66 0f da f7[ ]+pminub %xmm7,%xmm6 @@ -85,4 +85,4 @@ Disassembly of section .text: 1f1: 66 0f fc 90 90 90 90 90 paddb[ ]+0x90909090\(%eax\),%xmm2 1f9: 66 0f fd 90 90 90 90 90 paddw[ ]+0x90909090\(%eax\),%xmm2 201: 66 0f fe 90 90 90 90 90 paddd[ ]+0x90909090\(%eax\),%xmm2 - 209: 8d b4 26 00 00 00 00 lea[ ]+0x0\(%esi,1\),%esi + 209: 8d b4 26 00 00 00 00 lea[ ]+0x0\(%esi\),%esi diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/m68hc11.exp binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/m68hc11.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/m68hc11.exp 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/m68hc11.exp 2004-03-03 12:24:34.000000000 -0800 @@ -140,11 +140,21 @@ gas_m68hc11_error "-m68hc12" "movb 200,x "Offset out of 5-bit range for movw/movb insn: 200" gas_m68hc11_error "-m68hc12" "movb 2,x,300,y\n" \ "Offset out of 5-bit range for movw/movb insn: 300" +gas_m68hc11_error "-m68hc12" "movb 2,x,bar,y\nbar=300\n" \ + "Offset out of 5-bit range for movw/movb insn: 300" +gas_m68hc11_error "-m68hc12" "movb bar,y,2,x\nbar=300\n" \ + "Offset out of 5-bit range for movw/movb insn: 300" +gas_m68hc11_error "-m68hc12" "movb 200,pc,3,y\n" \ + "Offset out of 5-bit range for movw/movb insn: 200" +gas_m68hc11_error "-m68hc12" "movb 2,x,300,pc\n" \ + "Offset out of 5-bit range for movw/movb insn: 300" +gas_m68hc11_error "-m68hc12" "movb 2,x,bar,pc\nbar=300\n" \ + "Offset out of 5-bit range for movw/movb insn: 300" +gas_m68hc11_error "-m68hc12" "movb bar,pc,2,x\nbar=300\n" \ + "Offset out of 5-bit range for movw/movb insn: 300" setup_xfail m6811-*-* setup_xfail m6812-*-* -gas_m68hc11_error "-m68hc12" "movb 2,x,bar,y\nbar=300\n" \ - "Offset out of 5-bit range for movw/movb insn: 300" # ------------------ # Specific commands @@ -173,3 +183,4 @@ run_dump_test branchs12 run_dump_test insns12 run_dump_test indexed12 run_dump_test bug-1825 +run_dump_test movb diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/movb.d binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/movb.d --- binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/movb.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/movb.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,451 @@ +#objdump: -D +#as: -m68hc12 +#name: 68HC12 movb movw instructions + +.*: +file format elf32\-m68hc12 + +Disassembly of section .text: + +0+00 <\.text>: +[ ]+ 0: 86 00[ ]+ ldaa #0 +[ ]+ 2: 18 0a 0f 0f movb 15,X, 15,X +[ ]+ 6: 18 0a 0f 0f movb 15,X, 15,X +[ ]+ a: 18 0a 0f 0f movb 15,X, 15,X +[ ]+ e: 86 01[ ]+ ldaa #1 +[ ]+10: 18 0a 0f 0f movb 15,X, 15,X +[ ]+14: 18 0a 0f 0f movb 15,X, 15,X +[ ]+18: 18 0a 0f 0f movb 15,X, 15,X +[ ]+1c: 86 02[ ]+ ldaa #2 +[ ]+1e: 18 0a 0f 10 movb 15,X, \-16,X +[ ]+22: 18 0a 0f 10 movb 15,X, \-16,X +[ ]+26: 18 0a 0f 10 movb 15,X, \-16,X +[ ]+2a: 86 03[ ]+ ldaa #3 +[ ]+2c: 18 0a 10 0f movb \-16,X, 15,X +[ ]+30: 18 0a 10 0f movb \-16,X, 15,X +[ ]+34: 18 0a 10 0f movb \-16,X, 15,X +[ ]+38: 86 04[ ]+ ldaa #4 +[ ]+3a: 18 02 0f 0f movw 15,X, 15,X +[ ]+3e: 18 02 0f 0f movw 15,X, 15,X +[ ]+42: 18 02 0f 0f movw 15,X, 15,X +[ ]+46: 86 05[ ]+ ldaa #5 +[ ]+48: 18 02 0f 0f movw 15,X, 15,X +[ ]+4c: 18 02 0f 0f movw 15,X, 15,X +[ ]+50: 18 02 0f 0f movw 15,X, 15,X +[ ]+54: 86 06[ ]+ ldaa #6 +[ ]+56: 18 02 0f 10 movw 15,X, \-16,X +[ ]+5a: 18 02 0f 10 movw 15,X, \-16,X +[ ]+5e: 18 02 0f 10 movw 15,X, \-16,X +[ ]+62: 86 07[ ]+ ldaa #7 +[ ]+64: 18 02 10 0f movw \-16,X, 15,X +[ ]+68: 18 02 10 0f movw \-16,X, 15,X +[ ]+6c: 18 02 10 0f movw \-16,X, 15,X +[ ]+70: 86 08[ ]+ ldaa #8 +[ ]+72: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+76: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+7a: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+7e: 86 09[ ]+ ldaa #9 +[ ]+80: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+84: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+88: 18 0a 4f 4f movb 15,Y, 15,Y +[ ]+8c: 86 0a[ ]+ ldaa #10 +[ ]+8e: 18 0a 4f 50 movb 15,Y, \-16,Y +[ ]+92: 18 0a 4f 50 movb 15,Y, \-16,Y +[ ]+96: 18 0a 4f 50 movb 15,Y, \-16,Y +[ ]+9a: 86 0b[ ]+ ldaa #11 +[ ]+9c: 18 0a 50 4f movb \-16,Y, 15,Y +[ ]+a0: 18 0a 50 4f movb \-16,Y, 15,Y +[ ]+a4: 18 0a 50 4f movb \-16,Y, 15,Y +[ ]+a8: 86 0c[ ]+ ldaa #12 +[ ]+aa: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+ae: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+b2: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+b6: 86 0d[ ]+ ldaa #13 +[ ]+b8: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+bc: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+c0: 18 02 4f 4f movw 15,Y, 15,Y +[ ]+c4: 86 0e[ ]+ ldaa #14 +[ ]+c6: 18 02 4f 50 movw 15,Y, \-16,Y +[ ]+ca: 18 02 4f 50 movw 15,Y, \-16,Y +[ ]+ce: 18 02 4f 50 movw 15,Y, \-16,Y +[ ]+d2: 86 0f[ ]+ ldaa #15 +[ ]+d4: 18 02 50 4f movw \-16,Y, 15,Y +[ ]+d8: 18 02 50 4f movw \-16,Y, 15,Y +[ ]+dc: 18 02 50 4f movw \-16,Y, 15,Y +[ ]+e0: 86 10[ ]+ ldaa #16 +[ ]+e2: 18 0a 4f cf movb 15,Y, 15,PC \{f5 \} +[ ]+e6: 18 0a 4f cf movb 15,Y, 15,PC \{f9 \} +[ ]+ea: 18 0a 4f cf movb 15,Y, 15,PC \{fd \} +[ ]+ee: 86 11[ ]+ ldaa #17 +[ ]+f0: 18 0a 4f cf movb 15,Y, 15,PC \{103 \} +[ ]+f4: 18 0a 4f cf movb 15,Y, 15,PC \{107 \} +[ ]+f8: 18 0a 4f cf movb 15,Y, 15,PC \{10b \} +[ ]+fc: 86 12[ ]+ ldaa #18 +[ ]+fe: 18 0a 4f d0 movb 15,Y, \-16,PC \{f2 \} + 102: 18 0a 4f d0 movb 15,Y, \-16,PC \{f6 \} + 106: 18 0a 4f d0 movb 15,Y, \-16,PC \{fa \} + 10a: 86 13[ ]+ ldaa #19 + 10c: 18 0a 50 cf movb \-16,Y, 15,PC \{11f \} + 110: 18 0a 50 cf movb \-16,Y, 15,PC \{123 \} + 114: 18 0a 50 cf movb \-16,Y, 15,PC \{127 \} + 118: 86 14[ ]+ ldaa #20 + 11a: 18 02 4f cf movw 15,Y, 15,PC \{12d \} + 11e: 18 02 4f cf movw 15,Y, 15,PC \{131 \} + 122: 18 02 4f cf movw 15,Y, 15,PC \{135 \} + 126: 86 15[ ]+ ldaa #21 + 128: 18 02 4f cf movw 15,Y, 15,PC \{13b \} + 12c: 18 02 4f cf movw 15,Y, 15,PC \{13f \} + 130: 18 02 4f cf movw 15,Y, 15,PC \{143 \} + 134: 86 16[ ]+ ldaa #22 + 136: 18 02 4f d0 movw 15,Y, \-16,PC \{12a \} + 13a: 18 02 4f d0 movw 15,Y, \-16,PC \{12e \} + 13e: 18 02 4f d0 movw 15,Y, \-16,PC \{132 \} + 142: 86 17[ ]+ ldaa #23 + 144: 18 02 50 cf movw \-16,Y, 15,PC \{157 \} + 148: 18 02 50 cf movw \-16,Y, 15,PC \{15b \} + 14c: 18 02 50 cf movw \-16,Y, 15,PC \{15f \} + 150: 86 18[ ]+ ldaa #24 + 152: 18 0a 8f cf movb 15,SP, 15,PC \{165 \} + 156: 18 0a 8f cf movb 15,SP, 15,PC \{169 \} + 15a: 18 0a 8f cf movb 15,SP, 15,PC \{16d \} + 15e: 86 19[ ]+ ldaa #25 + 160: 18 0a 8f cf movb 15,SP, 15,PC \{173 \} + 164: 18 0a 8f cf movb 15,SP, 15,PC \{177 \} + 168: 18 0a 8f cf movb 15,SP, 15,PC \{17b \} + 16c: 86 1a[ ]+ ldaa #26 + 16e: 18 0a 8f d0 movb 15,SP, \-16,PC \{162 \} + 172: 18 0a 8f d0 movb 15,SP, \-16,PC \{166 \} + 176: 18 0a 8f d0 movb 15,SP, \-16,PC \{16a \} + 17a: 86 1b[ ]+ ldaa #27 + 17c: 18 0a 90 cf movb \-16,SP, 15,PC \{18f \} + 180: 18 0a 90 cf movb \-16,SP, 15,PC \{193 \} + 184: 18 0a 90 cf movb \-16,SP, 15,PC \{197 \} + 188: 86 1c[ ]+ ldaa #28 + 18a: 18 02 8f cf movw 15,SP, 15,PC \{19d \} + 18e: 18 02 8f cf movw 15,SP, 15,PC \{1a1 \} + 192: 18 02 8f cf movw 15,SP, 15,PC \{1a5 \} + 196: 86 1d[ ]+ ldaa #29 + 198: 18 02 8f cf movw 15,SP, 15,PC \{1ab \} + 19c: 18 02 8f cf movw 15,SP, 15,PC \{1af \} + 1a0: 18 02 8f cf movw 15,SP, 15,PC \{1b3 \} + 1a4: 86 1e[ ]+ ldaa #30 + 1a6: 18 02 8f d0 movw 15,SP, \-16,PC \{19a \} + 1aa: 18 02 8f d0 movw 15,SP, \-16,PC \{19e \} + 1ae: 18 02 8f d0 movw 15,SP, \-16,PC \{1a2 \} + 1b2: 86 1f[ ]+ ldaa #31 + 1b4: 18 02 90 cf movw \-16,SP, 15,PC \{1c7 \} + 1b8: 18 02 90 cf movw \-16,SP, 15,PC \{1cb \} + 1bc: 18 02 90 cf movw \-16,SP, 15,PC \{1cf \} + 1c0: 86 20[ ]+ ldaa #32 + 1c2: 18 09 0f 10 movb 1000 , 15,X + 1c6: 00 + 1c7: 18 09 0f 10 movb 1000 , 15,X + 1cb: 00 + 1cc: 18 09 0f 10 movb 1000 , 15,X + 1d0: 00 + 1d1: 86 21[ ]+ ldaa #33 + 1d3: 18 0d 0f 10 movb 15,X, 1000 + 1d7: 00 + 1d8: 18 0d 0f 10 movb 15,X, 1000 + 1dc: 00 + 1dd: 18 0d 0f 10 movb 15,X, 1000 + 1e1: 00 + 1e2: 86 22[ ]+ ldaa #34 + 1e4: 18 09 10 10 movb 1000 , \-16,X + 1e8: 00 + 1e9: 18 09 10 10 movb 1000 , \-16,X + 1ed: 00 + 1ee: 18 09 10 10 movb 1000 , \-16,X + 1f2: 00 + 1f3: 86 23[ ]+ ldaa #35 + 1f5: 18 0d 10 10 movb \-16,X, 1000 + 1f9: 00 + 1fa: 18 0d 10 10 movb \-16,X, 1000 + 1fe: 00 + 1ff: 18 0d 10 10 movb \-16,X, 1000 + 203: 00 + 204: 86 24[ ]+ ldaa #36 + 206: 18 01 0f 10 movw 1002 , 15,X + 20a: 02 + 20b: 18 01 0f 10 movw 1002 , 15,X + 20f: 02 + 210: 18 01 0f 10 movw 1002 , 15,X + 214: 02 + 215: 86 25[ ]+ ldaa #37 + 217: 18 05 0f 10 movw 15,X, 1002 + 21b: 02 + 21c: 18 05 0f 10 movw 15,X, 1002 + 220: 02 + 221: 18 05 0f 10 movw 15,X, 1002 + 225: 02 + 226: 86 26[ ]+ ldaa #38 + 228: 18 01 10 10 movw 1002 , \-16,X + 22c: 02 + 22d: 18 01 10 10 movw 1002 , \-16,X + 231: 02 + 232: 18 01 10 10 movw 1002 , \-16,X + 236: 02 + 237: 86 27[ ]+ ldaa #39 + 239: 18 05 10 10 movw \-16,X, 1002 + 23d: 02 + 23e: 18 05 10 10 movw \-16,X, 1002 + 242: 02 + 243: 18 05 10 10 movw \-16,X, 1002 + 247: 02 + 248: 86 28[ ]+ ldaa #40 + 24a: 18 09 4f 10 movb 1000 , 15,Y + 24e: 00 + 24f: 18 09 4f 10 movb 1000 , 15,Y + 253: 00 + 254: 18 09 4f 10 movb 1000 , 15,Y + 258: 00 + 259: 86 29[ ]+ ldaa #41 + 25b: 18 0d 4f 10 movb 15,Y, 1000 + 25f: 00 + 260: 18 0d 4f 10 movb 15,Y, 1000 + 264: 00 + 265: 18 0d 4f 10 movb 15,Y, 1000 + 269: 00 + 26a: 86 2a[ ]+ ldaa #42 + 26c: 18 09 50 10 movb 1000 , \-16,Y + 270: 00 + 271: 18 09 50 10 movb 1000 , \-16,Y + 275: 00 + 276: 18 09 50 10 movb 1000 , \-16,Y + 27a: 00 + 27b: 86 2b[ ]+ ldaa #43 + 27d: 18 0d 50 10 movb \-16,Y, 1000 + 281: 00 + 282: 18 0d 50 10 movb \-16,Y, 1000 + 286: 00 + 287: 18 0d 50 10 movb \-16,Y, 1000 + 28b: 00 + 28c: 86 2c[ ]+ ldaa #44 + 28e: 18 01 4f 10 movw 1002 , 15,Y + 292: 02 + 293: 18 01 4f 10 movw 1002 , 15,Y + 297: 02 + 298: 18 01 4f 10 movw 1002 , 15,Y + 29c: 02 + 29d: 86 2d[ ]+ ldaa #45 + 29f: 18 05 4f 10 movw 15,Y, 1002 + 2a3: 02 + 2a4: 18 05 4f 10 movw 15,Y, 1002 + 2a8: 02 + 2a9: 18 05 4f 10 movw 15,Y, 1002 + 2ad: 02 + 2ae: 86 2e[ ]+ ldaa #46 + 2b0: 18 01 50 10 movw 1002 , \-16,Y + 2b4: 02 + 2b5: 18 01 50 10 movw 1002 , \-16,Y + 2b9: 02 + 2ba: 18 01 50 10 movw 1002 , \-16,Y + 2be: 02 + 2bf: 86 2f[ ]+ ldaa #47 + 2c1: 18 05 50 10 movw \-16,Y, 1002 + 2c5: 02 + 2c6: 18 05 50 10 movw \-16,Y, 1002 + 2ca: 02 + 2cb: 18 05 50 10 movw \-16,Y, 1002 + 2cf: 02 + 2d0: 86 30[ ]+ ldaa #48 + 2d2: 18 09 cf 10 movb 1000 , 15,PC \{2e4 \} + 2d6: 00 + 2d7: 18 09 cf 10 movb 1000 , 15,PC \{2e9 \} + 2db: 00 + 2dc: 18 09 cf 10 movb 1000 , 15,PC \{2ee \} + 2e0: 00 + 2e1: 86 31[ ]+ ldaa #49 + 2e3: 18 0d cf 10 movb 15,PC \{2f5 \}, 1000 + 2e7: 00 + 2e8: 18 0d cf 10 movb 15,PC \{2fa \}, 1000 + 2ec: 00 + 2ed: 18 0d cf 10 movb 15,PC \{2ff \}, 1000 + 2f1: 00 + 2f2: 86 32[ ]+ ldaa #50 + 2f4: 18 09 d0 10 movb 1000 , \-16,PC \{2e7 \} + 2f8: 00 + 2f9: 18 09 d0 10 movb 1000 , \-16,PC \{2ec \} + 2fd: 00 + 2fe: 18 09 d0 10 movb 1000 , \-16,PC \{2f1 \} + 302: 00 + 303: 86 33[ ]+ ldaa #51 + 305: 18 0d d0 10 movb \-16,PC \{2f8 \}, 1000 + 309: 00 + 30a: 18 0d d0 10 movb \-16,PC \{2fd \}, 1000 + 30e: 00 + 30f: 18 0d d0 10 movb \-16,PC \{302 \}, 1000 + 313: 00 + 314: 86 34[ ]+ ldaa #52 + 316: 18 01 cf 10 movw 1002 , 15,PC \{328 \} + 31a: 02 + 31b: 18 01 cf 10 movw 1002 , 15,PC \{32d \} + 31f: 02 + 320: 18 01 cf 10 movw 1002 , 15,PC \{332 \} + 324: 02 + 325: 86 35[ ]+ ldaa #53 + 327: 18 05 cf 10 movw 15,PC \{339 \}, 1002 + 32b: 02 + 32c: 18 05 cf 10 movw 15,PC \{33e \}, 1002 + 330: 02 + 331: 18 05 cf 10 movw 15,PC \{343 \}, 1002 + 335: 02 + 336: 86 36[ ]+ ldaa #54 + 338: 18 01 d0 10 movw 1002 , \-16,PC \{32b \} + 33c: 02 + 33d: 18 01 d0 10 movw 1002 , \-16,PC \{330 \} + 341: 02 + 342: 18 01 d0 10 movw 1002 , \-16,PC \{335 \} + 346: 02 + 347: 86 37[ ]+ ldaa #55 + 349: 18 05 d0 10 movw \-16,PC \{33c \}, 1002 + 34d: 02 + 34e: 18 05 d0 10 movw \-16,PC \{341 \}, 1002 + 352: 02 + 353: 18 05 d0 10 movw \-16,PC \{346 \}, 1002 + 357: 02 + 358: 86 38[ ]+ ldaa #56 + 35a: 18 09 8f 10 movb 1000 , 15,SP + 35e: 00 + 35f: 18 09 8f 10 movb 1000 , 15,SP + 363: 00 + 364: 18 09 8f 10 movb 1000 , 15,SP + 368: 00 + 369: 86 39[ ]+ ldaa #57 + 36b: 18 0d 8f 10 movb 15,SP, 1000 + 36f: 00 + 370: 18 0d 8f 10 movb 15,SP, 1000 + 374: 00 + 375: 18 0d 8f 10 movb 15,SP, 1000 + 379: 00 + 37a: 86 3a[ ]+ ldaa #58 + 37c: 18 09 90 10 movb 1000 , \-16,SP + 380: 00 + 381: 18 09 90 10 movb 1000 , \-16,SP + 385: 00 + 386: 18 09 90 10 movb 1000 , \-16,SP + 38a: 00 + 38b: 86 3b[ ]+ ldaa #59 + 38d: 18 0d 90 10 movb \-16,SP, 1000 + 391: 00 + 392: 18 0d 90 10 movb \-16,SP, 1000 + 396: 00 + 397: 18 0d 90 10 movb \-16,SP, 1000 + 39b: 00 + 39c: 86 3c[ ]+ ldaa #60 + 39e: 18 01 8f 10 movw 1002 , 15,SP + 3a2: 02 + 3a3: 18 01 8f 10 movw 1002 , 15,SP + 3a7: 02 + 3a8: 18 01 8f 10 movw 1002 , 15,SP + 3ac: 02 + 3ad: 86 3d[ ]+ ldaa #61 + 3af: 18 05 8f 10 movw 15,SP, 1002 + 3b3: 02 + 3b4: 18 05 8f 10 movw 15,SP, 1002 + 3b8: 02 + 3b9: 18 05 8f 10 movw 15,SP, 1002 + 3bd: 02 + 3be: 86 3e[ ]+ ldaa #62 + 3c0: 18 01 90 10 movw 1002 , \-16,SP + 3c4: 02 + 3c5: 18 01 90 10 movw 1002 , \-16,SP + 3c9: 02 + 3ca: 18 01 90 10 movw 1002 , \-16,SP + 3ce: 02 + 3cf: 86 3f[ ]+ ldaa #63 + 3d1: 18 05 90 10 movw \-16,SP, 1002 + 3d5: 02 + 3d6: 18 05 90 10 movw \-16,SP, 1002 + 3da: 02 + 3db: 18 05 90 10 movw \-16,SP, 1002 + 3df: 02 + 3e0: 86 40[ ]+ ldaa #64 + 3e2: 18 08 07 aa movb #170, 7,X + 3e6: 18 08 07 aa movb #170, 7,X + 3ea: 18 08 07 aa movb #170, 7,X + 3ee: 86 41[ ]+ ldaa #65 + 3f0: 18 08 18 aa movb #170, \-8,X + 3f4: 18 08 18 aa movb #170, \-8,X + 3f8: 18 08 18 aa movb #170, \-8,X + 3fc: 86 42[ ]+ ldaa #66 + 3fe: 18 00 07 00 movw #44 , 7,X + 402: 44 + 403: 18 00 07 00 movw #44 , 7,X + 407: 44 + 408: 18 00 07 00 movw #44 , 7,X + 40c: 44 + 40d: 86 43[ ]+ ldaa #67 + 40f: 18 00 18 00 movw #44 , \-8,X + 413: 44 + 414: 18 00 18 00 movw #44 , \-8,X + 418: 44 + 419: 18 00 18 00 movw #44 , \-8,X + 41d: 44 + 41e: 86 44[ ]+ ldaa #68 + 420: 18 08 47 aa movb #170, 7,Y + 424: 18 08 47 aa movb #170, 7,Y + 428: 18 08 47 aa movb #170, 7,Y + 42c: 86 45[ ]+ ldaa #69 + 42e: 18 08 58 aa movb #170, \-8,Y + 432: 18 08 58 aa movb #170, \-8,Y + 436: 18 08 58 aa movb #170, \-8,Y + 43a: 86 46[ ]+ ldaa #70 + 43c: 18 00 47 00 movw #44 , 7,Y + 440: 44 + 441: 18 00 47 00 movw #44 , 7,Y + 445: 44 + 446: 18 00 47 00 movw #44 , 7,Y + 44a: 44 + 44b: 86 47[ ]+ ldaa #71 + 44d: 18 00 58 00 movw #44 , \-8,Y + 451: 44 + 452: 18 00 58 00 movw #44 , \-8,Y + 456: 44 + 457: 18 00 58 00 movw #44 , \-8,Y + 45b: 44 + 45c: 86 48[ ]+ ldaa #72 + 45e: 18 08 c7 aa movb #170, 7,PC \{468 \} + 462: 18 08 c7 aa movb #170, 7,PC \{46c \} + 466: 18 08 c7 aa movb #170, 7,PC \{470 \} + 46a: 86 49[ ]+ ldaa #73 + 46c: 18 08 d8 aa movb #170, \-8,PC \{467 \} + 470: 18 08 d8 aa movb #170, \-8,PC \{46b \} + 474: 18 08 d8 aa movb #170, \-8,PC \{46f \} + 478: 86 4a[ ]+ ldaa #74 + 47a: 18 00 c7 00 movw #44 , 7,PC \{484 \} + 47e: 44 + 47f: 18 00 c7 00 movw #44 , 7,PC \{489 \} + 483: 44 + 484: 18 00 c7 00 movw #44 , 7,PC \{48e \} + 488: 44 + 489: 86 4b[ ]+ ldaa #75 + 48b: 18 00 d8 00 movw #44 , \-8,PC \{486 \} + 48f: 44 + 490: 18 00 d8 00 movw #44 , \-8,PC \{48b \} + 494: 44 + 495: 18 00 d8 00 movw #44 , \-8,PC \{490 \} + 499: 44 + 49a: 86 4c[ ]+ ldaa #76 + 49c: 18 08 87 aa movb #170, 7,SP + 4a0: 18 08 87 aa movb #170, 7,SP + 4a4: 18 08 87 aa movb #170, 7,SP + 4a8: 86 4d[ ]+ ldaa #77 + 4aa: 18 08 98 aa movb #170, \-8,SP + 4ae: 18 08 98 aa movb #170, \-8,SP + 4b2: 18 08 98 aa movb #170, \-8,SP + 4b6: 86 4e[ ]+ ldaa #78 + 4b8: 18 00 87 00 movw #44 , 7,SP + 4bc: 44 + 4bd: 18 00 87 00 movw #44 , 7,SP + 4c1: 44 + 4c2: 18 00 87 00 movw #44 , 7,SP + 4c6: 44 + 4c7: 86 4f[ ]+ ldaa #79 + 4c9: 18 00 98 00 movw #44 , \-8,SP + 4cd: 44 + 4ce: 18 00 98 00 movw #44 , \-8,SP + 4d2: 44 + 4d3: 18 00 98 00 movw #44 , \-8,SP + 4d7: 44 + 4d8: 86 50[ ]+ ldaa #80 + diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/movb.s binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/movb.s --- binutils-2.14.90.0.8/gas/testsuite/gas/m68hc11/movb.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/m68hc11/movb.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,333 @@ + dog2=15 + dog3=-16 + dog4=7 + dog5=-8 + ;; idx - idx + ldaa #0 + movb 15,x,dog2,x + movb 15,x,cat2,x + movb 15,x,15,x + ldaa #1 + movb dog2,x,15,x + movb cat2,x,15,x + movb 15,x,15,x + ldaa #2 + movb 15,x,dog3,x + movb 15,x,cat3,x + movb 15,x,-16,x + ldaa #3 + movb dog3,x,15,x + movb cat3,x,15,x + movb -16,x,15,x + ldaa #4 + movw 15,x,dog2,x + movw 15,x,cat2,x + movw 15,x,15,x + ldaa #5 + movw dog2,x,15,x + movw cat2,x,15,x + movw 15,x,15,x + ldaa #6 + movw 15,x,dog3,x + movw 15,x,cat3,x + movw 15,x,-16,x + ldaa #7 + movw dog3,x,15,x + movw cat3,x,15,x + movw -16,x,15,x + ldaa #8 + movb 15,y,dog2,y + movb 15,y,cat2,y + movb 15,y,15,y + ldaa #9 + movb dog2,y,15,y + movb cat2,y,15,y + movb 15,y,15,y + ldaa #10 + movb 15,y,dog3,y + movb 15,y,cat3,y + movb 15,y,-16,y + ldaa #11 + movb dog3,y,15,y + movb cat3,y,15,y + movb -16,y,15,y + ldaa #12 + movw 15,y,dog2,y + movw 15,y,cat2,y + movw 15,y,15,y + ldaa #13 + movw dog2,y,15,y + movw cat2,y,15,y + movw 15,y,15,y + ldaa #14 + movw 15,y,dog3,y + movw 15,y,cat3,y + movw 15,y,-16,y + ldaa #15 + movw dog3,y,15,y + movw cat3,y,15,y + movw -16,y,15,y + ldaa #16 + movb 15,y,dog2,pc + movb 15,y,cat2,pc + movb 15,y,15,pc + ldaa #17 + movb dog2,y,15,pc + movb cat2,y,15,pc + movb 15,y,15,pc + ldaa #18 + movb 15,y,dog3,pc + movb 15,y,cat3,pc + movb 15,y,-16,pc + ldaa #19 + movb dog3,y,15,pc + movb cat3,y,15,pc + movb -16,y,15,pc + ldaa #20 + movw 15,y,dog2,pc + movw 15,y,cat2,pc + movw 15,y,15,pc + ldaa #21 + movw dog2,y,15,pc + movw cat2,y,15,pc + movw 15,y,15,pc + ldaa #22 + movw 15,y,dog3,pc + movw 15,y,cat3,pc + movw 15,y,-16,pc + ldaa #23 + movw dog3,y,15,pc + movw cat3,y,15,pc + movw -16,y,15,pc + ldaa #24 + movb 15,sp,dog2,pc + movb 15,sp,cat2,pc + movb 15,sp,15,pc + ldaa #25 + movb dog2,sp,15,pc + movb cat2,sp,15,pc + movb 15,sp,15,pc + ldaa #26 + movb 15,sp,dog3,pc + movb 15,sp,cat3,pc + movb 15,sp,-16,pc + ldaa #27 + movb dog3,sp,15,pc + movb cat3,sp,15,pc + movb -16,sp,15,pc + ldaa #28 + movw 15,sp,dog2,pc + movw 15,sp,cat2,pc + movw 15,sp,15,pc + ldaa #29 + movw dog2,sp,15,pc + movw cat2,sp,15,pc + movw 15,sp,15,pc + ldaa #30 + movw 15,sp,dog3,pc + movw 15,sp,cat3,pc + movw 15,sp,-16,pc + ldaa #31 + movw dog3,sp,15,pc + movw cat3,sp,15,pc + movw -16,sp,15,pc + ldaa #32 + ;; ext - idx + ;; idx - ext + movb 0x1000,dog2,x + movb 0x1000,cat2,x + movb 0x1000,15,x + ldaa #33 + movb dog2,x,0x1000 + movb cat2,x,0x1000 + movb 15,x,0x1000 + ldaa #34 + movb 0x1000,dog3,x + movb 0x1000,cat3,x + movb 0x1000,-16,x + ldaa #35 + movb dog3,x,0x1000 + movb cat3,x,0x1000 + movb -16,x,0x1000 + ldaa #36 + movw 0x1002,dog2,x + movw 0x1002,cat2,x + movw 0x1002,15,x + ldaa #37 + movw dog2,x,0x1002 + movw cat2,x,0x1002 + movw 15,x,0x1002 + ldaa #38 + movw 0x1002,dog3,x + movw 0x1002,cat3,x + movw 0x1002,-16,x + ldaa #39 + movw dog3,x,0x1002 + movw cat3,x,0x1002 + movw -16,x,0x1002 + ldaa #40 + movb 0x1000,dog2,y + movb 0x1000,cat2,y + movb 0x1000,15,y + ldaa #41 + movb dog2,y,0x1000 + movb cat2,y,0x1000 + movb 15,y,0x1000 + ldaa #42 + movb 0x1000,dog3,y + movb 0x1000,cat3,y + movb 0x1000,-16,y + ldaa #43 + movb dog3,y,0x1000 + movb cat3,y,0x1000 + movb -16,y,0x1000 + ldaa #44 + movw 0x1002,dog2,y + movw 0x1002,cat2,y + movw 0x1002,15,y + ldaa #45 + movw dog2,y,0x1002 + movw cat2,y,0x1002 + movw 15,y,0x1002 + ldaa #46 + movw 0x1002,dog3,y + movw 0x1002,cat3,y + movw 0x1002,-16,y + ldaa #47 + movw dog3,y,0x1002 + movw cat3,y,0x1002 + movw -16,y,0x1002 + ldaa #48 + movb 0x1000,dog2,pc + movb 0x1000,cat2,pc + movb 0x1000,15,pc + ldaa #49 + movb dog2,pc,0x1000 + movb cat2,pc,0x1000 + movb 15,pc,0x1000 + ldaa #50 + movb 0x1000,dog3,pc + movb 0x1000,cat3,pc + movb 0x1000,-16,pc + ldaa #51 + movb dog3,pc,0x1000 + movb cat3,pc,0x1000 + movb -16,pc,0x1000 + ldaa #52 + movw 0x1002,dog2,pc + movw 0x1002,cat2,pc + movw 0x1002,15,pc + ldaa #53 + movw dog2,pc,0x1002 + movw cat2,pc,0x1002 + movw 15,pc,0x1002 + ldaa #54 + movw 0x1002,dog3,pc + movw 0x1002,cat3,pc + movw 0x1002,-16,pc + ldaa #55 + movw dog3,pc,0x1002 + movw cat3,pc,0x1002 + movw -16,pc,0x1002 + ldaa #56 + movb 0x1000,dog2,sp + movb 0x1000,cat2,sp + movb 0x1000,15,sp + ldaa #57 + movb dog2,sp,0x1000 + movb cat2,sp,0x1000 + movb 15,sp,0x1000 + ldaa #58 + movb 0x1000,dog3,sp + movb 0x1000,cat3,sp + movb 0x1000,-16,sp + ldaa #59 + movb dog3,sp,0x1000 + movb cat3,sp,0x1000 + movb -16,sp,0x1000 + ldaa #60 + movw 0x1002,dog2,sp + movw 0x1002,cat2,sp + movw 0x1002,15,sp + ldaa #61 + movw dog2,sp,0x1002 + movw cat2,sp,0x1002 + movw 15,sp,0x1002 + ldaa #62 + movw 0x1002,dog3,sp + movw 0x1002,cat3,sp + movw 0x1002,-16,sp + ldaa #63 + movw dog3,sp,0x1002 + movw cat3,sp,0x1002 + movw -16,sp,0x1002 + ldaa #64 + ;; imm - idx + movb #0xaa,dog4,x + movb #0xaa,cat4,x + movb #0xaa,7,x + ldaa #65 + movb #0xaa,dog5,x + movb #0xaa,cat5,x + movb #0xaa,-8,x + ldaa #66 + movw #0x44,dog4,x + movw #0x44,cat4,x + movw #0x44,7,x + ldaa #67 + movw #0x44,dog5,x + movw #0x44,cat5,x + movw #0x44,-8,x + ldaa #68 + movb #0xaa,dog4,y + movb #0xaa,cat4,y + movb #0xaa,7,y + ldaa #69 + movb #0xaa,dog5,y + movb #0xaa,cat5,y + movb #0xaa,-8,y + ldaa #70 + movw #0x44,dog4,y + movw #0x44,cat4,y + movw #0x44,7,y + ldaa #71 + movw #0x44,dog5,y + movw #0x44,cat5,y + movw #0x44,-8,y + ldaa #72 + movb #0xaa,dog4,pc + movb #0xaa,cat4,pc + movb #0xaa,7,pc + ldaa #73 + movb #0xaa,dog5,pc + movb #0xaa,cat5,pc + movb #0xaa,-8,pc + ldaa #74 + movw #0x44,dog4,pc + movw #0x44,cat4,pc + movw #0x44,7,pc + ldaa #75 + movw #0x44,dog5,pc + movw #0x44,cat5,pc + movw #0x44,-8,pc + ldaa #76 + movb #0xaa,dog4,sp + movb #0xaa,cat4,sp + movb #0xaa,7,sp + ldaa #77 + movb #0xaa,dog5,sp + movb #0xaa,cat5,sp + movb #0xaa,-8,sp + ldaa #78 + movw #0x44,dog4,sp + movw #0x44,cat4,sp + movw #0x44,7,sp + ldaa #79 + movw #0x44,dog5,sp + movw #0x44,cat5,sp + movw #0x44,-8,sp + ldaa #80 + cat2=15 + cat3=-16 + cat4=7 + cat5=-8 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/macros/test2.s binutils-2.15.90.0.1/gas/testsuite/gas/macros/test2.s --- binutils-2.14.90.0.8/gas/testsuite/gas/macros/test2.s 1999-06-11 06:41:56.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/macros/test2.s 2004-03-03 12:24:34.000000000 -0800 @@ -1,7 +1,7 @@ .macro m arg1 arg2 arg3 .long \arg1 .ifc ,\arg2\arg3 - .ELSE + .else m \arg2,\arg3 .endif .endm diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/div.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/div.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/div.d 2001-07-06 09:26:11.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/div.d 2004-03-03 12:24:34.000000000 -0800 @@ -102,9 +102,9 @@ Disassembly of section .text: 0+0174 <[^>]*> bnez a2,0+0180 0+0178 <[^>]*> ddiv zero,a1,a2 0+017c <[^>]*> break (0x0,0x7|0x7) -0+0180 <[^>]*> daddiu at,zero,-1 +0+0180 <[^>]*> (daddiu at,zero,-1|li at,-1) 0+0184 <[^>]*> bne a2,at,0+019c -0+0188 <[^>]*> daddiu at,zero,1 +0+0188 <[^>]*> (daddiu at,zero,1|li at,1) 0+018c <[^>]*> dsll32 at,at,0x1f 0+0190 <[^>]*> bne a1,at,0+019c 0+0194 <[^>]*> nop diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-got-n32.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-got-n32.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-got-n32.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-got-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -12,8 +12,8 @@ Disassembly of section \.text: 00000008 24a5000c addiu a1,a1,12 0000000c 8f850000 lw a1,0\(gp\) c: R_MIPS_GOT_DISP dg1 -00000010 3c010002 lui at,0x2 -00000014 2421e240 addiu at,at,-7616 +00000010 3c010001 lui at,0x1 +00000014 3421e240 ori at,at,0xe240 00000018 00a12821 addu a1,a1,at 0000001c 8f850000 lw a1,0\(gp\) 1c: R_MIPS_GOT_DISP dg1 @@ -24,8 +24,8 @@ Disassembly of section \.text: 0000002c 00b12821 addu a1,a1,s1 00000030 8f850000 lw a1,0\(gp\) 30: R_MIPS_GOT_DISP dg1 -00000034 3c010002 lui at,0x2 -00000038 2421e240 addiu at,at,-7616 +00000034 3c010001 lui at,0x1 +00000038 3421e240 ori at,at,0xe240 0000003c 00a12821 addu a1,a1,at 00000040 00b12821 addu a1,a1,s1 00000044 8f850000 lw a1,0\(gp\) @@ -184,8 +184,8 @@ Disassembly of section \.text: 000001d8 24a5000c addiu a1,a1,12 000001dc 8f850000 lw a1,0\(gp\) 1dc: R_MIPS_GOT_DISP dg2 -000001e0 3c010002 lui at,0x2 -000001e4 2421e240 addiu at,at,-7616 +000001e0 3c010001 lui at,0x1 +000001e4 3421e240 ori at,at,0xe240 000001e8 00a12821 addu a1,a1,at 000001ec 8f850000 lw a1,0\(gp\) 1ec: R_MIPS_GOT_DISP dg2 @@ -196,8 +196,8 @@ Disassembly of section \.text: 000001fc 00b12821 addu a1,a1,s1 00000200 8f850000 lw a1,0\(gp\) 200: R_MIPS_GOT_DISP dg2 -00000204 3c010002 lui at,0x2 -00000208 2421e240 addiu at,at,-7616 +00000204 3c010001 lui at,0x1 +00000208 3421e240 ori at,at,0xe240 0000020c 00a12821 addu a1,a1,at 00000210 00b12821 addu a1,a1,s1 00000214 8f850000 lw a1,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-got-n64.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-got-n64.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-got-n64.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-got-n64.d 2004-03-03 12:24:34.000000000 -0800 @@ -18,8 +18,8 @@ Disassembly of section \.text: c: R_MIPS_GOT_DISP dg1 c: R_MIPS_NONE \*ABS\* c: R_MIPS_NONE \*ABS\* -0000000000000010 3c010002 lui at,0x2 -0000000000000014 6421e240 daddiu at,at,-7616 +0000000000000010 3c010001 lui at,0x1 +0000000000000014 3421e240 ori at,at,0xe240 0000000000000018 00a1282d daddu a1,a1,at 000000000000001c df850000 ld a1,0\(gp\) 1c: R_MIPS_GOT_DISP dg1 @@ -36,8 +36,8 @@ Disassembly of section \.text: 30: R_MIPS_GOT_DISP dg1 30: R_MIPS_NONE \*ABS\* 30: R_MIPS_NONE \*ABS\* -0000000000000034 3c010002 lui at,0x2 -0000000000000038 6421e240 daddiu at,at,-7616 +0000000000000034 3c010001 lui at,0x1 +0000000000000038 3421e240 ori at,at,0xe240 000000000000003c 00a1282d daddu a1,a1,at 0000000000000040 00b1282d daddu a1,a1,s1 0000000000000044 df850000 ld a1,0\(gp\) @@ -302,8 +302,8 @@ Disassembly of section \.text: 1dc: R_MIPS_GOT_DISP dg2 1dc: R_MIPS_NONE \*ABS\* 1dc: R_MIPS_NONE \*ABS\* -00000000000001e0 3c010002 lui at,0x2 -00000000000001e4 6421e240 daddiu at,at,-7616 +00000000000001e0 3c010001 lui at,0x1 +00000000000001e4 3421e240 ori at,at,0xe240 00000000000001e8 00a1282d daddu a1,a1,at 00000000000001ec df850000 ld a1,0\(gp\) 1ec: R_MIPS_GOT_DISP dg2 @@ -320,8 +320,8 @@ Disassembly of section \.text: 200: R_MIPS_GOT_DISP dg2 200: R_MIPS_NONE \*ABS\* 200: R_MIPS_NONE \*ABS\* -0000000000000204 3c010002 lui at,0x2 -0000000000000208 6421e240 daddiu at,at,-7616 +0000000000000204 3c010001 lui at,0x1 +0000000000000208 3421e240 ori at,at,0xe240 000000000000020c 00a1282d daddu a1,a1,at 0000000000000210 00b1282d daddu a1,a1,s1 0000000000000214 df850000 ld a1,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-xgot-n32.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-xgot-n32.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-xgot-n32.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-xgot-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -22,8 +22,8 @@ Disassembly of section \.text: 00000020 00bc2821 addu a1,a1,gp 00000024 8ca50000 lw a1,0\(a1\) 24: R_MIPS_GOT_LO16 dg1 -00000028 3c010002 lui at,0x2 -0000002c 2421e240 addiu at,at,-7616 +00000028 3c010001 lui at,0x1 +0000002c 3421e240 ori at,at,0xe240 00000030 00a12821 addu a1,a1,at 00000034 3c050000 lui a1,0x0 34: R_MIPS_GOT_HI16 dg1 @@ -43,8 +43,8 @@ Disassembly of section \.text: 0000005c 00bc2821 addu a1,a1,gp 00000060 8ca50000 lw a1,0\(a1\) 60: R_MIPS_GOT_LO16 dg1 -00000064 3c010002 lui at,0x2 -00000068 2421e240 addiu at,at,-7616 +00000064 3c010001 lui at,0x1 +00000068 3421e240 ori at,at,0xe240 0000006c 00a12821 addu a1,a1,at 00000070 00b12821 addu a1,a1,s1 00000074 3c050000 lui a1,0x0 @@ -281,8 +281,8 @@ Disassembly of section \.text: 000002d4 00bc2821 addu a1,a1,gp 000002d8 8ca50000 lw a1,0\(a1\) 2d8: R_MIPS_GOT_LO16 dg2 -000002dc 3c010002 lui at,0x2 -000002e0 2421e240 addiu at,at,-7616 +000002dc 3c010001 lui at,0x1 +000002e0 3421e240 ori at,at,0xe240 000002e4 00a12821 addu a1,a1,at 000002e8 3c050000 lui a1,0x0 2e8: R_MIPS_GOT_HI16 dg2 @@ -302,8 +302,8 @@ Disassembly of section \.text: 00000310 00bc2821 addu a1,a1,gp 00000314 8ca50000 lw a1,0\(a1\) 314: R_MIPS_GOT_LO16 dg2 -00000318 3c010002 lui at,0x2 -0000031c 2421e240 addiu at,at,-7616 +00000318 3c010001 lui at,0x1 +0000031c 3421e240 ori at,at,0xe240 00000320 00a12821 addu a1,a1,at 00000324 00b12821 addu a1,a1,s1 00000328 3c050000 lui a1,0x0 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-xgot-n64.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-xgot-n64.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel-xgot-n64.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel-xgot-n64.d 2004-03-03 12:24:34.000000000 -0800 @@ -34,8 +34,8 @@ Disassembly of section \.text: 24: R_MIPS_GOT_LO16 dg1 24: R_MIPS_NONE \*ABS\* 24: R_MIPS_NONE \*ABS\* -0000000000000028 3c010002 lui at,0x2 -000000000000002c 6421e240 daddiu at,at,-7616 +0000000000000028 3c010001 lui at,0x1 +000000000000002c 3421e240 ori at,at,0xe240 0000000000000030 00a1282d daddu a1,a1,at 0000000000000034 3c050000 lui a1,0x0 34: R_MIPS_GOT_HI16 dg1 @@ -67,8 +67,8 @@ Disassembly of section \.text: 60: R_MIPS_GOT_LO16 dg1 60: R_MIPS_NONE \*ABS\* 60: R_MIPS_NONE \*ABS\* -0000000000000064 3c010002 lui at,0x2 -0000000000000068 6421e240 daddiu at,at,-7616 +0000000000000064 3c010001 lui at,0x1 +0000000000000068 3421e240 ori at,at,0xe240 000000000000006c 00a1282d daddu a1,a1,at 0000000000000070 00b1282d daddu a1,a1,s1 0000000000000074 3c050000 lui a1,0x0 @@ -465,8 +465,8 @@ Disassembly of section \.text: 2d8: R_MIPS_GOT_LO16 dg2 2d8: R_MIPS_NONE \*ABS\* 2d8: R_MIPS_NONE \*ABS\* -00000000000002dc 3c010002 lui at,0x2 -00000000000002e0 6421e240 daddiu at,at,-7616 +00000000000002dc 3c010001 lui at,0x1 +00000000000002e0 3421e240 ori at,at,0xe240 00000000000002e4 00a1282d daddu a1,a1,at 00000000000002e8 3c050000 lui a1,0x0 2e8: R_MIPS_GOT_HI16 dg2 @@ -498,8 +498,8 @@ Disassembly of section \.text: 314: R_MIPS_GOT_LO16 dg2 314: R_MIPS_NONE \*ABS\* 314: R_MIPS_NONE \*ABS\* -0000000000000318 3c010002 lui at,0x2 -000000000000031c 6421e240 daddiu at,at,-7616 +0000000000000318 3c010001 lui at,0x1 +000000000000031c 3421e240 ori at,at,0xe240 0000000000000320 00a1282d daddu a1,a1,at 0000000000000324 00b1282d daddu a1,a1,s1 0000000000000328 3c050000 lui a1,0x0 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel19.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel19.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel19.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel19.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,34 @@ +#objdump: -dr +#as: -mabi=32 -KPIC + +.*: file format .* + +Disassembly of section \.text: + +00000000 <.*>: +# +# Relocation agsinst .rodata.str1.1 +# +.*: 8f840000 lw a0,0\(gp\) + .*: R_MIPS_GOT16 \.rodata\.str1\.1 +.*: 00000000 nop +.*: 24840004 addiu a0,a0,4 + .*: R_MIPS_LO16 \.rodata\.str1\.1 +# +# Relocation agsinst L2 + 2 +# +.*: 8f840000 lw a0,0\(gp\) + .*: R_MIPS_GOT16 L2 +.*: 00000000 nop +.*: 24840002 addiu a0,a0,2 + .*: R_MIPS_LO16 L2 +# +# Relocation agsinst L2 - 0x4000 with 0x10000 added separately. +# +.*: 8f840000 lw a0,0\(gp\) + .*: R_MIPS_GOT16 L2 +.*: 3c010001 lui at,0x1 +.*: 2421c000 addiu at,at,-16384 + .*: R_MIPS_LO16 L2 +.*: 00812021 addu a0,a0,at + \.\.\. diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel19.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel19.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/elf-rel19.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/elf-rel19.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ + .abicalls + la $4,L2 + la $4,L2 + 2 + la $4,L2 + 0xc000 + .space 16 + .section .rodata.str1.1,"aMS",@progbits,1 +L1: .string "foo" +L2: .string "a" diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/la-svr4pic.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/la-svr4pic.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/la-svr4pic.d 2003-05-15 13:42:25.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/la-svr4pic.d 2004-03-03 12:24:34.000000000 -0800 @@ -87,23 +87,19 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -157,22 +153,18 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -194,23 +186,23 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -305,26 +297,22 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -389,25 +377,21 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -433,26 +417,26 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/la-xgot.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/la-xgot.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/la-xgot.d 2003-05-15 13:42:25.000000000 -0700 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/la-xgot.d 2004-03-03 12:24:34.000000000 -0800 @@ -114,32 +114,28 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -208,7 +204,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label @@ -216,7 +211,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common @@ -224,7 +218,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common @@ -232,7 +225,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -257,32 +249,32 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -404,8 +396,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -413,8 +404,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -422,8 +412,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -431,8 +420,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -512,7 +500,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -521,7 +508,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -530,7 +516,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -539,7 +524,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -568,8 +552,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -577,8 +561,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -586,8 +570,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -595,8 +579,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/lca-svr4pic.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/lca-svr4pic.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/lca-svr4pic.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/lca-svr4pic.d 2004-03-03 12:24:34.000000000 -0800 @@ -87,23 +87,19 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -157,22 +153,18 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -194,23 +186,23 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -305,26 +297,22 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -389,25 +377,21 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -433,26 +417,26 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/lca-xgot.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/lca-xgot.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/lca-xgot.d 2004-01-14 13:07:47.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/lca-xgot.d 2004-03-03 12:24:34.000000000 -0800 @@ -114,32 +114,28 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -208,7 +204,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label @@ -216,7 +211,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common @@ -224,7 +218,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common @@ -232,7 +225,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -257,32 +249,32 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_data_label [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 big_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lui a0,0x0 [ ]*[0-9a-f]+: R_MIPS_GOT_HI16 small_external_common [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> lw a0,0\(gp\) [ ]*[0-9a-f]+: R_MIPS_GOT16 .bss @@ -404,8 +396,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -413,8 +404,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -422,8 +412,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -431,8 +420,7 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,-32768 +[0-9a-f]+ <[^>]*> li at,0x8000 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -512,7 +500,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -521,7 +508,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -530,7 +516,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -539,7 +524,6 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common [0-9a-f]+ <[^>]*> lui at,0x1 -[0-9a-f]+ <[^>]*> addiu at,at,0 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) @@ -568,8 +552,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -577,8 +561,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_data_label -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -586,8 +570,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 big_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lui a0,0x0 @@ -595,8 +579,8 @@ Disassembly of section .text: [0-9a-f]+ <[^>]*> addu a0,a0,gp [0-9a-f]+ <[^>]*> lw a0,0\(a0\) [ ]*[0-9a-f]+: R_MIPS_GOT_LO16 small_external_common -[0-9a-f]+ <[^>]*> lui at,0x2 -[0-9a-f]+ <[^>]*> addiu at,at,-23131 +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 [0-9a-f]+ <[^>]*> addu a0,a0,at [0-9a-f]+ <[^>]*> addu a0,a0,a1 [0-9a-f]+ <[^>]*> lw a0,0\(gp\) diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1-n32.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1-n32.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1-n32.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +#as: -n32 -KPIC +#source: macro-warn-1.s +#stderr: macro-warn-1-n32.l +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1-n32.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1-n32.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1-n32.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1-n32.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,6 @@ +.*: Assembler messages: +.*:6: Warning: Macro instruction expanded into multiple instructions +.*:10: Warning: Macro instruction expanded into multiple instructions +.*:12: Warning: Macro instruction expanded into multiple instructions +.*:16: Warning: Macro instruction expanded into multiple instructions.*slot +.*:20: Warning: Macro instruction expanded into multiple instructions.*slot diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +#as: -32 -KPIC +#source: macro-warn-1.s +#stderr: macro-warn-1.l +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ +.*: Assembler messages: +.*:5: Warning: Macro instruction expanded into multiple instructions +.*:10: Warning: Macro instruction expanded into multiple instructions +.*:11: Warning: Macro instruction expanded into multiple instructions +.*:12: Warning: Macro instruction expanded into multiple instructions +.*:16: Warning: Macro instruction expanded into multiple instructions.*slot +.*:18: Warning: Macro instruction expanded into multiple instructions.*slot +.*:20: Warning: Macro instruction expanded into multiple instructions.*slot diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-1.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-1.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,21 @@ + .set noreorder + .set nomacro + .globl early_global +local: + .cpload $25 + .cpsetup $25,16,local + .cprestore 16 + .cpreturn + la $4,early_global + la $4,early_global+10 + la $4,local+10 + la $4,late_global+10 + jr $5 + la $4,early_global + jr $5 + la $4,early_global+10 + jr $5 + la $4,local+10 + jr $5 + la $4,late_global+10 + .globl late_global diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2-n32.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2-n32.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2-n32.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,4 @@ +#as: -n32 -KPIC +#source: macro-warn-2.s +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +#as: -32 -KPIC +#source: macro-warn-2.s +#stderr: macro-warn-2.l +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*:5: Warning: Macro instruction expanded into multiple instructions +.*:9: Warning: Macro instruction expanded into multiple instructions.*slot diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-2.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-2.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,10 @@ + .set noreorder + .set nomacro +local: + la $4,late_global + la $4,local + jr $5 + la $4,late_global + jr $5 + la $4,local + .globl local_global diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +#as: -32 +#source: macro-warn-3.s +#stderr: macro-warn-3.l +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*:4: Warning: Macro instruction expanded into multiple instructions +.*:7: Warning: Macro instruction expanded into multiple instructions.*slot diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-3.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-3.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,10 @@ + .set noreorder + .set nomacro +early_big: + la $4,early_big + la $4,sdata + jr $5 + la $4,early_big + jr $5 + la $4,sdata + .comm sdata,4 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +#as: -32 +#source: macro-warn-4.s +#stderr: macro-warn-4.l +#objdump: -p +#pass diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*:3: Warning: Macro instruction expanded into multiple instructions +.*:5: Warning: Macro instruction expanded into multiple instructions.*slot diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/macro-warn-4.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/macro-warn-4.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,7 @@ + .set noreorder + .set nomacro + la $4,late_big + jr $5 + la $4,late_big + .comm sdata,4 +late_big: diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/mips.exp binutils-2.15.90.0.1/gas/testsuite/gas/mips/mips.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/mips.exp 2004-01-14 13:07:48.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/mips.exp 2004-03-03 12:24:34.000000000 -0800 @@ -589,6 +589,9 @@ if { [istarget mips*-*-*] } then { } run_dump_test "relax" + run_dump_test "relax-swap1-mips1" + run_dump_test "relax-swap1-mips2" + run_dump_test "relax-swap2" run_list_test "illegal" "-32" run_list_test "baddata1" "-32" @@ -675,6 +678,7 @@ if { [istarget mips*-*-*] } then { if $has_newabi { run_dump_test "elf-rel18" } + run_dump_test "elf-rel19" run_dump_test "${tmips}${el}empic" run_dump_test "empic2" @@ -731,4 +735,13 @@ if { [istarget mips*-*-*] } then { run_dump_test "ldstla-n64" run_dump_test "ldstla-n64-shared" } + + run_dump_test "macro-warn-1" + run_dump_test "macro-warn-2" + run_dump_test "macro-warn-3" + run_dump_test "macro-warn-4" + if $has_newabi { + run_dump_test "macro-warn-1-n32" + run_dump_test "macro-warn-2-n32" + } } diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1-mips1.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1-mips1.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1-mips1.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1-mips1.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,311 @@ +#objdump: -dr --prefix-addresses -mmips:3000 +#name: MIPS1 branch relaxation with swapping +#as: -32 -mips1 -KPIC -relax-branch +#source: relax-swap1.s +#stderr: relax-swap1.l + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <[^>]*> b 00000000 +0+0004 <[^>]*> move v0,a0 +0+0008 <[^>]*> lw at,2\(gp\) +[ ]*8: R_MIPS_GOT16 \.text +0+000c <[^>]*> nop +0+0010 <[^>]*> addiu at,at,1000 +[ ]*10: R_MIPS_LO16 \.text +0+0014 <[^>]*> jr at +0+0018 <[^>]*> move v0,a0 +0+001c <[^>]*> lw v0,0\(a0\) +0+0020 <[^>]*> b 00000000 +0+0024 <[^>]*> nop +0+0028 <[^>]*> lw v0,0\(a0\) +0+002c <[^>]*> lw at,2\(gp\) +[ ]*2c: R_MIPS_GOT16 \.text +0+0030 <[^>]*> nop +0+0034 <[^>]*> addiu at,at,1000 +[ ]*34: R_MIPS_LO16 \.text +0+0038 <[^>]*> jr at +0+003c <[^>]*> nop +0+0040 <[^>]*> b 00000000 +0+0044 <[^>]*> sw v0,0\(a0\) +0+0048 <[^>]*> lw at,2\(gp\) +[ ]*48: R_MIPS_GOT16 \.text +0+004c <[^>]*> nop +0+0050 <[^>]*> addiu at,at,1000 +[ ]*50: R_MIPS_LO16 \.text +0+0054 <[^>]*> jr at +0+0058 <[^>]*> sw v0,0\(a0\) +0+005c <[^>]*> move v0,a0 +0+0060 <[^>]*> beq v0,v1,00000000 +0+0064 <[^>]*> nop +0+0068 <[^>]*> move v0,a0 +0+006c <[^>]*> bne v0,v1,00000084 +0+0070 <[^>]*> nop +0+0074 <[^>]*> lw at,2\(gp\) +[ ]*74: R_MIPS_GOT16 \.text +0+0078 <[^>]*> nop +0+007c <[^>]*> addiu at,at,1000 +[ ]*7c: R_MIPS_LO16 \.text +0+0080 <[^>]*> jr at +0+0084 <[^>]*> nop +0+0088 <[^>]*> beq a0,a1,00000000 +0+008c <[^>]*> move v0,a0 +0+0090 <[^>]*> bne a0,a1,000000a8 +0+0094 <[^>]*> nop +0+0098 <[^>]*> lw at,2\(gp\) +[ ]*98: R_MIPS_GOT16 \.text +0+009c <[^>]*> nop +0+00a0 <[^>]*> addiu at,at,1000 +[ ]*a0: R_MIPS_LO16 \.text +0+00a4 <[^>]*> jr at +0+00a8 <[^>]*> move v0,a0 +0+00ac <[^>]*> addiu v0,a0,1 +0+00b0 <[^>]*> beq v0,v1,00000000 +0+00b4 <[^>]*> nop +0+00b8 <[^>]*> addiu v0,a0,1 +0+00bc <[^>]*> bne v0,v1,000000d4 +0+00c0 <[^>]*> nop +0+00c4 <[^>]*> lw at,2\(gp\) +[ ]*c4: R_MIPS_GOT16 \.text +0+00c8 <[^>]*> nop +0+00cc <[^>]*> addiu at,at,1000 +[ ]*cc: R_MIPS_LO16 \.text +0+00d0 <[^>]*> jr at +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> beq a0,a1,00000000 +0+00dc <[^>]*> addiu v0,a0,1 +0+00e0 <[^>]*> bne a0,a1,000000f8 +0+00e4 <[^>]*> nop +0+00e8 <[^>]*> lw at,2\(gp\) +[ ]*e8: R_MIPS_GOT16 \.text +0+00ec <[^>]*> nop +0+00f0 <[^>]*> addiu at,at,1000 +[ ]*f0: R_MIPS_LO16 \.text +0+00f4 <[^>]*> jr at +0+00f8 <[^>]*> addiu v0,a0,1 +0+00fc <[^>]*> lw v0,0\(a0\) +0+0100 <[^>]*> nop +0+0104 <[^>]*> beq v0,v1,00000000 +0+0108 <[^>]*> nop +0+010c <[^>]*> lw v0,0\(a0\) +0+0110 <[^>]*> nop +0+0114 <[^>]*> bne v0,v1,0000012c +0+0118 <[^>]*> nop +0+011c <[^>]*> lw at,2\(gp\) +[ ]*11c: R_MIPS_GOT16 \.text +0+0120 <[^>]*> nop +0+0124 <[^>]*> addiu at,at,1000 +[ ]*124: R_MIPS_LO16 \.text +0+0128 <[^>]*> jr at +0+012c <[^>]*> nop +0+0130 <[^>]*> lw v0,0\(a0\) +0+0134 <[^>]*> beq a0,a1,00000000 +0+0138 <[^>]*> nop +0+013c <[^>]*> lw v0,0\(a0\) +0+0140 <[^>]*> bne a0,a1,00000158 +0+0144 <[^>]*> nop +0+0148 <[^>]*> lw at,2\(gp\) +[ ]*148: R_MIPS_GOT16 \.text +0+014c <[^>]*> nop +0+0150 <[^>]*> addiu at,at,1000 +[ ]*150: R_MIPS_LO16 \.text +0+0154 <[^>]*> jr at +0+0158 <[^>]*> nop +0+015c <[^>]*> beq v0,v1,00000000 +0+0160 <[^>]*> sw v0,0\(a0\) +0+0164 <[^>]*> bne v0,v1,0000017c +0+0168 <[^>]*> nop +0+016c <[^>]*> lw at,2\(gp\) +[ ]*16c: R_MIPS_GOT16 \.text +0+0170 <[^>]*> nop +0+0174 <[^>]*> addiu at,at,1000 +[ ]*174: R_MIPS_LO16 \.text +0+0178 <[^>]*> jr at +0+017c <[^>]*> sw v0,0\(a0\) +0+0180 <[^>]*> beq a0,a1,00000000 +0+0184 <[^>]*> sw v0,0\(a0\) +0+0188 <[^>]*> bne a0,a1,000001a0 +0+018c <[^>]*> nop +0+0190 <[^>]*> lw at,2\(gp\) +[ ]*190: R_MIPS_GOT16 \.text +0+0194 <[^>]*> nop +0+0198 <[^>]*> addiu at,at,1000 +[ ]*198: R_MIPS_LO16 \.text +0+019c <[^>]*> jr at +0+01a0 <[^>]*> sw v0,0\(a0\) +0+01a4 <[^>]*> mfc1 v0,\$f0 +0+01a8 <[^>]*> move a2,a3 +0+01ac <[^>]*> beq v0,v1,00000000 +0+01b0 <[^>]*> nop +0+01b4 <[^>]*> mfc1 v0,\$f0 +0+01b8 <[^>]*> move a2,a3 +0+01bc <[^>]*> bne v0,v1,000001d4 +0+01c0 <[^>]*> nop +0+01c4 <[^>]*> lw at,2\(gp\) +[ ]*1c4: R_MIPS_GOT16 \.text +0+01c8 <[^>]*> nop +0+01cc <[^>]*> addiu at,at,1000 +[ ]*1cc: R_MIPS_LO16 \.text +0+01d0 <[^>]*> jr at +0+01d4 <[^>]*> nop +0+01d8 <[^>]*> mfc1 v0,\$f0 +0+01dc <[^>]*> beq a0,a1,00000000 +0+01e0 <[^>]*> move a2,a3 +0+01e4 <[^>]*> mfc1 v0,\$f0 +0+01e8 <[^>]*> bne a0,a1,00000200 +0+01ec <[^>]*> nop +0+01f0 <[^>]*> lw at,2\(gp\) +[ ]*1f0: R_MIPS_GOT16 \.text +0+01f4 <[^>]*> nop +0+01f8 <[^>]*> addiu at,at,1000 +[ ]*1f8: R_MIPS_LO16 \.text +0+01fc <[^>]*> jr at +0+0200 <[^>]*> move a2,a3 +0+0204 <[^>]*> move v0,a0 +0+0208 <[^>]*> bc1t 00000000 +0+020c <[^>]*> nop +0+0210 <[^>]*> move v0,a0 +0+0214 <[^>]*> bc1f 0000022c +0+0218 <[^>]*> nop +0+021c <[^>]*> lw at,2\(gp\) +[ ]*21c: R_MIPS_GOT16 \.text +0+0220 <[^>]*> nop +0+0224 <[^>]*> addiu at,at,1000 +[ ]*224: R_MIPS_LO16 \.text +0+0228 <[^>]*> jr at +0+022c <[^>]*> nop +0+0230 <[^>]*> move v0,a0 +0+0234 <[^>]*> b 00000000 +0+0238 <[^>]*> nop +0+023c <[^>]*> move v0,a0 +0+0240 <[^>]*> lw at,2\(gp\) +[ ]*240: R_MIPS_GOT16 \.text +0+0244 <[^>]*> nop +0+0248 <[^>]*> addiu at,at,1000 +[ ]*248: R_MIPS_LO16 \.text +0+024c <[^>]*> jr at +0+0250 <[^>]*> nop +0+0254 <[^>]*> move v0,a0 +0+0258 <[^>]*> b 00000000 +0+025c <[^>]*> nop +0+0260 <[^>]*> move v0,a0 +0+0264 <[^>]*> lw at,2\(gp\) +[ ]*264: R_MIPS_GOT16 \.text +0+0268 <[^>]*> nop +0+026c <[^>]*> addiu at,at,1000 +[ ]*26c: R_MIPS_LO16 \.text +0+0270 <[^>]*> jr at +0+0274 <[^>]*> nop +0+0278 <[^>]*> move a2,a3 +0+027c <[^>]*> move v0,a0 +0+0280 <[^>]*> b 00000000 +0+0284 <[^>]*> nop +0+0288 <[^>]*> move a2,a3 +0+028c <[^>]*> move v0,a0 +0+0290 <[^>]*> lw at,2\(gp\) +[ ]*290: R_MIPS_GOT16 \.text +0+0294 <[^>]*> nop +0+0298 <[^>]*> addiu at,at,1000 +[ ]*298: R_MIPS_LO16 \.text +0+029c <[^>]*> jr at +0+02a0 <[^>]*> nop +0+02a4 <[^>]*> lw at,0\(gp\) +[ ]*2a4: R_MIPS_GOT16 \.text +0+02a8 <[^>]*> nop +0+02ac <[^>]*> addiu at,at,692 +[ ]*2ac: R_MIPS_LO16 \.text +0+02b0 <[^>]*> sw v0,0\(at\) +0+02b4 <[^>]*> b 00000000 +0+02b8 <[^>]*> nop +0+02bc <[^>]*> lw at,0\(gp\) +[ ]*2bc: R_MIPS_GOT16 \.text +0+02c0 <[^>]*> nop +0+02c4 <[^>]*> addiu at,at,716 +[ ]*2c4: R_MIPS_LO16 \.text +0+02c8 <[^>]*> sw v0,0\(at\) +0+02cc <[^>]*> lw at,2\(gp\) +[ ]*2cc: R_MIPS_GOT16 \.text +0+02d0 <[^>]*> nop +0+02d4 <[^>]*> addiu at,at,1000 +[ ]*2d4: R_MIPS_LO16 \.text +0+02d8 <[^>]*> jr at +0+02dc <[^>]*> nop +0+02e0 <[^>]*> lwc1 \$f0,0\(a0\) +0+02e4 <[^>]*> b 00000000 +0+02e8 <[^>]*> nop +0+02ec <[^>]*> lwc1 \$f0,0\(a0\) +0+02f0 <[^>]*> lw at,2\(gp\) +[ ]*2f0: R_MIPS_GOT16 \.text +0+02f4 <[^>]*> nop +0+02f8 <[^>]*> addiu at,at,1000 +[ ]*2f8: R_MIPS_LO16 \.text +0+02fc <[^>]*> jr at +0+0300 <[^>]*> nop +0+0304 <[^>]*> cfc1 v0,\$31 +0+0308 <[^>]*> b 00000000 +0+030c <[^>]*> nop +0+0310 <[^>]*> cfc1 v0,\$31 +0+0314 <[^>]*> lw at,2\(gp\) +[ ]*314: R_MIPS_GOT16 \.text +0+0318 <[^>]*> nop +0+031c <[^>]*> addiu at,at,1000 +[ ]*31c: R_MIPS_LO16 \.text +0+0320 <[^>]*> jr at +0+0324 <[^>]*> nop +0+0328 <[^>]*> ctc1 v0,\$31 +0+032c <[^>]*> b 00000000 +0+0330 <[^>]*> nop +0+0334 <[^>]*> ctc1 v0,\$31 +0+0338 <[^>]*> lw at,2\(gp\) +[ ]*338: R_MIPS_GOT16 \.text +0+033c <[^>]*> nop +0+0340 <[^>]*> addiu at,at,1000 +[ ]*340: R_MIPS_LO16 \.text +0+0344 <[^>]*> jr at +0+0348 <[^>]*> nop +0+034c <[^>]*> mtc1 v0,\$f31 +0+0350 <[^>]*> b 00000000 +0+0354 <[^>]*> nop +0+0358 <[^>]*> mtc1 v0,\$f31 +0+035c <[^>]*> lw at,2\(gp\) +[ ]*35c: R_MIPS_GOT16 \.text +0+0360 <[^>]*> nop +0+0364 <[^>]*> addiu at,at,1000 +[ ]*364: R_MIPS_LO16 \.text +0+0368 <[^>]*> jr at +0+036c <[^>]*> nop +0+0370 <[^>]*> mfhi v0 +0+0374 <[^>]*> b 00000000 +0+0378 <[^>]*> nop +0+037c <[^>]*> mfhi v0 +0+0380 <[^>]*> lw at,2\(gp\) +[ ]*380: R_MIPS_GOT16 \.text +0+0384 <[^>]*> nop +0+0388 <[^>]*> addiu at,at,1000 +[ ]*388: R_MIPS_LO16 \.text +0+038c <[^>]*> jr at +0+0390 <[^>]*> nop +0+0394 <[^>]*> move v0,a0 +0+0398 <[^>]*> jr v0 +0+039c <[^>]*> nop +0+03a0 <[^>]*> jr a0 +0+03a4 <[^>]*> move v0,a0 +0+03a8 <[^>]*> move v0,a0 +0+03ac <[^>]*> jalr v0 +0+03b0 <[^>]*> nop +0+03b4 <[^>]*> jalr a0 +0+03b8 <[^>]*> move v0,a0 +0+03bc <[^>]*> move v0,ra +0+03c0 <[^>]*> jalr v1 +0+03c4 <[^>]*> nop +0+03c8 <[^>]*> move ra,a0 +0+03cc <[^>]*> jalr a1 +0+03d0 <[^>]*> nop +0+03d4 <[^>]*> jalr v0,v1 +0+03d8 <[^>]*> move ra,a0 +0+03dc <[^>]*> move v0,ra +0+03e0 <[^>]*> jalr v0,v1 +0+03e4 <[^>]*> nop + \.\.\. + \.\.\. diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1-mips2.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1-mips2.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1-mips2.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1-mips2.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,280 @@ +#objdump: -dr --prefix-addresses -mmips:6000 +#name: MIPS2 branch relaxation with swapping +#as: -32 -mips2 -KPIC -relax-branch +#source: relax-swap1.s +#stderr: relax-swap1.l + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <[^>]*> b 00000000 +0+0004 <[^>]*> move v0,a0 +0+0008 <[^>]*> lw at,2\(gp\) +[ ]*8: R_MIPS_GOT16 \.text +0+000c <[^>]*> addiu at,at,876 +[ ]*c: R_MIPS_LO16 \.text +0+0010 <[^>]*> jr at +0+0014 <[^>]*> move v0,a0 +0+0018 <[^>]*> b 00000000 +0+001c <[^>]*> lw v0,0\(a0\) +0+0020 <[^>]*> lw at,2\(gp\) +[ ]*20: R_MIPS_GOT16 \.text +0+0024 <[^>]*> addiu at,at,876 +[ ]*24: R_MIPS_LO16 \.text +0+0028 <[^>]*> jr at +0+002c <[^>]*> lw v0,0\(a0\) +0+0030 <[^>]*> b 00000000 +0+0034 <[^>]*> sw v0,0\(a0\) +0+0038 <[^>]*> lw at,2\(gp\) +[ ]*38: R_MIPS_GOT16 \.text +0+003c <[^>]*> addiu at,at,876 +[ ]*3c: R_MIPS_LO16 \.text +0+0040 <[^>]*> jr at +0+0044 <[^>]*> sw v0,0\(a0\) +0+0048 <[^>]*> move v0,a0 +0+004c <[^>]*> beq v0,v1,00000000 +0+0050 <[^>]*> nop +0+0054 <[^>]*> move v0,a0 +0+0058 <[^>]*> bne v0,v1,0000006c +0+005c <[^>]*> nop +0+0060 <[^>]*> lw at,2\(gp\) +[ ]*60: R_MIPS_GOT16 \.text +0+0064 <[^>]*> addiu at,at,876 +[ ]*64: R_MIPS_LO16 \.text +0+0068 <[^>]*> jr at +0+006c <[^>]*> nop +0+0070 <[^>]*> beq a0,a1,00000000 +0+0074 <[^>]*> move v0,a0 +0+0078 <[^>]*> bne a0,a1,0000008c +0+007c <[^>]*> nop +0+0080 <[^>]*> lw at,2\(gp\) +[ ]*80: R_MIPS_GOT16 \.text +0+0084 <[^>]*> addiu at,at,876 +[ ]*84: R_MIPS_LO16 \.text +0+0088 <[^>]*> jr at +0+008c <[^>]*> move v0,a0 +0+0090 <[^>]*> addiu v0,a0,1 +0+0094 <[^>]*> beq v0,v1,00000000 +0+0098 <[^>]*> nop +0+009c <[^>]*> addiu v0,a0,1 +0+00a0 <[^>]*> bne v0,v1,000000b4 +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> lw at,2\(gp\) +[ ]*a8: R_MIPS_GOT16 \.text +0+00ac <[^>]*> addiu at,at,876 +[ ]*ac: R_MIPS_LO16 \.text +0+00b0 <[^>]*> jr at +0+00b4 <[^>]*> nop +0+00b8 <[^>]*> beq a0,a1,00000000 +0+00bc <[^>]*> addiu v0,a0,1 +0+00c0 <[^>]*> bne a0,a1,000000d4 +0+00c4 <[^>]*> nop +0+00c8 <[^>]*> lw at,2\(gp\) +[ ]*c8: R_MIPS_GOT16 \.text +0+00cc <[^>]*> addiu at,at,876 +[ ]*cc: R_MIPS_LO16 \.text +0+00d0 <[^>]*> jr at +0+00d4 <[^>]*> addiu v0,a0,1 +0+00d8 <[^>]*> lw v0,0\(a0\) +0+00dc <[^>]*> beq v0,v1,00000000 +0+00e0 <[^>]*> nop +0+00e4 <[^>]*> lw v0,0\(a0\) +0+00e8 <[^>]*> bne v0,v1,000000fc +0+00ec <[^>]*> nop +0+00f0 <[^>]*> lw at,2\(gp\) +[ ]*f0: R_MIPS_GOT16 \.text +0+00f4 <[^>]*> addiu at,at,876 +[ ]*f4: R_MIPS_LO16 \.text +0+00f8 <[^>]*> jr at +0+00fc <[^>]*> nop +0+0100 <[^>]*> beq a0,a1,00000000 +0+0104 <[^>]*> lw v0,0\(a0\) +0+0108 <[^>]*> bne a0,a1,0000011c +0+010c <[^>]*> nop +0+0110 <[^>]*> lw at,2\(gp\) +[ ]*110: R_MIPS_GOT16 \.text +0+0114 <[^>]*> addiu at,at,876 +[ ]*114: R_MIPS_LO16 \.text +0+0118 <[^>]*> jr at +0+011c <[^>]*> lw v0,0\(a0\) +0+0120 <[^>]*> beq v0,v1,00000000 +0+0124 <[^>]*> sw v0,0\(a0\) +0+0128 <[^>]*> bne v0,v1,0000013c +0+012c <[^>]*> nop +0+0130 <[^>]*> lw at,2\(gp\) +[ ]*130: R_MIPS_GOT16 \.text +0+0134 <[^>]*> addiu at,at,876 +[ ]*134: R_MIPS_LO16 \.text +0+0138 <[^>]*> jr at +0+013c <[^>]*> sw v0,0\(a0\) +0+0140 <[^>]*> beq a0,a1,00000000 +0+0144 <[^>]*> sw v0,0\(a0\) +0+0148 <[^>]*> bne a0,a1,0000015c +0+014c <[^>]*> nop +0+0150 <[^>]*> lw at,2\(gp\) +[ ]*150: R_MIPS_GOT16 \.text +0+0154 <[^>]*> addiu at,at,876 +[ ]*154: R_MIPS_LO16 \.text +0+0158 <[^>]*> jr at +0+015c <[^>]*> sw v0,0\(a0\) +0+0160 <[^>]*> mfc1 v0,\$f0 +0+0164 <[^>]*> move a2,a3 +0+0168 <[^>]*> beq v0,v1,00000000 +0+016c <[^>]*> nop +0+0170 <[^>]*> mfc1 v0,\$f0 +0+0174 <[^>]*> move a2,a3 +0+0178 <[^>]*> bne v0,v1,0000018c +0+017c <[^>]*> nop +0+0180 <[^>]*> lw at,2\(gp\) +[ ]*180: R_MIPS_GOT16 \.text +0+0184 <[^>]*> addiu at,at,876 +[ ]*184: R_MIPS_LO16 \.text +0+0188 <[^>]*> jr at +0+018c <[^>]*> nop +0+0190 <[^>]*> mfc1 v0,\$f0 +0+0194 <[^>]*> beq a0,a1,00000000 +0+0198 <[^>]*> move a2,a3 +0+019c <[^>]*> mfc1 v0,\$f0 +0+01a0 <[^>]*> bne a0,a1,000001b4 +0+01a4 <[^>]*> nop +0+01a8 <[^>]*> lw at,2\(gp\) +[ ]*1a8: R_MIPS_GOT16 \.text +0+01ac <[^>]*> addiu at,at,876 +[ ]*1ac: R_MIPS_LO16 \.text +0+01b0 <[^>]*> jr at +0+01b4 <[^>]*> move a2,a3 +0+01b8 <[^>]*> move v0,a0 +0+01bc <[^>]*> bc1t 00000000 +0+01c0 <[^>]*> nop +0+01c4 <[^>]*> move v0,a0 +0+01c8 <[^>]*> bc1f 000001dc +0+01cc <[^>]*> nop +0+01d0 <[^>]*> lw at,2\(gp\) +[ ]*1d0: R_MIPS_GOT16 \.text +0+01d4 <[^>]*> addiu at,at,876 +[ ]*1d4: R_MIPS_LO16 \.text +0+01d8 <[^>]*> jr at +0+01dc <[^>]*> nop +0+01e0 <[^>]*> move v0,a0 +0+01e4 <[^>]*> b 00000000 +0+01e8 <[^>]*> nop +0+01ec <[^>]*> move v0,a0 +0+01f0 <[^>]*> lw at,2\(gp\) +[ ]*1f0: R_MIPS_GOT16 \.text +0+01f4 <[^>]*> addiu at,at,876 +[ ]*1f4: R_MIPS_LO16 \.text +0+01f8 <[^>]*> jr at +0+01fc <[^>]*> nop +0+0200 <[^>]*> move v0,a0 +0+0204 <[^>]*> b 00000000 +0+0208 <[^>]*> nop +0+020c <[^>]*> move v0,a0 +0+0210 <[^>]*> lw at,2\(gp\) +[ ]*210: R_MIPS_GOT16 \.text +0+0214 <[^>]*> addiu at,at,876 +[ ]*214: R_MIPS_LO16 \.text +0+0218 <[^>]*> jr at +0+021c <[^>]*> nop +0+0220 <[^>]*> move a2,a3 +0+0224 <[^>]*> move v0,a0 +0+0228 <[^>]*> b 00000000 +0+022c <[^>]*> nop +0+0230 <[^>]*> move a2,a3 +0+0234 <[^>]*> move v0,a0 +0+0238 <[^>]*> lw at,2\(gp\) +[ ]*238: R_MIPS_GOT16 \.text +0+023c <[^>]*> addiu at,at,876 +[ ]*23c: R_MIPS_LO16 \.text +0+0240 <[^>]*> jr at +0+0244 <[^>]*> nop +0+0248 <[^>]*> lw at,0\(gp\) +[ ]*248: R_MIPS_GOT16 \.text +0+024c <[^>]*> nop +0+0250 <[^>]*> addiu at,at,600 +[ ]*250: R_MIPS_LO16 \.text +0+0254 <[^>]*> sw v0,0\(at\) +0+0258 <[^>]*> b 00000000 +0+025c <[^>]*> nop +0+0260 <[^>]*> lw at,0\(gp\) +[ ]*260: R_MIPS_GOT16 \.text +0+0264 <[^>]*> nop +0+0268 <[^>]*> addiu at,at,624 +[ ]*268: R_MIPS_LO16 \.text +0+026c <[^>]*> sw v0,0\(at\) +0+0270 <[^>]*> lw at,2\(gp\) +[ ]*270: R_MIPS_GOT16 \.text +0+0274 <[^>]*> addiu at,at,876 +[ ]*274: R_MIPS_LO16 \.text +0+0278 <[^>]*> jr at +0+027c <[^>]*> nop +0+0280 <[^>]*> b 00000000 +0+0284 <[^>]*> lwc1 \$f0,0\(a0\) +0+0288 <[^>]*> lw at,2\(gp\) +[ ]*288: R_MIPS_GOT16 \.text +0+028c <[^>]*> addiu at,at,876 +[ ]*28c: R_MIPS_LO16 \.text +0+0290 <[^>]*> jr at +0+0294 <[^>]*> lwc1 \$f0,0\(a0\) +0+0298 <[^>]*> cfc1 v0,\$31 +0+029c <[^>]*> b 00000000 +0+02a0 <[^>]*> nop +0+02a4 <[^>]*> cfc1 v0,\$31 +0+02a8 <[^>]*> lw at,2\(gp\) +[ ]*2a8: R_MIPS_GOT16 \.text +0+02ac <[^>]*> addiu at,at,876 +[ ]*2ac: R_MIPS_LO16 \.text +0+02b0 <[^>]*> jr at +0+02b4 <[^>]*> nop +0+02b8 <[^>]*> ctc1 v0,\$31 +0+02bc <[^>]*> b 00000000 +0+02c0 <[^>]*> nop +0+02c4 <[^>]*> ctc1 v0,\$31 +0+02c8 <[^>]*> lw at,2\(gp\) +[ ]*2c8: R_MIPS_GOT16 \.text +0+02cc <[^>]*> addiu at,at,876 +[ ]*2cc: R_MIPS_LO16 \.text +0+02d0 <[^>]*> jr at +0+02d4 <[^>]*> nop +0+02d8 <[^>]*> mtc1 v0,\$f31 +0+02dc <[^>]*> b 00000000 +0+02e0 <[^>]*> nop +0+02e4 <[^>]*> mtc1 v0,\$f31 +0+02e8 <[^>]*> lw at,2\(gp\) +[ ]*2e8: R_MIPS_GOT16 \.text +0+02ec <[^>]*> addiu at,at,876 +[ ]*2ec: R_MIPS_LO16 \.text +0+02f0 <[^>]*> jr at +0+02f4 <[^>]*> nop +0+02f8 <[^>]*> mfhi v0 +0+02fc <[^>]*> b 00000000 +0+0300 <[^>]*> nop +0+0304 <[^>]*> mfhi v0 +0+0308 <[^>]*> lw at,2\(gp\) +[ ]*308: R_MIPS_GOT16 \.text +0+030c <[^>]*> addiu at,at,876 +[ ]*30c: R_MIPS_LO16 \.text +0+0310 <[^>]*> jr at +0+0314 <[^>]*> nop +0+0318 <[^>]*> move v0,a0 +0+031c <[^>]*> jr v0 +0+0320 <[^>]*> nop +0+0324 <[^>]*> jr a0 +0+0328 <[^>]*> move v0,a0 +0+032c <[^>]*> move v0,a0 +0+0330 <[^>]*> jalr v0 +0+0334 <[^>]*> nop +0+0338 <[^>]*> jalr a0 +0+033c <[^>]*> move v0,a0 +0+0340 <[^>]*> move v0,ra +0+0344 <[^>]*> jalr v1 +0+0348 <[^>]*> nop +0+034c <[^>]*> move ra,a0 +0+0350 <[^>]*> jalr a1 +0+0354 <[^>]*> nop +0+0358 <[^>]*> jalr v0,v1 +0+035c <[^>]*> move ra,a0 +0+0360 <[^>]*> move v0,ra +0+0364 <[^>]*> jalr v0,v1 +0+0368 <[^>]*> nop + \.\.\. + \.\.\. diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,24 @@ +.*: Assembler messages: +.*:9: Warning: relaxed out-of-range branch into a jump +.*:14: Warning: relaxed out-of-range branch into a jump +.*:19: Warning: relaxed out-of-range branch into a jump +.*:24: Warning: relaxed out-of-range branch into a jump +.*:28: Warning: relaxed out-of-range branch into a jump +.*:33: Warning: relaxed out-of-range branch into a jump +.*:37: Warning: relaxed out-of-range branch into a jump +.*:42: Warning: relaxed out-of-range branch into a jump +.*:46: Warning: relaxed out-of-range branch into a jump +.*:51: Warning: relaxed out-of-range branch into a jump +.*:55: Warning: relaxed out-of-range branch into a jump +.*:62: Warning: relaxed out-of-range branch into a jump +.*:68: Warning: relaxed out-of-range branch into a jump +.*:73: Warning: relaxed out-of-range branch into a jump +.*:79: Warning: relaxed out-of-range branch into a jump +.*:85: Warning: relaxed out-of-range branch into a jump +.*:96: Warning: relaxed out-of-range branch into a jump +.*:101: Warning: relaxed out-of-range branch into a jump +.*:106: Warning: relaxed out-of-range branch into a jump +.*:111: Warning: relaxed out-of-range branch into a jump +.*:116: Warning: relaxed out-of-range branch into a jump +.*:121: Warning: relaxed out-of-range branch into a jump +.*:126: Warning: relaxed out-of-range branch into a jump diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap1.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap1.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,151 @@ +# Source file used to test branch relaxation with swapping. + + .text +foo: + + move $2, $4 + b foo + move $2, $4 + b bar + + lw $2, ($4) + b foo + lw $2, ($4) + b bar + + sw $2, ($4) + b foo + sw $2, ($4) + b bar + + move $2, $4 + beq $2, $3, foo + move $2, $4 + beq $2, $3, bar + move $2, $4 + beq $4, $5, foo + move $2, $4 + beq $4, $5, bar + + addiu $2, $4, 1 + beq $2, $3, foo + addiu $2, $4, 1 + beq $2, $3, bar + addiu $2, $4, 1 + beq $4, $5, foo + addiu $2, $4, 1 + beq $4, $5, bar + + lw $2, ($4) + beq $2, $3, foo + lw $2, ($4) + beq $2, $3, bar + lw $2, ($4) + beq $4, $5, foo + lw $2, ($4) + beq $4, $5, bar + + sw $2, ($4) + beq $2, $3, foo + sw $2, ($4) + beq $2, $3, bar + sw $2, ($4) + beq $4, $5, foo + sw $2, ($4) + beq $4, $5, bar + + mfc1 $2, $0 + move $6, $7 + beq $2, $3, foo + mfc1 $2, $0 + move $6, $7 + beq $2, $3, bar + mfc1 $2, $0 + move $6, $7 + beq $4, $5, foo + mfc1 $2, $0 + move $6, $7 + beq $4, $5, bar + + move $2, $4 + bc1t foo + move $2, $4 + bc1t bar + + .set nomove + move $2, $4 + b foo + move $2, $4 + b bar + .set move + + move $2, $4 +0: b foo + move $2, $4 +0: b bar + + .set noreorder + move $6, $7 + .set reorder + move $2, $4 + b foo + .set noreorder + move $6, $7 + .set reorder + move $2, $4 + b bar + + sw $2, 0f +0: b foo + sw $2, 0f +0: b bar + + lwc1 $0, ($4) + b foo + lwc1 $0, ($4) + b bar + + cfc1 $2, $31 + b foo + cfc1 $2, $31 + b bar + + ctc1 $2, $31 + b foo + ctc1 $2, $31 + b bar + + mtc1 $2, $31 + b foo + mtc1 $2, $31 + b bar + + mfhi $2 + b foo + mfhi $2 + b bar + + move $2, $4 + jr $2 + move $2, $4 + jr $4 + + move $2, $4 + jalr $2 + move $2, $4 + jalr $4 + + move $2, $31 + jalr $3 + move $31, $4 + jalr $5 + + move $31, $4 + jalr $2, $3 + move $2, $31 + jalr $2, $3 + + .space 0x20000 # to make a 128kb loop body +bar: +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.d binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.d --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,135 @@ +#objdump: -dr --prefix-addresses -mmips:6000 +#name: MIPS2 branch likely relaxation with swapping +#as: -32 -mips2 -KPIC -relax-branch +#source: relax-swap2.s +#stderr: relax-swap2.l + +.*: +file format .*mips.* + +Disassembly of section \.text: +0+0000 <[^>]*> move v0,a0 +0+0004 <[^>]*> beql v0,v1,00000000 +0+0008 <[^>]*> nop +0+000c <[^>]*> move v0,a0 +0+0010 <[^>]*> beql v0,v1,00000020 +0+0014 <[^>]*> nop +0+0018 <[^>]*> beqzl zero,00000030 +0+001c <[^>]*> nop +0+0020 <[^>]*> lw at,2\(gp\) +[ ]*20: R_MIPS_GOT16 \.text +0+0024 <[^>]*> addiu at,at,424 +[ ]*24: R_MIPS_LO16 \.text +0+0028 <[^>]*> jr at +0+002c <[^>]*> nop +0+0030 <[^>]*> move v0,a0 +0+0034 <[^>]*> beql a0,a1,00000000 +0+0038 <[^>]*> nop +0+003c <[^>]*> move v0,a0 +0+0040 <[^>]*> beql a0,a1,00000050 +0+0044 <[^>]*> nop +0+0048 <[^>]*> beqzl zero,00000060 +0+004c <[^>]*> nop +0+0050 <[^>]*> lw at,2\(gp\) +[ ]*50: R_MIPS_GOT16 \.text +0+0054 <[^>]*> addiu at,at,424 +[ ]*54: R_MIPS_LO16 \.text +0+0058 <[^>]*> jr at +0+005c <[^>]*> nop +0+0060 <[^>]*> addiu v0,a0,1 +0+0064 <[^>]*> beql v0,v1,00000000 +0+0068 <[^>]*> nop +0+006c <[^>]*> addiu v0,a0,1 +0+0070 <[^>]*> beql v0,v1,00000080 +0+0074 <[^>]*> nop +0+0078 <[^>]*> beqzl zero,00000090 +0+007c <[^>]*> nop +0+0080 <[^>]*> lw at,2\(gp\) +[ ]*80: R_MIPS_GOT16 \.text +0+0084 <[^>]*> addiu at,at,424 +[ ]*84: R_MIPS_LO16 \.text +0+0088 <[^>]*> jr at +0+008c <[^>]*> nop +0+0090 <[^>]*> addiu v0,a0,1 +0+0094 <[^>]*> beql a0,a1,00000000 +0+0098 <[^>]*> nop +0+009c <[^>]*> addiu v0,a0,1 +0+00a0 <[^>]*> beql a0,a1,000000b0 +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> beqzl zero,000000c0 +0+00ac <[^>]*> nop +0+00b0 <[^>]*> lw at,2\(gp\) +[ ]*b0: R_MIPS_GOT16 \.text +0+00b4 <[^>]*> addiu at,at,424 +[ ]*b4: R_MIPS_LO16 \.text +0+00b8 <[^>]*> jr at +0+00bc <[^>]*> nop +0+00c0 <[^>]*> lw v0,0\(a0\) +0+00c4 <[^>]*> beql v0,v1,00000000 +0+00c8 <[^>]*> nop +0+00cc <[^>]*> lw v0,0\(a0\) +0+00d0 <[^>]*> beql v0,v1,000000e0 +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> beqzl zero,000000f0 +0+00dc <[^>]*> nop +0+00e0 <[^>]*> lw at,2\(gp\) +[ ]*e0: R_MIPS_GOT16 \.text +0+00e4 <[^>]*> addiu at,at,424 +[ ]*e4: R_MIPS_LO16 \.text +0+00e8 <[^>]*> jr at +0+00ec <[^>]*> nop +0+00f0 <[^>]*> lw v0,0\(a0\) +0+00f4 <[^>]*> beql a0,a1,00000000 +0+00f8 <[^>]*> nop +0+00fc <[^>]*> lw v0,0\(a0\) +0+0100 <[^>]*> beql a0,a1,00000110 +0+0104 <[^>]*> nop +0+0108 <[^>]*> beqzl zero,00000120 +0+010c <[^>]*> nop +0+0110 <[^>]*> lw at,2\(gp\) +[ ]*110: R_MIPS_GOT16 \.text +0+0114 <[^>]*> addiu at,at,424 +[ ]*114: R_MIPS_LO16 \.text +0+0118 <[^>]*> jr at +0+011c <[^>]*> nop +0+0120 <[^>]*> sw v0,0\(a0\) +0+0124 <[^>]*> beql v0,v1,00000000 +0+0128 <[^>]*> nop +0+012c <[^>]*> sw v0,0\(a0\) +0+0130 <[^>]*> beql v0,v1,00000140 +0+0134 <[^>]*> nop +0+0138 <[^>]*> beqzl zero,00000150 +0+013c <[^>]*> nop +0+0140 <[^>]*> lw at,2\(gp\) +[ ]*140: R_MIPS_GOT16 \.text +0+0144 <[^>]*> addiu at,at,424 +[ ]*144: R_MIPS_LO16 \.text +0+0148 <[^>]*> jr at +0+014c <[^>]*> nop +0+0150 <[^>]*> sw v0,0\(a0\) +0+0154 <[^>]*> beql a0,a1,00000000 +0+0158 <[^>]*> nop +0+015c <[^>]*> sw v0,0\(a0\) +0+0160 <[^>]*> beql a0,a1,00000170 +0+0164 <[^>]*> nop +0+0168 <[^>]*> beqzl zero,00000180 +0+016c <[^>]*> nop +0+0170 <[^>]*> lw at,2\(gp\) +[ ]*170: R_MIPS_GOT16 \.text +0+0174 <[^>]*> addiu at,at,424 +[ ]*174: R_MIPS_LO16 \.text +0+0178 <[^>]*> jr at +0+017c <[^>]*> nop +0+0180 <[^>]*> teq v0,a0 +0+0184 <[^>]*> beq a0,a1,00000000 +0+0188 <[^>]*> nop +0+018c <[^>]*> teq v0,a0 +0+0190 <[^>]*> bne a0,a1,000001a4 +0+0194 <[^>]*> nop +0+0198 <[^>]*> lw at,2\(gp\) +[ ]*198: R_MIPS_GOT16 \.text +0+019c <[^>]*> addiu at,at,424 +[ ]*19c: R_MIPS_LO16 \.text +0+01a0 <[^>]*> jr at +0+01a4 <[^>]*> nop + \.\.\. + \.\.\. diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.l binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.l --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.l 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.l 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,10 @@ +.*: Assembler messages: +.*:9: Warning: relaxed out-of-range branch into a jump +.*:13: Warning: relaxed out-of-range branch into a jump +.*:18: Warning: relaxed out-of-range branch into a jump +.*:22: Warning: relaxed out-of-range branch into a jump +.*:27: Warning: relaxed out-of-range branch into a jump +.*:31: Warning: relaxed out-of-range branch into a jump +.*:36: Warning: relaxed out-of-range branch into a jump +.*:40: Warning: relaxed out-of-range branch into a jump +.*:45: Warning: relaxed out-of-range branch into a jump diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.s binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mips/relax-swap2.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mips/relax-swap2.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,50 @@ +# Source file used to test branch likely relaxation with swapping. + + .text +foo: + + move $2, $4 + beql $2, $3, foo + move $2, $4 + beql $2, $3, bar + move $2, $4 + beql $4, $5, foo + move $2, $4 + beql $4, $5, bar + + addiu $2, $4, 1 + beql $2, $3, foo + addiu $2, $4, 1 + beql $2, $3, bar + addiu $2, $4, 1 + beql $4, $5, foo + addiu $2, $4, 1 + beql $4, $5, bar + + lw $2, ($4) + beql $2, $3, foo + lw $2, ($4) + beql $2, $3, bar + lw $2, ($4) + beql $4, $5, foo + lw $2, ($4) + beql $4, $5, bar + + sw $2, ($4) + beql $2, $3, foo + sw $2, ($4) + beql $2, $3, bar + sw $2, ($4) + beql $4, $5, foo + sw $2, ($4) + beql $4, $5, bar + + teq $2, $4 + beq $4, $5, foo + teq $2, $4 + beq $4, $5, bar + + .space 0x20000 # to make a 128kb loop body +bar: +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mn10300/basic.exp binutils-2.15.90.0.1/gas/testsuite/gas/mn10300/basic.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/mn10300/basic.exp 2004-01-14 13:07:49.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mn10300/basic.exp 2004-03-03 12:24:34.000000000 -0800 @@ -1,4 +1,4 @@ -# Copyright (C) 1996, 2000, 2002 Free Software Foundation, Inc. +# Copyright (C) 1996, 2000, 2002, 2004 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -499,6 +499,40 @@ proc do_mov4 {} { if [expr $x==16] then { pass $testname } else { fail $testname } } +proc do_mov5 {} { + set testname "mov5.s: mov5 tests" + set x 0 + + gas_start "mov5.s" "-al" + + # Instead of having a variable for each match string just increment the + # total number of matches seen. That's simpler when testing large numbers + # of instructions (as these tests to). + while 1 { + expect { + -re "^ +\[0-9\]+ 0000 FBF80008\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0004 FDF80000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +4 +0100\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 000a FDF800FF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +5 +FF7F\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0010 FEF80080\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +6 +FFFFFF\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +\[0-9\]+ 0017 FEF80000\[^\n\]*\n" { set x [expr $x+1] } + -re "^ +7 +0080FF\[^\n\]*\n" { set x [expr $x+1] } + -re "\[^\n\]*\n" { } + timeout { perror "timeout\n"; break } + eof { break } + } + } + + # This was intended to do any cleanup necessary. It kinda looks like it + # isn't needed, but just in case, please keep it in for now. + gas_finish + + # Did we find what we were looking for? If not, flunk it. + if [expr $x==9] then { pass $testname } else { fail $testname } +} + proc do_movbu {} { set testname "movbu.s: movbu tests" set x 0 @@ -1762,6 +1796,7 @@ if [istarget mn10300*-*-*] then { do_mov2 do_mov3 do_mov4 + do_mov5 do_movbu do_movhu do_movm diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/mn10300/mov5.s binutils-2.15.90.0.1/gas/testsuite/gas/mn10300/mov5.s --- binutils-2.14.90.0.8/gas/testsuite/gas/mn10300/mov5.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/mn10300/mov5.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,7 @@ + .am33 + .text + mov 8,sp + mov 256,sp + mov +((1<<23)-1),sp + mov -128,sp + mov +((-1)<<23),sp diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/sh/basic.exp binutils-2.15.90.0.1/gas/testsuite/gas/sh/basic.exp --- binutils-2.14.90.0.8/gas/testsuite/gas/sh/basic.exp 2004-01-14 13:07:49.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/sh/basic.exp 2004-03-03 12:24:34.000000000 -0800 @@ -1,4 +1,5 @@ -# Copyright (C) 1995, 1996, 1997, 2002, 2003 Free Software Foundation, Inc. +# Copyright (C) 1995, 1996, 1997, 2002, 2003, 2004 +# Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -140,11 +141,13 @@ if [istarget sh*-*-*] then { } if {[istarget sh*-*elf] || [istarget sh*-linux*]} then { - run_dump_test "sh4a" - run_dump_test "sh4a-fp" + if {![istarget "sh64*-*-*"] && ![istarget "sh5*-*-*"]} then { + run_dump_test "sh4a" + run_dump_test "sh4a-fp" - run_dump_test "sh4a-dsp" - run_dump_test "sh4al-dsp" + run_dump_test "sh4a-dsp" + run_dump_test "sh4al-dsp" + } run_dump_test "pic" diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/sh/err-sh4a-fp.s binutils-2.15.90.0.1/gas/testsuite/gas/sh/err-sh4a-fp.s --- binutils-2.14.90.0.8/gas/testsuite/gas/sh/err-sh4a-fp.s 2004-01-14 13:07:49.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/sh/err-sh4a-fp.s 2004-03-03 12:24:34.000000000 -0800 @@ -5,10 +5,10 @@ fpchg fpul ! { dg-error "excess operands" } - fssra fr1, fr2 ! { dg-error "excess operands" } - fssra ! { dg-error "invalid operands|missing operand" } - fssra fpul ! { dg-error "invalid operands" } - fssra dr0, dr2 ! { dg-error "invalid operands" } + fsrra fr1, fr2 ! { dg-error "excess operands" } + fsrra ! { dg-error "invalid operands|missing operand" } + fsrra fpul ! { dg-error "invalid operands" } + fsrra dr0, dr2 ! { dg-error "invalid operands" } fsca dr0, fpul ! { dg-error "invalid operands" } fsca fpul, fr0 ! { dg-error "invalid operands" } diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/sh/sh4a-fp.d binutils-2.15.90.0.1/gas/testsuite/gas/sh/sh4a-fp.d --- binutils-2.14.90.0.8/gas/testsuite/gas/sh/sh4a-fp.d 2004-01-14 13:07:49.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/sh/sh4a-fp.d 2004-03-03 12:24:34.000000000 -0800 @@ -8,8 +8,8 @@ start address 0x00000000 Disassembly of section \.text: 0x00000000 f7 fd fpchg -0x00000002 f1 7d fssra fr1 -0x00000004 f9 7d fssra fr9 -0x00000006 f6 7d fssra fr6 +0x00000002 f1 7d fsrra fr1 +0x00000004 f9 7d fsrra fr9 +0x00000006 f6 7d fsrra fr6 0x00000008 f2 fd fsca fpul,dr2 0x0000000a fc fd fsca fpul,dr12 diff -uprN binutils-2.14.90.0.8/gas/testsuite/gas/sh/sh4a-fp.s binutils-2.15.90.0.1/gas/testsuite/gas/sh/sh4a-fp.s --- binutils-2.14.90.0.8/gas/testsuite/gas/sh/sh4a-fp.s 2004-01-14 13:07:49.000000000 -0800 +++ binutils-2.15.90.0.1/gas/testsuite/gas/sh/sh4a-fp.s 2004-03-03 12:24:34.000000000 -0800 @@ -3,9 +3,9 @@ fpchg - fssra fr1 - fssra fr9 - fssra fr6 + fsrra fr1 + fsrra fr9 + fsrra fr6 fsca fpul, dr2 fsca fpul, dr12 diff -uprN binutils-2.14.90.0.8/gettext.m4 binutils-2.15.90.0.1/gettext.m4 --- binutils-2.14.90.0.8/gettext.m4 2001-10-04 14:35:42.000000000 -0700 +++ binutils-2.15.90.0.1/gettext.m4 2004-03-03 12:24:33.000000000 -0800 @@ -11,7 +11,7 @@ # serial 3 -AC_DEFUN(CY_WITH_NLS, +AC_DEFUN([CY_WITH_NLS], [AC_MSG_CHECKING([whether NLS is requested]) dnl Default is enabled NLS AC_ARG_ENABLE(nls, @@ -158,7 +158,7 @@ AC_DEFUN(CY_WITH_NLS, AC_SUBST(POSUB) ]) -AC_DEFUN(CY_GNU_GETTEXT, +AC_DEFUN([CY_GNU_GETTEXT], [AC_REQUIRE([AC_PROG_MAKE_SET])dnl AC_REQUIRE([AC_PROG_CC])dnl AC_REQUIRE([AC_PROG_RANLIB])dnl @@ -286,7 +286,7 @@ __argz_count __argz_stringify __argz_nex dnl AM_PATH_PROG_WITH_TEST(VARIABLE, PROG-TO-CHECK-FOR, dnl TEST-PERFORMED-ON-FOUND_PROGRAM [, VALUE-IF-NOT-FOUND [, PATH]]) -AC_DEFUN(AM_PATH_PROG_WITH_TEST, +AC_DEFUN([AM_PATH_PROG_WITH_TEST], [# Extract the first word of "$2", so it can be a program name with args. set dummy $2; ac_word=[$]2 AC_MSG_CHECKING([for $ac_word]) @@ -332,7 +332,7 @@ AC_SUBST($1)dnl # serial 1 -AC_DEFUN(AM_LC_MESSAGES, +AC_DEFUN([AM_LC_MESSAGES], [if test $ac_cv_header_locale_h = yes; then AC_CACHE_CHECK([for LC_MESSAGES], am_cv_val_LC_MESSAGES, [AC_TRY_LINK([#include ], [return LC_MESSAGES], diff -uprN binutils-2.14.90.0.8/include/ChangeLog binutils-2.15.90.0.1/include/ChangeLog --- binutils-2.14.90.0.8/include/ChangeLog 2004-01-14 13:07:51.000000000 -0800 +++ binutils-2.15.90.0.1/include/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,12 @@ +2004-02-24 Ian Lance Taylor + + * dyn-string.h: Update copyright date. + +2004-02-23 Ian Lance Taylor + + * dyn-string.h: Remove test of IN_LIBGCC2 and IN_GLIBCPP_V3 and + the associated #defines. + 2004-01-12 Ian Lance Taylor * demangle.h: Instead of checking ANSI_PROTOTYPES, just include diff -uprN binutils-2.14.90.0.8/include/dyn-string.h binutils-2.15.90.0.1/include/dyn-string.h --- binutils-2.14.90.0.8/include/dyn-string.h 2002-04-05 10:03:50.000000000 -0800 +++ binutils-2.15.90.0.1/include/dyn-string.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* An abstract string datatype. - Copyright (C) 1998, 1999, 2000, 2002 Free Software Foundation, Inc. + Copyright (C) 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc. Contributed by Mark Mitchell (mark@markmitchell.com). This file is part of GCC. @@ -40,35 +40,6 @@ typedef struct dyn_string (strcmp ((DS1)->s, (DS2)->s)) -/* dyn_string functions are used in the demangling implementation - included in the G++ runtime library. To prevent collisions with - names in user programs, the functions that are used in the - demangler are given implementation-reserved names. */ - -#if defined(IN_LIBGCC2) || defined(IN_GLIBCPP_V3) - -#define dyn_string_init __cxa_dyn_string_init -#define dyn_string_new __cxa_dyn_string_new -#define dyn_string_delete __cxa_dyn_string_delete -#define dyn_string_release __cxa_dyn_string_release -#define dyn_string_resize __cxa_dyn_string_resize -#define dyn_string_clear __cxa_dyn_string_clear -#define dyn_string_copy __cxa_dyn_string_copy -#define dyn_string_copy_cstr __cxa_dyn_string_copy_cstr -#define dyn_string_prepend __cxa_dyn_string_prepend -#define dyn_string_prepend_cstr __cxa_dyn_string_prepend_cstr -#define dyn_string_insert __cxa_dyn_string_insert -#define dyn_string_insert_cstr __cxa_dyn_string_insert_cstr -#define dyn_string_insert_char __cxa_dyn_string_insert_char -#define dyn_string_append __cxa_dyn_string_append -#define dyn_string_append_cstr __cxa_dyn_string_append_cstr -#define dyn_string_append_char __cxa_dyn_string_append_char -#define dyn_string_substring __cxa_dyn_string_substring -#define dyn_string_eq __cxa_dyn_string_eq - -#endif /* IN_LIBGCC2 || IN_GLIBCPP_V3 */ - - extern int dyn_string_init PARAMS ((struct dyn_string *, int)); extern dyn_string_t dyn_string_new PARAMS ((int)); extern void dyn_string_delete PARAMS ((dyn_string_t)); diff -uprN binutils-2.14.90.0.8/include/elf/ChangeLog binutils-2.15.90.0.1/include/elf/ChangeLog --- binutils-2.14.90.0.8/include/elf/ChangeLog 2004-01-14 13:07:51.000000000 -0800 +++ binutils-2.15.90.0.1/include/elf/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,27 @@ +2003-03-03 Andrew Stubbs + + * sh.h: Add EF_SH4_NOMMU_NOFPU. + +2004-03-01 Richard Sandiford + + * frv.h (EF_FRV_CPU_FR405, EF_FRV_CPU_FR450): Define. + +2004-01-28 Roland McGrath + + * common.h (AT_SECURE): New macro. + +2004-01-21 Roland McGrath + + * common.h (AT_SUN_UID, AT_SUN_RUID, AT_SUN_GID): New macros. + (AT_SUN_RGID, AT_SUN_LDELF, AT_SUN_LDSHDR, AT_SUN_LDNAME, + AT_SUN_LPAGESZ, AT_SUN_PLATFORM, AT_SUN_HWCAP, AT_SUN_IFLUSH, + AT_SUN_CPU, AT_SUN_EMUL_ENTRY, AT_SUN_EMUL_EXECFD, + AT_SUN_EXECNAME) AT_SUN_MMU, AT_SUN_LDDATA): Likewise. + +2004-01-17 Mark Kettenis + + * common.h (NT_OPENBSD_IDENT): Define. + 2004-01-06 Alexandre Oliva 2003-09-18 Alexandre Oliva diff -uprN binutils-2.14.90.0.8/include/elf/common.h binutils-2.15.90.0.1/include/elf/common.h --- binutils-2.14.90.0.8/include/elf/common.h 2004-01-14 13:07:51.000000000 -0800 +++ binutils-2.15.90.0.1/include/elf/common.h 2004-03-03 12:24:34.000000000 -0800 @@ -404,6 +404,10 @@ #define NT_NETBSD_IDENT 1 +/* Values for OpenBSD .note.openbsd.ident notes. Note name is "OpenBSD". */ + +#define NT_OPENBSD_IDENT 1 + /* Values for FreeBSD .note.ABI-tag notes. Note name is "FreeBSD". */ #define NT_FREEBSD_ABI_TAG 1 @@ -717,9 +721,30 @@ #define AT_ICACHEBSIZE 20 /* Instruction cache block size. */ #define AT_UCACHEBSIZE 21 /* Unified cache block size. */ #define AT_IGNOREPPC 22 /* Entry should be ignored */ +#define AT_SECURE 23 /* Boolean, was exec setuid-like? */ /* Pointer to the global system page used for system calls and other nice things. */ #define AT_SYSINFO 32 -#define AT_SYSINFO_EHDR 33 +#define AT_SYSINFO_EHDR 33 /* Pointer to ELF header of system-supplied DSO. */ + +#define AT_SUN_UID 2000 /* Effective user ID. */ +#define AT_SUN_RUID 2001 /* Real user ID. */ +#define AT_SUN_GID 2002 /* Effective group ID. */ +#define AT_SUN_RGID 2003 /* Real group ID. */ +#define AT_SUN_LDELF 2004 /* Dynamic linker's ELF header. */ +#define AT_SUN_LDSHDR 2005 /* Dynamic linker's section headers. */ +#define AT_SUN_LDNAME 2006 /* String giving name of dynamic linker. */ +#define AT_SUN_LPAGESZ 2007 /* Large pagesize. */ +#define AT_SUN_PLATFORM 2008 /* Platform name string. */ +#define AT_SUN_HWCAP 2009 /* Machine dependent hints about + processor capabilities. */ +#define AT_SUN_IFLUSH 2010 /* Should flush icache? */ +#define AT_SUN_CPU 2011 /* CPU name string. */ +#define AT_SUN_EMUL_ENTRY 2012 /* COFF entry point address. */ +#define AT_SUN_EMUL_EXECFD 2013 /* COFF executable file descriptor. */ +#define AT_SUN_EXECNAME 2014 /* Canonicalized file name given to execve. */ +#define AT_SUN_MMU 2015 /* String for name of MMU module. */ +#define AT_SUN_LDDATA 2016 /* Dynamic linker's data segment address. */ + #endif /* _ELF_COMMON_H */ diff -uprN binutils-2.14.90.0.8/include/elf/frv.h binutils-2.15.90.0.1/include/elf/frv.h --- binutils-2.14.90.0.8/include/elf/frv.h 2004-01-14 13:07:51.000000000 -0800 +++ binutils-2.15.90.0.1/include/elf/frv.h 2004-03-03 12:24:34.000000000 -0800 @@ -91,6 +91,8 @@ END_RELOC_NUMBERS(R_FRV_max) #define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */ #define EF_FRV_CPU_FR400 0x05000000 /* FRV400 */ #define EF_FRV_CPU_FR550 0x06000000 /* FRV550 */ +#define EF_FRV_CPU_FR405 0x07000000 +#define EF_FRV_CPU_FR450 0x08000000 /* Mask of PIC related bits */ #define EF_FRV_PIC_FLAGS (EF_FRV_PIC | EF_FRV_LIBPIC | EF_FRV_BIGPIC \ diff -uprN binutils-2.14.90.0.8/include/elf/sh.h binutils-2.15.90.0.1/include/elf/sh.h --- binutils-2.14.90.0.8/include/elf/sh.h 2004-01-14 13:07:51.000000000 -0800 +++ binutils-2.15.90.0.1/include/elf/sh.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* SH ELF support for BFD. - Copyright 1998, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright 1998, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of BFD, the Binary File Descriptor library. @@ -39,6 +39,7 @@ #define EF_SH4_NOFPU 0x10 #define EF_SH4A_NOFPU 0x11 +#define EF_SH4_NOMMU_NOFPU 0x12 /* This one can only mix in objects from other EF_SH5 objects. */ #define EF_SH5 10 diff -uprN binutils-2.14.90.0.8/include/opcode/ChangeLog binutils-2.15.90.0.1/include/opcode/ChangeLog --- binutils-2.14.90.0.8/include/opcode/ChangeLog 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/include/opcode/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,7 @@ +2004-02-09 Anil Paranjpe + + * h8300.h (32bit ldc/stc): Add relaxing support. + 2004-01-12 Anil Paranjpe * h8300.h (BITOP): Pass MEMRELAX flag. diff -uprN binutils-2.14.90.0.8/include/opcode/h8300.h binutils-2.15.90.0.1/include/opcode/h8300.h --- binutils-2.14.90.0.8/include/opcode/h8300.h 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/include/opcode/h8300.h 2004-03-03 12:24:34.000000000 -0800 @@ -1434,8 +1434,9 @@ struct h8_opcode h8_opcodes[] = {O (O_LDC, SW), AV_H8S, 2, "ldc", {{DISP32SRC, EXR | DST, E}}, {{PREFIXLDC, 0x7, 0x8, B30 | DISPREG, 0x0, 0x6, 0xB, 0x2, IGNORE, SRC | DISP32LIST, E}}}, {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS16SRC, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC | ABS16LIST, E}}}, {O (O_LDC, SW), AV_H8S, 2, "ldc", {{ABS16SRC, EXR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x0, IGNORE, SRC | ABS16LIST, E}}}, - {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS32SRC, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x2, IGNORE, SRC | ABS32LIST, E}}}, - {O (O_LDC, SW), AV_H8S, 2, "ldc", {{ABS32SRC, EXR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x2, IGNORE, SRC | ABS32LIST, E}}}, + {O (O_LDC, SW), AV_H8H, 2, "ldc", {{ABS32SRC, CCR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x2, IGNORE, SRC | MEMRELAX | ABS32LIST, E}}}, + {O (O_LDC, SW), AV_H8S, 2, "ldc", {{ABS32SRC, EXR | DST, E}}, {{PREFIXLDC, 0x6, 0xB, 0x2, IGNORE, SRC | MEMRELAX | ABS32LIST, E}}}, + {O (O_LDC, SL), AV_H8SX, 0, "ldc", {{RS32, B30 | VBR_SBR | DST, E}}, {{0x0, 0x3, B30 | VBR_SBR | DST, RS32, E}}}, @@ -1809,8 +1810,8 @@ struct h8_opcode h8_opcodes[] = {O (O_STC, SW), AV_H8S, 2, "stc", {{EXR | SRC, DISP32DST, E}}, {{PREFIXSTC, 0x7, 0x8, B30 | DSTDISPREG, 0, 0x6, 0xB, 0xA, IGNORE, DSTDISP32LIST, E}}}, {O (O_STC, SW), AV_H8H, 2, "stc", {{CCR | SRC, ABS16DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0x8, IGNORE, DST | ABS16LIST, E}}}, {O (O_STC, SW), AV_H8S, 2, "stc", {{EXR | SRC, ABS16DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0x8, IGNORE, DST | ABS16LIST, E}}}, - {O (O_STC, SW), AV_H8H, 2, "stc", {{CCR | SRC, ABS32DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0xA, IGNORE, DST | ABS32LIST, E}}}, - {O (O_STC, SW), AV_H8S, 2, "stc", {{EXR | SRC, ABS32DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0xA, IGNORE, DST | ABS32LIST, E}}}, + {O (O_STC, SW), AV_H8H, 2, "stc", {{CCR | SRC, ABS32DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0xA, IGNORE, DST | MEMRELAX | ABS32LIST, E}}}, + {O (O_STC, SW), AV_H8S, 2, "stc", {{EXR | SRC, ABS32DST, E}}, {{PREFIXSTC, 0x6, 0xB, 0xA, IGNORE, DST | MEMRELAX | ABS32LIST, E}}}, {O (O_STC, SL), AV_H8SX, 0, "stc", {{B30 | VBR_SBR | SRC, RD32, E}}, {{0x0, 0x2, B30 | VBR_SBR | SRC, RD32, E}}}, diff -uprN binutils-2.14.90.0.8/install-sh binutils-2.15.90.0.1/install-sh --- binutils-2.14.90.0.8/install-sh 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/install-sh 2004-03-03 12:24:33.000000000 -0800 @@ -1,7 +1,8 @@ #!/bin/sh -# # install - install a program, script, or datafile -# + +scriptversion=2004-02-15.20 + # This originates from X11R5 (mit/util/scripts/install.sh), which was # later released in X11R6 (xc/config/util/install.sh) with the # following copyright and license. @@ -41,13 +42,11 @@ # from scratch. It can only install one file at a time, a restriction # shared with many OS's install programs. - # set DOITPROG to echo to test this script # Don't use :- since 4.3BSD and earlier shells don't like it. doit="${DOITPROG-}" - # put in absolute paths if you don't have them in your path; or use env. vars. mvprog="${MVPROG-mv}" @@ -59,236 +58,259 @@ stripprog="${STRIPPROG-strip}" rmprog="${RMPROG-rm}" mkdirprog="${MKDIRPROG-mkdir}" -transformbasename="" -transform_arg="" +transformbasename= +transform_arg= instcmd="$mvprog" chmodcmd="$chmodprog 0755" -chowncmd="" -chgrpcmd="" -stripcmd="" +chowncmd= +chgrpcmd= +stripcmd= rmcmd="$rmprog -f" mvcmd="$mvprog" -src="" -dst="" -dir_arg="" - -while [ x"$1" != x ]; do - case $1 in - -c) instcmd=$cpprog - shift - continue;; - - -d) dir_arg=true - shift - continue;; - - -m) chmodcmd="$chmodprog $2" - shift - shift - continue;; - - -o) chowncmd="$chownprog $2" - shift - shift - continue;; - - -g) chgrpcmd="$chgrpprog $2" - shift - shift - continue;; - - -s) stripcmd=$stripprog - shift - continue;; - - -t=*) transformarg=`echo $1 | sed 's/-t=//'` - shift - continue;; - - -b=*) transformbasename=`echo $1 | sed 's/-b=//'` - shift - continue;; - - *) if [ x"$src" = x ] - then - src=$1 - else - # this colon is to work around a 386BSD /bin/sh bug - : - dst=$1 - fi - shift - continue;; - esac +src= +dst= +dir_arg= + +usage="Usage: $0 [OPTION]... SRCFILE DSTFILE + or: $0 [OPTION]... SRCFILES... DIRECTORY + or: $0 -d DIRECTORIES... + +In the first form, install SRCFILE to DSTFILE, removing SRCFILE by default. +In the second, create the directory path DIR. + +Options: +-b=TRANSFORMBASENAME +-c copy source (using $cpprog) instead of moving (using $mvprog). +-d create directories instead of installing files. +-g GROUP $chgrp installed files to GROUP. +-m MODE $chmod installed files to MODE. +-o USER $chown installed files to USER. +-s strip installed files (using $stripprog). +-t=TRANSFORM +--help display this help and exit. +--version display version info and exit. + +Environment variables override the default commands: + CHGRPPROG CHMODPROG CHOWNPROG CPPROG MKDIRPROG MVPROG RMPROG STRIPPROG +" + +while test -n "$1"; do + case $1 in + -b=*) transformbasename=`echo $1 | sed 's/-b=//'` + shift + continue;; + + -c) instcmd=$cpprog + shift + continue;; + + -d) dir_arg=true + shift + continue;; + + -g) chgrpcmd="$chgrpprog $2" + shift + shift + continue;; + + --help) echo "$usage"; exit 0;; + + -m) chmodcmd="$chmodprog $2" + shift + shift + continue;; + + -o) chowncmd="$chownprog $2" + shift + shift + continue;; + + -s) stripcmd=$stripprog + shift + continue;; + + -t=*) transformarg=`echo $1 | sed 's/-t=//'` + shift + continue;; + + --version) echo "$0 $scriptversion"; exit 0;; + + *) # When -d is used, all remaining arguments are directories to create. + test -n "$dir_arg" && break + # Otherwise, the last argument is the destination. Remove it from $@. + for arg + do + if test -n "$dstarg"; then + # $@ is not empty: it contains at least $arg. + set fnord "$@" "$dstarg" + shift # fnord + fi + shift # arg + dstarg=$arg + done + break;; + esac done -if [ x"$src" = x ] -then - echo "$0: no input file specified" >&2 - exit 1 -else - : -fi - -if [ x"$dir_arg" != x ]; then - dst=$src - src="" - - if [ -d "$dst" ]; then - instcmd=: - chmodcmd="" - else - instcmd=$mkdirprog - fi -else - -# Waiting for this to be detected by the "$instcmd $src $dsttmp" command -# might cause directories to be created, which would be especially bad -# if $src (and thus $dsttmp) contains '*'. - - if [ -f "$src" ] || [ -d "$src" ] - then - : - else - echo "$0: $src does not exist" >&2 - exit 1 - fi - - if [ x"$dst" = x ] - then - echo "$0: no destination specified" >&2 - exit 1 - else - : - fi - -# If destination is a directory, append the input filename; if your system -# does not like double slashes in filenames, you may need to add some logic - - if [ -d "$dst" ] - then - dst=$dst/`basename "$src"` - else - : - fi +if test -z "$1"; then + if test -z "$dir_arg"; then + echo "$0: no input file specified." >&2 + exit 1 + fi + # It's OK to call `install-sh -d' without argument. + # This can happen when creating conditional directories. + exit 0 fi -## this sed command emulates the dirname command -dstdir=`echo "$dst" | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'` - -# Make sure that the destination directory exists. -# this part is taken from Noah Friedman's mkinstalldirs script - -# Skip lots of stat calls in the usual case. -if [ ! -d "$dstdir" ]; then -defaultIFS=' - ' -IFS="${IFS-$defaultIFS}" - -oIFS=$IFS -# Some sh's can't handle IFS=/ for some reason. -IFS='%' -set - `echo "$dstdir" | sed -e 's@/@%@g' -e 's@^%@/@'` -IFS=$oIFS - -pathcomp='' - -while [ $# -ne 0 ] ; do - pathcomp=$pathcomp$1 - shift - - if [ ! -d "$pathcomp" ] ; - then - $mkdirprog "$pathcomp" - else - : - fi +for src +do + # Protect names starting with `-'. + case $src in + -*) src=./$src ;; + esac + + if test -n "$dir_arg"; then + dst=$src + src= + + if test -d "$dst"; then + instcmd=: + chmodcmd= + else + instcmd=$mkdirprog + fi + else + # Waiting for this to be detected by the "$instcmd $src $dsttmp" command + # might cause directories to be created, which would be especially bad + # if $src (and thus $dsttmp) contains '*'. + if test ! -f "$src" && test ! -d "$src"; then + echo "$0: $src does not exist." >&2 + exit 1 + fi + + if test -z "$dstarg"; then + echo "$0: no destination specified." >&2 + exit 1 + fi + + dst=$dstarg + # Protect names starting with `-'. + case $dst in + -*) dst=./$dst ;; + esac - pathcomp=$pathcomp/ + # If destination is a directory, append the input filename; won't work + # if double slashes aren't ignored. + if test -d "$dst"; then + dst=$dst/`basename "$src"` + fi + fi + + # This sed command emulates the dirname command. + dstdir=`echo "$dst" | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'` + + # Make sure that the destination directory exists. + + # Skip lots of stat calls in the usual case. + if test ! -d "$dstdir"; then + defaultIFS=' + ' + IFS="${IFS-$defaultIFS}" + + oIFS=$IFS + # Some sh's can't handle IFS=/ for some reason. + IFS='%' + set - `echo "$dstdir" | sed -e 's@/@%@g' -e 's@^%@/@'` + IFS=$oIFS + + pathcomp= + + while test $# -ne 0 ; do + pathcomp=$pathcomp$1 + shift + if test ! -d "$pathcomp"; then + $mkdirprog "$pathcomp" || lasterr=$? + # mkdir can fail with a `File exist' error in case several + # install-sh are creating the directory concurrently. This + # is OK. + test ! -d "$pathcomp" && { (exit ${lasterr-1}); exit; } + fi + pathcomp=$pathcomp/ + done + fi + + if test -n "$dir_arg"; then + $doit $instcmd "$dst" \ + && { test -z "$chowncmd" || $doit $chowncmd "$dst"; } \ + && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } \ + && { test -z "$stripcmd" || $doit $stripcmd "$dst"; } \ + && { test -z "$chmodcmd" || $doit $chmodcmd "$dst"; } + + else + # If we're going to rename the final executable, determine the name now. + if test -z "$transformarg"; then + dstfile=`basename "$dst"` + else + dstfile=`basename "$dst" $transformbasename \ + | sed $transformarg`$transformbasename + fi + + # don't allow the sed command to completely eliminate the filename. + test -z "$dstfile" && dstfile=`basename "$dst"` + + # Make a couple of temp file names in the proper directory. + dsttmp=$dstdir/_inst.$$_ + rmtmp=$dstdir/_rm.$$_ + + # Trap to clean up those temp files at exit. + trap 'status=$?; rm -f "$dsttmp" "$rmtmp" && exit $status' 0 + trap '(exit $?); exit' 1 2 13 15 + + # Move or copy the file name to the temp name + $doit $instcmd "$src" "$dsttmp" && + + # and set any options; do chmod last to preserve setuid bits. + # + # If any of these fail, we abort the whole thing. If we want to + # ignore errors from any of these, just make sure not to ignore + # errors from the above "$doit $instcmd $src $dsttmp" command. + # + { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } \ + && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } \ + && { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } \ + && { test -z "$chmodcmd" || $doit $chmodcmd "$dsttmp"; } && + + # Now remove or move aside any old file at destination location. We + # try this two ways since rm can't unlink itself on some systems and + # the destination file might be busy for other reasons. In this case, + # the final cleanup might fail but the new file should still install + # successfully. + { + if test -f "$dstdir/$dstfile"; then + $doit $rmcmd -f "$dstdir/$dstfile" 2>/dev/null \ + || $doit $mvcmd -f "$dstdir/$dstfile" "$rmtmp" 2>/dev/null \ + || { + echo "$0: cannot unlink or rename $dstdir/$dstfile" >&2 + (exit 1); exit + } + else + : + fi + } && + + # Now rename the file to the real destination. + $doit $mvcmd "$dsttmp" "$dstdir/$dstfile" + fi || { (exit 1); exit; } done -fi - -if [ x"$dir_arg" != x ] -then - $doit $instcmd "$dst" && - - if [ x"$chowncmd" != x ]; then $doit $chowncmd "$dst"; else : ; fi && - if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd "$dst"; else : ; fi && - if [ x"$stripcmd" != x ]; then $doit $stripcmd "$dst"; else : ; fi && - if [ x"$chmodcmd" != x ]; then $doit $chmodcmd "$dst"; else : ; fi -else - -# If we're going to rename the final executable, determine the name now. - - if [ x"$transformarg" = x ] - then - dstfile=`basename "$dst"` - else - dstfile=`basename "$dst" $transformbasename | - sed $transformarg`$transformbasename - fi - -# don't allow the sed command to completely eliminate the filename - - if [ x"$dstfile" = x ] - then - dstfile=`basename "$dst"` - else - : - fi - -# Make a couple of temp file names in the proper directory. - - dsttmp=$dstdir/#inst.$$# - rmtmp=$dstdir/#rm.$$# - -# Trap to clean up temp files at exit. - - trap 'status=$?; rm -f "$dsttmp" "$rmtmp" && exit $status' 0 - trap '(exit $?); exit' 1 2 13 15 - -# Move or copy the file name to the temp name - - $doit $instcmd "$src" "$dsttmp" && - -# and set any options; do chmod last to preserve setuid bits - -# If any of these fail, we abort the whole thing. If we want to -# ignore errors from any of these, just make sure not to ignore -# errors from the above "$doit $instcmd $src $dsttmp" command. - - if [ x"$chowncmd" != x ]; then $doit $chowncmd "$dsttmp"; else :;fi && - if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd "$dsttmp"; else :;fi && - if [ x"$stripcmd" != x ]; then $doit $stripcmd "$dsttmp"; else :;fi && - if [ x"$chmodcmd" != x ]; then $doit $chmodcmd "$dsttmp"; else :;fi && - -# Now remove or move aside any old file at destination location. We try this -# two ways since rm can't unlink itself on some systems and the destination -# file might be busy for other reasons. In this case, the final cleanup -# might fail but the new file should still install successfully. - -{ - if [ -f "$dstdir/$dstfile" ] - then - $doit $rmcmd -f "$dstdir/$dstfile" 2>/dev/null || - $doit $mvcmd -f "$dstdir/$dstfile" "$rmtmp" 2>/dev/null || - { - echo "$0: cannot unlink or rename $dstdir/$dstfile" >&2 - (exit 1); exit - } - else - : - fi -} && - -# Now rename the file to the real destination. - - $doit $mvcmd "$dsttmp" "$dstdir/$dstfile" - -fi && # The final little trick to "correctly" pass the exit status to the exit trap. - { - (exit 0); exit + (exit 0); exit } + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" +# End: diff -uprN binutils-2.14.90.0.8/ld/ChangeLog binutils-2.15.90.0.1/ld/ChangeLog --- binutils-2.14.90.0.8/ld/ChangeLog 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,15 +1,116 @@ +2004-03-01 Andreas Schwab + + * ld.texinfo (Options): Fix example for --wrap. + +2004-02-25 Danny Smith + + * pe-dll.c (fill_edata): Check that exported_symbol_sections is + not NULL. + +2004-02-23 Ian Lance Taylor + + * ldlang.c (lang_check): Use %P, not %E, in error message. + +2004-02-23 Nathan Sidwell + + * ldlang.h (struct lang_output_section_state): Change processed + field's type. + * ldexp.c (check, invalid): Remove. + (fold_name): Move valid_p assignments. Create undefined symbol + when needed. Directly exampine section's processd flag. + * ldlang.c (lang_output_section_statement_lookup): Adjust + processed field init. + (lang_size_sections_1): Allow LOADADDR when determining section's + VMA. Adjust error message. Fold data statement's expr. + (lang_size_sections): Correctly increment lang_statement_iteration. + +2004-02-23 Alan Modra + + * ldexp.c (fold_tree): Follow indirect symbols. + +2004-02-20 Nathan Sidwell + + * ldgram.y (exp): Add two operand ALIGN. + * ldexp.c (fold_binary): Add ALIGN_K case. + * ld.texinfo (ALIGN): Document two operand version. + +2004-02-19 Nathan Sidwell + + * ldlang.c (map_input_to_output_sections): Initialize sections + mentioned in a data statement expression. + (lang_do_assignments_1): Add data statement's expression's + section's vma. + +2004-02-18 Nathan Sidwell + + * ldgram.y (statement_anywhere): Add assert rule. + * ldlang.c (exp_init_os): Add assert case. + +2004-02-14 Andrew Cagney + + * ldmain.c (remove_output): Call bfd_cache_close. + +2004-02-14 Richard Sandiford + + * emulparams/elf32bmipn32-defs.sh (OTHER_SECTIONS): Discard + .MIPS.content* and .MIPS.events* sections. + +2004-02-09 Daniel Jacobowitz + + * emulparams/armelf.sh, emulparams/armelf_linux.sh: Move + .note.gnu.arm.ident to after allocated sections. Mark its + address as 0. + +2004-02-09 Daniel Jacobowitz + + * emulparams/armelf_linux.sh (COMMONPAGESIZE): Set to 4KB. + * emulparams/elf32bmip.sh (COMMONPAGESIZE): Likewise. + * emulparams/elf32bmipn32.sh (COMMONPAGESIZE): Likewise. + * emulparams/elf32btsmipn32.sh (COMMONPAGESIZE): Likewise. + * emulparams/shlelf_linux.sh (COMMONPAGESIZE): Likewise. + +2004-02-05 Nick Clifton + + * emultempl/pe.em (_after_open): Fix typo in previous delta. + +2004-02-04 Danny Smith + + * emultempl/pe.em (_after_open): Fix thinko in 2003-12-18 patch. + +2004-01-28 Alan Modra + + * genscripts.sh: Fix typo. + + * genscripts.sh: Apply $LIBPATH_SUFFIX to $tool_lib and $libdir too. + +2004-01-24 Jakub Jelinek + + * emulparams/elf64_ia64.sh: Put .rela.opd into + OTHER_GOT_RELOC_SECTIONS instead of OTHER_PLT_RELOC_SECTIONS. + +2004-01-20 Danny Smith + + * pe-dll.c (pe_create_import_fixup): Clear WP_TEXT flag. + * ld.texinfo (--omagic): Note that writable text section + does not conform to published PE-COFF specs. + (--enable-auto-import): Likewise. + +2004-01-15 Alan Modra + + * emulparams/elf32ppc.sh (COMMONPAGESIZE): Define. + 2004-01-13 Nick Clifton * ldlang.c (lang_get_regions): Add extra parameter 'have_vma' which if true will prevent the LMA region being used as a replacement for a default VMA region. - (lang_leave_output_section_statement): Pass extra parameter. - (lang_leave_overlay): Likewise. - * ld.texinfo (Output Section LMA): Document that the LMA + (lang_leave_output_section_statement): Pass extra parameter. + (lang_leave_overlay): Likewise. + * ld.texinfo (Output Section LMA): Document that the LMA region can be set to the VMA region if no VMA has been set. * ldlang.h (struct lang_output_section_phdr_list): Create a typedef for this type. Minor formatting fixes. - + 2004-01-13 Nick Clifton * ldlang.c (lang_size_sections_1): If dot is advanced, then diff -uprN binutils-2.14.90.0.8/ld/emulparams/armelf.sh binutils-2.15.90.0.1/ld/emulparams/armelf.sh --- binutils-2.14.90.0.8/ld/emulparams/armelf.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/armelf.sh 2004-03-03 12:24:34.000000000 -0800 @@ -7,9 +7,9 @@ TEXT_START_ADDR=0x8000 TEMPLATE_NAME=elf32 EXTRA_EM_FILE=armelf OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)' -OTHER_READONLY_SECTIONS='.note.gnu.arm.ident : { KEEP (*(.note.gnu.arm.ident)) }' OTHER_BSS_SYMBOLS='__bss_start__ = .;' OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;' +OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }' DATA_START_SYMBOLS='__data_start = . ;'; diff -uprN binutils-2.14.90.0.8/ld/emulparams/armelf_linux.sh binutils-2.15.90.0.1/ld/emulparams/armelf_linux.sh --- binutils-2.14.90.0.8/ld/emulparams/armelf_linux.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/armelf_linux.sh 2004-03-03 12:24:34.000000000 -0800 @@ -4,15 +4,16 @@ OUTPUT_FORMAT="elf32-littlearm" BIG_OUTPUT_FORMAT="elf32-bigarm" LITTLE_OUTPUT_FORMAT="elf32-littlearm" MAXPAGESIZE=0x8000 +COMMONPAGESIZE=0x1000 TEMPLATE_NAME=elf32 EXTRA_EM_FILE=armelf GENERATE_SHLIB_SCRIPT=yes DATA_START_SYMBOLS='__data_start = . ;'; OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)' -OTHER_READONLY_SECTIONS='.note.gnu.arm.ident : { KEEP (*(.note.gnu.arm.ident)) }' OTHER_BSS_SYMBOLS='__bss_start__ = .;' OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;' +OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }' TEXT_START_ADDR=0x00008000 diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf32bmip.sh binutils-2.15.90.0.1/ld/emulparams/elf32bmip.sh --- binutils-2.14.90.0.8/ld/emulparams/elf32bmip.sh 2002-02-03 11:22:32.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf32bmip.sh 2004-03-03 12:24:34.000000000 -0800 @@ -8,6 +8,7 @@ LITTLE_OUTPUT_FORMAT="elf32-littlemips" TEXT_START_ADDR=0x0400000 test -n "${EMBEDDED}" || DATA_ADDR=0x10000000 MAXPAGESIZE=0x40000 +COMMONPAGESIZE=0x1000 NONPAGED_TEXT_START_ADDR=0x0400000 SHLIB_TEXT_START_ADDR=0x5ffe0000 test -n "${EMBEDDED}" || TEXT_DYNAMIC= diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf32bmipn32-defs.sh binutils-2.15.90.0.1/ld/emulparams/elf32bmipn32-defs.sh --- binutils-2.14.90.0.8/ld/emulparams/elf32bmipn32-defs.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf32bmipn32-defs.sh 2004-03-03 12:24:34.000000000 -0800 @@ -51,30 +51,8 @@ DATA_START_SYMBOLS='_fdata = . ;' OTHER_BSS_SYMBOLS='_fbss = .;' INITIAL_READONLY_SECTIONS=".MIPS.options : { *(.MIPS.options) }" -OTHER_SECTIONS=" - .MIPS.events.text ${RELOCATING-0} : - { - *(.MIPS.events.text${RELOCATING+ .MIPS.events.gnu.linkonce.t*}) - } - .MIPS.content.text ${RELOCATING-0} : - { - *(.MIPS.content.text${RELOCATING+ .MIPS.content.gnu.linkonce.t*}) - } - .MIPS.events.data ${RELOCATING-0} : - { - *(.MIPS.events.data${RELOCATING+ .MIPS.events.gnu.linkonce.d*}) - } - .MIPS.content.data ${RELOCATING-0} : - { - *(.MIPS.content.data${RELOCATING+ .MIPS.content.gnu.linkonce.d*}) - } - .MIPS.events.rodata ${RELOCATING-0} : - { - *(.MIPS.events.rodata${RELOCATING+ .MIPS.events.gnu.linkonce.r*}) - } - .MIPS.content.rodata ${RELOCATING-0} : - { - *(.MIPS.content.rodata${RELOCATING+ .MIPS.content.gnu.linkonce.r*}) - }" +# Discard any .MIPS.content* or .MIPS.events* sections. The linker +# doesn't know how to adjust them. +OTHER_SECTIONS="/DISCARD/ : { *(.MIPS.content*) *(.MIPS.events*) }" TEXT_DYNAMIC= diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf32bmipn32.sh binutils-2.15.90.0.1/ld/emulparams/elf32bmipn32.sh --- binutils-2.14.90.0.8/ld/emulparams/elf32bmipn32.sh 2002-10-29 20:09:13.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf32bmipn32.sh 2004-03-03 12:24:34.000000000 -0800 @@ -3,6 +3,7 @@ OUTPUT_FORMAT="elf32-nbigmips" BIG_OUTPUT_FORMAT="elf32-nbigmips" LITTLE_OUTPUT_FORMAT="elf32-nlittlemips" SHLIB_TEXT_START_ADDR=0x5ffe0000 +COMMONPAGESIZE=0x1000 # IRIX6 defines these symbols. 0x34 is the size of the ELF header. EXECUTABLE_SYMBOLS=" diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf32btsmipn32.sh binutils-2.15.90.0.1/ld/emulparams/elf32btsmipn32.sh --- binutils-2.14.90.0.8/ld/emulparams/elf32btsmipn32.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf32btsmipn32.sh 2004-03-03 12:24:34.000000000 -0800 @@ -5,6 +5,7 @@ OUTPUT_FORMAT="elf32-ntradbigmips" BIG_OUTPUT_FORMAT="elf32-ntradbigmips" LITTLE_OUTPUT_FORMAT="elf32-ntradlittlemips" +COMMONPAGESIZE=0x1000 # Magic sections. OTHER_TEXT_SECTIONS='*(.mips16.fn.*) *(.mips16.call.*)' diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf32ppc.sh binutils-2.15.90.0.1/ld/emulparams/elf32ppc.sh --- binutils-2.14.90.0.8/ld/emulparams/elf32ppc.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf32ppc.sh 2004-03-03 12:24:34.000000000 -0800 @@ -9,6 +9,7 @@ SCRIPT_NAME=elf OUTPUT_FORMAT="elf32-powerpc" TEXT_START_ADDR=0x01800000 MAXPAGESIZE=0x10000 +COMMONPAGESIZE=0x1000 ARCH=powerpc:common MACHINE= BSS_PLT= diff -uprN binutils-2.14.90.0.8/ld/emulparams/elf64_ia64.sh binutils-2.15.90.0.1/ld/emulparams/elf64_ia64.sh --- binutils-2.14.90.0.8/ld/emulparams/elf64_ia64.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/elf64_ia64.sh 2004-03-03 12:24:34.000000000 -0800 @@ -28,7 +28,7 @@ test -z "$CREATE_PIE" && OTHER_READONLY_ .opd ${RELOCATING-0} : { *(.opd) }" test -n "$CREATE_PIE" && OTHER_READWRITE_SECTIONS=" .opd ${RELOCATING-0} : { *(.opd) }" -test -n "$CREATE_PIE" && OTHER_PLT_RELOC_SECTIONS="${OTHER_PLT_RELOC_SECTIONS} +test -n "$CREATE_PIE" && OTHER_GOT_RELOC_SECTIONS=" .rela.opd ${RELOCATING-0} : { *(.rela.opd) }" OTHER_READONLY_SECTIONS="${OTHER_READONLY_SECTIONS} .IA_64.unwind_info ${RELOCATING-0} : { *(.IA_64.unwind_info${RELOCATING+* .gnu.linkonce.ia64unwi.*}) } diff -uprN binutils-2.14.90.0.8/ld/emulparams/shlelf_linux.sh binutils-2.15.90.0.1/ld/emulparams/shlelf_linux.sh --- binutils-2.14.90.0.8/ld/emulparams/shlelf_linux.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emulparams/shlelf_linux.sh 2004-03-03 12:24:34.000000000 -0800 @@ -5,6 +5,7 @@ SCRIPT_NAME=elf OUTPUT_FORMAT="elf32-sh-linux" TEXT_START_ADDR=0x400000 MAXPAGESIZE=0x10000 +COMMONPAGESIZE=0x1000 ARCH=sh MACHINE= TEMPLATE_NAME=elf32 diff -uprN binutils-2.14.90.0.8/ld/emultempl/pe.em binutils-2.15.90.0.1/ld/emultempl/pe.em --- binutils-2.14.90.0.8/ld/emultempl/pe.em 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/emultempl/pe.em 2004-03-03 12:24:34.000000000 -0800 @@ -1139,8 +1139,8 @@ gld_${EMULATION_NAME}_after_open (void) extension, and use that for the remainder of the comparisons. */ pnt = strrchr (is3->the_bfd->filename, '.'); - if (pnt != NULL && strcmp (pnt, ".dll") != 0) - continue; + if (pnt != NULL && strcmp (pnt, ".dll") == 0) + break; } if (is3 == NULL) diff -uprN binutils-2.14.90.0.8/ld/genscripts.sh binutils-2.15.90.0.1/ld/genscripts.sh --- binutils-2.14.90.0.8/ld/genscripts.sh 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/genscripts.sh 2004-03-03 12:24:34.000000000 -0800 @@ -128,10 +128,20 @@ fi if [ "x${LIB_PATH}" = "x" ] && [ "x${USE_LIBPATH}" = xyes ] ; then LIB_PATH2= - if [ x"$use_sysroot" != xyes ] ; then - LIB_PATH2=${libdir} + + libs=${NATIVE_LIB_DIRS} + if [ "x${use_sysroot}" != "xyes" ] ; then + case " ${libs} " in + *" ${libdir} "*) ;; + *) libs="${libdir} ${libs}" ;; + esac + case " ${libs} " in + *" ${tool_lib} "*) ;; + *) libs="${tool_lib} ${libs}" ;; + esac fi - for lib in ${NATIVE_LIB_DIRS}; do + + for lib in ${libs}; do # The "=" is harmless if we aren't using a sysroot, but also needless. if [ "x${use_sysroot}" = "xyes" ] ; then lib="=${lib}" @@ -161,13 +171,13 @@ if [ "x${LIB_PATH}" = "x" ] && [ "x${USE esac fi done + case :${LIB_PATH}:${LIB_PATH2}: in *:: | ::*) LIB_PATH=${LIB_PATH}${LIB_PATH2} ;; *) LIB_PATH=${LIB_PATH}:${LIB_PATH2} ;; esac fi - # Always search $(tooldir)/lib, aka /usr/local/TARGET/lib, except for # sysrooted configurations and when LIBPATH=":". if [ "x${use_sysroot}" != "xyes" ] ; then diff -uprN binutils-2.14.90.0.8/ld/ld.texinfo binutils-2.15.90.0.1/ld/ld.texinfo --- binutils-2.14.90.0.8/ld/ld.texinfo 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ld.texinfo 2004-03-03 12:24:34.000000000 -0800 @@ -687,7 +687,9 @@ Turn off page alignment of sections, and Set the text and data sections to be readable and writable. Also, do not page-align the data segment, and disable linking against shared libraries. If the output format supports Unix style magic numbers, -mark the output as @code{OMAGIC}. +mark the output as @code{OMAGIC}. Note: Although a writable text section +is allowed for PE-COFF targets, it does not conform to the format +specification published by Microsoft. @kindex --no-omagic @cindex OMAGIC @@ -1700,9 +1702,9 @@ Here is a trivial example: @smallexample void * -__wrap_malloc (int c) +__wrap_malloc (size_t c) @{ - printf ("malloc called with %ld\n", c); + printf ("malloc called with %zu\n", c); return __real_malloc (c); @} @end smallexample @@ -1950,8 +1952,13 @@ uwin, pw, etc. For instance, cygwin DLL @item --enable-auto-import Do sophisticated linking of @code{_symbol} to @code{__imp__symbol} for DATA imports from DLLs, and create the necessary thunking symbols when -building the import libraries with those DATA exports. This generally -will 'just work' -- but sometimes you may see this message: +building the import libraries with those DATA exports. Note: Use of the +'auto-import' extension will cause the text section of the image file +to be made writable. This does not conform to the PE-COFF format +specification published by Microsoft. + +Using 'auto-import' generally will 'just work' -- but sometimes you may +see this message: "variable '' can't be auto-imported. Please read the documentation for ld's @code{--enable-auto-import} for details." @@ -4376,17 +4383,25 @@ SECTIONS @{ @dots{} @end group @end smallexample -@item ALIGN(@var{exp}) -@kindex ALIGN(@var{exp}) +@item ALIGN(@var{align}) +@itemx ALIGN(@var{exp},@var{align}) +@kindex ALIGN(@var{align}) +@kindex ALIGN(@var{exp},@var{align}) @cindex round up location counter @cindex align location counter -Return the location counter (@code{.}) aligned to the next @var{exp} -boundary. -@code{ALIGN} doesn't change the value of the location counter---it just -does arithmetic on it. Here is an example which aligns the output -@code{.data} section to the next @code{0x2000} byte boundary after the -preceding section and sets a variable within the section to the next -@code{0x8000} boundary after the input sections: +@cindex round up expression +@cindex align expression +Return the location counter (@code{.}) or arbitrary expression aligned +to the next @var{align} boundary. The single operand @code{ALIGN} +doesn't change the value of the location counter---it just does +arithmetic on it. The two operand @code{ALIGN} allows an arbitrary +expression to be aligned upwards (@code{ALIGN(@var{align})} is +equivalent to @code{ALIGN(., @var{align})}). + +Here is an example which aligns the output @code{.data} section to the +next @code{0x2000} byte boundary after the preceding section and sets a +variable within the section to the next @code{0x8000} boundary after the +input sections: @smallexample @group SECTIONS @{ @dots{} diff -uprN binutils-2.14.90.0.8/ld/ldexp.c binutils-2.15.90.0.1/ld/ldexp.c --- binutils-2.14.90.0.8/ld/ldexp.c 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ldexp.c 2004-03-03 12:24:34.000000000 -0800 @@ -141,17 +141,6 @@ new_abs (bfd_vma value) return new; } -static void -check (lang_output_section_statement_type *os, - const char *name, - const char *op) -{ - if (os == NULL) - einfo (_("%F%P: %s uses undefined section %s\n"), op, name); - if (! os->processed) - einfo (_("%F%P: %s forward reference of section %s\n"), op, name); -} - etree_type * exp_intop (bfd_vma value) { @@ -394,6 +383,10 @@ fold_binary (etree_type *tree, result = other; break; + case ALIGN_K: + result.value = align_n (result.value, other.value); + break; + case DATA_SEGMENT_ALIGN: if (allocation_done != lang_first_phase_enum && current_section == abs_output_section @@ -456,14 +449,6 @@ fold_trinary (etree_type *tree, return result; } -etree_value_type -invalid (void) -{ - etree_value_type new; - new.valid_p = FALSE; - return new; -} - static etree_value_type fold_name (etree_type *tree, lang_output_section_statement_type *current_section, @@ -472,25 +457,18 @@ fold_name (etree_type *tree, { etree_value_type result; + result.valid_p = FALSE; + switch (tree->type.node_code) { case SIZEOF_HEADERS: if (allocation_done != lang_first_phase_enum) - { - result = new_abs (bfd_sizeof_headers (output_bfd, - link_info.relocatable)); - } - else - { - result.valid_p = FALSE; - } + result = new_abs (bfd_sizeof_headers (output_bfd, + link_info.relocatable)); break; case DEFINED: if (allocation_done == lang_first_phase_enum) - { - lang_track_definedness (tree->name.name); - result.valid_p = FALSE; - } + lang_track_definedness (tree->name.name); else { struct bfd_link_hash_entry *h; @@ -511,13 +489,10 @@ fold_name (etree_type *tree, } break; case NAME: - result.valid_p = FALSE; if (tree->name.name[0] == '.' && tree->name.name[1] == 0) { if (allocation_done != lang_first_phase_enum) result = new_rel_from_section (dot, current_section); - else - result = invalid (); } else if (allocation_done != lang_first_phase_enum) { @@ -525,10 +500,11 @@ fold_name (etree_type *tree, h = bfd_wrapped_link_hash_lookup (output_bfd, &link_info, tree->name.name, - FALSE, FALSE, TRUE); - if (h != NULL - && (h->type == bfd_link_hash_defined - || h->type == bfd_link_hash_defweak)) + TRUE, FALSE, TRUE); + if (!h) + einfo (_("%P%F: bfd_link_hash_lookup failed: %E\n")); + else if (h->type == bfd_link_hash_defined + || h->type == bfd_link_hash_defweak) { if (bfd_is_abs_section (h->u.def.section)) result = new_abs (h->u.def.value); @@ -561,6 +537,12 @@ fold_name (etree_type *tree, else if (allocation_done == lang_final_phase_enum) einfo (_("%F%S: undefined symbol `%s' referenced in expression\n"), tree->name.name); + else if (h->type == bfd_link_hash_new) + { + h->type = bfd_link_hash_undefined; + h->u.undef.abfd = NULL; + bfd_link_add_undef (link_info.hash, h); + } } break; @@ -570,11 +552,9 @@ fold_name (etree_type *tree, lang_output_section_statement_type *os; os = lang_output_section_find (tree->name.name); - check (os, tree->name.name, "ADDR"); - result = new_rel (0, NULL, os); + if (os && os->processed > 0) + result = new_rel (0, NULL, os); } - else - result = invalid (); break; case LOADADDR: @@ -583,16 +563,16 @@ fold_name (etree_type *tree, lang_output_section_statement_type *os; os = lang_output_section_find (tree->name.name); - check (os, tree->name.name, "LOADADDR"); - if (os->load_base == NULL) - result = new_rel (0, NULL, os); - else - result = exp_fold_tree_no_dot (os->load_base, - abs_output_section, - allocation_done); + if (os && os->processed != 0) + { + if (os->load_base == NULL) + result = new_rel (0, NULL, os); + else + result = exp_fold_tree_no_dot (os->load_base, + abs_output_section, + allocation_done); + } } - else - result = invalid (); break; case SIZEOF: @@ -602,11 +582,9 @@ fold_name (etree_type *tree, lang_output_section_statement_type *os; os = lang_output_section_find (tree->name.name); - check (os, tree->name.name, "SIZEOF"); - result = new_abs (os->bfd_section->_raw_size / opb); + if (os && os->processed > 0) + result = new_abs (os->bfd_section->_raw_size / opb); } - else - result = invalid (); break; default: @@ -729,14 +707,15 @@ exp_fold_tree (etree_type *tree, else create = FALSE; h = bfd_link_hash_lookup (link_info.hash, tree->assign.dst, - create, FALSE, FALSE); + create, FALSE, TRUE); if (h == NULL) { - if (tree->type.node_class == etree_assign) + if (create) einfo (_("%P%F:%s: hash creation failed\n"), tree->assign.dst); } else if (tree->type.node_class == etree_provide + && h->type != bfd_link_hash_new && h->type != bfd_link_hash_undefined && h->type != bfd_link_hash_common) { diff -uprN binutils-2.14.90.0.8/ld/ldgram.y binutils-2.15.90.0.1/ld/ldgram.y --- binutils-2.14.90.0.8/ld/ldgram.y 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ldgram.y 2004-03-03 12:24:34.000000000 -0800 @@ -386,6 +386,9 @@ statement_anywhere: ENTRY '(' NAME ')' { lang_add_entry ($3, FALSE); } | assignment end + | ASSERT_K {ldlex_expression ();} '(' exp ',' NAME ')' + { ldlex_popstate (); + lang_add_assignment (exp_assert ($4, $6)); } ; /* The '*' and '?' cases are there because the lexer returns them as @@ -801,6 +804,8 @@ exp : { $$ = exp_unop(ABSOLUTE, $3); } | ALIGN_K '(' exp ')' { $$ = exp_unop(ALIGN_K,$3); } + | ALIGN_K '(' exp ',' exp ')' + { $$ = exp_binop(ALIGN_K,$3,$5); } | DATA_SEGMENT_ALIGN '(' exp ',' exp ')' { $$ = exp_binop (DATA_SEGMENT_ALIGN, $3, $5); } | DATA_SEGMENT_END '(' exp ')' diff -uprN binutils-2.14.90.0.8/ld/ldlang.c binutils-2.15.90.0.1/ld/ldlang.c --- binutils-2.14.90.0.8/ld/ldlang.c 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ldlang.c 2004-03-03 12:24:34.000000000 -0800 @@ -622,7 +622,7 @@ lang_output_section_statement_lookup (co lookup->next = NULL; lookup->bfd_section = NULL; - lookup->processed = FALSE; + lookup->processed = 0; lookup->sectype = normal_section; lookup->addr_tree = NULL; lang_list_init (&lookup->children); @@ -775,6 +775,10 @@ exp_init_os (etree_type *exp) exp_init_os (exp->trinary.rhs); break; + case etree_assert: + exp_init_os (exp->assert_s.child); + break; + case etree_unary: exp_init_os (exp->unary.child); break; @@ -2094,10 +2098,14 @@ map_input_to_output_sections target, output_section_statement); break; + case lang_data_statement_enum: + /* Make sure that any sections mentioned in the expression + are initialized. */ + exp_init_os (s->data_statement.exp); + /* FALLTHROUGH */ case lang_fill_statement_enum: case lang_input_section_enum: case lang_object_symbols_statement_enum: - case lang_data_statement_enum: case lang_reloc_statement_enum: case lang_padding_statement_enum: case lang_input_statement_enum: @@ -2976,12 +2984,15 @@ lang_size_sections_1 { etree_value_type r; + os->processed = -1; r = exp_fold_tree (os->addr_tree, abs_output_section, lang_allocating_phase_enum, dot, &dot); + os->processed = 0; + if (!r.valid_p) - einfo (_("%F%S: non constant address expression for section %s\n"), + einfo (_("%F%S: non constant or forward reference address expression for section %s\n"), os->name); dot = r.value + r.section->bfd_section->vma; @@ -3019,7 +3030,7 @@ lang_size_sections_1 = TO_SIZE (after - os->bfd_section->vma); dot = os->bfd_section->vma + TO_ADDR (os->bfd_section->_raw_size); - os->processed = TRUE; + os->processed = 1; if (os->update_dot_tree != 0) exp_fold_tree (os->update_dot_tree, abs_output_section, @@ -3081,6 +3092,11 @@ lang_size_sections_1 s->data_statement.output_section = output_section_statement->bfd_section; + /* We might refer to provided symbols in the expression, and + need to mark them as needed. */ + exp_fold_tree (s->data_statement.exp, abs_output_section, + lang_allocating_phase_enum, dot, &dot); + switch (s->data_statement.type) { default: @@ -3286,6 +3302,7 @@ lang_size_sections && first + last <= exp_data_seg.pagesize) { exp_data_seg.phase = exp_dataseg_adjust; + lang_statement_iteration++; result = lang_size_sections_1 (s, output_section_statement, prev, fill, dot, relax, check_regions); } @@ -3371,9 +3388,10 @@ lang_do_assignments_1 value = exp_fold_tree (s->data_statement.exp, abs_output_section, lang_final_phase_enum, dot, &dot); - s->data_statement.value = value.value; if (!value.valid_p) einfo (_("%F%P: invalid data statement\n")); + s->data_statement.value + = value.value + value.section->bfd_section->vma; } { unsigned int size; @@ -3668,7 +3686,7 @@ lang_check (void) if (! bfd_merge_private_bfd_data (input_bfd, output_bfd)) { if (command_line.warn_mismatch) - einfo (_("%E%X: failed to merge target specific data of file %B\n"), + einfo (_("%P%X: failed to merge target specific data of file %B\n"), input_bfd); } if (! command_line.warn_mismatch) diff -uprN binutils-2.14.90.0.8/ld/ldlang.h binutils-2.15.90.0.1/ld/ldlang.h --- binutils-2.14.90.0.8/ld/ldlang.h 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ldlang.h 2004-03-03 12:24:34.000000000 -0800 @@ -134,7 +134,7 @@ typedef struct lang_output_section_state union lang_statement_union *next; const char *name; - bfd_boolean processed; + int processed; asection *bfd_section; flagword flags; /* Or together of all input sections. */ diff -uprN binutils-2.14.90.0.8/ld/ldmain.c binutils-2.15.90.0.1/ld/ldmain.c --- binutils-2.14.90.0.8/ld/ldmain.c 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/ldmain.c 2004-03-03 12:24:34.000000000 -0800 @@ -159,8 +159,8 @@ remove_output (void) { if (output_filename) { - if (output_bfd && output_bfd->iostream) - fclose ((FILE *) (output_bfd->iostream)); + if (output_bfd) + bfd_cache_close (output_bfd); if (delete_output_file_on_failure) unlink (output_filename); } diff -uprN binutils-2.14.90.0.8/ld/pe-dll.c binutils-2.15.90.0.1/ld/pe-dll.c --- binutils-2.14.90.0.8/ld/pe-dll.c 2004-01-14 13:07:52.000000000 -0800 +++ binutils-2.15.90.0.1/ld/pe-dll.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,6 @@ /* Routines to help build PEI-format DLLs (Win32 etc) - Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004 + Free Software Foundation, Inc. Written by DJ Delorie This file is part of GLD, the Gnu Linker. @@ -965,9 +966,9 @@ fill_edata (bfd *abfd, struct bfd_link_i hint = 0; for (s = 0; s < NE; s++) { - if (pe_def_file->exports[s].ordinal != -1) + struct bfd_section *ssec = exported_symbol_sections[s]; + if (ssec && pe_def_file->exports[s].ordinal != -1) { - struct bfd_section *ssec = exported_symbol_sections[s]; unsigned long srva = (exported_symbol_offsets[s] + ssec->output_section->vma + ssec->output_offset); @@ -2176,6 +2177,7 @@ pe_create_import_fixup (arelent *rel, as /* If we ever use autoimport, we have to cast text section writable. */ config.text_read_only = FALSE; + output_bfd->flags &= ~WP_TEXT; } if (addend == 0 || link_info.pei386_runtime_pseudo_reloc) diff -uprN binutils-2.14.90.0.8/ld/testsuite/ChangeLog binutils-2.15.90.0.1/ld/testsuite/ChangeLog --- binutils-2.14.90.0.8/ld/testsuite/ChangeLog 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,73 @@ +2004-03-01 Richard Sandiford + + * ld-frv/fr450-link[abc].s, fr450-link.d: New test. + * ld-frv/frv.exp: New harness. + +2004-02-24 Alexandre Oliva + + * ld-frv/fdpic-pie-2.d: Adjust for decay of FUNCDESC relocs that + bind locally. + * ld-frv/fdpic-pie-8.d: Likewise. + * ld-frv/fdpic-shared-4.d: Likewise. + * ld-frv/fdpic-pie-6-fail.d: Renamed from... + * ld-frv/fdpic-pie-6.d: New test. + * ld-frv/fdpic-shared-6-fail.d: Renamed from... + * ld-frv/fdpic-shared-6.d: New test. + * ld-frv/fdpic6.ldv: New. + * ld-frv/fdpic-static-6.d: Adjust test name. + * ld-frv/fdpic-pie-8-fail.d: Removed. + * ld-frv/fdpic.exp: Run new tests. + +2004-02-23 Nathan Sidwell + + * ld-scripts/provide.exp: New. + * ld-scripts/provide-{1,2,3}.{s,t,d}.exp: New. + +2004-02-23 Alan Modra + + * ld-scripts/data.t: Set ".other" address so location doesn't + depend on target alignment. + * ld-scripts/data.d: Update. + +2004-02-20 Nathan Sidwell + + * ld-scripts/align.{s,t,exp}: New. + +2004-02-19 Nathan Sidwell + + * ld-scripts/data.{s,t,d,exp}: New. + +2004-02-18 Nathan Sidwell + + * ld-scripts/assert.{s,t,exp}: New. + +2004-02-17 Richard Sandiford + + * ld-mips/elf/elf-rel-xgot-{n32,n64-linux}.d: Update after 2004-02-02 + changes to the way large constants are added. + * ld-mips/elf/elf-rel-got-{n32,n64-linux}.d: Likewise. Adjust order + of GOT entries after today's change to the handling of GOT_PAGE + relocations. + +2004-02-09 Anil Paranjpe + + * ld-h8300/relax-5.s: New file: Source for relax-5 test. + * ld-h8300/relax-5.d: New file: Expected output and commands for + assembling and linking the relax-5 test. + * ld-h8300/relax-5-coff.d: New file: Variant for the COFF based + toolchain. + * ld-h8300/h8300-exp: Run the relax-5 test. + +2004-01-23 Daniel Jacobowitz + + * ld-arm/arm-app-abs32.s, ld-arm/arm-app-abs32.r, + ld-arm/arm-app-abs32.d: New files. + * ld-arm/arm-elf.exp: Add arm-app-abs32 testcase. + +2004-01-19 Alan Modra + + * ld-i386/tlsbin.dd: Adjust for changed sib printing. + 2004-01-13 Daniel Jacobowitz * ld-arm/arm-elf.exp: Add arm-static-app test. diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.d binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.d --- binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,29 @@ + +tmpdir/arm-app-abs32: file format elf32-littlearm +architecture: arm, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address .* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 str lr, \[sp, #-4\]! + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.plt\+0x10> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* .* + .*: e28fc6.* add ip, pc, #.* ; .* + .*: e28cca.* add ip, ip, #.* ; .* + .*: e5bcf.* ldr pc, \[ip, #.*\]! +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14> + .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: .* .* + +.* : + .*: e12fff1e bx lr diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.r binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.r --- binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.r 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.r 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ + +tmpdir/arm-app-abs32: file format elf32-littlearm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT lib_func1 + + diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.s binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.s --- binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-app-abs32.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-app-abs32.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,16 @@ + .text + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + ldr a1, .Lval + ldmia sp, {r11, sp, lr} + bx lr + +.Lval: + .long lib_func1 + + .globl app_func2 +app_func2: + bx lr + diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-elf.exp binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-elf.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-arm/arm-elf.exp 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-arm/arm-elf.exp 2004-03-03 12:24:34.000000000 -0800 @@ -44,6 +44,9 @@ set armelftests { {"Simple static application" "" "" {arm-static-app.s} {{objdump -fdw arm-static-app.d} {objdump -rw arm-static-app.r}} "arm-static-app"} + {"Non-pcrel function reference" "tmpdir/arm-lib.so" "" {arm-app-abs32.s} + {{objdump -fdw arm-app-abs32.d} {objdump -Rw arm-app-abs32.r}} + "arm-app-abs32"} } run_ld_link_tests $armelftests diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-2.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-2.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-2.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-2.d 2004-03-03 12:24:34.000000000 -0800 @@ -37,8 +37,8 @@ Disassembly of section \.data: 10630: R_FRV_32 \.data 00010634 : - 10634: 00 00 00 00 add\.p gr0,gr0,gr0 - 10634: R_FRV_FUNCDESC GFb + 10634: 00 00 00 04 add\.p gr0,gr4,gr0 + 10634: R_FRV_FUNCDESC \.text 10638: 00 00 00 04 add\.p gr0,gr4,gr0 10638: R_FRV_32 \.text Disassembly of section \.got: @@ -56,12 +56,14 @@ Disassembly of section \.got: 000106d0 <_GLOBAL_OFFSET_TABLE_>: \.\.\. - 106dc: R_FRV_FUNCDESC GF4 + 106dc: 00 00 00 04 add\.p gr0,gr4,gr0 + 106dc: R_FRV_FUNCDESC \.text 106e0: 00 00 00 04 add\.p gr0,gr4,gr0 106e0: R_FRV_32 \.text - \.\.\. - 106e4: R_FRV_FUNCDESC GF6 - 106e8: R_FRV_FUNCDESC GF5 + 106e4: 00 00 00 04 add\.p gr0,gr4,gr0 + 106e4: R_FRV_FUNCDESC \.text + 106e8: 00 00 00 04 add\.p gr0,gr4,gr0 + 106e8: R_FRV_FUNCDESC \.text 106ec: 00 00 00 04 add\.p gr0,gr4,gr0 106ec: R_FRV_32 \.data 106f0: 00 00 00 04 add\.p gr0,gr4,gr0 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-6-fail.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-6-fail.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-6-fail.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-6-fail.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,6 @@ +#name: FRV uClinux PIC relocs to undefined symbols, pie linking +#source: fdpic6.s +#objdump: -DR -j .text -j .data -j .got -j .plt +#as: -mfdpic +#ld: -pie +#error: different segments diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-6.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-6.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-6.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-6.d 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,74 @@ -#name: FRV uClinux PIC relocs to undefined symbols, pie linking +#name: FRV uClinux PIC relocs to weak undefined symbols, pie linking #source: fdpic6.s #objdump: -DR -j .text -j .data -j .got -j .plt #as: -mfdpic -#ld: -pie -#error: different segments +#ld: -pie --defsym WD1=D6 + +.*: file format elf.*frv.* + +Disassembly of section \.plt: + +000005a8 <\.plt>: + 5a8: 00 00 00 08 add\.p gr0,gr8,gr0 + 5ac: c0 1a 00 06 bra 5c4 + 5b0: 00 00 00 00 add\.p gr0,gr0,gr0 + 5b4: c0 1a 00 04 bra 5c4 + 5b8: 00 00 00 10 add\.p gr0,gr16,gr0 + 5bc: c0 1a 00 02 bra 5c4 + 5c0: 00 00 00 18 add\.p gr0,gr24,gr0 + 5c4: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + 5c8: 80 30 40 00 jmpl @\(gr4,gr0\) + 5cc: 9c cc ff f0 lddi @\(gr15,-16\),gr14 + 5d0: 80 30 e0 00 jmpl @\(gr14,gr0\) +Disassembly of section \.text: + +000005d4 : + 5d4: fe 3f ff fe call 5cc + 5d8: 80 40 f0 0c addi gr15,12,gr0 + 5dc: 80 fc 00 24 setlos 0x24,gr0 + 5e0: 80 f4 00 20 setlo 0x20,gr0 + 5e4: 80 f8 00 00 sethi hi\(0x0\),gr0 + 5e8: 80 40 f0 10 addi gr15,16,gr0 + 5ec: 80 fc 00 18 setlos 0x18,gr0 + 5f0: 80 f4 00 1c setlo 0x1c,gr0 + 5f4: 80 f8 00 00 sethi hi\(0x0\),gr0 + 5f8: 80 40 ff f8 addi gr15,-8,gr0 + 5fc: 80 fc ff e8 setlos 0xffffffe8,gr0 + 600: 80 f4 ff e0 setlo 0xffe0,gr0 + 604: 80 f8 ff ff sethi 0xffff,gr0 + 608: 80 f4 ff 44 setlo 0xff44,gr0 + 60c: 80 f8 ff ff sethi 0xffff,gr0 + 610: 80 f4 00 14 setlo 0x14,gr0 + 614: 80 f8 00 00 sethi hi\(0x0\),gr0 +Disassembly of section \.data: + +0001062c : + \.\.\. + 1062c: R_FRV_32 WD0 + 10630: R_FRV_FUNCDESC WFb + 10634: R_FRV_32 WFb +Disassembly of section \.got: + +000106c8 <_GLOBAL_OFFSET_TABLE_-0x20>: + 106c8: 00 00 05 c4 subxcc\.p gr0,gr4,gr0,icc1 + 106c8: R_FRV_FUNCDESC_VALUE WF9 + 106cc: 00 00 00 02 add\.p gr0,fp,gr0 + 106d0: 00 00 05 bc subx\.p gr0,gr60,gr0,icc1 + 106d0: R_FRV_FUNCDESC_VALUE WF8 + 106d4: 00 00 00 02 add\.p gr0,fp,gr0 + 106d8: 00 00 05 b4 subx\.p gr0,gr52,gr0,icc1 + 106d8: R_FRV_FUNCDESC_VALUE WF0 + 106dc: 00 00 00 02 add\.p gr0,fp,gr0 + 106e0: 00 00 05 ac subx\.p gr0,gr44,gr0,icc1 + 106e0: R_FRV_FUNCDESC_VALUE WF7 + 106e4: 00 00 00 02 add\.p gr0,fp,gr0 + +000106e8 <_GLOBAL_OFFSET_TABLE_>: + \.\.\. + 106f4: R_FRV_32 WF1 + 106f8: R_FRV_FUNCDESC WF4 + 106fc: R_FRV_32 WD2 + 10700: R_FRV_FUNCDESC WF5 + 10704: R_FRV_FUNCDESC WF6 + 10708: R_FRV_32 WF3 + 1070c: R_FRV_32 WF2 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-8-fail.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-8-fail.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-8-fail.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-8-fail.d 1969-12-31 16:00:00.000000000 -0800 @@ -1,6 +0,0 @@ -#name: FRV uClinux PIC relocs to global symbols with addends, failing pie linking -#source: fdpic8.s -#objdump: -DR -j .text -j .data -j .got -j .plt -#as: -mfdpic -#ld: -pie -#error: nonzero addend diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-8.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-8.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-pie-8.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-pie-8.d 2004-03-03 12:24:34.000000000 -0800 @@ -2,83 +2,71 @@ #source: fdpic8.s #objdump: -DR -j .text -j .data -j .got -j .plt #as: -mfdpic -#ld: -pie --version-script fdpic8min.ldv +#ld: -pie .*: file format elf.*frv.* Disassembly of section \.text: -00000498 : - 498: 80 3c 00 02 call 4a0 +000005d0 : + 5d0: 80 3c 00 02 call 5d8 -0000049c : - 49c: 80 40 f0 10 addi gr15,16,gr0 - 4a0: 80 fc 00 14 setlos 0x14,gr0 - 4a4: 80 f4 00 24 setlo 0x24,gr0 - 4a8: 80 f8 00 00 sethi hi\(0x0\),gr0 - 4ac: 80 40 f0 0c addi gr15,12,gr0 - 4b0: 80 fc 00 1c setlos 0x1c,gr0 - 4b4: 80 f4 00 18 setlo 0x18,gr0 - 4b8: 80 f8 00 00 sethi hi\(0x0\),gr0 - 4bc: 80 40 ff f8 addi gr15,-8,gr0 - 4c0: 80 fc ff f0 setlos 0xfffffff0,gr0 - 4c4: 80 f4 ff c8 setlo 0xffc8,gr0 - 4c8: 80 f8 ff ff sethi 0xffff,gr0 - 4cc: 80 40 ff 48 addi gr15,-184,gr0 - 4d0: 80 fc ff 48 setlos 0xffffff48,gr0 - 4d4: 80 f4 ff 48 setlo 0xff48,gr0 - 4d8: 80 f8 ff ff sethi 0xffff,gr0 - 4dc: 80 f4 00 20 setlo 0x20,gr0 - 4e0: 80 f8 00 00 sethi hi\(0x0\),gr0 +000005d4 : + 5d4: 80 40 f0 10 addi gr15,16,gr0 + 5d8: 80 fc 00 14 setlos 0x14,gr0 + 5dc: 80 f4 00 24 setlo 0x24,gr0 + 5e0: 80 f8 00 00 sethi hi\(0x0\),gr0 + 5e4: 80 40 f0 0c addi gr15,12,gr0 + 5e8: 80 fc 00 1c setlos 0x1c,gr0 + 5ec: 80 f4 00 18 setlo 0x18,gr0 + 5f0: 80 f8 00 00 sethi hi\(0x0\),gr0 + 5f4: 80 40 ff f8 addi gr15,-8,gr0 + 5f8: 80 fc ff f0 setlos 0xfffffff0,gr0 + 5fc: 80 f4 ff e8 setlo 0xffe8,gr0 + 600: 80 f8 ff ff sethi 0xffff,gr0 + 604: 80 40 ff 68 addi gr15,-152,gr0 + 608: 80 fc ff 68 setlos 0xffffff68,gr0 + 60c: 80 f4 ff 68 setlo 0xff68,gr0 + 610: 80 f8 ff ff sethi 0xffff,gr0 + 614: 80 f4 00 20 setlo 0x20,gr0 + 618: 80 f8 00 00 sethi hi\(0x0\),gr0 Disassembly of section \.data: -000104f8 : - 104f8: 00 00 00 08 add\.p gr0,gr8,gr0 - 104f8: R_FRV_32 \.data - -000104fc : - 104fc: 00 00 00 10 add\.p gr0,gr16,gr0 - 104fc: R_FRV_32 \.got - 10500: 00 00 00 08 add\.p gr0,gr8,gr0 - 10500: R_FRV_32 \.text +00010630 : + 10630: 00 00 00 08 add\.p gr0,gr8,gr0 + 10630: R_FRV_32 \.data + +00010634 : + 10634: 00 00 00 08 add\.p gr0,gr8,gr0 + 10634: R_FRV_FUNCDESC \.text + 10638: 00 00 00 08 add\.p gr0,gr8,gr0 + 10638: R_FRV_32 \.text Disassembly of section \.got: -00010580 <_GLOBAL_OFFSET_TABLE_-0x38>: - 10580: 00 00 00 08 add\.p gr0,gr8,gr0 - 10580: R_FRV_FUNCDESC_VALUE \.text - 10584: 00 00 00 02 add\.p gr0,fp,gr0 - 10588: 00 00 00 08 add\.p gr0,gr8,gr0 - 10588: R_FRV_FUNCDESC_VALUE \.text - 1058c: 00 00 00 02 add\.p gr0,fp,gr0 - 10590: 00 00 00 08 add\.p gr0,gr8,gr0 - 10590: R_FRV_FUNCDESC_VALUE \.text - 10594: 00 00 00 02 add\.p gr0,fp,gr0 - 10598: 00 00 00 08 add\.p gr0,gr8,gr0 - 10598: R_FRV_FUNCDESC_VALUE \.text - 1059c: 00 00 00 02 add\.p gr0,fp,gr0 - 105a0: 00 00 00 08 add\.p gr0,gr8,gr0 - 105a0: R_FRV_FUNCDESC_VALUE \.text - 105a4: 00 00 00 02 add\.p gr0,fp,gr0 - 105a8: 00 00 00 08 add\.p gr0,gr8,gr0 - 105a8: R_FRV_FUNCDESC_VALUE \.text - 105ac: 00 00 00 02 add\.p gr0,fp,gr0 - 105b0: 00 00 00 08 add\.p gr0,gr8,gr0 - 105b0: R_FRV_FUNCDESC_VALUE \.text - 105b4: 00 00 00 02 add\.p gr0,fp,gr0 +000106b8 <_GLOBAL_OFFSET_TABLE_-0x18>: + 106b8: 00 00 00 08 add\.p gr0,gr8,gr0 + 106b8: R_FRV_FUNCDESC_VALUE \.text + 106bc: 00 00 00 02 add\.p gr0,fp,gr0 + 106c0: 00 00 00 08 add\.p gr0,gr8,gr0 + 106c0: R_FRV_FUNCDESC_VALUE \.text + 106c4: 00 00 00 02 add\.p gr0,fp,gr0 + 106c8: 00 00 00 08 add\.p gr0,gr8,gr0 + 106c8: R_FRV_FUNCDESC_VALUE \.text + 106cc: 00 00 00 02 add\.p gr0,fp,gr0 -000105b8 <_GLOBAL_OFFSET_TABLE_>: +000106d0 <_GLOBAL_OFFSET_TABLE_>: \.\.\. - 105c4: 00 00 00 08 add\.p gr0,gr8,gr0 - 105c4: R_FRV_32 \.got - 105c8: 00 00 00 08 add\.p gr0,gr8,gr0 - 105c8: R_FRV_32 \.text - 105cc: 00 00 00 08 add\.p gr0,gr8,gr0 - 105cc: R_FRV_32 \.text - 105d0: 00 00 00 20 add\.p gr0,gr32,gr0 - 105d0: R_FRV_32 \.got - 105d4: 00 00 00 18 add\.p gr0,gr24,gr0 - 105d4: R_FRV_32 \.got - 105d8: 00 00 00 08 add\.p gr0,gr8,gr0 - 105d8: R_FRV_32 \.data - 105dc: 00 00 00 08 add\.p gr0,gr8,gr0 - 105dc: R_FRV_32 \.text + 106dc: 00 00 00 04 add\.p gr0,gr4,gr0 + 106dc: R_FRV_FUNCDESC \.text + 106e0: 00 00 00 08 add\.p gr0,gr8,gr0 + 106e0: R_FRV_32 \.text + 106e4: 00 00 00 08 add\.p gr0,gr8,gr0 + 106e4: R_FRV_32 \.text + 106e8: 00 00 00 04 add\.p gr0,gr4,gr0 + 106e8: R_FRV_FUNCDESC \.text + 106ec: 00 00 00 04 add\.p gr0,gr4,gr0 + 106ec: R_FRV_FUNCDESC \.text + 106f0: 00 00 00 08 add\.p gr0,gr8,gr0 + 106f0: R_FRV_32 \.data + 106f4: 00 00 00 08 add\.p gr0,gr8,gr0 + 106f4: R_FRV_32 \.text diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-4.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-4.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-4.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-4.d 2004-03-03 12:24:34.000000000 -0800 @@ -37,8 +37,8 @@ Disassembly of section \.data: 10654: R_FRV_32 \.data 00010658 : - 10658: 00 00 00 00 add\.p gr0,gr0,gr0 - 10658: R_FRV_FUNCDESC PFb + 10658: 00 00 00 04 add\.p gr0,gr4,gr0 + 10658: R_FRV_FUNCDESC \.text 1065c: 00 00 00 04 add\.p gr0,gr4,gr0 1065c: R_FRV_32 \.text Disassembly of section \.got: @@ -56,16 +56,17 @@ Disassembly of section \.got: 000106f0 <_GLOBAL_OFFSET_TABLE_>: \.\.\. - 106fc: R_FRV_FUNCDESC PF4 + 106fc: 00 00 00 04 add\.p gr0,gr4,gr0 + 106fc: R_FRV_FUNCDESC \.text 10700: 00 00 00 04 add\.p gr0,gr4,gr0 10700: R_FRV_32 \.text 10704: 00 00 00 04 add\.p gr0,gr4,gr0 10704: R_FRV_32 \.data - 10708: 00 00 00 00 add\.p gr0,gr0,gr0 - 10708: R_FRV_FUNCDESC PF6 + 10708: 00 00 00 04 add\.p gr0,gr4,gr0 + 10708: R_FRV_FUNCDESC \.text 1070c: 00 00 00 04 add\.p gr0,gr4,gr0 1070c: R_FRV_32 \.text 10710: 00 00 00 04 add\.p gr0,gr4,gr0 10710: R_FRV_32 \.text - 10714: 00 00 00 00 add\.p gr0,gr0,gr0 - 10714: R_FRV_FUNCDESC PF5 + 10714: 00 00 00 04 add\.p gr0,gr4,gr0 + 10714: R_FRV_FUNCDESC \.text diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-6-fail.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-6-fail.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-6-fail.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-6-fail.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,6 @@ +#name: FRV uClinux PIC relocs to undefined symbols, shared linking +#source: fdpic6.s +#objdump: -DR -j .text -j .data -j .got -j .plt +#as: -mfdpic +#ld: -shared +#error: different segments diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-6.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-6.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-shared-6.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-shared-6.d 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,74 @@ -#name: FRV uClinux PIC relocs to undefined symbols, shared linking +#name: FRV uClinux PIC relocs to weak undefined symbols, shared linking #source: fdpic6.s #objdump: -DR -j .text -j .data -j .got -j .plt #as: -mfdpic -#ld: -shared -#error: different segments +#ld: -shared --defsym WD1=D6 --version-script fdpic6.ldv + +.*: file format elf.*frv.* + +Disassembly of section \.plt: + +0000041c <\.plt>: + 41c: 00 00 00 08 add\.p gr0,gr8,gr0 + 420: c0 1a 00 06 bra 438 + 424: 00 00 00 00 add\.p gr0,gr0,gr0 + 428: c0 1a 00 04 bra 438 + 42c: 00 00 00 10 add\.p gr0,gr16,gr0 + 430: c0 1a 00 02 bra 438 + 434: 00 00 00 18 add\.p gr0,gr24,gr0 + 438: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + 43c: 80 30 40 00 jmpl @\(gr4,gr0\) + 440: 9c cc ff f0 lddi @\(gr15,-16\),gr14 + 444: 80 30 e0 00 jmpl @\(gr14,gr0\) +Disassembly of section \.text: + +00000448 : + 448: fe 3f ff fe call 440 + 44c: 80 40 f0 0c addi gr15,12,gr0 + 450: 80 fc 00 24 setlos 0x24,gr0 + 454: 80 f4 00 20 setlo 0x20,gr0 + 458: 80 f8 00 00 sethi hi\(0x0\),gr0 + 45c: 80 40 f0 10 addi gr15,16,gr0 + 460: 80 fc 00 18 setlos 0x18,gr0 + 464: 80 f4 00 1c setlo 0x1c,gr0 + 468: 80 f8 00 00 sethi hi\(0x0\),gr0 + 46c: 80 40 ff f8 addi gr15,-8,gr0 + 470: 80 fc ff e8 setlos 0xffffffe8,gr0 + 474: 80 f4 ff e0 setlo 0xffe0,gr0 + 478: 80 f8 ff ff sethi 0xffff,gr0 + 47c: 80 f4 ff 40 setlo 0xff40,gr0 + 480: 80 f8 ff ff sethi 0xffff,gr0 + 484: 80 f4 00 14 setlo 0x14,gr0 + 488: 80 f8 00 00 sethi hi\(0x0\),gr0 +Disassembly of section \.data: + +00010490 : + \.\.\. + 10490: R_FRV_32 WD0 + 10494: R_FRV_FUNCDESC WFb + 10498: R_FRV_32 WFb +Disassembly of section \.got: + +00010530 <_GLOBAL_OFFSET_TABLE_-0x20>: + 10530: 00 00 04 38 \*unknown\* + 10530: R_FRV_FUNCDESC_VALUE WF9 + 10534: 00 00 00 00 add\.p gr0,gr0,gr0 + 10538: 00 00 04 30 \*unknown\* + 10538: R_FRV_FUNCDESC_VALUE WF8 + 1053c: 00 00 00 00 add\.p gr0,gr0,gr0 + 10540: 00 00 04 28 \*unknown\* + 10540: R_FRV_FUNCDESC_VALUE WF0 + 10544: 00 00 00 00 add\.p gr0,gr0,gr0 + 10548: 00 00 04 20 \*unknown\* + 10548: R_FRV_FUNCDESC_VALUE WF7 + 1054c: 00 00 00 00 add\.p gr0,gr0,gr0 + +00010550 <_GLOBAL_OFFSET_TABLE_>: + \.\.\. + 1055c: R_FRV_32 WF1 + 10560: R_FRV_FUNCDESC WF4 + 10564: R_FRV_32 WD2 + 10568: R_FRV_FUNCDESC WF5 + 1056c: R_FRV_FUNCDESC WF6 + 10570: R_FRV_32 WF3 + 10574: R_FRV_32 WF2 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-static-6.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-static-6.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic-static-6.d 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic-static-6.d 2004-03-03 12:24:34.000000000 -0800 @@ -1,4 +1,4 @@ -#name: FRV uClinux PIC relocs to undefined symbols, static linking +#name: FRV uClinux PIC relocs to weak undefined symbols, static linking #source: fdpic6.s #objdump: -D #as: -mfdpic diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic.exp binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic.exp 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic.exp 2004-03-03 12:24:34.000000000 -0800 @@ -42,7 +42,9 @@ run_dump_test "fdpic-pie-5" run_dump_test "fdpic-shared-5" run_dump_test "fdpic-static-6" +run_dump_test "fdpic-pie-6-fail" run_dump_test "fdpic-pie-6" +run_dump_test "fdpic-shared-6-fail" run_dump_test "fdpic-shared-6" run_dump_test "fdpic-static-7" @@ -50,7 +52,6 @@ run_dump_test "fdpic-pie-7" run_dump_test "fdpic-shared-7" run_dump_test "fdpic-static-8" -run_dump_test "fdpic-pie-8-fail" run_dump_test "fdpic-pie-8" run_dump_test "fdpic-shared-8-fail" run_dump_test "fdpic-shared-8" diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic6.ldv binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic6.ldv --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fdpic6.ldv 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fdpic6.ldv 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ +{ global: _start; F6; D6; WF*; local: *; }; diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-link.d binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-link.d --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-link.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-link.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,11 @@ +#source: fr450-linka.s -mcpu=fr400 +#source: fr450-linkb.s -mcpu=fr405 +#source: fr450-linkc.s -mcpu=fr450 +#source: fr450-linkb.s -mcpu=fr405 +#source: fr450-linka.s -mcpu=fr400 +#ld: -r +#objdump: -p + +.*: file format elf32-frv +private flags = 0x8000000: -mcpu=fr450 + diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linka.s binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linka.s --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linka.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linka.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ + nop diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linkb.s binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linkb.s --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linkb.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linkb.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ + nop diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linkc.s binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linkc.s --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/fr450-linkc.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/fr450-linkc.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ + nop diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-frv/frv-elf.exp binutils-2.15.90.0.1/ld/testsuite/ld-frv/frv-elf.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-frv/frv-elf.exp 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-frv/frv-elf.exp 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ +if [istarget frv*-*-*] { + run_dump_test "fr450-link" +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-h8300/h8300.exp binutils-2.15.90.0.1/ld/testsuite/ld-h8300/h8300.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-h8300/h8300.exp 2004-01-14 13:07:53.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-h8300/h8300.exp 2004-03-03 12:24:34.000000000 -0800 @@ -30,7 +30,9 @@ if {[istarget *-elf]} { run_dump_test relax-2 run_dump_test relax-3 run_dump_test relax-4 + run_dump_test relax-5 } else { run_dump_test relax-3-coff run_dump_test relax-4-coff + run_dump_test relax-5-coff } diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5-coff.d binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5-coff.d --- binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5-coff.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5-coff.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,50 @@ +# name: H8300 Relaxation Test 5 +# source: relax-5.s +# ld: --relax -m h8300s +# objdump: -d --no-show-raw-insn + +.*: file format .*-h8300 + +Disassembly of section .text: + +00000100 <_start>: + 100: 01 40 6b 00 00 00 ldc @0x0:16,ccr + 106: 01 40 6b 00 7f ff ldc @0x7fff:16,ccr + 10c: 01 40 6b 20 00 00 80 00 ldc @0x8000:32,ccr + 114: 01 40 6b 20 00 00 ff 00 ldc @0xff00:32,ccr + 11c: 01 40 6b 20 00 ff ff 00 ldc @0xffff00:32,ccr + 124: 01 40 6b 20 ff ff 7f ff ldc @0xffff7fff:32,ccr + 12c: 01 40 6b 00 80 00 ldc @0x8000:16,ccr + 132: 01 40 6b 00 fe ff ldc @0xfeff:16,ccr + 138: 01 40 6b 00 ff 00 ldc @0xff00:16,ccr + 13e: 01 40 6b 00 ff ff ldc @0xffff:16,ccr + 144: 01 40 6b 80 00 00 stc ccr,@0x0:16 + 14a: 01 40 6b 80 7f ff stc ccr,@0x7fff:16 + 150: 01 40 6b a0 00 00 80 00 stc ccr,@0x8000:32 + 158: 01 40 6b a0 00 00 ff 00 stc ccr,@0xff00:32 + 160: 01 40 6b a0 00 ff ff 00 stc ccr,@0xffff00:32 + 168: 01 40 6b a0 ff ff 7f ff stc ccr,@0xffff7fff:32 + 170: 01 40 6b 80 80 00 stc ccr,@0x8000:16 + 176: 01 40 6b 80 fe ff stc ccr,@0xfeff:16 + 17c: 01 40 6b 80 ff 00 stc ccr,@0xff00:16 + 182: 01 40 6b 80 ff ff stc ccr,@0xffff:16 + 188: 01 41 6b 00 00 00 ldc @0x0:16,exr + 18e: 01 41 6b 00 7f ff ldc @0x7fff:16,exr + 194: 01 41 6b 20 00 00 80 00 ldc @0x8000:32,exr + 19c: 01 41 6b 20 00 00 ff 00 ldc @0xff00:32,exr + 1a4: 01 41 6b 20 00 ff ff 00 ldc @0xffff00:32,exr + 1ac: 01 41 6b 20 ff ff 7f ff ldc @0xffff7fff:32,exr + 1b4: 01 41 6b 00 80 00 ldc @0x8000:16,exr + 1ba: 01 41 6b 00 fe ff ldc @0xfeff:16,exr + 1c0: 01 41 6b 00 ff 00 ldc @0xff00:16,exr + 1c6: 01 41 6b 00 ff ff ldc @0xffff:16,exr + 1cc: 01 41 6b 80 00 00 stc exr,@0x0:16 + 1d2: 01 41 6b 80 7f ff stc exr,@0x7fff:16 + 1d8: 01 41 6b a0 00 00 80 00 stc exr,@0x8000:32 + 1e0: 01 41 6b a0 00 00 ff 00 stc exr,@0xff00:32 + 1e8: 01 41 6b a0 00 ff ff 00 stc exr,@0xffff00:32 + 1f0: 01 41 6b a0 ff ff 7f ff stc exr,@0xffff7fff:32 + 1f8: 01 41 6b 80 80 00 stc exr,@0x8000:16 + 1fe: 01 41 6b 80 fe ff stc exr,@0xfeff:16 + 204: 01 41 6b 80 ff 00 stc exr,@0xff00:16 + 20a: 01 41 6b 80 ff ff stc exr,@0xffff:16 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5.d binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5.d --- binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,50 @@ +# name: H8300 Relaxation Test 5 +# source: relax-5.s +# ld: --relax -m h8300self +# objdump: -d --no-show-raw-insn + +.*: file format .*-h8300 + +Disassembly of section .text: + +00000100 <_start>: + 100: 01 40 6b 00 00 00 ldc @0x0:16,ccr + 106: 01 40 6b 00 7f ff ldc @0x7fff:16,ccr + 10c: 01 40 6b 20 00 00 80 00 ldc @0x8000:32,ccr + 114: 01 40 6b 20 00 00 ff 00 ldc @0xff00:32,ccr + 11c: 01 40 6b 20 00 ff ff 00 ldc @0xffff00:32,ccr + 124: 01 40 6b 20 ff ff 7f ff ldc @0xffff7fff:32,ccr + 12c: 01 40 6b 00 80 00 ldc @0x8000:16,ccr + 132: 01 40 6b 00 fe ff ldc @0xfeff:16,ccr + 138: 01 40 6b 00 ff 00 ldc @0xff00:16,ccr + 13e: 01 40 6b 00 ff ff ldc @0xffff:16,ccr + 144: 01 40 6b 80 00 00 stc ccr,@0x0:16 + 14a: 01 40 6b 80 7f ff stc ccr,@0x7fff:16 + 150: 01 40 6b a0 00 00 80 00 stc ccr,@0x8000:32 + 158: 01 40 6b a0 00 00 ff 00 stc ccr,@0xff00:32 + 160: 01 40 6b a0 00 ff ff 00 stc ccr,@0xffff00:32 + 168: 01 40 6b a0 ff ff 7f ff stc ccr,@0xffff7fff:32 + 170: 01 40 6b 80 80 00 stc ccr,@0x8000:16 + 176: 01 40 6b 80 fe ff stc ccr,@0xfeff:16 + 17c: 01 40 6b 80 ff 00 stc ccr,@0xff00:16 + 182: 01 40 6b 80 ff ff stc ccr,@0xffff:16 + 188: 01 41 6b 00 00 00 ldc @0x0:16,exr + 18e: 01 41 6b 00 7f ff ldc @0x7fff:16,exr + 194: 01 41 6b 20 00 00 80 00 ldc @0x8000:32,exr + 19c: 01 41 6b 20 00 00 ff 00 ldc @0xff00:32,exr + 1a4: 01 41 6b 20 00 ff ff 00 ldc @0xffff00:32,exr + 1ac: 01 41 6b 20 ff ff 7f ff ldc @0xffff7fff:32,exr + 1b4: 01 41 6b 00 80 00 ldc @0x8000:16,exr + 1ba: 01 41 6b 00 fe ff ldc @0xfeff:16,exr + 1c0: 01 41 6b 00 ff 00 ldc @0xff00:16,exr + 1c6: 01 41 6b 00 ff ff ldc @0xffff:16,exr + 1cc: 01 41 6b 80 00 00 stc exr,@0x0:16 + 1d2: 01 41 6b 80 7f ff stc exr,@0x7fff:16 + 1d8: 01 41 6b a0 00 00 80 00 stc exr,@0x8000:32 + 1e0: 01 41 6b a0 00 00 ff 00 stc exr,@0xff00:32 + 1e8: 01 41 6b a0 00 ff ff 00 stc exr,@0xffff00:32 + 1f0: 01 41 6b a0 ff ff 7f ff stc exr,@0xffff7fff:32 + 1f8: 01 41 6b 80 80 00 stc exr,@0x8000:16 + 1fe: 01 41 6b 80 fe ff stc exr,@0xfeff:16 + 204: 01 41 6b 80 ff 00 stc exr,@0xff00:16 + 20a: 01 41 6b 80 ff ff stc exr,@0xffff:16 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5.s binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5.s --- binutils-2.14.90.0.8/ld/testsuite/ld-h8300/relax-5.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-h8300/relax-5.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,66 @@ +; Relaxation is possible from @aa:32 to @aa:16 for following instructions +; ldc.w @@aa:32,ccr +; stc.w ccr,@@aa:32 +; ldc.w @aa:32,exr +; stc.w exr,@aa:32 + .h8300s + .globl _start +; +; Relaxation of aa:32 +; + _start: + ldc @s1:32,ccr + ldc @s2:32,ccr + ldc @s3:32,ccr + ldc @s4:32,ccr + ldc @s5:32,ccr + ldc @s6:32,ccr + ldc @s7:32,ccr + ldc @s8:32,ccr + ldc @s9:32,ccr + ldc @s10:32,ccr + + stc ccr,@s1:32 + stc ccr,@s2:32 + stc ccr,@s3:32 + stc ccr,@s4:32 + stc ccr,@s5:32 + stc ccr,@s6:32 + stc ccr,@s7:32 + stc ccr,@s8:32 + stc ccr,@s9:32 + stc ccr,@s10:32 + + ldc @s1:32,exr + ldc @s2:32,exr + ldc @s3:32,exr + ldc @s4:32,exr + ldc @s5:32,exr + ldc @s6:32,exr + ldc @s7:32,exr + ldc @s8:32,exr + ldc @s9:32,exr + ldc @s10:32,exr + + stc exr,@s1:32 + stc exr,@s2:32 + stc exr,@s3:32 + stc exr,@s4:32 + stc exr,@s5:32 + stc exr,@s6:32 + stc exr,@s7:32 + stc exr,@s8:32 + stc exr,@s9:32 + stc exr,@s10:32 + + .equ s1,0 + .equ s2,0x7fff + .equ s3,0x8000 + .equ s4,0xff00 + .equ s5,0xffff00 + .equ s6,0xffff7fff + .equ s7,0xffff8000 + .equ s8,0xfffffeff + .equ s9,0xffffff00 + .equ s10,0xffffffff + .end diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-i386/tlsbin.dd binutils-2.15.90.0.1/ld/testsuite/ld-i386/tlsbin.dd --- binutils-2.14.90.0.8/ld/testsuite/ld-i386/tlsbin.dd 2002-10-02 10:17:20.000000000 -0700 +++ binutils-2.15.90.0.1/ld/testsuite/ld-i386/tlsbin.dd 2004-03-03 12:24:34.000000000 -0800 @@ -92,7 +92,7 @@ Disassembly of section .text: # LD -> LE 8049085: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax 804908b: 90[ ]+nop * - 804908c: 8d 74 26 00[ ]+lea 0x0\(%esi,1\),%esi + 804908c: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi 8049090: 90[ ]+nop * 8049091: 90[ ]+nop * 8049092: 8d 90 80 ff ff ff[ ]+lea 0xffffff80\(%eax\),%edx @@ -108,7 +108,7 @@ Disassembly of section .text: # LD -> LE against hidden variables 80490a4: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax 80490aa: 90[ ]+nop * - 80490ab: 8d 74 26 00[ ]+lea 0x0\(%esi,1\),%esi + 80490ab: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi 80490af: 90[ ]+nop * 80490b0: 90[ ]+nop * 80490b1: 8d 90 a0 ff ff ff[ ]+lea 0xffffffa0\(%eax\),%edx diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d --- binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -13,8 +13,8 @@ Disassembly of section \.text: 100000a4: 8f858064 lw a1,-32668\(gp\) 100000a8: 24a5000c addiu a1,a1,12 100000ac: 8f858064 lw a1,-32668\(gp\) -100000b0: 3c010002 lui at,0x2 -100000b4: 2421e240 addiu at,at,-7616 +100000b0: 3c010001 lui at,0x1 +100000b4: 3421e240 ori at,at,0xe240 100000b8: 00a12821 addu a1,a1,at 100000bc: 8f858064 lw a1,-32668\(gp\) 100000c0: 00b12821 addu a1,a1,s1 @@ -22,26 +22,26 @@ Disassembly of section \.text: 100000c8: 24a5000c addiu a1,a1,12 100000cc: 00b12821 addu a1,a1,s1 100000d0: 8f858064 lw a1,-32668\(gp\) -100000d4: 3c010002 lui at,0x2 -100000d8: 2421e240 addiu at,at,-7616 +100000d4: 3c010001 lui at,0x1 +100000d8: 3421e240 ori at,at,0xe240 100000dc: 00a12821 addu a1,a1,at 100000e0: 00b12821 addu a1,a1,s1 -100000e4: 8f858064 lw a1,-32668\(gp\) -100000e8: 8ca50000 lw a1,0\(a1\) -100000ec: 8f858064 lw a1,-32668\(gp\) -100000f0: 8ca5000c lw a1,12\(a1\) -100000f4: 8f858064 lw a1,-32668\(gp\) +100000e4: 8f858018 lw a1,-32744\(gp\) +100000e8: 8ca5050c lw a1,1292\(a1\) +100000ec: 8f858018 lw a1,-32744\(gp\) +100000f0: 8ca50518 lw a1,1304\(a1\) +100000f4: 8f858018 lw a1,-32744\(gp\) 100000f8: 00b12821 addu a1,a1,s1 -100000fc: 8ca50000 lw a1,0\(a1\) -10000100: 8f858064 lw a1,-32668\(gp\) +100000fc: 8ca5050c lw a1,1292\(a1\) +10000100: 8f858018 lw a1,-32744\(gp\) 10000104: 00b12821 addu a1,a1,s1 -10000108: 8ca5000c lw a1,12\(a1\) -1000010c: 8f818064 lw at,-32668\(gp\) +10000108: 8ca50518 lw a1,1304\(a1\) +1000010c: 8f818018 lw at,-32744\(gp\) 10000110: 00250821 addu at,at,a1 -10000114: 8c250022 lw a1,34\(at\) -10000118: 8f818064 lw at,-32668\(gp\) +10000114: 8c25052e lw a1,1326\(at\) +10000118: 8f818018 lw at,-32744\(gp\) 1000011c: 00250821 addu at,at,a1 -10000120: ac250038 sw a1,56\(at\) +10000120: ac250544 sw a1,1348\(at\) 10000124: 8f818064 lw at,-32668\(gp\) 10000128: 88250000 lwl a1,0\(at\) 1000012c: 98250003 lwr a1,3\(at\) @@ -68,42 +68,42 @@ Disassembly of section \.text: 10000180: 00250821 addu at,at,a1 10000184: a8250000 swl a1,0\(at\) 10000188: b8250003 swr a1,3\(at\) -1000018c: 8f858018 lw a1,-32744\(gp\) -10000190: 8f85801c lw a1,-32740\(gp\) -10000194: 8f858020 lw a1,-32736\(gp\) -10000198: 8f858018 lw a1,-32744\(gp\) +1000018c: 8f85801c lw a1,-32740\(gp\) +10000190: 8f858020 lw a1,-32736\(gp\) +10000194: 8f858024 lw a1,-32732\(gp\) +10000198: 8f85801c lw a1,-32740\(gp\) 1000019c: 00b12821 addu a1,a1,s1 -100001a0: 8f85801c lw a1,-32740\(gp\) +100001a0: 8f858020 lw a1,-32736\(gp\) 100001a4: 00b12821 addu a1,a1,s1 -100001a8: 8f858020 lw a1,-32736\(gp\) +100001a8: 8f858024 lw a1,-32732\(gp\) 100001ac: 00b12821 addu a1,a1,s1 -100001b0: 8f858024 lw a1,-32732\(gp\) +100001b0: 8f858018 lw a1,-32744\(gp\) 100001b4: 8ca5050c lw a1,1292\(a1\) -100001b8: 8f858024 lw a1,-32732\(gp\) +100001b8: 8f858018 lw a1,-32744\(gp\) 100001bc: 8ca50518 lw a1,1304\(a1\) -100001c0: 8f858024 lw a1,-32732\(gp\) +100001c0: 8f858018 lw a1,-32744\(gp\) 100001c4: 00b12821 addu a1,a1,s1 100001c8: 8ca5050c lw a1,1292\(a1\) -100001cc: 8f858024 lw a1,-32732\(gp\) +100001cc: 8f858018 lw a1,-32744\(gp\) 100001d0: 00b12821 addu a1,a1,s1 100001d4: 8ca50518 lw a1,1304\(a1\) -100001d8: 8f818024 lw at,-32732\(gp\) +100001d8: 8f818018 lw at,-32744\(gp\) 100001dc: 00250821 addu at,at,a1 100001e0: 8c25052e lw a1,1326\(at\) -100001e4: 8f818024 lw at,-32732\(gp\) +100001e4: 8f818018 lw at,-32744\(gp\) 100001e8: 00250821 addu at,at,a1 100001ec: ac250544 sw a1,1348\(at\) -100001f0: 8f818018 lw at,-32744\(gp\) +100001f0: 8f81801c lw at,-32740\(gp\) 100001f4: 88250000 lwl a1,0\(at\) 100001f8: 98250003 lwr a1,3\(at\) -100001fc: 8f81801c lw at,-32740\(gp\) +100001fc: 8f818020 lw at,-32736\(gp\) 10000200: 88250000 lwl a1,0\(at\) 10000204: 98250003 lwr a1,3\(at\) -10000208: 8f818018 lw at,-32744\(gp\) +10000208: 8f81801c lw at,-32740\(gp\) 1000020c: 00310821 addu at,at,s1 10000210: 88250000 lwl a1,0\(at\) 10000214: 98250003 lwr a1,3\(at\) -10000218: 8f81801c lw at,-32740\(gp\) +10000218: 8f818020 lw at,-32736\(gp\) 1000021c: 00310821 addu at,at,s1 10000220: 88250000 lwl a1,0\(at\) 10000224: 98250003 lwr a1,3\(at\) @@ -129,8 +129,8 @@ Disassembly of section \.text: 10000274: 8f858068 lw a1,-32664\(gp\) 10000278: 24a5000c addiu a1,a1,12 1000027c: 8f858068 lw a1,-32664\(gp\) -10000280: 3c010002 lui at,0x2 -10000284: 2421e240 addiu at,at,-7616 +10000280: 3c010001 lui at,0x1 +10000284: 3421e240 ori at,at,0xe240 10000288: 00a12821 addu a1,a1,at 1000028c: 8f858068 lw a1,-32664\(gp\) 10000290: 00b12821 addu a1,a1,s1 @@ -138,26 +138,26 @@ Disassembly of section \.text: 10000298: 24a5000c addiu a1,a1,12 1000029c: 00b12821 addu a1,a1,s1 100002a0: 8f858068 lw a1,-32664\(gp\) -100002a4: 3c010002 lui at,0x2 -100002a8: 2421e240 addiu at,at,-7616 +100002a4: 3c010001 lui at,0x1 +100002a8: 3421e240 ori at,at,0xe240 100002ac: 00a12821 addu a1,a1,at 100002b0: 00b12821 addu a1,a1,s1 -100002b4: 8f858068 lw a1,-32664\(gp\) -100002b8: 8ca50000 lw a1,0\(a1\) -100002bc: 8f858068 lw a1,-32664\(gp\) -100002c0: 8ca5000c lw a1,12\(a1\) -100002c4: 8f858068 lw a1,-32664\(gp\) +100002b4: 8f858018 lw a1,-32744\(gp\) +100002b8: 8ca50584 lw a1,1412\(a1\) +100002bc: 8f858018 lw a1,-32744\(gp\) +100002c0: 8ca50590 lw a1,1424\(a1\) +100002c4: 8f858018 lw a1,-32744\(gp\) 100002c8: 00b12821 addu a1,a1,s1 -100002cc: 8ca50000 lw a1,0\(a1\) -100002d0: 8f858068 lw a1,-32664\(gp\) +100002cc: 8ca50584 lw a1,1412\(a1\) +100002d0: 8f858018 lw a1,-32744\(gp\) 100002d4: 00b12821 addu a1,a1,s1 -100002d8: 8ca5000c lw a1,12\(a1\) -100002dc: 8f818068 lw at,-32664\(gp\) +100002d8: 8ca50590 lw a1,1424\(a1\) +100002dc: 8f818018 lw at,-32744\(gp\) 100002e0: 00250821 addu at,at,a1 -100002e4: 8c250022 lw a1,34\(at\) -100002e8: 8f818068 lw at,-32664\(gp\) +100002e4: 8c2505a6 lw a1,1446\(at\) +100002e8: 8f818018 lw at,-32744\(gp\) 100002ec: 00250821 addu at,at,a1 -100002f0: ac250038 sw a1,56\(at\) +100002f0: ac2505bc sw a1,1468\(at\) 100002f4: 8f818068 lw at,-32664\(gp\) 100002f8: 88250000 lwl a1,0\(at\) 100002fc: 98250003 lwr a1,3\(at\) @@ -193,20 +193,20 @@ Disassembly of section \.text: 10000374: 00b12821 addu a1,a1,s1 10000378: 8f85803c lw a1,-32708\(gp\) 1000037c: 00b12821 addu a1,a1,s1 -10000380: 8f858024 lw a1,-32732\(gp\) +10000380: 8f858018 lw a1,-32744\(gp\) 10000384: 8ca50584 lw a1,1412\(a1\) -10000388: 8f858024 lw a1,-32732\(gp\) +10000388: 8f858018 lw a1,-32744\(gp\) 1000038c: 8ca50590 lw a1,1424\(a1\) -10000390: 8f858024 lw a1,-32732\(gp\) +10000390: 8f858018 lw a1,-32744\(gp\) 10000394: 00b12821 addu a1,a1,s1 10000398: 8ca50584 lw a1,1412\(a1\) -1000039c: 8f858024 lw a1,-32732\(gp\) +1000039c: 8f858018 lw a1,-32744\(gp\) 100003a0: 00b12821 addu a1,a1,s1 100003a4: 8ca50590 lw a1,1424\(a1\) -100003a8: 8f818024 lw at,-32732\(gp\) +100003a8: 8f818018 lw at,-32744\(gp\) 100003ac: 00250821 addu at,at,a1 100003b0: 8c2505a6 lw a1,1446\(at\) -100003b4: 8f818024 lw at,-32732\(gp\) +100003b4: 8f818018 lw at,-32744\(gp\) 100003b8: 00250821 addu at,at,a1 100003bc: ac2505bc sw a1,1468\(at\) 100003c0: 8f818034 lw at,-32716\(gp\) @@ -243,24 +243,24 @@ Disassembly of section \.text: 1000043c: 00000000 nop 10000440: 1000ff17 b 100000a0 10000444: 8f858064 lw a1,-32668\(gp\) -10000448: 8f858068 lw a1,-32664\(gp\) +10000448: 8f858018 lw a1,-32744\(gp\) 1000044c: 10000015 b 100004a4 -10000450: 8ca50000 lw a1,0\(a1\) +10000450: 8ca50584 lw a1,1412\(a1\) 10000454: 1000ff12 b 100000a0 -10000458: 8f858018 lw a1,-32744\(gp\) +10000458: 8f85801c lw a1,-32740\(gp\) 1000045c: 8f858038 lw a1,-32712\(gp\) 10000460: 10000010 b 100004a4 10000464: 00000000 nop -10000468: 8f858020 lw a1,-32736\(gp\) +10000468: 8f858024 lw a1,-32732\(gp\) 1000046c: 1000ff0c b 100000a0 10000470: 00000000 nop -10000474: 8f858024 lw a1,-32732\(gp\) +10000474: 8f858018 lw a1,-32744\(gp\) 10000478: 1000000a b 100004a4 1000047c: 8ca50584 lw a1,1412\(a1\) -10000480: 8f858024 lw a1,-32732\(gp\) +10000480: 8f858018 lw a1,-32744\(gp\) 10000484: 1000ff06 b 100000a0 10000488: 8ca50518 lw a1,1304\(a1\) -1000048c: 8f818024 lw at,-32732\(gp\) +1000048c: 8f818018 lw at,-32744\(gp\) 10000490: 00250821 addu at,at,a1 10000494: 10000003 b 100004a4 10000498: 8c2505a6 lw a1,1446\(at\) @@ -292,10 +292,10 @@ Disassembly of section \.got: 101005c0 <_GLOBAL_OFFSET_TABLE_>: 101005c0: 00000000 .* 101005c4: 80000000 .* -101005c8: 1010050c .* -101005cc: 10100518 .* -101005d0: 1011e74c .* -101005d4: 10100000 .* +101005c8: 10100000 .* +101005cc: 1010050c .* +101005d0: 10100518 .* +101005d4: 1011e74c .* 101005d8: 1010052e .* 101005dc: 10100544 .* 101005e0: 100000a0 .* @@ -311,3 +311,4 @@ Disassembly of section \.got: 10100610: 100004a4 .* 10100614: 1010050c .* 10100618: 10100584 .* +#pass diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d --- binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d 2004-03-03 12:24:34.000000000 -0800 @@ -22,8 +22,8 @@ Disassembly of section \.text: 1200000e4: df8580b8 ld a1,-32584\(gp\) 1200000e8: 64a5000c daddiu a1,a1,12 1200000ec: df8580b8 ld a1,-32584\(gp\) - 1200000f0: 3c010002 lui at,0x2 - 1200000f4: 6421e240 daddiu at,at,-7616 + 1200000f0: 3c010001 lui at,0x1 + 1200000f4: 3421e240 ori at,at,0xe240 1200000f8: 00a1282d daddu a1,a1,at 1200000fc: df8580b8 ld a1,-32584\(gp\) 120000100: 00b1282d daddu a1,a1,s1 @@ -31,26 +31,26 @@ Disassembly of section \.text: 120000108: 64a5000c daddiu a1,a1,12 12000010c: 00b1282d daddu a1,a1,s1 120000110: df8580b8 ld a1,-32584\(gp\) - 120000114: 3c010002 lui at,0x2 - 120000118: 6421e240 daddiu at,at,-7616 + 120000114: 3c010001 lui at,0x1 + 120000118: 3421e240 ori at,at,0xe240 12000011c: 00a1282d daddu a1,a1,at 120000120: 00b1282d daddu a1,a1,s1 - 120000124: df8580b8 ld a1,-32584\(gp\) - 120000128: dca50000 ld a1,0\(a1\) - 12000012c: df8580b8 ld a1,-32584\(gp\) - 120000130: dca5000c ld a1,12\(a1\) - 120000134: df8580b8 ld a1,-32584\(gp\) + 120000124: df858020 ld a1,-32736\(gp\) + 120000128: dca5052c ld a1,1324\(a1\) + 12000012c: df858020 ld a1,-32736\(gp\) + 120000130: dca50538 ld a1,1336\(a1\) + 120000134: df858020 ld a1,-32736\(gp\) 120000138: 00b1282d daddu a1,a1,s1 - 12000013c: dca50000 ld a1,0\(a1\) - 120000140: df8580b8 ld a1,-32584\(gp\) + 12000013c: dca5052c ld a1,1324\(a1\) + 120000140: df858020 ld a1,-32736\(gp\) 120000144: 00b1282d daddu a1,a1,s1 - 120000148: dca5000c ld a1,12\(a1\) - 12000014c: df8180b8 ld at,-32584\(gp\) + 120000148: dca50538 ld a1,1336\(a1\) + 12000014c: df818020 ld at,-32736\(gp\) 120000150: 0025082d daddu at,at,a1 - 120000154: dc250022 ld a1,34\(at\) - 120000158: df8180b8 ld at,-32584\(gp\) + 120000154: dc25054e ld a1,1358\(at\) + 120000158: df818020 ld at,-32736\(gp\) 12000015c: 0025082d daddu at,at,a1 - 120000160: fc250038 sd a1,56\(at\) + 120000160: fc250564 sd a1,1380\(at\) 120000164: df8180b8 ld at,-32584\(gp\) 120000168: 88250000 lwl a1,0\(at\) 12000016c: 98250003 lwr a1,3\(at\) @@ -77,42 +77,42 @@ Disassembly of section \.text: 1200001c0: 0025082d daddu at,at,a1 1200001c4: a8250000 swl a1,0\(at\) 1200001c8: b8250003 swr a1,3\(at\) - 1200001cc: df858020 ld a1,-32736\(gp\) - 1200001d0: df858028 ld a1,-32728\(gp\) - 1200001d4: df858030 ld a1,-32720\(gp\) - 1200001d8: df858020 ld a1,-32736\(gp\) + 1200001cc: df858028 ld a1,-32728\(gp\) + 1200001d0: df858030 ld a1,-32720\(gp\) + 1200001d4: df858038 ld a1,-32712\(gp\) + 1200001d8: df858028 ld a1,-32728\(gp\) 1200001dc: 00b1282d daddu a1,a1,s1 - 1200001e0: df858028 ld a1,-32728\(gp\) + 1200001e0: df858030 ld a1,-32720\(gp\) 1200001e4: 00b1282d daddu a1,a1,s1 - 1200001e8: df858030 ld a1,-32720\(gp\) + 1200001e8: df858038 ld a1,-32712\(gp\) 1200001ec: 00b1282d daddu a1,a1,s1 - 1200001f0: df858038 ld a1,-32712\(gp\) + 1200001f0: df858020 ld a1,-32736\(gp\) 1200001f4: dca5052c ld a1,1324\(a1\) - 1200001f8: df858038 ld a1,-32712\(gp\) + 1200001f8: df858020 ld a1,-32736\(gp\) 1200001fc: dca50538 ld a1,1336\(a1\) - 120000200: df858038 ld a1,-32712\(gp\) + 120000200: df858020 ld a1,-32736\(gp\) 120000204: 00b1282d daddu a1,a1,s1 120000208: dca5052c ld a1,1324\(a1\) - 12000020c: df858038 ld a1,-32712\(gp\) + 12000020c: df858020 ld a1,-32736\(gp\) 120000210: 00b1282d daddu a1,a1,s1 120000214: dca50538 ld a1,1336\(a1\) - 120000218: df818038 ld at,-32712\(gp\) + 120000218: df818020 ld at,-32736\(gp\) 12000021c: 0025082d daddu at,at,a1 120000220: dc25054e ld a1,1358\(at\) - 120000224: df818038 ld at,-32712\(gp\) + 120000224: df818020 ld at,-32736\(gp\) 120000228: 0025082d daddu at,at,a1 12000022c: fc250564 sd a1,1380\(at\) - 120000230: df818020 ld at,-32736\(gp\) + 120000230: df818028 ld at,-32728\(gp\) 120000234: 88250000 lwl a1,0\(at\) 120000238: 98250003 lwr a1,3\(at\) - 12000023c: df818028 ld at,-32728\(gp\) + 12000023c: df818030 ld at,-32720\(gp\) 120000240: 88250000 lwl a1,0\(at\) 120000244: 98250003 lwr a1,3\(at\) - 120000248: df818020 ld at,-32736\(gp\) + 120000248: df818028 ld at,-32728\(gp\) 12000024c: 0031082d daddu at,at,s1 120000250: 88250000 lwl a1,0\(at\) 120000254: 98250003 lwr a1,3\(at\) - 120000258: df818028 ld at,-32728\(gp\) + 120000258: df818030 ld at,-32720\(gp\) 12000025c: 0031082d daddu at,at,s1 120000260: 88250000 lwl a1,0\(at\) 120000264: 98250003 lwr a1,3\(at\) @@ -138,8 +138,8 @@ Disassembly of section \.text: 1200002b4: df8580c0 ld a1,-32576\(gp\) 1200002b8: 64a5000c daddiu a1,a1,12 1200002bc: df8580c0 ld a1,-32576\(gp\) - 1200002c0: 3c010002 lui at,0x2 - 1200002c4: 6421e240 daddiu at,at,-7616 + 1200002c0: 3c010001 lui at,0x1 + 1200002c4: 3421e240 ori at,at,0xe240 1200002c8: 00a1282d daddu a1,a1,at 1200002cc: df8580c0 ld a1,-32576\(gp\) 1200002d0: 00b1282d daddu a1,a1,s1 @@ -147,26 +147,26 @@ Disassembly of section \.text: 1200002d8: 64a5000c daddiu a1,a1,12 1200002dc: 00b1282d daddu a1,a1,s1 1200002e0: df8580c0 ld a1,-32576\(gp\) - 1200002e4: 3c010002 lui at,0x2 - 1200002e8: 6421e240 daddiu at,at,-7616 + 1200002e4: 3c010001 lui at,0x1 + 1200002e8: 3421e240 ori at,at,0xe240 1200002ec: 00a1282d daddu a1,a1,at 1200002f0: 00b1282d daddu a1,a1,s1 - 1200002f4: df8580c0 ld a1,-32576\(gp\) - 1200002f8: dca50000 ld a1,0\(a1\) - 1200002fc: df8580c0 ld a1,-32576\(gp\) - 120000300: dca5000c ld a1,12\(a1\) - 120000304: df8580c0 ld a1,-32576\(gp\) + 1200002f4: df858020 ld a1,-32736\(gp\) + 1200002f8: dca505a4 ld a1,1444\(a1\) + 1200002fc: df858020 ld a1,-32736\(gp\) + 120000300: dca505b0 ld a1,1456\(a1\) + 120000304: df858020 ld a1,-32736\(gp\) 120000308: 00b1282d daddu a1,a1,s1 - 12000030c: dca50000 ld a1,0\(a1\) - 120000310: df8580c0 ld a1,-32576\(gp\) + 12000030c: dca505a4 ld a1,1444\(a1\) + 120000310: df858020 ld a1,-32736\(gp\) 120000314: 00b1282d daddu a1,a1,s1 - 120000318: dca5000c ld a1,12\(a1\) - 12000031c: df8180c0 ld at,-32576\(gp\) + 120000318: dca505b0 ld a1,1456\(a1\) + 12000031c: df818020 ld at,-32736\(gp\) 120000320: 0025082d daddu at,at,a1 - 120000324: dc250022 ld a1,34\(at\) - 120000328: df8180c0 ld at,-32576\(gp\) + 120000324: dc2505c6 ld a1,1478\(at\) + 120000328: df818020 ld at,-32736\(gp\) 12000032c: 0025082d daddu at,at,a1 - 120000330: fc250038 sd a1,56\(at\) + 120000330: fc2505dc sd a1,1500\(at\) 120000334: df8180c0 ld at,-32576\(gp\) 120000338: 88250000 lwl a1,0\(at\) 12000033c: 98250003 lwr a1,3\(at\) @@ -202,20 +202,20 @@ Disassembly of section \.text: 1200003b4: 00b1282d daddu a1,a1,s1 1200003b8: df858068 ld a1,-32664\(gp\) 1200003bc: 00b1282d daddu a1,a1,s1 - 1200003c0: df858038 ld a1,-32712\(gp\) + 1200003c0: df858020 ld a1,-32736\(gp\) 1200003c4: dca505a4 ld a1,1444\(a1\) - 1200003c8: df858038 ld a1,-32712\(gp\) + 1200003c8: df858020 ld a1,-32736\(gp\) 1200003cc: dca505b0 ld a1,1456\(a1\) - 1200003d0: df858038 ld a1,-32712\(gp\) + 1200003d0: df858020 ld a1,-32736\(gp\) 1200003d4: 00b1282d daddu a1,a1,s1 1200003d8: dca505a4 ld a1,1444\(a1\) - 1200003dc: df858038 ld a1,-32712\(gp\) + 1200003dc: df858020 ld a1,-32736\(gp\) 1200003e0: 00b1282d daddu a1,a1,s1 1200003e4: dca505b0 ld a1,1456\(a1\) - 1200003e8: df818038 ld at,-32712\(gp\) + 1200003e8: df818020 ld at,-32736\(gp\) 1200003ec: 0025082d daddu at,at,a1 1200003f0: dc2505c6 ld a1,1478\(at\) - 1200003f4: df818038 ld at,-32712\(gp\) + 1200003f4: df818020 ld at,-32736\(gp\) 1200003f8: 0025082d daddu at,at,a1 1200003fc: fc2505dc sd a1,1500\(at\) 120000400: df818058 ld at,-32680\(gp\) @@ -252,24 +252,24 @@ Disassembly of section \.text: 12000047c: 00000000 nop 120000480: 1000ff17 b 1200000e0 120000484: df8580b8 ld a1,-32584\(gp\) - 120000488: df8580c0 ld a1,-32576\(gp\) + 120000488: df858020 ld a1,-32736\(gp\) 12000048c: 10000015 b 1200004e4 - 120000490: dca50000 ld a1,0\(a1\) + 120000490: dca505a4 ld a1,1444\(a1\) 120000494: 1000ff12 b 1200000e0 - 120000498: df858020 ld a1,-32736\(gp\) + 120000498: df858028 ld a1,-32728\(gp\) 12000049c: df858060 ld a1,-32672\(gp\) 1200004a0: 10000010 b 1200004e4 1200004a4: 00000000 nop - 1200004a8: df858030 ld a1,-32720\(gp\) + 1200004a8: df858038 ld a1,-32712\(gp\) 1200004ac: 1000ff0c b 1200000e0 1200004b0: 00000000 nop - 1200004b4: df858038 ld a1,-32712\(gp\) + 1200004b4: df858020 ld a1,-32736\(gp\) 1200004b8: 1000000a b 1200004e4 1200004bc: dca505a4 ld a1,1444\(a1\) - 1200004c0: df858038 ld a1,-32712\(gp\) + 1200004c0: df858020 ld a1,-32736\(gp\) 1200004c4: 1000ff06 b 1200000e0 1200004c8: dca50538 ld a1,1336\(a1\) - 1200004cc: df818038 ld at,-32712\(gp\) + 1200004cc: df818020 ld at,-32736\(gp\) 1200004d0: 0025082d daddu at,at,a1 1200004d4: 10000003 b 1200004e4 1200004d8: dc2505c6 ld a1,1478\(at\) @@ -296,13 +296,13 @@ Disassembly of section \.got: \.\.\. 1201005ec: 80000000 .* 1201005f0: 00000001 .* - 1201005f4: 2010052c .* + 1201005f4: 20100000 .* 1201005f8: 00000001 .* - 1201005fc: 20100538 .* + 1201005fc: 2010052c .* 120100600: 00000001 .* - 120100604: 2011e76c .* + 120100604: 20100538 .* 120100608: 00000001 .* - 12010060c: 20100000 .* + 12010060c: 2011e76c .* 120100610: 00000001 .* 120100614: 2010054e .* 120100618: 00000001 .* @@ -330,3 +330,4 @@ Disassembly of section \.got: 12010068c: 2010052c .* 120100690: 00000001 .* 120100694: 201005a4 .* +#pass diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d --- binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d 2004-03-03 12:24:34.000000000 -0800 @@ -19,8 +19,8 @@ Disassembly of section \.text: 100000bc: 3c050000 lui a1,0x0 100000c0: 00bc2821 addu a1,a1,gp 100000c4: 8ca58034 lw a1,-32716\(a1\) -100000c8: 3c010002 lui at,0x2 -100000cc: 2421e240 addiu at,at,-7616 +100000c8: 3c010001 lui at,0x1 +100000cc: 3421e240 ori at,at,0xe240 100000d0: 00a12821 addu a1,a1,at 100000d4: 3c050000 lui a1,0x0 100000d8: 00bc2821 addu a1,a1,gp @@ -34,8 +34,8 @@ Disassembly of section \.text: 100000f8: 3c050000 lui a1,0x0 100000fc: 00bc2821 addu a1,a1,gp 10000100: 8ca58034 lw a1,-32716\(a1\) -10000104: 3c010002 lui at,0x2 -10000108: 2421e240 addiu at,at,-7616 +10000104: 3c010001 lui at,0x1 +10000108: 3421e240 ori at,at,0xe240 1000010c: 00a12821 addu a1,a1,at 10000110: 00b12821 addu a1,a1,s1 10000114: 3c050000 lui a1,0x0 @@ -192,8 +192,8 @@ Disassembly of section \.text: 10000370: 3c050000 lui a1,0x0 10000374: 00bc2821 addu a1,a1,gp 10000378: 8ca58038 lw a1,-32712\(a1\) -1000037c: 3c010002 lui at,0x2 -10000380: 2421e240 addiu at,at,-7616 +1000037c: 3c010001 lui at,0x1 +10000380: 3421e240 ori at,at,0xe240 10000384: 00a12821 addu a1,a1,at 10000388: 3c050000 lui a1,0x0 1000038c: 00bc2821 addu a1,a1,gp @@ -207,8 +207,8 @@ Disassembly of section \.text: 100003ac: 3c050000 lui a1,0x0 100003b0: 00bc2821 addu a1,a1,gp 100003b4: 8ca58038 lw a1,-32712\(a1\) -100003b8: 3c010002 lui at,0x2 -100003bc: 2421e240 addiu at,at,-7616 +100003b8: 3c010001 lui at,0x1 +100003bc: 3421e240 ori at,at,0xe240 100003c0: 00a12821 addu a1,a1,at 100003c4: 00b12821 addu a1,a1,s1 100003c8: 3c050000 lui a1,0x0 @@ -425,3 +425,4 @@ Disassembly of section \.got: 101007d0: 100006a0 .* 101007d4: 101006fc .* 101007d8: 10100774 .* +#pass diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d --- binutils-2.14.90.0.8/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d 2004-03-03 12:24:34.000000000 -0800 @@ -28,8 +28,8 @@ Disassembly of section \.text: 1200000fc: 3c050000 lui a1,0x0 120000100: 00bc282d daddu a1,a1,gp 120000104: dca58058 ld a1,-32680\(a1\) - 120000108: 3c010002 lui at,0x2 - 12000010c: 6421e240 daddiu at,at,-7616 + 120000108: 3c010001 lui at,0x1 + 12000010c: 3421e240 ori at,at,0xe240 120000110: 00a1282d daddu a1,a1,at 120000114: 3c050000 lui a1,0x0 120000118: 00bc282d daddu a1,a1,gp @@ -43,8 +43,8 @@ Disassembly of section \.text: 120000138: 3c050000 lui a1,0x0 12000013c: 00bc282d daddu a1,a1,gp 120000140: dca58058 ld a1,-32680\(a1\) - 120000144: 3c010002 lui at,0x2 - 120000148: 6421e240 daddiu at,at,-7616 + 120000144: 3c010001 lui at,0x1 + 120000148: 3421e240 ori at,at,0xe240 12000014c: 00a1282d daddu a1,a1,at 120000150: 00b1282d daddu a1,a1,s1 120000154: 3c050000 lui a1,0x0 @@ -201,8 +201,8 @@ Disassembly of section \.text: 1200003b0: 3c050000 lui a1,0x0 1200003b4: 00bc282d daddu a1,a1,gp 1200003b8: dca58060 ld a1,-32672\(a1\) - 1200003bc: 3c010002 lui at,0x2 - 1200003c0: 6421e240 daddiu at,at,-7616 + 1200003bc: 3c010001 lui at,0x1 + 1200003c0: 3421e240 ori at,at,0xe240 1200003c4: 00a1282d daddu a1,a1,at 1200003c8: 3c050000 lui a1,0x0 1200003cc: 00bc282d daddu a1,a1,gp @@ -216,8 +216,8 @@ Disassembly of section \.text: 1200003ec: 3c050000 lui a1,0x0 1200003f0: 00bc282d daddu a1,a1,gp 1200003f4: dca58060 ld a1,-32672\(a1\) - 1200003f8: 3c010002 lui at,0x2 - 1200003fc: 6421e240 daddiu at,at,-7616 + 1200003f8: 3c010001 lui at,0x1 + 1200003fc: 3421e240 ori at,at,0xe240 120000400: 00a1282d daddu a1,a1,at 120000404: 00b1282d daddu a1,a1,s1 120000408: 3c050000 lui a1,0x0 @@ -434,3 +434,4 @@ Disassembly of section \.got: 12010081c: 2010071c .* 120100820: 00000001 .* 120100824: 20100794 .* +#pass diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.exp binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.exp 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.exp 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,31 @@ +# Test ALIGN in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2004 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +set testname "ALIGN" + +if ![ld_assemble $as $srcdir/$subdir/align.s tmpdir/align.o] { + unresolved $testname + return +} + +if ![ld_simple_link $ld tmpdir/align "-T $srcdir/$subdir/align.t tmpdir/align.o"] { + fail $testname +} else { + pass $testname +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,2 @@ + .text + .long 0 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/align.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/align.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ +SECTIONS +{ + .text : {*(.text)} + .data ALIGN(0x40) : AT (ALIGN (LOADADDR (.text) + SIZEOF (.text), 0x80)) + {} + ASSERT (LOADADDR(.data) == 0x80, "dyadic ALIGN broken") + ASSERT (ADDR(.data) == 0x40, "monadic ALIGN broken") +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.exp binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.exp 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.exp 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,31 @@ +# Test ASSERT in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2004 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +set testname "ASSERT" + +if ![ld_assemble $as $srcdir/$subdir/assert.s tmpdir/assert.o] { + unresolved $testname + return +} + +if ![ld_simple_link $ld tmpdir/assert "-T $srcdir/$subdir/assert.t tmpdir/assert.o"] { + fail $testname +} else { + pass $testname +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ +#nothing here diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/assert.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/assert.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,5 @@ +SECTIONS +{ + .empty : {} + ASSERT (!SIZEOF(.empty), "Empty is not empty") +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.d binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.d --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,9 @@ +#source: data.s +#ld: -T data.t +#objdump: -s -j .text + +.*: file format .* + +Contents of section .text: + 1000 (0410)?0000(1004)? (0020)?0000(2000)? .* +#pass diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.exp binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.exp 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.exp 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,20 @@ +# Test DATA STATEMENT in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2004 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +run_dump_test data diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1 @@ +#nothing here diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/data.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/data.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,10 @@ +SECTIONS +{ + .text 0x1000 : + { + LONG (label) + label = .; + LONG (ADDR (.other)) + } + .other 0x2000 : {} +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.d binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.d --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,8 @@ +#source: provide-1.s +#ld: -T provide-1.t +#objdump: -s -j .data + +.*: file format .* + +Contents of section .data: + 0000 (08)?000000(08)? (0c)?000000(0c)? 00000000 ............ diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ + .data + .globl foo +foo: .long 0 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-1.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-1.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,11 @@ +SECTIONS +{ + .data : + { + LONG (foo) + LONG (bar) + *(.data) + } + PROVIDE (foo = .); + PROVIDE (bar = .); +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.d binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.d --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,6 @@ +#source: provide-2.s +#ld: -T provide-2.t +#nm: -B +0+3 A baz +0+0 D foo + diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,6 @@ + .data + .globl foo +foo: .long 0 + + .globl baz + .long baz diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-2.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-2.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,10 @@ +SECTIONS +{ + PROVIDE (foo = 1); + PROVIDE (bar = 2); + PROVIDE (baz = 3); + .data : + { + *(.data) + } +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.d binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.d --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.d 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.d 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ +#source: provide-2.s +#ld: -T provide-2.t +#error: symbol defined in linker script and object file diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.s binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.s --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.s 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.s 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,3 @@ + .data + .globl foo +foo: .long 0 diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.t binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.t --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide-3.t 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide-3.t 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,11 @@ +SECTIONS +{ + .data : + { + LONG (foo) + LONG (bar) + *(.data) + } + foo = .; + bar = .; +} diff -uprN binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide.exp binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide.exp --- binutils-2.14.90.0.8/ld/testsuite/ld-scripts/provide.exp 1969-12-31 16:00:00.000000000 -0800 +++ binutils-2.15.90.0.1/ld/testsuite/ld-scripts/provide.exp 2004-03-03 12:24:34.000000000 -0800 @@ -0,0 +1,25 @@ +# Test PROVIDE in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2004 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +set testname "provide" + +run_dump_test provide-1 +run_dump_test provide-2 +setup_xfail *-*-* +run_dump_test provide-3 diff -uprN binutils-2.14.90.0.8/libiberty/ChangeLog binutils-2.15.90.0.1/libiberty/ChangeLog --- binutils-2.14.90.0.8/libiberty/ChangeLog 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,78 @@ +2004-02-24 Ian Lance Taylor + + * cp-demangle.h (enum d_builtin_type_print): Add D_PRINT_UNSIGNED, + D_PRINT_UNSIGNED_LONG, D_PRINT_LONG_LONG, + D_PRINT_UNSIGNED_LONG_LONG, D_PRINT_FLOAT. + * cp-demangle.c (cplus_demangle_builtin_types): Change char and + short types to D_PRINT_DEFAULT. Change other integer types to use + new D_PRINT_* values where appropriate. Change float types to + D_PRINT_FLOAT. + (d_print_comp) [LITERAL, LITERAL_NEG]: Handle new D_PRINT_* + values. + * testsuite/demangle-expected: Adjust two test cases. + + * cp-demangle.c (d_print_function_type): Print a space before the + parenthesis around the function type in more cases. + * testsuite/demangle-expected: Adjust one test case. + + * cp-demangle.c (d_print_comp) [UNARY]: Don't emit extra + parentheses around a cast. + * testsuite/demangle-expected: Adjust two test cases to match new + output. + + * cp-demangle.c (__cxa_demangle): Pass DMGL_PARAMS to d_demangle. + + * cp-demangle.c (d_print_comp) [RESTRICT, VOLATILE, CONST]: Don't + push more than one of the same CV-qualifier on the top of the + stack. + (d_print_comp) [ARRAY_TYPE]: If the array itself is CV-qualified, + move the CV-qualifiers to apply to the element type instead. + (d_print_array_type): When checking the modifiers, keep looking + past ones which have been printed already. + * testsuite/demangle-expected: Add three test cases. + +2004-02-23 Ian Lance Taylor + + * cp-demangle.c (__cxa_demangle): Adjust last patch to handle + empty string correctly. + + * cp-demangle.c (__cxa_demangle): It is not an error if status is + not NULL. It is an error if the mangled name is the same as a + built-in type name. + (main): If IN_GLIBCPP_V3 is defined, test __cxa_demangle rather + than cplus_demangle_v3. + + * dyn-string.c: Remove test of IN_LIBGCC2 and IN_GLIBCPP_V3 and + the associated #define of RETURN_ON_ALLOCATION_FAILURE. + +2004-02-16 Matt Kraai + + * regex.c: Include . + (regcomp): Cast i to int. + (regerror): Add ATTRIBUTE_UNUSED to parameter preg. + +2004-01-25 Ian Lance Taylor + + * configure.ac: Add m4_pattern_allow(LIBOBJS). + * configure: Regenerate. + +2004-01-22 DJ Delorie + + * Makefile.in: Convert to ./ throughout. Rebuild dependencies + with explicit build rules. + (VPATH): Remove. + (.c.o): Poison. + * configure.ac (pexecute, LIBOBJS): Add ./ . + * maint-tool: Build dependencies with explicit rules. + +2004-01-15 Kazu Hirata + + * strdup.c (strdup): Constify the argument. + +2004-01-14 Loren J. Rittle + + * Makefile.in (distclean): Remove config.cache. + 2004-01-13 Daniel Jacobowitz * cp-demangle.c (d_make_comp): DEMANGLE_COMPONENT_CONSTRUCTION_VTABLE diff -uprN binutils-2.14.90.0.8/libiberty/Makefile.in binutils-2.15.90.0.1/libiberty/Makefile.in --- binutils-2.14.90.0.8/libiberty/Makefile.in 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/Makefile.in 2004-03-03 12:24:34.000000000 -0800 @@ -28,7 +28,6 @@ libiberty_topdir = @libiberty_topdir@ srcdir = @srcdir@ -VPATH = @srcdir@ prefix = @prefix@ @@ -71,8 +70,8 @@ PICFLAG = MAKEOVERRIDES = -TARGETLIB = libiberty.a -TESTLIB = testlib.a +TARGETLIB = ./libiberty.a +TESTLIB = ./testlib.a LIBOBJS = @LIBOBJS@ @@ -119,19 +118,19 @@ installcheck: installcheck-subdir INCDIR=$(srcdir)/$(MULTISRCTOP)../include COMPILE.c = $(CC) -c @DEFS@ $(LIBCFLAGS) -I. -I$(INCDIR) $(HDEFINES) @ac_libiberty_warn_cflags@ + +# Just to make sure we don't use a built-in rule with VPATH .c.o: - if [ x"$(PICFLAG)" != x ]; then \ - $(COMPILE.c) $(PICFLAG) $< -o pic/$@; \ - else true; fi - $(COMPILE.c) $< $(OUTPUT_OPTION) + false # NOTE: If you add new files to the library, add them to this list # (alphabetical), and add them to REQUIRED_OFILES, or -# CONFIGURED_OFILES and funcs in configure.ac. +# CONFIGURED_OFILES and funcs in configure.ac. Also run "make maint-deps" +# to build the new rules. CFILES = alloca.c argv.c asprintf.c atexit.c \ basename.c bcmp.c bcopy.c bsearch.c bzero.c \ calloc.c choose-temp.c clock.c concat.c cp-demangle.c \ - cp-demint.c cplus-dem.c \ + cp-demint.c cplus-dem.c \ dyn-string.c \ fdmatch.c ffs.c fibheap.c floatformat.c fnmatch.c \ getcwd.c getopt.c getopt1.c getpagesize.c getpwd.c getruntime.c \ @@ -159,45 +158,45 @@ CFILES = alloca.c argv.c asprintf.c atex # These are always included in the library. The first four are listed # first and by compile time to optimize parallel builds. -REQUIRED_OFILES = regex.o cplus-dem.o cp-demangle.o cp-demint.o md5.o \ - alloca.o argv.o \ - choose-temp.o concat.o \ - dyn-string.o \ - fdmatch.o fibheap.o floatformat.o fnmatch.o \ - getopt.o getopt1.o getpwd.o getruntime.o \ - hashtab.o hex.o \ - lbasename.o \ - lrealpath.o \ - make-relative-prefix.o \ - make-temp-file.o \ - objalloc.o obstack.o \ - partition.o physmem.o @pexecute@ \ - safe-ctype.o sort.o spaces.o splay-tree.o strerror.o \ - strsignal.o \ - ternary.o \ - xatexit.o xexit.o xmalloc.o xmemdup.o xstrdup.o xstrerror.o +REQUIRED_OFILES = ./regex.o ./cplus-dem.o ./cp-demangle.o ./cp-demint.o ./md5.o \ + ./alloca.o ./argv.o \ + ./choose-temp.o ./concat.o \ + ./dyn-string.o \ + ./fdmatch.o ./fibheap.o ./floatformat.o ./fnmatch.o \ + ./getopt.o ./getopt1.o ./getpwd.o ./getruntime.o \ + ./hashtab.o ./hex.o \ + ./lbasename.o \ + ./lrealpath.o \ + ./make-relative-prefix.o \ + ./make-temp-file.o \ + ./objalloc.o ./obstack.o \ + ./partition.o ./physmem.o @pexecute@ \ + ./safe-ctype.o ./sort.o ./spaces.o ./splay-tree.o ./strerror.o \ + ./strsignal.o \ + ./ternary.o \ + ./xatexit.o ./xexit.o ./xmalloc.o ./xmemdup.o ./xstrdup.o ./xstrerror.o # These are all the objects that configure may add to the library via # $funcs or EXTRA_OFILES. This list exists here only for "make # maint-missing" and "make check". -CONFIGURED_OFILES = asprintf.o atexit.o \ - basename.o bcmp.o bcopy.o bsearch.o bzero.o \ - calloc.o clock.o copysign.o \ - _doprnt.o \ - ffs.o \ - getcwd.o getpagesize.o \ - index.o insque.o \ - memchr.o memcmp.o memcpy.o memmove.o mempcpy.o memset.o mkstemps.o \ - pex-djgpp.o pex-mpw.o pex-msdos.o pex-os2.o \ - pex-unix.o pex-win32.o \ - putenv.o \ - random.o rename.o rindex.o \ - setenv.o sigsetmask.o snprintf.o stpcpy.o stpncpy.o strcasecmp.o \ - strchr.o strdup.o strncasecmp.o strncmp.o strrchr.o strstr.o \ - strtod.o strtol.o strtoul.o \ - tmpnam.o \ - vasprintf.o vfork.o vfprintf.o vprintf.o vsnprintf.o vsprintf.o \ - waitpid.o +CONFIGURED_OFILES = ./asprintf.o ./atexit.o \ + ./basename.o ./bcmp.o ./bcopy.o ./bsearch.o ./bzero.o \ + ./calloc.o ./clock.o ./copysign.o \ + ./_doprnt.o \ + ./ffs.o \ + ./getcwd.o ./getpagesize.o \ + ./index.o ./insque.o \ + ./memchr.o ./memcmp.o ./memcpy.o ./memmove.o ./mempcpy.o ./memset.o ./mkstemps.o \ + ./pex-djgpp.o ./pex-mpw.o ./pex-msdos.o ./pex-os2.o \ + ./pex-unix.o ./pex-win32.o \ + ./putenv.o \ + ./random.o ./rename.o ./rindex.o \ + ./setenv.o ./sigsetmask.o ./snprintf.o ./stpcpy.o ./stpncpy.o ./strcasecmp.o \ + ./strchr.o ./strdup.o ./strncasecmp.o ./strncmp.o ./strrchr.o ./strstr.o \ + ./strtod.o ./strtol.o ./strtoul.o \ + ./tmpnam.o \ + ./vasprintf.o ./vfork.o ./vfprintf.o ./vprintf.o ./vsnprintf.o ./vsprintf.o \ + ./waitpid.o # These files are installed if the library has been configured to do so. INSTALLED_HEADERS = \ @@ -377,7 +376,7 @@ clean: clean-subdir distclean: distclean-subdir $(MAKE) SUBDIRS="" clean @$(MULTICLEAN) multi-clean DO=distclean - -rm -f *~ Makefile config.status xhost-mkfrag TAGS multilib.out + -rm -f *~ Makefile config.cache config.status xhost-mkfrag TAGS multilib.out -rm -f config.log -rmdir testsuite 2>/dev/null maintainer-clean realclean: maintainer-clean-subdir @@ -392,7 +391,7 @@ Makefile: $(srcdir)/Makefile.in config.s # if needed. This prevents problems with parallel builds. config.h: stamp-h ; @true stamp-h: $(srcdir)/config.in config.status Makefile - CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status + CONFIG_FILES= CONFIG_HEADERS=config.h:$(srcdir)/config.in $(SHELL) ./config.status config.status: $(srcdir)/configure $(srcdir)/config.table $(SHELL) ./config.status --recheck @@ -416,113 +415,643 @@ $(CONFIGURED_OFILES): stamp-picdir # The dependencies in the remainder of this file are automatically # generated by "make maint-deps". Manual edits will be lost. -_doprnt.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h -alloca.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -argv.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -asprintf.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -atexit.o: config.h -basename.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ +./_doprnt.o: $(srcdir)/_doprnt.c config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/safe-ctype.h -bsearch.o: config.h $(INCDIR)/ansidecl.h -calloc.o: $(INCDIR)/ansidecl.h -choose-temp.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -clock.o: config.h -concat.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -copysign.o: $(INCDIR)/ansidecl.h -cp-demangle.o: config.h $(INCDIR)/ansidecl.h $(srcdir)/cp-demangle.h \ - $(INCDIR)/demangle.h $(INCDIR)/dyn-string.h $(INCDIR)/getopt.h \ - $(INCDIR)/libiberty.h -cp-demint.o: config.h $(INCDIR)/ansidecl.h $(srcdir)/cp-demangle.h \ - $(INCDIR)/demangle.h $(INCDIR)/libiberty.h -cplus-dem.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/demangle.h \ - $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h -dyn-string.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/dyn-string.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/_doprnt.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/_doprnt.c $(OUTPUT_OPTION) + +./alloca.o: $(srcdir)/alloca.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/alloca.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/alloca.c $(OUTPUT_OPTION) + +./argv.o: $(srcdir)/argv.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/argv.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/argv.c $(OUTPUT_OPTION) + +./asprintf.o: $(srcdir)/asprintf.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/asprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/asprintf.c $(OUTPUT_OPTION) + +./atexit.o: $(srcdir)/atexit.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/atexit.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/atexit.c $(OUTPUT_OPTION) + +./basename.o: $(srcdir)/basename.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/basename.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/basename.c $(OUTPUT_OPTION) + +./bcmp.o: $(srcdir)/bcmp.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/bcmp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/bcmp.c $(OUTPUT_OPTION) + +./bcopy.o: $(srcdir)/bcopy.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/bcopy.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/bcopy.c $(OUTPUT_OPTION) + +./bsearch.o: $(srcdir)/bsearch.c config.h $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/bsearch.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/bsearch.c $(OUTPUT_OPTION) + +./bzero.o: $(srcdir)/bzero.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/bzero.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/bzero.c $(OUTPUT_OPTION) + +./calloc.o: $(srcdir)/calloc.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/calloc.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/calloc.c $(OUTPUT_OPTION) + +./choose-temp.o: $(srcdir)/choose-temp.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/choose-temp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/choose-temp.c $(OUTPUT_OPTION) + +./clock.o: $(srcdir)/clock.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/clock.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/clock.c $(OUTPUT_OPTION) + +./concat.o: $(srcdir)/concat.c config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h -fdmatch.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -fibheap.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/fibheap.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/concat.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/concat.c $(OUTPUT_OPTION) + +./copysign.o: $(srcdir)/copysign.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/copysign.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/copysign.c $(OUTPUT_OPTION) + +./cp-demangle.o: $(srcdir)/cp-demangle.c config.h $(INCDIR)/ansidecl.h \ + $(srcdir)/cp-demangle.h $(INCDIR)/demangle.h \ + $(INCDIR)/dyn-string.h $(INCDIR)/getopt.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/cp-demangle.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/cp-demangle.c $(OUTPUT_OPTION) + +./cp-demint.o: $(srcdir)/cp-demint.c config.h $(INCDIR)/ansidecl.h \ + $(srcdir)/cp-demangle.h $(INCDIR)/demangle.h \ $(INCDIR)/libiberty.h -floatformat.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/floatformat.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/cp-demint.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/cp-demint.c $(OUTPUT_OPTION) + +./cplus-dem.o: $(srcdir)/cplus-dem.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/cplus-dem.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/cplus-dem.c $(OUTPUT_OPTION) + +./dyn-string.o: $(srcdir)/dyn-string.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dyn-string.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/dyn-string.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/dyn-string.c $(OUTPUT_OPTION) + +./fdmatch.o: $(srcdir)/fdmatch.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/fdmatch.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/fdmatch.c $(OUTPUT_OPTION) + +./ffs.o: $(srcdir)/ffs.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/ffs.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/ffs.c $(OUTPUT_OPTION) + +./fibheap.o: $(srcdir)/fibheap.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/fibheap.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/fibheap.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/fibheap.c $(OUTPUT_OPTION) + +./floatformat.o: $(srcdir)/floatformat.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/floatformat.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/floatformat.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/floatformat.c $(OUTPUT_OPTION) + +./fnmatch.o: $(srcdir)/fnmatch.c config.h $(INCDIR)/fnmatch.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/fnmatch.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/fnmatch.c $(OUTPUT_OPTION) + +./getcwd.o: $(srcdir)/getcwd.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getcwd.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getcwd.c $(OUTPUT_OPTION) + +./getopt.o: $(srcdir)/getopt.c config.h $(INCDIR)/getopt.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getopt.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getopt.c $(OUTPUT_OPTION) + +./getopt1.o: $(srcdir)/getopt1.c config.h $(INCDIR)/getopt.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getopt1.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getopt1.c $(OUTPUT_OPTION) + +./getpagesize.o: $(srcdir)/getpagesize.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getpagesize.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getpagesize.c $(OUTPUT_OPTION) + +./getpwd.o: $(srcdir)/getpwd.c config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h -fnmatch.o: config.h $(INCDIR)/fnmatch.h $(INCDIR)/safe-ctype.h -getcwd.o: config.h -getopt.o: config.h $(INCDIR)/getopt.h -getopt1.o: config.h $(INCDIR)/getopt.h -getpagesize.o: config.h -getpwd.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -getruntime.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -hashtab.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/hashtab.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getpwd.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getpwd.c $(OUTPUT_OPTION) + +./getruntime.o: $(srcdir)/getruntime.c config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h -hex.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/getruntime.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/getruntime.c $(OUTPUT_OPTION) + +./hashtab.o: $(srcdir)/hashtab.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/hashtab.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/hashtab.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/hashtab.c $(OUTPUT_OPTION) + +./hex.o: $(srcdir)/hex.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ $(INCDIR)/safe-ctype.h -lbasename.o: $(INCDIR)/ansidecl.h $(INCDIR)/filenames.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/hex.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/hex.c $(OUTPUT_OPTION) + +./index.o: $(srcdir)/index.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/index.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/index.c $(OUTPUT_OPTION) + +./insque.o: $(srcdir)/insque.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/insque.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/insque.c $(OUTPUT_OPTION) + +./lbasename.o: $(srcdir)/lbasename.c $(INCDIR)/ansidecl.h $(INCDIR)/filenames.h \ $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h -lrealpath.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -make-relative-prefix.o: config.h $(INCDIR)/ansidecl.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/lbasename.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/lbasename.c $(OUTPUT_OPTION) + +./lrealpath.o: $(srcdir)/lrealpath.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/lrealpath.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/lrealpath.c $(OUTPUT_OPTION) + +./make-relative-prefix.o: $(srcdir)/make-relative-prefix.c config.h \ + $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/make-relative-prefix.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/make-relative-prefix.c $(OUTPUT_OPTION) + +./make-temp-file.o: $(srcdir)/make-temp-file.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/make-temp-file.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/make-temp-file.c $(OUTPUT_OPTION) + +./md5.o: $(srcdir)/md5.c config.h $(INCDIR)/ansidecl.h $(INCDIR)/md5.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/md5.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/md5.c $(OUTPUT_OPTION) + +./memchr.o: $(srcdir)/memchr.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/memchr.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/memchr.c $(OUTPUT_OPTION) + +./memcmp.o: $(srcdir)/memcmp.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/memcmp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/memcmp.c $(OUTPUT_OPTION) + +./memcpy.o: $(srcdir)/memcpy.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/memcpy.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/memcpy.c $(OUTPUT_OPTION) + +./memmove.o: $(srcdir)/memmove.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/memmove.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/memmove.c $(OUTPUT_OPTION) + +./mempcpy.o: $(srcdir)/mempcpy.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/mempcpy.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/mempcpy.c $(OUTPUT_OPTION) + +./memset.o: $(srcdir)/memset.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/memset.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/memset.c $(OUTPUT_OPTION) + +./mkstemps.o: $(srcdir)/mkstemps.c config.h $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/mkstemps.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/mkstemps.c $(OUTPUT_OPTION) + +./mpw.o: $(srcdir)/mpw.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/mpw.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/mpw.c $(OUTPUT_OPTION) + +./msdos.o: $(srcdir)/msdos.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/msdos.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/msdos.c $(OUTPUT_OPTION) + +./objalloc.o: $(srcdir)/objalloc.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/objalloc.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/objalloc.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/objalloc.c $(OUTPUT_OPTION) + +./obstack.o: $(srcdir)/obstack.c config.h $(INCDIR)/obstack.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/obstack.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/obstack.c $(OUTPUT_OPTION) + +./partition.o: $(srcdir)/partition.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(INCDIR)/partition.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/partition.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/partition.c $(OUTPUT_OPTION) + +./pex-djgpp.o: $(srcdir)/pex-djgpp.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-djgpp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-djgpp.c $(OUTPUT_OPTION) + +./pex-mpw.o: $(srcdir)/pex-mpw.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-mpw.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-mpw.c $(OUTPUT_OPTION) + +./pex-msdos.o: $(srcdir)/pex-msdos.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-msdos.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-msdos.c $(OUTPUT_OPTION) + +./pex-os2.o: $(srcdir)/pex-os2.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-os2.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-os2.c $(OUTPUT_OPTION) + +./pex-unix.o: $(srcdir)/pex-unix.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-unix.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-unix.c $(OUTPUT_OPTION) + +./pex-win32.o: $(srcdir)/pex-win32.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(srcdir)/pex-common.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/pex-win32.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/pex-win32.c $(OUTPUT_OPTION) + +./physmem.o: $(srcdir)/physmem.c config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/libiberty.h -make-temp-file.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -md5.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/md5.h -memchr.o: $(INCDIR)/ansidecl.h -memcmp.o: $(INCDIR)/ansidecl.h -memcpy.o: $(INCDIR)/ansidecl.h -memmove.o: $(INCDIR)/ansidecl.h -mempcpy.o: $(INCDIR)/ansidecl.h -memset.o: $(INCDIR)/ansidecl.h -mkstemps.o: config.h $(INCDIR)/ansidecl.h -objalloc.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/objalloc.h -obstack.o: config.h $(INCDIR)/obstack.h -partition.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(INCDIR)/partition.h -pex-djgpp.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h -pex-mpw.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h -pex-msdos.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h $(INCDIR)/safe-ctype.h -pex-os2.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h -pex-unix.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h -pex-win32.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(srcdir)/pex-common.h -physmem.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -putenv.o: config.h $(INCDIR)/ansidecl.h -random.o: $(INCDIR)/ansidecl.h -regex.o: config.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h -rename.o: config.h $(INCDIR)/ansidecl.h -safe-ctype.o: $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h -setenv.o: config.h $(INCDIR)/ansidecl.h -sigsetmask.o: $(INCDIR)/ansidecl.h -snprintf.o: $(INCDIR)/ansidecl.h -sort.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/physmem.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/physmem.c $(OUTPUT_OPTION) + +./putenv.o: $(srcdir)/putenv.c config.h $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/putenv.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/putenv.c $(OUTPUT_OPTION) + +./random.o: $(srcdir)/random.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/random.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/random.c $(OUTPUT_OPTION) + +./regex.o: $(srcdir)/regex.c config.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/regex.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/regex.c $(OUTPUT_OPTION) + +./rename.o: $(srcdir)/rename.c config.h $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/rename.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/rename.c $(OUTPUT_OPTION) + +./rindex.o: $(srcdir)/rindex.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/rindex.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/rindex.c $(OUTPUT_OPTION) + +./safe-ctype.o: $(srcdir)/safe-ctype.c $(INCDIR)/ansidecl.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/safe-ctype.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/safe-ctype.c $(OUTPUT_OPTION) + +./setenv.o: $(srcdir)/setenv.c config.h $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/setenv.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/setenv.c $(OUTPUT_OPTION) + +./sigsetmask.o: $(srcdir)/sigsetmask.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/sigsetmask.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/sigsetmask.c $(OUTPUT_OPTION) + +./snprintf.o: $(srcdir)/snprintf.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/snprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/snprintf.c $(OUTPUT_OPTION) + +./sort.o: $(srcdir)/sort.c config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ $(INCDIR)/sort.h -spaces.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -splay-tree.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(INCDIR)/splay-tree.h -stpcpy.o: $(INCDIR)/ansidecl.h -stpncpy.o: $(INCDIR)/ansidecl.h -strcasecmp.o: $(INCDIR)/ansidecl.h -strchr.o: $(INCDIR)/ansidecl.h -strdup.o: $(INCDIR)/ansidecl.h -strerror.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -strncasecmp.o: $(INCDIR)/ansidecl.h -strncmp.o: $(INCDIR)/ansidecl.h -strrchr.o: $(INCDIR)/ansidecl.h -strsignal.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -strtod.o: $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h -strtol.o: config.h $(INCDIR)/safe-ctype.h -strtoul.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h -ternary.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(INCDIR)/ternary.h -vasprintf.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -vfork.o: $(INCDIR)/ansidecl.h -vfprintf.o: $(INCDIR)/ansidecl.h -vprintf.o: $(INCDIR)/ansidecl.h -vsnprintf.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -vsprintf.o: $(INCDIR)/ansidecl.h -waitpid.o: config.h -xatexit.o: $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -xexit.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -xmalloc.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -xmemdup.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -xstrdup.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h -xstrerror.o: config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/sort.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/sort.c $(OUTPUT_OPTION) + +./spaces.o: $(srcdir)/spaces.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/spaces.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/spaces.c $(OUTPUT_OPTION) + +./splay-tree.o: $(srcdir)/splay-tree.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(INCDIR)/splay-tree.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/splay-tree.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/splay-tree.c $(OUTPUT_OPTION) + +./stpcpy.o: $(srcdir)/stpcpy.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/stpcpy.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/stpcpy.c $(OUTPUT_OPTION) + +./stpncpy.o: $(srcdir)/stpncpy.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/stpncpy.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/stpncpy.c $(OUTPUT_OPTION) + +./strcasecmp.o: $(srcdir)/strcasecmp.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strcasecmp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strcasecmp.c $(OUTPUT_OPTION) + +./strchr.o: $(srcdir)/strchr.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strchr.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strchr.c $(OUTPUT_OPTION) + +./strdup.o: $(srcdir)/strdup.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strdup.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strdup.c $(OUTPUT_OPTION) + +./strerror.o: $(srcdir)/strerror.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strerror.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strerror.c $(OUTPUT_OPTION) + +./strncasecmp.o: $(srcdir)/strncasecmp.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strncasecmp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strncasecmp.c $(OUTPUT_OPTION) + +./strncmp.o: $(srcdir)/strncmp.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strncmp.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strncmp.c $(OUTPUT_OPTION) + +./strrchr.o: $(srcdir)/strrchr.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strrchr.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strrchr.c $(OUTPUT_OPTION) + +./strsignal.o: $(srcdir)/strsignal.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strsignal.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strsignal.c $(OUTPUT_OPTION) + +./strstr.o: $(srcdir)/strstr.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strstr.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strstr.c $(OUTPUT_OPTION) + +./strtod.o: $(srcdir)/strtod.c $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strtod.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strtod.c $(OUTPUT_OPTION) + +./strtol.o: $(srcdir)/strtol.c config.h $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strtol.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strtol.c $(OUTPUT_OPTION) + +./strtoul.o: $(srcdir)/strtoul.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/safe-ctype.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/strtoul.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/strtoul.c $(OUTPUT_OPTION) + +./ternary.o: $(srcdir)/ternary.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ternary.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/ternary.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/ternary.c $(OUTPUT_OPTION) + +./tmpnam.o: $(srcdir)/tmpnam.c + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/tmpnam.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/tmpnam.c $(OUTPUT_OPTION) + +./vasprintf.o: $(srcdir)/vasprintf.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vasprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vasprintf.c $(OUTPUT_OPTION) + +./vfork.o: $(srcdir)/vfork.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vfork.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vfork.c $(OUTPUT_OPTION) + +./vfprintf.o: $(srcdir)/vfprintf.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vfprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vfprintf.c $(OUTPUT_OPTION) + +./vprintf.o: $(srcdir)/vprintf.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vprintf.c $(OUTPUT_OPTION) + +./vsnprintf.o: $(srcdir)/vsnprintf.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vsnprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vsnprintf.c $(OUTPUT_OPTION) + +./vsprintf.o: $(srcdir)/vsprintf.c $(INCDIR)/ansidecl.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/vsprintf.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/vsprintf.c $(OUTPUT_OPTION) + +./waitpid.o: $(srcdir)/waitpid.c config.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/waitpid.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/waitpid.c $(OUTPUT_OPTION) + +./xatexit.o: $(srcdir)/xatexit.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xatexit.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xatexit.c $(OUTPUT_OPTION) + +./xexit.o: $(srcdir)/xexit.c config.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xexit.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xexit.c $(OUTPUT_OPTION) + +./xmalloc.o: $(srcdir)/xmalloc.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xmalloc.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xmalloc.c $(OUTPUT_OPTION) + +./xmemdup.o: $(srcdir)/xmemdup.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xmemdup.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xmemdup.c $(OUTPUT_OPTION) + +./xstrdup.o: $(srcdir)/xstrdup.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xstrdup.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xstrdup.c $(OUTPUT_OPTION) + +./xstrerror.o: $(srcdir)/xstrerror.c config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/libiberty.h + if [ x"$(PICFLAG)" != x ]; then \ + $(COMPILE.c) $(PICFLAG) $(srcdir)/xstrerror.c -o pic/$@; \ + else true; fi + $(COMPILE.c) $(srcdir)/xstrerror.c $(OUTPUT_OPTION) + diff -uprN binutils-2.14.90.0.8/libiberty/configure binutils-2.15.90.0.1/libiberty/configure --- binutils-2.14.90.0.8/libiberty/configure 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/configure 2004-03-03 12:24:34.000000000 -0800 @@ -5864,11 +5864,11 @@ fi # Figure out which version of pexecute to use. case "${host}" in - *-*-mingw* | *-*-winnt*) pexecute=pex-win32.o ;; - *-*-msdosdjgpp*) pexecute=pex-djgpp.o ;; - *-*-msdos*) pexecute=pex-msdos.o ;; - *-*-os2-emx*) pexecute=pex-os2.o ;; - *) pexecute=pex-unix.o ;; + *-*-mingw* | *-*-winnt*) pexecute=./pex-win32.o ;; + *-*-msdosdjgpp*) pexecute=./pex-djgpp.o ;; + *-*-msdos*) pexecute=./pex-msdos.o ;; + *-*-os2-emx*) pexecute=./pex-os2.o ;; + *) pexecute=./pex-unix.o ;; esac @@ -6319,6 +6319,16 @@ else fi + +L="" +for l in x $LIBOBJS; do + case $l in + x) ;; + *) L="$L ./$l" ;; + esac +done +LIBOBJS="$L" + # We need multilib support, but only if configuring for the target. ac_config_files="$ac_config_files Makefile testsuite/Makefile" ac_config_commands="$ac_config_commands default" diff -uprN binutils-2.14.90.0.8/libiberty/configure.ac binutils-2.15.90.0.1/libiberty/configure.ac --- binutils-2.14.90.0.8/libiberty/configure.ac 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/configure.ac 2004-03-03 12:24:34.000000000 -0800 @@ -488,11 +488,11 @@ fi # Figure out which version of pexecute to use. case "${host}" in - *-*-mingw* | *-*-winnt*) pexecute=pex-win32.o ;; - *-*-msdosdjgpp*) pexecute=pex-djgpp.o ;; - *-*-msdos*) pexecute=pex-msdos.o ;; - *-*-os2-emx*) pexecute=pex-os2.o ;; - *) pexecute=pex-unix.o ;; + *-*-mingw* | *-*-winnt*) pexecute=./pex-win32.o ;; + *-*-msdosdjgpp*) pexecute=./pex-djgpp.o ;; + *-*-msdos*) pexecute=./pex-msdos.o ;; + *-*-os2-emx*) pexecute=./pex-os2.o ;; + *) pexecute=./pex-unix.o ;; esac AC_SUBST(pexecute) @@ -507,6 +507,16 @@ else fi AC_SUBST(INSTALL_DEST) +m4_pattern_allow(LIBOBJS) +L="" +for l in x $LIBOBJS; do + case $l in + x) ;; + *) L="$L ./$l" ;; + esac +done +LIBOBJS="$L" + # We need multilib support, but only if configuring for the target. AC_OUTPUT(Makefile testsuite/Makefile, [test -z "$CONFIG_HEADERS" || echo timestamp > stamp-h diff -uprN binutils-2.14.90.0.8/libiberty/cp-demangle.c binutils-2.15.90.0.1/libiberty/cp-demangle.c --- binutils-2.14.90.0.8/libiberty/cp-demangle.c 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/cp-demangle.c 2004-03-03 12:24:34.000000000 -0800 @@ -1748,31 +1748,33 @@ CP_STATIC_IF_GLIBCPP_V3 const struct demangle_builtin_type_info cplus_demangle_builtin_types[D_BUILTIN_TYPE_COUNT] = { - /* a */ { NL ("signed char"), NL ("signed char"), D_PRINT_INT }, + /* a */ { NL ("signed char"), NL ("signed char"), D_PRINT_DEFAULT }, /* b */ { NL ("bool"), NL ("boolean"), D_PRINT_BOOL }, - /* c */ { NL ("char"), NL ("byte"), D_PRINT_INT }, - /* d */ { NL ("double"), NL ("double"), D_PRINT_DEFAULT }, - /* e */ { NL ("long double"), NL ("long double"), D_PRINT_DEFAULT }, - /* f */ { NL ("float"), NL ("float"), D_PRINT_DEFAULT }, - /* g */ { NL ("__float128"), NL ("__float128"), D_PRINT_DEFAULT }, - /* h */ { NL ("unsigned char"), NL ("unsigned char"), D_PRINT_INT }, + /* c */ { NL ("char"), NL ("byte"), D_PRINT_DEFAULT }, + /* d */ { NL ("double"), NL ("double"), D_PRINT_FLOAT }, + /* e */ { NL ("long double"), NL ("long double"), D_PRINT_FLOAT }, + /* f */ { NL ("float"), NL ("float"), D_PRINT_FLOAT }, + /* g */ { NL ("__float128"), NL ("__float128"), D_PRINT_FLOAT }, + /* h */ { NL ("unsigned char"), NL ("unsigned char"), D_PRINT_DEFAULT }, /* i */ { NL ("int"), NL ("int"), D_PRINT_INT }, - /* j */ { NL ("unsigned int"), NL ("unsigned"), D_PRINT_INT }, + /* j */ { NL ("unsigned int"), NL ("unsigned"), D_PRINT_UNSIGNED }, /* k */ { NULL, 0, NULL, 0, D_PRINT_DEFAULT }, /* l */ { NL ("long"), NL ("long"), D_PRINT_LONG }, - /* m */ { NL ("unsigned long"), NL ("unsigned long"), D_PRINT_LONG }, + /* m */ { NL ("unsigned long"), NL ("unsigned long"), D_PRINT_UNSIGNED_LONG }, /* n */ { NL ("__int128"), NL ("__int128"), D_PRINT_DEFAULT }, - /* o */ { NL ("unsigned __int128"), NL ("unsigned __int128"), D_PRINT_DEFAULT }, + /* o */ { NL ("unsigned __int128"), NL ("unsigned __int128"), + D_PRINT_DEFAULT }, /* p */ { NULL, 0, NULL, 0, D_PRINT_DEFAULT }, /* q */ { NULL, 0, NULL, 0, D_PRINT_DEFAULT }, /* r */ { NULL, 0, NULL, 0, D_PRINT_DEFAULT }, - /* s */ { NL ("short"), NL ("short"), D_PRINT_INT }, - /* t */ { NL ("unsigned short"), NL ("unsigned short"), D_PRINT_INT }, + /* s */ { NL ("short"), NL ("short"), D_PRINT_DEFAULT }, + /* t */ { NL ("unsigned short"), NL ("unsigned short"), D_PRINT_DEFAULT }, /* u */ { NULL, 0, NULL, 0, D_PRINT_DEFAULT }, /* v */ { NL ("void"), NL ("void"), D_PRINT_VOID }, - /* w */ { NL ("wchar_t"), NL ("char"), D_PRINT_INT }, - /* x */ { NL ("long long"), NL ("long"), D_PRINT_DEFAULT }, - /* y */ { NL ("unsigned long long"), NL ("unsigned long long"), D_PRINT_DEFAULT }, + /* w */ { NL ("wchar_t"), NL ("char"), D_PRINT_DEFAULT }, + /* x */ { NL ("long long"), NL ("long"), D_PRINT_LONG_LONG }, + /* y */ { NL ("unsigned long long"), NL ("unsigned long long"), + D_PRINT_UNSIGNED_LONG_LONG }, /* z */ { NL ("..."), NL ("..."), D_PRINT_DEFAULT }, }; @@ -3050,6 +3052,30 @@ d_print_comp (dpi, dc) case DEMANGLE_COMPONENT_RESTRICT: case DEMANGLE_COMPONENT_VOLATILE: case DEMANGLE_COMPONENT_CONST: + { + struct d_print_mod *pdpm; + + /* When printing arrays, it's possible to have cases where the + same CV-qualifier gets pushed on the stack multiple times. + We only need to print it once. */ + + for (pdpm = dpi->modifiers; pdpm != NULL; pdpm = pdpm->next) + { + if (! pdpm->printed) + { + if (pdpm->mod->type != DEMANGLE_COMPONENT_RESTRICT + && pdpm->mod->type != DEMANGLE_COMPONENT_VOLATILE + && pdpm->mod->type != DEMANGLE_COMPONENT_CONST) + break; + if (pdpm->mod->type == dc->type) + { + d_print_comp (dpi, d_left (dc)); + return; + } + } + } + } + /* Fall through. */ case DEMANGLE_COMPONENT_RESTRICT_THIS: case DEMANGLE_COMPONENT_VOLATILE_THIS: case DEMANGLE_COMPONENT_CONST_THIS: @@ -3125,24 +3151,65 @@ d_print_comp (dpi, dc) case DEMANGLE_COMPONENT_ARRAY_TYPE: { - struct d_print_mod dpm; + struct d_print_mod *hold_modifiers; + struct d_print_mod adpm[4]; + unsigned int i; + struct d_print_mod *pdpm; /* We must pass this type down as a modifier in order to print - multi-dimensional arrays correctly. */ + multi-dimensional arrays correctly. If the array itself is + CV-qualified, we act as though the element type were + CV-qualified. We do this by copying the modifiers down + rather than fiddling pointers, so that we don't wind up + with a d_print_mod higher on the stack pointing into our + stack frame after we return. */ - dpm.next = dpi->modifiers; - dpi->modifiers = &dpm; - dpm.mod = dc; - dpm.printed = 0; - dpm.templates = dpi->templates; + hold_modifiers = dpi->modifiers; + + adpm[0].next = hold_modifiers; + dpi->modifiers = &adpm[0]; + adpm[0].mod = dc; + adpm[0].printed = 0; + adpm[0].templates = dpi->templates; + + i = 1; + pdpm = hold_modifiers; + while (pdpm != NULL + && (pdpm->mod->type == DEMANGLE_COMPONENT_RESTRICT + || pdpm->mod->type == DEMANGLE_COMPONENT_VOLATILE + || pdpm->mod->type == DEMANGLE_COMPONENT_CONST)) + { + if (! pdpm->printed) + { + if (i >= sizeof adpm / sizeof adpm[0]) + { + d_print_error (dpi); + return; + } + + adpm[i] = *pdpm; + adpm[i].next = dpi->modifiers; + dpi->modifiers = &adpm[i]; + pdpm->printed = 1; + ++i; + } + + pdpm = pdpm->next; + } d_print_comp (dpi, d_right (dc)); - dpi->modifiers = dpm.next; + dpi->modifiers = hold_modifiers; - if (dpm.printed) + if (adpm[0].printed) return; + while (i > 1) + { + --i; + d_print_mod (dpi, adpm[i].mod); + } + d_print_array_type (dpi, dc, dpi->modifiers); return; @@ -3212,15 +3279,13 @@ d_print_comp (dpi, dc) d_print_expr_op (dpi, d_left (dc)); else { - d_append_string_constant (dpi, "(("); + d_append_char (dpi, '('); d_print_cast (dpi, d_left (dc)); d_append_char (dpi, ')'); } d_append_char (dpi, '('); d_print_comp (dpi, d_right (dc)); d_append_char (dpi, ')'); - if (d_left (dc)->type == DEMANGLE_COMPONENT_CAST) - d_append_char (dpi, ')'); return; case DEMANGLE_COMPONENT_BINARY: @@ -3284,62 +3349,86 @@ d_print_comp (dpi, dc) case DEMANGLE_COMPONENT_LITERAL: case DEMANGLE_COMPONENT_LITERAL_NEG: - /* For some builtin types, produce simpler output. */ - if (d_left (dc)->type == DEMANGLE_COMPONENT_BUILTIN_TYPE) - { - switch (d_left (dc)->u.s_builtin.type->print) - { - case D_PRINT_INT: - if (d_right (dc)->type == DEMANGLE_COMPONENT_NAME) - { - if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) - d_append_char (dpi, '-'); - d_print_comp (dpi, d_right (dc)); - return; - } - break; + { + enum d_builtin_type_print tp; - case D_PRINT_LONG: - if (d_right (dc)->type == DEMANGLE_COMPONENT_NAME) - { - if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) - d_append_char (dpi, '-'); - d_print_comp (dpi, d_right (dc)); - d_append_char (dpi, 'l'); - return; - } - break; + /* For some builtin types, produce simpler output. */ + tp = D_PRINT_DEFAULT; + if (d_left (dc)->type == DEMANGLE_COMPONENT_BUILTIN_TYPE) + { + tp = d_left (dc)->u.s_builtin.type->print; + switch (tp) + { + case D_PRINT_INT: + case D_PRINT_UNSIGNED: + case D_PRINT_LONG: + case D_PRINT_UNSIGNED_LONG: + case D_PRINT_LONG_LONG: + case D_PRINT_UNSIGNED_LONG_LONG: + if (d_right (dc)->type == DEMANGLE_COMPONENT_NAME) + { + if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) + d_append_char (dpi, '-'); + d_print_comp (dpi, d_right (dc)); + switch (tp) + { + default: + break; + case D_PRINT_UNSIGNED: + d_append_char (dpi, 'u'); + break; + case D_PRINT_LONG: + d_append_char (dpi, 'l'); + break; + case D_PRINT_UNSIGNED_LONG: + d_append_string_constant (dpi, "ul"); + break; + case D_PRINT_LONG_LONG: + d_append_string_constant (dpi, "ll"); + break; + case D_PRINT_UNSIGNED_LONG_LONG: + d_append_string_constant (dpi, "ull"); + break; + } + return; + } + break; - case D_PRINT_BOOL: - if (d_right (dc)->type == DEMANGLE_COMPONENT_NAME - && d_right (dc)->u.s_name.len == 1 - && dc->type == DEMANGLE_COMPONENT_LITERAL) - { - switch (d_right (dc)->u.s_name.s[0]) - { - case '0': - d_append_string_constant (dpi, "false"); - return; - case '1': - d_append_string_constant (dpi, "true"); - return; - default: - break; - } - } - break; + case D_PRINT_BOOL: + if (d_right (dc)->type == DEMANGLE_COMPONENT_NAME + && d_right (dc)->u.s_name.len == 1 + && dc->type == DEMANGLE_COMPONENT_LITERAL) + { + switch (d_right (dc)->u.s_name.s[0]) + { + case '0': + d_append_string_constant (dpi, "false"); + return; + case '1': + d_append_string_constant (dpi, "true"); + return; + default: + break; + } + } + break; - default: - break; - } - } + default: + break; + } + } - d_append_char (dpi, '('); - d_print_comp (dpi, d_left (dc)); - d_append_char (dpi, ')'); - if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) - d_append_char (dpi, '-'); - d_print_comp (dpi, d_right (dc)); + d_append_char (dpi, '('); + d_print_comp (dpi, d_left (dc)); + d_append_char (dpi, ')'); + if (dc->type == DEMANGLE_COMPONENT_LITERAL_NEG) + d_append_char (dpi, '-'); + if (tp == D_PRINT_FLOAT) + d_append_char (dpi, '['); + d_print_comp (dpi, d_right (dc)); + if (tp == D_PRINT_FLOAT) + d_append_char (dpi, ']'); + } return; default: @@ -3549,11 +3638,13 @@ d_print_function_type (dpi, dc, mods) { int need_paren; int saw_mod; + int need_space; struct d_print_mod *p; struct d_print_mod *hold_modifiers; need_paren = 0; saw_mod = 0; + need_space = 0; for (p = mods; p != NULL; p = p->next) { if (p->printed) @@ -3562,15 +3653,18 @@ d_print_function_type (dpi, dc, mods) saw_mod = 1; switch (p->mod->type) { + case DEMANGLE_COMPONENT_POINTER: + case DEMANGLE_COMPONENT_REFERENCE: + need_paren = 1; + break; case DEMANGLE_COMPONENT_RESTRICT: case DEMANGLE_COMPONENT_VOLATILE: case DEMANGLE_COMPONENT_CONST: case DEMANGLE_COMPONENT_VENDOR_TYPE_QUAL: - case DEMANGLE_COMPONENT_POINTER: - case DEMANGLE_COMPONENT_REFERENCE: case DEMANGLE_COMPONENT_COMPLEX: case DEMANGLE_COMPONENT_IMAGINARY: case DEMANGLE_COMPONENT_PTRMEM_TYPE: + need_space = 1; need_paren = 1; break; case DEMANGLE_COMPONENT_RESTRICT_THIS: @@ -3589,18 +3683,14 @@ d_print_function_type (dpi, dc, mods) if (need_paren) { - switch (d_last_char (dpi)) + if (! need_space) { - case ' ': - case '(': - case '*': - break; - - default: - d_append_char (dpi, ' '); - break; + if (d_last_char (dpi) != '(' + && d_last_char (dpi) != '*') + need_space = 1; } - + if (need_space && d_last_char (dpi) != ' ') + d_append_char (dpi, ' '); d_append_char (dpi, '('); } @@ -3643,19 +3733,19 @@ d_print_array_type (dpi, dc, mods) need_paren = 0; for (p = mods; p != NULL; p = p->next) { - if (p->printed) - break; - - if (p->mod->type == DEMANGLE_COMPONENT_ARRAY_TYPE) + if (! p->printed) { - need_space = 0; - break; - } - else - { - need_paren = 1; - need_space = 1; - break; + if (p->mod->type == DEMANGLE_COMPONENT_ARRAY_TYPE) + { + need_space = 0; + break; + } + else + { + need_paren = 1; + need_space = 1; + break; + } } } @@ -3944,29 +4034,46 @@ __cxa_demangle (mangled_name, output_buf char *demangled; size_t alc; - if (status == NULL) - return NULL; - if (mangled_name == NULL) { - *status = -3; + if (status != NULL) + *status = -3; return NULL; } if (output_buffer != NULL && length == NULL) { - *status = -3; + if (status != NULL) + *status = -3; return NULL; } - demangled = d_demangle (mangled_name, DMGL_TYPES, &alc); + /* The specification for __cxa_demangle() is that if the mangled + name could be either an extern "C" identifier, or an internal + built-in type name, then we resolve it as the identifier. All + internal built-in type names are a single lower case character. + Frankly, this simplistic disambiguation doesn't make sense to me, + but it is documented, so we implement it here. */ + if (IS_LOWER (mangled_name[0]) + && mangled_name[1] == '\0' + && cplus_demangle_builtin_types[mangled_name[0] - 'a'].name != NULL) + { + if (status != NULL) + *status = -2; + return NULL; + } + + demangled = d_demangle (mangled_name, DMGL_PARAMS | DMGL_TYPES, &alc); if (demangled == NULL) { - if (alc == 1) - *status = -1; - else - *status = -2; + if (status != NULL) + { + if (alc == 1) + *status = -1; + else + *status = -2; + } return NULL; } @@ -3990,7 +4097,8 @@ __cxa_demangle (mangled_name, output_buf } } - *status = 0; + if (status != NULL) + *status = 0; return demangled; } @@ -4296,7 +4404,11 @@ main (argc, argv) if (dyn_string_length (mangled) > 0) { +#ifdef IN_GLIBCPP_V3 + s = __cxa_demangle (dyn_string_buf (mangled), NULL, NULL, NULL); +#else s = cplus_demangle_v3 (dyn_string_buf (mangled), options); +#endif if (s != NULL) { @@ -4328,9 +4440,16 @@ main (argc, argv) for (i = optind; i < argc; ++i) { char *s; +#ifdef IN_GLIBCPP_V3 + int status; +#endif /* Attempt to demangle. */ +#ifdef IN_GLIBCPP_V3 + s = __cxa_demangle (argv[i], NULL, NULL, &status); +#else s = cplus_demangle_v3 (argv[i], options); +#endif /* If it worked, print the demangled name. */ if (s != NULL) @@ -4339,7 +4458,13 @@ main (argc, argv) free (s); } else - fprintf (stderr, "Failed: %s\n", argv[i]); + { +#ifdef IN_GLIBCPP_V3 + fprintf (stderr, "Failed: %s (status %d)\n", argv[i], status); +#else + fprintf (stderr, "Failed: %s\n", argv[i]); +#endif + } } } diff -uprN binutils-2.14.90.0.8/libiberty/cp-demangle.h binutils-2.15.90.0.1/libiberty/cp-demangle.h --- binutils-2.14.90.0.8/libiberty/cp-demangle.h 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/cp-demangle.h 2004-03-03 12:24:34.000000000 -0800 @@ -53,10 +53,20 @@ enum d_builtin_type_print D_PRINT_DEFAULT, /* Print as integer. */ D_PRINT_INT, - /* Print as long, with trailing `l'. */ + /* Print as unsigned integer, with trailing "u". */ + D_PRINT_UNSIGNED, + /* Print as long, with trailing "l". */ D_PRINT_LONG, + /* Print as unsigned long, with trailing "ul". */ + D_PRINT_UNSIGNED_LONG, + /* Print as long long, with trailing "ll". */ + D_PRINT_LONG_LONG, + /* Print as unsigned long long, with trailing "ull". */ + D_PRINT_UNSIGNED_LONG_LONG, /* Print as bool. */ D_PRINT_BOOL, + /* Print as float--put value in square brackets. */ + D_PRINT_FLOAT, /* Print in usual way, but here to detect void. */ D_PRINT_VOID }; diff -uprN binutils-2.14.90.0.8/libiberty/dyn-string.c binutils-2.15.90.0.1/libiberty/dyn-string.c --- binutils-2.14.90.0.8/libiberty/dyn-string.c 2002-04-05 10:03:50.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/dyn-string.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* An abstract string datatype. - Copyright (C) 1998, 1999, 2000, 2002 Free Software Foundation, Inc. + Copyright (C) 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc. Contributed by Mark Mitchell (mark@markmitchell.com). This file is part of GNU CC. @@ -45,15 +45,6 @@ Boston, MA 02111-1307, USA. */ #include "libiberty.h" #include "dyn-string.h" -/* If this file is being compiled for inclusion in the C++ runtime - library, as part of the demangler implementation, we don't want to - abort if an allocation fails. Instead, percolate an error code up - through the call chain. */ - -#if defined(IN_LIBGCC2) || defined(IN_GLIBCPP_V3) -#define RETURN_ON_ALLOCATION_FAILURE -#endif - /* Performs in-place initialization of a dyn_string struct. This function can be used with a dyn_string struct on the stack or embedded in another object. The contents of of the string itself diff -uprN binutils-2.14.90.0.8/libiberty/getpwd.c binutils-2.15.90.0.1/libiberty/getpwd.c --- binutils-2.14.90.0.8/libiberty/getpwd.c 2001-10-15 21:27:23.000000000 -0700 +++ binutils-2.15.90.0.1/libiberty/getpwd.c 2004-03-03 12:24:34.000000000 -0800 @@ -35,6 +35,9 @@ extern int errno; #if HAVE_SYS_STAT_H #include #endif +#if HAVE_LIMITS_H +#include +#endif /* Prototype these in case the system headers don't provide them. */ extern char *getpwd (); diff -uprN binutils-2.14.90.0.8/libiberty/maint-tool binutils-2.15.90.0.1/libiberty/maint-tool --- binutils-2.14.90.0.8/libiberty/maint-tool 2003-05-05 14:46:50.000000000 -0700 +++ binutils-2.15.90.0.1/libiberty/maint-tool 2004-03-03 12:24:34.000000000 -0800 @@ -213,6 +213,12 @@ sub locals_first { sub deps { + $crule = "\tif [ x\"\$(PICFLAG)\" != x ]; then \\\n"; + $crule .= "\t \$(COMPILE.c) \$(PICFLAG) \$< -o pic/\$@; \\\n"; + $crule .= "\telse true; fi\n"; + $crule .= "\t\$(COMPILE.c) \$< \$(OUTPUT_OPTION)\n"; + $crule .= "\n"; + $incdir = shift @ARGV; opendir(INC, $incdir); @@ -260,10 +266,10 @@ sub deps { @deps = sort { &locals_first($a,$b) } keys %scanned; $obj = $f; $obj =~ s/\.c$/.o/; - $obj = "$obj:"; + $obj = "./$obj:"; if ($#deps >= 0) { - print OUT $obj; - $len = length($obj); + print OUT "$obj \$(srcdir)/$f"; + $len = length("$obj $f"); for $dt (@deps) { $d = $mine{$dt}; if ($len + length($d) > 70) { @@ -275,7 +281,12 @@ sub deps { } } print OUT "\n"; + } else { + print OUT "$obj \$(srcdir)/$f\n"; } + $c = $crule; + $c =~ s@\$\<@\$\(srcdir\)\/$f@g; + print OUT $c; } } closedir(S); diff -uprN binutils-2.14.90.0.8/libiberty/regex.c binutils-2.15.90.0.1/libiberty/regex.c --- binutils-2.14.90.0.8/libiberty/regex.c 2003-05-05 14:46:50.000000000 -0700 +++ binutils-2.15.90.0.1/libiberty/regex.c 2004-03-03 12:24:34.000000000 -0800 @@ -36,6 +36,8 @@ # include #endif +#include + #ifndef PARAMS # if defined __GNUC__ || (defined __STDC__ && __STDC__) # define PARAMS(args) args @@ -8040,7 +8042,7 @@ regcomp (preg, pattern, cflags) /* Map uppercase characters to corresponding lowercase ones. */ for (i = 0; i < CHAR_SET_SIZE; i++) - preg->translate[i] = ISUPPER (i) ? TOLOWER (i) : i; + preg->translate[i] = ISUPPER (i) ? TOLOWER (i) : (int) i; } else preg->translate = NULL; @@ -8175,7 +8177,7 @@ weak_alias (__regexec, regexec) size_t regerror (errcode, preg, errbuf, errbuf_size) int errcode; - const regex_t *preg; + const regex_t *preg ATTRIBUTE_UNUSED; char *errbuf; size_t errbuf_size; { diff -uprN binutils-2.14.90.0.8/libiberty/strdup.c binutils-2.15.90.0.1/libiberty/strdup.c --- binutils-2.14.90.0.8/libiberty/strdup.c 2003-05-05 14:46:51.000000000 -0700 +++ binutils-2.15.90.0.1/libiberty/strdup.c 2004-03-03 12:24:34.000000000 -0800 @@ -22,7 +22,7 @@ extern PTR memcpy PARAMS ((PTR, const PT char * strdup(s) - char *s; + const char *s; { size_t len = strlen (s) + 1; char *result = (char*) malloc (len); diff -uprN binutils-2.14.90.0.8/libiberty/testsuite/demangle-expected binutils-2.15.90.0.1/libiberty/testsuite/demangle-expected --- binutils-2.14.90.0.8/libiberty/testsuite/demangle-expected 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/libiberty/testsuite/demangle-expected 2004-03-03 12:24:34.000000000 -0800 @@ -3591,13 +3591,13 @@ hairyfunc5 # This is from gcc PR 8861 --format=gnu-v3 --no-params _Z1fILi1ELc120EEv1AIXplT_cviLd810000000000000000703DAD7A370C5EEE -void f<1, 120>(A<(1) + (((int)((double)810000000000000000703DAD7A370C5)))>) -f<1, 120> +void f<1, (char)120>(A<(1) + ((int)((double)[810000000000000000703DAD7A370C5]))>) +f<1, (char)120> # # This is also from gcc PR 8861 --format=gnu-v3 --no-params _Z1fILi1EEv1AIXplT_cvingLf3f800000EEE -void f<1>(A<(1) + (((int)(-((float)3f800000))))>) +void f<1>(A<(1) + ((int)(-((float)[3f800000])))>) f<1> # # This is from a libstdc++ debug mode patch. @@ -3635,7 +3635,7 @@ std::operator< # More hairy qualifier handling. --format=gnu-v3 --no-params _Z9hairyfuncM1YKFPVPFrPA2_PM1XKFKPA3_ilEPcEiE -hairyfunc(int (* const (X::** (* restrict (* volatile*(Y::*)(int) const)(char*)) [2])(long) const) [3]) +hairyfunc(int (* const (X::** (* restrict (* volatile* (Y::*)(int) const)(char*)) [2])(long) const) [3]) hairyfunc # # Check that negative numbers are handled correctly. @@ -3681,6 +3681,24 @@ _ZNK5boost6spirit5matchI13rcs_deltatextE boost::spirit::match::operator void (boost::spirit::impl::dummy::*)()() const boost::spirit::match::operator void (boost::spirit::impl::dummy::*)() # +# Multi-dimensional arrays with qualifiers on the inner dimensions. +--format=gnu-v3 --no-params +_Z3fooIA6_KiEvA9_KT_rVPrS4_ +void foo(int const [9][6], int restrict const (* volatile restrict) [9][6]) +foo +# +# From PR libstdc++/12736 +--format=gnu-v3 --no-params +_Z3fooIA3_iEvRKT_ +void foo(int const (&) [3]) +foo +# +# Related to PR libstdc++/12736 +--format=gnu-v3 --no-params +_Z3fooIPA3_iEvRKT_ +void foo(int (* const&) [3]) +foo +# # Test GNU V3 constructor and destructor identification. # 0 means it is not a constructor/destructor. # Other integers correspond to enum gnu_v3_{c,d}tor_kinds in demangle.h. diff -uprN binutils-2.14.90.0.8/mkinstalldirs binutils-2.15.90.0.1/mkinstalldirs --- binutils-2.14.90.0.8/mkinstalldirs 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/mkinstalldirs 2004-03-03 12:24:33.000000000 -0800 @@ -1,20 +1,32 @@ #! /bin/sh # mkinstalldirs --- make directory hierarchy -# Author: Noah Friedman + +scriptversion=2004-02-15.20 + +# Original author: Noah Friedman # Created: 1993-05-16 -# Public domain +# Public domain. +# +# This file is maintained in Automake, please report +# bugs to or send patches to +# . errstatus=0 dirmode="" usage="\ -Usage: mkinstalldirs [-h] [--help] [-m mode] dir ..." +Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ... + +Create each directory DIR (with mode MODE, if specified), including all +leading file name components. + +Report bugs to ." # process command line arguments while test $# -gt 0 ; do case $1 in -h | --help | --h*) # -h for help - echo "$usage" 1>&2 + echo "$usage" exit 0 ;; -m) # -m PERM arg @@ -23,6 +35,10 @@ while test $# -gt 0 ; do dirmode=$1 shift ;; + --version) + echo "$0 $scriptversion" + exit 0 + ;; --) # stop option processing shift break @@ -50,17 +66,37 @@ case $# in 0) exit 0 ;; esac +# Solaris 8's mkdir -p isn't thread-safe. If you mkdir -p a/b and +# mkdir -p a/c at the same time, both will detect that a is missing, +# one will create a, then the other will try to create a and die with +# a "File exists" error. This is a problem when calling mkinstalldirs +# from a parallel make. We use --version in the probe to restrict +# ourselves to GNU mkdir, which is thread-safe. case $dirmode in '') - if mkdir -p -- . 2>/dev/null; then + if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then echo "mkdir -p -- $*" exec mkdir -p -- "$@" + else + # On NextStep and OpenStep, the `mkdir' command does not + # recognize any option. It will interpret all options as + # directories to create, and then abort because `.' already + # exists. + test -d ./-p && rmdir ./-p + test -d ./--version && rmdir ./--version fi ;; *) - if mkdir -m "$dirmode" -p -- . 2>/dev/null; then + if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 && + test ! -d ./--version; then echo "mkdir -m $dirmode -p -- $*" exec mkdir -m "$dirmode" -p -- "$@" + else + # Clean up after NextStep and OpenStep mkdir. + for d in ./-m ./-p ./--version "./$dirmode"; + do + test -d $d && rmdir $d + done fi ;; esac @@ -84,17 +120,17 @@ do mkdir "$pathcomp" || lasterr=$? if test ! -d "$pathcomp"; then - errstatus=$lasterr + errstatus=$lasterr else - if test ! -z "$dirmode"; then + if test ! -z "$dirmode"; then echo "chmod $dirmode $pathcomp" - lasterr="" - chmod "$dirmode" "$pathcomp" || lasterr=$? + lasterr="" + chmod "$dirmode" "$pathcomp" || lasterr=$? - if test ! -z "$lasterr"; then - errstatus=$lasterr - fi - fi + if test ! -z "$lasterr"; then + errstatus=$lasterr + fi + fi fi fi @@ -107,5 +143,8 @@ exit $errstatus # Local Variables: # mode: shell-script # sh-indentation: 2 +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-end: "$" # End: -# mkinstalldirs ends here diff -uprN binutils-2.14.90.0.8/opcodes/ChangeLog binutils-2.15.90.0.1/opcodes/ChangeLog --- binutils-2.14.90.0.8/opcodes/ChangeLog 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/ChangeLog 2004-03-03 12:24:34.000000000 -0800 @@ -1,3 +1,104 @@ +2003-03-03 Andrew Stubbs + + * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in + nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. + * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions + accordingly. + +2004-03-01 Richard Sandiford + + * frv-asm.c: Regenerate. + * frv-desc.c: Regenerate. + * frv-desc.h: Regenerate. + * frv-dis.c: Regenerate. + * frv-ibld.c: Regenerate. + * frv-opc.c: Regenerate. + * frv-opc.h: Regenerate. + +2004-03-01 Richard Sandiford + + * frv-desc.c, frv-opc.c: Regenerate. + +2004-03-01 Richard Sandiford + + * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. + +2004-02-26 Andrew Stubbs + + * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. + Also correct mistake in the comment. + +2004-02-26 Andrew Stubbs + + * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to + ensure that double registers have even numbers. + Add REG_N_B01 for nn01 (binary 01) nibble to ensure + that reserved instruction 0xfffd does not decode the same + as 0xfdfd (ftrv). + * sh-opc.h: Add REG_N_D nibble type and use it whereever + REG_N refers to a double register. + Add REG_N_B01 nibble type and use it instead of REG_NM + in ftrv. + Adjust the bit patterns in a few comments. + +2004-02-25 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. + +2004-02-20 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat. + +2004-02-20 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Add m*ivor35. + +2004-02-20 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34, + mtivor32, mtivor33, mtivor34. + +2004-02-19 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Add mfmcar. + +2004-02-10 Petko Manolov + + * arm-opc.h Maverick accumulator register opcode fixes. + +2004-02-13 Ben Elliston + + * m32r-dis.c: Regenerate. + +2004-01-27 Michael Snyder + + * sh-opc.h (sh_table): "fsrra", not "fssra". + +2004-01-23 Andrew Over + + * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten + contraints. + +2004-01-19 Andrew Over + + * sparc-opc.c (sparc_opcodes) : Fix args. + +2004-01-19 Alan Modra + + * i386-dis.c (OP_E): Print scale factor on intel mode sib when not + 1. Don't print scale factor on AT&T mode when index missing. + +2004-01-16 Alexandre Oliva + + * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended + when loaded into XR registers. + +2004-01-14 Richard Sandiford + + * frv-desc.h: Regenerate. + * frv-desc.c: Regenerate. + * frv-opc.c: Regenerate. + 2004-01-13 Michael Snyder * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn. diff -uprN binutils-2.14.90.0.8/opcodes/arm-opc.h binutils-2.15.90.0.1/opcodes/arm-opc.h --- binutils-2.14.90.0.8/opcodes/arm-opc.h 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/arm-opc.h 2004-03-03 12:24:34.000000000 -0800 @@ -506,18 +506,18 @@ static const struct arm_opcode arm_opcod {0x0e100510, 0x0ff00fff, "cfmvr64l%c\t%12-15r, mvdx%16-19d"}, {0x0e000530, 0x0ff00fff, "cfmv64hr%c\tmvdx%16-19d, %12-15r"}, {0x0e100530, 0x0ff00fff, "cfmvr64h%c\t%12-15r, mvdx%16-19d"}, - {0x0e100610, 0x0ff0fff0, "cfmval32%c\tmvax%0-3d, mvfx%16-19d"}, - {0x0e000610, 0x0ff0fff0, "cfmv32al%c\tmvfx%0-3d, mvax%16-19d"}, - {0x0e100630, 0x0ff0fff0, "cfmvam32%c\tmvax%0-3d, mvfx%16-19d"}, - {0x0e000630, 0x0ff0fff0, "cfmv32am%c\tmvfx%0-3d, mvax%16-19d"}, - {0x0e100650, 0x0ff0fff0, "cfmvah32%c\tmvax%0-3d, mvfx%16-19d"}, - {0x0e000650, 0x0ff0fff0, "cfmv32ah%c\tmvfx%0-3d, mvax%16-19d"}, - {0x0e000670, 0x0ff0fff0, "cfmv32a%c\tmvfx%0-3d, mvax%16-19d"}, - {0x0e100670, 0x0ff0fff0, "cfmva32%c\tmvax%0-3d, mvfx%16-19d"}, - {0x0e000690, 0x0ff0fff0, "cfmv64a%c\tmvdx%0-3d, mvax%16-19d"}, - {0x0e100690, 0x0ff0fff0, "cfmva64%c\tmvax%0-3d, mvdx%16-19d"}, - {0x0e1006b0, 0x0ff0fff0, "cfmvsc32%c\tdspsc, mvfx%16-19d"}, - {0x0e0006b0, 0x0ff0fff0, "cfmv32sc%c\tmvfx%0-3d, dspsc"}, + {0x0e200440, 0x0ff00fff, "cfmval32%c\tmvax%12-15d, mvfx%16-19d"}, + {0x0e100440, 0x0ff00fff, "cfmv32al%c\tmvfx%12-15d, mvax%16-19d"}, + {0x0e200460, 0x0ff00fff, "cfmvam32%c\tmvax%12-15d, mvfx%16-19d"}, + {0x0e100460, 0x0ff00fff, "cfmv32am%c\tmvfx%12-15d, mvax%16-19d"}, + {0x0e200480, 0x0ff00fff, "cfmvah32%c\tmvax%12-15d, mvfx%16-19d"}, + {0x0e100480, 0x0ff00fff, "cfmv32ah%c\tmvfx%12-15d, mvax%16-19d"}, + {0x0e2004a0, 0x0ff00fff, "cfmva32%c\tmvax%12-15d, mvfx%16-19d"}, + {0x0e1004a0, 0x0ff00fff, "cfmv32a%c\tmvfx%12-15d, mvax%16-19d"}, + {0x0e2004c0, 0x0ff00fff, "cfmva64%c\tmvax%12-15d, mvdx%16-19d"}, + {0x0e1004c0, 0x0ff00fff, "cfmv64a%c\tmvdx%12-15d, mvax%16-19d"}, + {0x0e2004e0, 0x0fff0fff, "cfmvsc32%c\tdspsc, mvdx%12-15d"}, + {0x0e1004e0, 0x0fff0fff, "cfmv32sc%c\tmvdx%12-15d, dspsc"}, {0x0e000400, 0x0ff00fff, "cfcpys%c\tmvf%12-15d, mvf%16-19d"}, {0x0e000420, 0x0ff00fff, "cfcpyd%c\tmvd%12-15d, mvd%16-19d"}, {0x0e000460, 0x0ff00fff, "cfcvtsd%c\tmvd%12-15d, mvf%16-19d"}, diff -uprN binutils-2.14.90.0.8/opcodes/frv-asm.c binutils-2.15.90.0.1/opcodes/frv-asm.c --- binutils-2.14.90.0.8/opcodes/frv-asm.c 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/frv-asm.c 2004-03-03 12:24:34.000000000 -0800 @@ -860,6 +860,21 @@ frv_cgen_parse_operand (cd, opindex, str case FRV_OPERAND_LI : errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LI, &fields->f_LI); break; + case FRV_OPERAND_LRAD : + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAD, &fields->f_LRAD); + break; + case FRV_OPERAND_LRAE : + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAE, &fields->f_LRAE); + break; + case FRV_OPERAND_LRAS : + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_LRAS, &fields->f_LRAS); + break; + case FRV_OPERAND_TLBPRL : + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPRL, &fields->f_TLBPRL); + break; + case FRV_OPERAND_TLBPROPX : + errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_TLBPROPX, &fields->f_TLBPRopx); + break; case FRV_OPERAND_AE : errmsg = cgen_parse_unsigned_integer (cd, strp, FRV_OPERAND_AE, &fields->f_ae); break; diff -uprN binutils-2.14.90.0.8/opcodes/frv-desc.c binutils-2.15.90.0.1/opcodes/frv-desc.c --- binutils-2.14.90.0.8/opcodes/frv-desc.c 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/frv-desc.c 2004-03-03 12:24:34.000000000 -0800 @@ -49,6 +49,7 @@ static const CGEN_ATTR_ENTRY MACH_attr[] { "frv", MACH_FRV }, { "fr550", MACH_FR550 }, { "fr500", MACH_FR500 }, + { "fr450", MACH_FR450 }, { "fr400", MACH_FR400 }, { "tomcat", MACH_TOMCAT }, { "simple", MACH_SIMPLE }, @@ -84,11 +85,13 @@ static const CGEN_ATTR_ENTRY UNIT_attr[] { "B01", UNIT_B01 }, { "C", UNIT_C }, { "MULT_DIV", UNIT_MULT_DIV }, + { "IACC", UNIT_IACC }, { "LOAD", UNIT_LOAD }, { "STORE", UNIT_STORE }, { "SCAN", UNIT_SCAN }, { "DCPL", UNIT_DCPL }, { "MDUALACC", UNIT_MDUALACC }, + { "MDCUTSSI", UNIT_MDCUTSSI }, { "MCLRACC_1", UNIT_MCLRACC_1 }, { "NUM_UNITS", UNIT_NUM_UNITS }, { 0, 0 } @@ -115,6 +118,31 @@ static const CGEN_ATTR_ENTRY FR400_MAJOR { 0, 0 } }; +static const CGEN_ATTR_ENTRY FR450_MAJOR_attr[] = +{ + { "NONE", FR450_MAJOR_NONE }, + { "I_1", FR450_MAJOR_I_1 }, + { "I_2", FR450_MAJOR_I_2 }, + { "I_3", FR450_MAJOR_I_3 }, + { "I_4", FR450_MAJOR_I_4 }, + { "I_5", FR450_MAJOR_I_5 }, + { "B_1", FR450_MAJOR_B_1 }, + { "B_2", FR450_MAJOR_B_2 }, + { "B_3", FR450_MAJOR_B_3 }, + { "B_4", FR450_MAJOR_B_4 }, + { "B_5", FR450_MAJOR_B_5 }, + { "B_6", FR450_MAJOR_B_6 }, + { "C_1", FR450_MAJOR_C_1 }, + { "C_2", FR450_MAJOR_C_2 }, + { "M_1", FR450_MAJOR_M_1 }, + { "M_2", FR450_MAJOR_M_2 }, + { "M_3", FR450_MAJOR_M_3 }, + { "M_4", FR450_MAJOR_M_4 }, + { "M_5", FR450_MAJOR_M_5 }, + { "M_6", FR450_MAJOR_M_6 }, + { 0, 0 } +}; + static const CGEN_ATTR_ENTRY FR500_MAJOR_attr[] = { { "NONE", FR500_MAJOR_NONE }, @@ -224,6 +252,7 @@ const CGEN_ATTR_TABLE frv_cgen_insn_attr { "MACH", & MACH_attr[0], & MACH_attr[0] }, { "UNIT", & UNIT_attr[0], & UNIT_attr[0] }, { "FR400-MAJOR", & FR400_MAJOR_attr[0], & FR400_MAJOR_attr[0] }, + { "FR450-MAJOR", & FR450_MAJOR_attr[0], & FR450_MAJOR_attr[0] }, { "FR500-MAJOR", & FR500_MAJOR_attr[0], & FR500_MAJOR_attr[0] }, { "FR550-MAJOR", & FR550_MAJOR_attr[0], & FR550_MAJOR_attr[0] }, { "ALIAS", &bool_attr[0], &bool_attr[0] }, @@ -241,6 +270,7 @@ const CGEN_ATTR_TABLE frv_cgen_insn_attr { "CONDITIONAL", &bool_attr[0], &bool_attr[0] }, { "FR-ACCESS", &bool_attr[0], &bool_attr[0] }, { "PRESERVE-OVF", &bool_attr[0], &bool_attr[0] }, + { "AUDIO", &bool_attr[0], &bool_attr[0] }, { 0, 0, 0 } }; @@ -259,6 +289,7 @@ static const CGEN_MACH frv_cgen_mach_tab { "fr500", "fr500", MACH_FR500, 0 }, { "tomcat", "tomcat", MACH_TOMCAT, 0 }, { "fr400", "fr400", MACH_FR400, 0 }, + { "fr450", "fr450", MACH_FR450, 0 }, { "simple", "simple", MACH_SIMPLE, 0 }, { 0, 0, 0, 0 } }; @@ -803,6 +834,10 @@ static CGEN_KEYWORD_ENTRY frv_cgen_opval { "sr1", 769, {0, {0}}, 0, 0 }, { "sr2", 770, {0, {0}}, 0, 0 }, { "sr3", 771, {0, {0}}, 0, 0 }, + { "scr0", 832, {0, {0}}, 0, 0 }, + { "scr1", 833, {0, {0}}, 0, 0 }, + { "scr2", 834, {0, {0}}, 0, 0 }, + { "scr3", 835, {0, {0}}, 0, 0 }, { "fsr0", 1024, {0, {0}}, 0, 0 }, { "fsr1", 1025, {0, {0}}, 0, 0 }, { "fsr2", 1026, {0, {0}}, 0, 0 }, @@ -1448,9 +1483,20 @@ static CGEN_KEYWORD_ENTRY frv_cgen_opval { "amcr", 1920, {0, {0}}, 0, 0 }, { "stbar", 1921, {0, {0}}, 0, 0 }, { "mmcr", 1922, {0, {0}}, 0, 0 }, + { "iamvr1", 1925, {0, {0}}, 0, 0 }, + { "damvr1", 1927, {0, {0}}, 0, 0 }, + { "cxnr", 1936, {0, {0}}, 0, 0 }, + { "ttbr", 1937, {0, {0}}, 0, 0 }, + { "tplr", 1938, {0, {0}}, 0, 0 }, + { "tppr", 1939, {0, {0}}, 0, 0 }, + { "tpxr", 1940, {0, {0}}, 0, 0 }, + { "timerh", 1952, {0, {0}}, 0, 0 }, + { "timerl", 1953, {0, {0}}, 0, 0 }, + { "timerd", 1954, {0, {0}}, 0, 0 }, { "dcr", 2048, {0, {0}}, 0, 0 }, { "brr", 2049, {0, {0}}, 0, 0 }, { "nmar", 2050, {0, {0}}, 0, 0 }, + { "btbr", 2051, {0, {0}}, 0, 0 }, { "ibar0", 2052, {0, {0}}, 0, 0 }, { "ibar1", 2053, {0, {0}}, 0, 0 }, { "ibar2", 2054, {0, {0}}, 0, 0 }, @@ -1504,7 +1550,7 @@ static CGEN_KEYWORD_ENTRY frv_cgen_opval CGEN_KEYWORD frv_cgen_opval_spr_names = { & frv_cgen_opval_spr_names_entries[0], - 1007, + 1022, 0, 0, 0, 0, "" }; @@ -1816,7 +1862,7 @@ const CGEN_HW_ENTRY frv_cgen_hw_table[] { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<f_LI, 0, pc, length); break; + case FRV_OPERAND_LRAD : + print_normal (cd, info, fields->f_LRAD, 0, pc, length); + break; + case FRV_OPERAND_LRAE : + print_normal (cd, info, fields->f_LRAE, 0, pc, length); + break; + case FRV_OPERAND_LRAS : + print_normal (cd, info, fields->f_LRAS, 0, pc, length); + break; + case FRV_OPERAND_TLBPRL : + print_normal (cd, info, fields->f_TLBPRL, 0, pc, length); + break; + case FRV_OPERAND_TLBPROPX : + print_normal (cd, info, fields->f_TLBPRopx, 0, pc, length); + break; case FRV_OPERAND_AE : print_normal (cd, info, fields->f_ae, 0|(1<f_LI, 0, 0, 25, 1, 32, total_length, buffer); break; + case FRV_OPERAND_LRAD : + errmsg = insert_normal (cd, fields->f_LRAD, 0, 0, 4, 1, 32, total_length, buffer); + break; + case FRV_OPERAND_LRAE : + errmsg = insert_normal (cd, fields->f_LRAE, 0, 0, 5, 1, 32, total_length, buffer); + break; + case FRV_OPERAND_LRAS : + errmsg = insert_normal (cd, fields->f_LRAS, 0, 0, 3, 1, 32, total_length, buffer); + break; + case FRV_OPERAND_TLBPRL : + errmsg = insert_normal (cd, fields->f_TLBPRL, 0, 0, 25, 1, 32, total_length, buffer); + break; + case FRV_OPERAND_TLBPROPX : + errmsg = insert_normal (cd, fields->f_TLBPRopx, 0, 0, 28, 3, 32, total_length, buffer); + break; case FRV_OPERAND_AE : errmsg = insert_normal (cd, fields->f_ae, 0, 0, 25, 1, 32, total_length, buffer); break; @@ -1016,6 +1031,21 @@ frv_cgen_extract_operand (cd, opindex, e case FRV_OPERAND_LI : length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_LI); break; + case FRV_OPERAND_LRAD : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_LRAD); + break; + case FRV_OPERAND_LRAE : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_LRAE); + break; + case FRV_OPERAND_LRAS : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 3, 1, 32, total_length, pc, & fields->f_LRAS); + break; + case FRV_OPERAND_TLBPRL : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_TLBPRL); + break; + case FRV_OPERAND_TLBPROPX : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 3, 32, total_length, pc, & fields->f_TLBPRopx); + break; case FRV_OPERAND_AE : length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_ae); break; @@ -1302,6 +1332,21 @@ frv_cgen_get_int_operand (cd, opindex, f case FRV_OPERAND_LI : value = fields->f_LI; break; + case FRV_OPERAND_LRAD : + value = fields->f_LRAD; + break; + case FRV_OPERAND_LRAE : + value = fields->f_LRAE; + break; + case FRV_OPERAND_LRAS : + value = fields->f_LRAS; + break; + case FRV_OPERAND_TLBPRL : + value = fields->f_TLBPRL; + break; + case FRV_OPERAND_TLBPROPX : + value = fields->f_TLBPRopx; + break; case FRV_OPERAND_AE : value = fields->f_ae; break; @@ -1539,6 +1584,21 @@ frv_cgen_get_vma_operand (cd, opindex, f case FRV_OPERAND_LI : value = fields->f_LI; break; + case FRV_OPERAND_LRAD : + value = fields->f_LRAD; + break; + case FRV_OPERAND_LRAE : + value = fields->f_LRAE; + break; + case FRV_OPERAND_LRAS : + value = fields->f_LRAS; + break; + case FRV_OPERAND_TLBPRL : + value = fields->f_TLBPRL; + break; + case FRV_OPERAND_TLBPROPX : + value = fields->f_TLBPRopx; + break; case FRV_OPERAND_AE : value = fields->f_ae; break; @@ -1785,6 +1845,21 @@ frv_cgen_set_int_operand (cd, opindex, f case FRV_OPERAND_LI : fields->f_LI = value; break; + case FRV_OPERAND_LRAD : + fields->f_LRAD = value; + break; + case FRV_OPERAND_LRAE : + fields->f_LRAE = value; + break; + case FRV_OPERAND_LRAS : + fields->f_LRAS = value; + break; + case FRV_OPERAND_TLBPRL : + fields->f_TLBPRL = value; + break; + case FRV_OPERAND_TLBPROPX : + fields->f_TLBPRopx = value; + break; case FRV_OPERAND_AE : fields->f_ae = value; break; @@ -2019,6 +2094,21 @@ frv_cgen_set_vma_operand (cd, opindex, f case FRV_OPERAND_LI : fields->f_LI = value; break; + case FRV_OPERAND_LRAD : + fields->f_LRAD = value; + break; + case FRV_OPERAND_LRAE : + fields->f_LRAE = value; + break; + case FRV_OPERAND_LRAS : + fields->f_LRAS = value; + break; + case FRV_OPERAND_TLBPRL : + fields->f_TLBPRL = value; + break; + case FRV_OPERAND_TLBPROPX : + fields->f_TLBPRopx = value; + break; case FRV_OPERAND_AE : fields->f_ae = value; break; diff -uprN binutils-2.14.90.0.8/opcodes/frv-opc.c binutils-2.15.90.0.1/opcodes/frv-opc.c --- binutils-2.14.90.0.8/opcodes/frv-opc.c 2004-01-14 13:07:54.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/frv-opc.c 2004-03-03 12:24:34.000000000 -0800 @@ -44,6 +44,8 @@ static int find_major_in_vliw PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr400_check_insn_major_constraints PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); +static int fr450_check_insn_major_constraints + PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr500_check_insn_major_constraints PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE)); static int fr550_check_insn_major_constraints @@ -60,6 +62,10 @@ frv_is_branch_major (CGEN_ATTR_VALUE_TYP if (major >= FR400_MAJOR_B_1 && major <= FR400_MAJOR_B_6) return 1; /* is a branch */ break; + case bfd_mach_fr450: + if (major >= FR450_MAJOR_B_1 && major <= FR450_MAJOR_B_6) + return 1; /* is a branch */ + break; default: if (major >= FR500_MAJOR_B_1 && major <= FR500_MAJOR_B_6) return 1; /* is a branch */ @@ -75,6 +81,7 @@ frv_is_float_major (CGEN_ATTR_VALUE_TYPE switch (mach) { case bfd_mach_fr400: + case bfd_mach_fr450: return 0; /* No float insns */ default: if (major >= FR500_MAJOR_F_1 && major <= FR500_MAJOR_F_8) @@ -94,6 +101,10 @@ frv_is_media_major (CGEN_ATTR_VALUE_TYPE if (major >= FR400_MAJOR_M_1 && major <= FR400_MAJOR_M_2) return 1; /* is a media insn */ break; + case bfd_mach_fr450: + if (major >= FR450_MAJOR_M_1 && major <= FR450_MAJOR_M_6) + return 1; /* is a media insn */ + break; default: if (major >= FR500_MAJOR_M_1 && major <= FR500_MAJOR_M_8) return 1; /* is a media insn */ @@ -109,6 +120,9 @@ frv_is_branch_insn (const CGEN_INSN *ins if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -122,6 +136,9 @@ frv_is_float_insn (const CGEN_INSN *insn if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -135,6 +152,9 @@ frv_is_media_insn (const CGEN_INSN *insn if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), bfd_mach_fr400)) return 1; + if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), + bfd_mach_fr450)) + return 1; if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), bfd_mach_fr500)) return 1; @@ -239,11 +259,48 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_m /* B01 */ UNIT_B0, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ +/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ /* LOAD */ UNIT_I0, /* load only in I0 unit. */ /* STORE */ UNIT_I0, /* store only in I0 unit. */ /* SCAN */ UNIT_I0, /* scan only in I0 unit. */ /* DCPL */ UNIT_C, /* dcpl only in C unit. */ /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ +/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ +}; + +/* Some insns are assigned specialized implementation units which map to + different actual implementation units on different machines. These + tables perform that mapping. */ +static CGEN_ATTR_VALUE_TYPE fr450_unit_mapping[] = +{ +/* unit in insn actual unit */ +/* NIL */ UNIT_NIL, +/* I0 */ UNIT_I0, +/* I1 */ UNIT_I1, +/* I01 */ UNIT_I01, +/* I2 */ UNIT_NIL, /* no I2 or I3 unit */ +/* I3 */ UNIT_NIL, +/* IALL */ UNIT_I01, /* only I0 and I1 units */ +/* FM0 */ UNIT_FM0, +/* FM1 */ UNIT_FM1, +/* FM01 */ UNIT_FM01, +/* FM2 */ UNIT_NIL, /* no F2 or M2 units */ +/* FM3 */ UNIT_NIL, /* no F3 or M3 units */ +/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */ +/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */ +/* B0 */ UNIT_B0, /* branches only in B0 unit. */ +/* B1 */ UNIT_B0, +/* B01 */ UNIT_B0, +/* C */ UNIT_C, +/* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ +/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ +/* LOAD */ UNIT_I0, /* load only in I0 unit. */ +/* STORE */ UNIT_I0, /* store only in I0 unit. */ +/* SCAN */ UNIT_I0, /* scan only in I0 unit. */ +/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ +/* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1. */ /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ }; @@ -269,11 +326,13 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_m /* B01 */ UNIT_B01, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ +/* IACC */ UNIT_NIL, /* iacc multiply not implemented */ /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ /* STORE */ UNIT_I0, /* store only in I0 unit. */ /* SCAN */ UNIT_I01, /* scan in I0 or I1 unit. */ /* DCPL */ UNIT_C, /* dcpl only in C unit. */ /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ +/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; @@ -299,11 +358,13 @@ static CGEN_ATTR_VALUE_TYPE fr550_unit_m /* B01 */ UNIT_B01, /* C */ UNIT_C, /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ +/* IACC */ UNIT_NIL, /* iacc multiply not implemented. */ /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ /* STORE */ UNIT_I01, /* store in I0 or I1 unit. */ /* SCAN */ UNIT_IALL, /* scan in any integer unit. */ /* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ /* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */ +/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1 unit. */ /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ }; @@ -321,6 +382,10 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned vliw->current_vliw = fr400_allowed_vliw; vliw->unit_mapping = fr400_unit_mapping; break; + case bfd_mach_fr450: + vliw->current_vliw = fr400_allowed_vliw; + vliw->unit_mapping = fr450_unit_mapping; + break; case bfd_mach_fr550: vliw->current_vliw = fr550_allowed_vliw; vliw->unit_mapping = fr550_unit_mapping; @@ -450,6 +515,8 @@ fr400_check_insn_major_constraints ( case FR400_MAJOR_M_2: return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1) && ! find_major_in_vliw (vliw, FR400_MAJOR_M_2); + case FR400_MAJOR_M_1: + return !find_major_in_vliw (vliw, FR400_MAJOR_M_2); default: break; } @@ -457,6 +524,43 @@ fr400_check_insn_major_constraints ( } static int +fr450_check_insn_major_constraints ( + FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major +) +{ + CGEN_ATTR_VALUE_TYPE other_major; + + /* Our caller guarantees there's at least one other instruction. */ + other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR); + + /* (M4, M5) and (M4, M6) are allowed. */ + if (other_major == FR450_MAJOR_M_4) + if (major == FR450_MAJOR_M_5 || major == FR450_MAJOR_M_6) + return 1; + + /* Otherwise, instructions in even-numbered media categories cannot be + executed in parallel with other media instructions. */ + switch (major) + { + case FR450_MAJOR_M_2: + case FR450_MAJOR_M_4: + case FR450_MAJOR_M_6: + return !(other_major >= FR450_MAJOR_M_1 + && other_major <= FR450_MAJOR_M_6); + + case FR450_MAJOR_M_1: + case FR450_MAJOR_M_3: + case FR450_MAJOR_M_5: + return !(other_major == FR450_MAJOR_M_2 + || other_major == FR450_MAJOR_M_4 + || other_major == FR450_MAJOR_M_6); + + default: + return 1; + } +} + +static int find_unit_in_vliw ( FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit ) @@ -693,6 +797,9 @@ check_insn_major_constraints ( case bfd_mach_fr400: rc = fr400_check_insn_major_constraints (vliw, major); break; + case bfd_mach_fr450: + rc = fr450_check_insn_major_constraints (vliw, major); + break; case bfd_mach_fr550: rc = fr550_check_insn_major_constraints (vliw, major, insn); break; @@ -733,6 +840,9 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const case bfd_mach_fr400: major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR); break; + case bfd_mach_fr450: + major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR); + break; case bfd_mach_fr550: major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR); break; @@ -1146,6 +1256,14 @@ static const CGEN_IFMT ifmt_bar = { 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ_NULL) }, { 0 } } }; +static const CGEN_IFMT ifmt_lrai = { + 32, 32, 0x1fc0fc7, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_LRAE) }, { F (F_LRAD) }, { F (F_LRAS) }, { F (F_LRA_NULL) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_tlbpr = { + 32, 32, 0x61fc0fc0, { { F (F_PACK) }, { F (F_TLBPR_NULL) }, { F (F_TLBPROPX) }, { F (F_TLBPRL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } +}; + static const CGEN_IFMT ifmt_cop1 = { 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_CPRK) }, { F (F_OP) }, { F (F_CPRI) }, { F (F_S6_1) }, { F (F_CPRJ) }, { 0 } } }; @@ -1294,6 +1412,10 @@ static const CGEN_IFMT ifmt_cmqaddhss = 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } }; +static const CGEN_IFMT ifmt_mqsllhi = { + 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_U6) }, { 0 } } +}; + static const CGEN_IFMT ifmt_maddaccs = { 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_ACCJ_NULL) }, { 0 } } }; @@ -2483,42 +2605,6 @@ static const CGEN_OPCODE frv_cgen_insn_o { { MNEM, OP (PACK), ' ', OP (CPRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, & ifmt_ldc, { 0xc0940 } }, -/* rstb$pack $GRk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_slass, { 0xc0800 } - }, -/* rsth$pack $GRk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_slass, { 0xc0840 } - }, -/* rst$pack $GRk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_slass, { 0xc0880 } - }, -/* rstbf$pack $FRintk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_ldbf, { 0xc0a00 } - }, -/* rsthf$pack $FRintk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_ldbf, { 0xc0a40 } - }, -/* rstf$pack $FRintk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_ldbf, { 0xc0a80 } - }, /* std$pack $GRdoublek,@($GRi,$GRj) */ { { 0, 0, 0, 0 }, @@ -2537,18 +2623,6 @@ static const CGEN_OPCODE frv_cgen_insn_o { { MNEM, OP (PACK), ' ', OP (CPRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, & ifmt_lddc, { 0xc0980 } }, -/* rstd$pack $GRdoublek,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_ldd, { 0xc08c0 } - }, -/* rstdf$pack $FRdoublek,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_lddf, { 0xc0ac0 } - }, /* stq$pack $GRk,@($GRi,$GRj) */ { { 0, 0, 0, 0 }, @@ -2567,18 +2641,6 @@ static const CGEN_OPCODE frv_cgen_insn_o { { MNEM, OP (PACK), ' ', OP (CPRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, & ifmt_ldc, { 0xc09c0 } }, -/* rstq$pack $GRk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_slass, { 0xc0900 } - }, -/* rstqf$pack $FRintk,@($GRi,$GRj) */ - { - { 0, 0, 0, 0 }, - { { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } }, - & ifmt_ldbf, { 0xc0b00 } - }, /* stbu$pack $GRk,@($GRi,$GRj) */ { { 0, 0, 0, 0 }, @@ -4613,6 +4675,24 @@ static const CGEN_OPCODE frv_cgen_insn_o { { MNEM, OP (PACK), 0 } }, & ifmt_bar, { 0xc0fc0 } }, +/* lrai$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRK), ',', OP (LRAE), ',', OP (LRAD), ',', OP (LRAS), 0 } }, + & ifmt_lrai, { 0xc0800 } + }, +/* lrad$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRK), ',', OP (LRAE), ',', OP (LRAD), ',', OP (LRAS), 0 } }, + & ifmt_lrai, { 0xc0840 } + }, +/* tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (TLBPROPX), ',', OP (TLBPRL), 0 } }, + & ifmt_tlbpr, { 0xc0900 } + }, /* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */ { { 0, 0, 0, 0 }, @@ -5495,6 +5575,30 @@ static const CGEN_OPCODE frv_cgen_insn_o { { MNEM, OP (PACK), ' ', OP (FRINTIEVEN), ',', OP (FRINTJEVEN), ',', OP (FRINTKEVEN), ',', OP (CCI), ',', OP (COND), 0 } }, & ifmt_cmqaddhss, { 0x1cc00c0 } }, +/* mqlclrhs$pack $FRintieven,$FRintjeven,$FRintkeven */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (FRINTIEVEN), ',', OP (FRINTJEVEN), ',', OP (FRINTKEVEN), 0 } }, + & ifmt_mqsaths, { 0x1e00400 } + }, +/* mqlmths$pack $FRintieven,$FRintjeven,$FRintkeven */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (FRINTIEVEN), ',', OP (FRINTJEVEN), ',', OP (FRINTKEVEN), 0 } }, + & ifmt_mqsaths, { 0x1e00500 } + }, +/* mqsllhi$pack $FRintieven,$u6,$FRintkeven */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (FRINTIEVEN), ',', OP (U6), ',', OP (FRINTKEVEN), 0 } }, + & ifmt_mqsllhi, { 0x1e00440 } + }, +/* mqsrahi$pack $FRintieven,$u6,$FRintkeven */ + { + { 0, 0, 0, 0 }, + { { MNEM, OP (PACK), ' ', OP (FRINTIEVEN), ',', OP (U6), ',', OP (FRINTKEVEN), 0 } }, + & ifmt_mqsllhi, { 0x1e004c0 } + }, /* maddaccs$pack $ACC40Si,$ACC40Sk */ { { 0, 0, 0, 0 }, @@ -5963,37 +6067,37 @@ static const CGEN_IBASE frv_cgen_macro_i /* nop$pack */ { -1, "nop", "nop", 32, - { 0|A(ALIAS), { (1<read_memory_func) (pc, buf, buflen, info); + status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0), + buf, buflen, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -118,13 +119,13 @@ my_print_insn (cd, pc, info) return print_insn (cd, pc, info, buf, buflen); /* Print the first insn. */ - buf += (big_p ? 0 : 2); if ((pc & 3) == 0) { + buf += (big_p ? 0 : 2); if (print_insn (cd, pc, info, buf, 2) == 0) (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + buf += (big_p ? 2 : -2); } - buf += (big_p ? 2 : -2); x = (big_p ? &buf[0] : &buf[1]); if (*x & 0x80) diff -uprN binutils-2.14.90.0.8/opcodes/ppc-opc.c binutils-2.15.90.0.1/opcodes/ppc-opc.c --- binutils-2.14.90.0.8/opcodes/ppc-opc.c 2004-01-14 13:07:55.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/ppc-opc.c 2004-03-03 12:24:34.000000000 -0800 @@ -3476,7 +3476,7 @@ const struct powerpc_opcode powerpc_opco { "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } }, { "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } }, -{ "dcbtst", X(31,246), XRT_MASK, PPC, { CT, RA, RB } }, +{ "dcbtst", X(31,246), X_MASK, PPC, { CT, RA, RB } }, { "stbux", X(31,247), X_MASK, COM, { RS, RAS, RB } }, @@ -3510,7 +3510,7 @@ const struct powerpc_opcode powerpc_opco { "lscbx", XRC(31,277,0), X_MASK, M601, { RT, RA, RB } }, { "lscbx.", XRC(31,277,1), X_MASK, M601, { RT, RA, RB } }, -{ "dcbt", X(31,278), XRT_MASK, PPC, { CT, RA, RB } }, +{ "dcbt", X(31,278), X_MASK, PPC, { CT, RA, RB } }, { "lhzx", X(31,279), X_MASK, COM, { RT, RA, RB } }, @@ -3683,6 +3683,10 @@ const struct powerpc_opcode powerpc_opco { "mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, { RT } }, { "mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, { RT } }, { "mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, { RT } }, +{ "mfivor32", XSPR(31,339,528), XSPR_MASK, PPCSPE, { RT } }, +{ "mfivor33", XSPR(31,339,529), XSPR_MASK, PPCSPE, { RT } }, +{ "mfivor34", XSPR(31,339,530), XSPR_MASK, PPCSPE, { RT } }, +{ "mfivor35", XSPR(31,339,531), XSPR_MASK, PPCPMR, { RT } }, { "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, { "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, { "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, @@ -3692,10 +3696,11 @@ const struct powerpc_opcode powerpc_opco { "mfic_dat", XSPR(31,339,562), XSPR_MASK, PPC860, { RT } }, { "mfdc_cst", XSPR(31,339,568), XSPR_MASK, PPC860, { RT } }, { "mfdc_adr", XSPR(31,339,569), XSPR_MASK, PPC860, { RT } }, -{ "mfdc_dat", XSPR(31,339,570), XSPR_MASK, PPC860, { RT } }, { "mfmcsrr0", XSPR(31,339,570), XSPR_MASK, PPCRFMCI, { RT } }, +{ "mfdc_dat", XSPR(31,339,570), XSPR_MASK, PPC860, { RT } }, { "mfmcsrr1", XSPR(31,339,571), XSPR_MASK, PPCRFMCI, { RT } }, { "mfmcsr", XSPR(31,339,572), XSPR_MASK, PPCRFMCI, { RT } }, +{ "mfmcar", XSPR(31,339,573), XSPR_MASK, PPCRFMCI, { RT } }, { "mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, { RT } }, { "mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, { RT } }, { "mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, { RT } }, @@ -3989,6 +3994,10 @@ const struct powerpc_opcode powerpc_opco { "mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, { RS } }, { "mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, { RS } }, { "mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, { RS } }, +{ "mtivor32", XSPR(31,467,528), XSPR_MASK, PPCSPE, { RS } }, +{ "mtivor33", XSPR(31,467,529), XSPR_MASK, PPCSPE, { RS } }, +{ "mtivor34", XSPR(31,467,530), XSPR_MASK, PPCSPE, { RS } }, +{ "mtivor35", XSPR(31,467,531), XSPR_MASK, PPCPMR, { RS } }, { "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, { "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, { "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, diff -uprN binutils-2.14.90.0.8/opcodes/sh-dis.c binutils-2.15.90.0.1/opcodes/sh-dis.c --- binutils-2.14.90.0.8/opcodes/sh-dis.c 2004-01-14 13:07:55.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/sh-dis.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* Disassemble SH instructions. - Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002, 2003 + Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify @@ -433,8 +433,10 @@ print_insn_sh (memaddr, info) case bfd_mach_sh3e: target_arch = arch_sh3e; break; - case bfd_mach_sh4: case bfd_mach_sh4_nofpu: + target_arch = arch_sh4_nofpu; + break; + case bfd_mach_sh4: target_arch = arch_sh4; break; case bfd_mach_sh4a: @@ -444,6 +446,9 @@ print_insn_sh (memaddr, info) case bfd_mach_sh4al_dsp: target_arch = arch_sh4al_dsp; break; + case bfd_mach_sh4_nommu_nofpu: + target_arch = arch_sh4_nommu_nofpu; + break; case bfd_mach_sh5: #ifdef INCLUDE_SHMEDIA status = print_insn_sh64 (memaddr, info); @@ -577,12 +582,21 @@ print_insn_sh (memaddr, info) case IMM1_8BY4: imm = ((nibs[2] << 4) | nibs[3]) << 2; goto ok; + case REG_N_D: + if ((nibs[n] & 1) != 0) + goto fail; + /* fall through */ case REG_N: rn = nibs[n]; break; case REG_M: rm = nibs[n]; break; + case REG_N_B01: + if ((nibs[n] & 0x3) != 1 /* binary 01 */) + goto fail; + rn = (nibs[n] & 0xc) >> 2; + break; case REG_NM: rn = (nibs[n] & 0xc) >> 2; rm = (nibs[n] & 0x3); diff -uprN binutils-2.14.90.0.8/opcodes/sh-opc.h binutils-2.15.90.0.1/opcodes/sh-opc.h --- binutils-2.14.90.0.8/opcodes/sh-opc.h 2004-01-14 13:07:55.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/sh-opc.h 2004-03-03 12:24:34.000000000 -0800 @@ -1,5 +1,5 @@ /* Definitions for SH opcodes. - Copyright 1993, 1994, 1995, 1997, 1999, 2000, 2003 + Copyright 1993, 1994, 1995, 1997, 1999, 2000, 2003, 2004 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify @@ -37,6 +37,8 @@ typedef enum HEX_XX00, HEX_00YY, REG_N, + REG_N_D, /* nnn0 */ + REG_N_B01, /* nn01 */ REG_M, SDT_REG_N, REG_NM, @@ -186,12 +188,13 @@ sh_dsp_reg_nums; #define arch_sh4al_dsp 0x0400 #define arch_sh4_nofpu 0x1000 #define arch_sh4a_nofpu 0x2000 +#define arch_sh4_nommu_nofpu 0x4000 /* no mmu nor fpu */ #define arch_sh1_up (arch_sh1 | arch_sh2_up) #define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh3_up | arch_sh_dsp) #define arch_sh2e_up (arch_sh2e | arch_sh3e_up) #define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \ - | arch_sh4_nofp_up) + | arch_sh4_nommu_nofpu_up) #define arch_sh3e_up (arch_sh3e | arch_sh4_up) #define arch_sh4_up (arch_sh4 | arch_sh4a_up) #define arch_sh4a_up (arch_sh4a) @@ -200,9 +203,14 @@ sh_dsp_reg_nums; #define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up) #define arch_sh4al_dsp_up (arch_sh4al_dsp) +#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up) + #define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up) #define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up) +#define arch_sh_any_with_mmu (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \ + | arch_sh4_nofp_up) /* arch _sh3_up omitting arch_sh4_nommu_nofpu */ + typedef struct { char *name; @@ -295,6 +303,8 @@ const sh_opcode_info sh_table[] = /* 0100nnnn00011110 ldc ,GBR */{"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}, arch_sh1_up}, +/* 0100nnnn00111010 ldc ,SGR */{"ldc",{A_REG_N,A_SGR},{HEX_4,REG_N,HEX_3,HEX_A}, arch_sh4_nommu_nofpu_up}, + /* 0100nnnn00101110 ldc ,VBR */{"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}, arch_sh1_up}, /* 0100nnnn01011110 ldc ,MOD */{"ldc",{A_REG_N,A_MOD},{HEX_4,REG_N,HEX_5,HEX_E}, arch_sh_dsp_up}, @@ -307,7 +317,7 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01001110 ldc ,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_up}, -/* 0100nnnn11111010 ldc ,DBR */{"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_A}, arch_sh4_nofp_up}, +/* 0100nnnn11111010 ldc ,DBR */{"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up}, /* 0100nnnn1xxx1110 ldc ,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_up}, @@ -317,6 +327,8 @@ const sh_opcode_info sh_table[] = /* 0100nnnn00100111 ldc.l @+,VBR */{"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}, arch_sh1_up}, +/* 0100nnnn00110110 ldc.l @+,SGR */{"ldc.l",{A_INC_N,A_SGR},{HEX_4,REG_N,HEX_3,HEX_6}, arch_sh4_nommu_nofpu_up}, + /* 0100nnnn01010111 ldc.l @+,MOD */{"ldc.l",{A_INC_N,A_MOD},{HEX_4,REG_N,HEX_5,HEX_7}, arch_sh_dsp_up}, /* 0100nnnn01110111 ldc.l @+,RE */{"ldc.l",{A_INC_N,A_RE},{HEX_4,REG_N,HEX_7,HEX_7}, arch_sh_dsp_up}, @@ -327,7 +339,7 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01000111 ldc.l @+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_up}, -/* 0100nnnn11110110 ldc.l @+,DBR */{"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_6}, arch_sh4_nofp_up}, +/* 0100nnnn11110110 ldc.l @+,DBR */{"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_6}, arch_sh4_nommu_nofpu_up}, /* 0100nnnn1xxx0111 ldc.l ,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_up}, @@ -382,7 +394,7 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01100110 lds.l @+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}, arch_sh2e_up}, -/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up}, +/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh_any_with_mmu}, /* 0100nnnnmmmm1111 mac.w @+,@+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}, arch_sh1_up}, @@ -455,7 +467,7 @@ const sh_opcode_info sh_table[] = /* 11000001i8*2.... mov.w R0,@(,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM1_8BY2}, arch_sh1_up}, /* 11000111i8p4.... mova @(,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}, arch_sh1_up}, -/* 0000nnnn11000011 movca.l R0,@ */{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}, arch_sh4_nofp_up}, +/* 0000nnnn11000011 movca.l R0,@ */{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}, arch_sh4_nommu_nofpu_up}, /* 0000nnnn01110011 movco.l r0,@ */{"movco.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_7,HEX_3}, arch_sh4a_nofp_up}, /* 0000mmmm01100011 movli.l @,r0 */{"movli.l",{A_IND_M,A_R0},{HEX_0,REG_M,HEX_6,HEX_3}, arch_sh4a_nofp_up}, @@ -480,11 +492,11 @@ const sh_opcode_info sh_table[] = /* 0000000000001001 nop */{"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}, arch_sh1_up}, /* 0110nnnnmmmm0111 not , */{"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}, arch_sh1_up}, -/* 0000nnnn10010011 ocbi @ */{"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}, arch_sh4_nofp_up}, +/* 0000nnnn10010011 ocbi @ */{"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}, arch_sh4_nommu_nofpu_up}, -/* 0000nnnn10100011 ocbp @ */{"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}, arch_sh4_nofp_up}, +/* 0000nnnn10100011 ocbp @ */{"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}, arch_sh4_nommu_nofpu_up}, -/* 0000nnnn10110011 ocbwb @ */{"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}, arch_sh4_nofp_up}, +/* 0000nnnn10110011 ocbwb @ */{"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}, arch_sh4_nommu_nofpu_up}, /* 11001011i8*1.... or #,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM0_8}, arch_sh1_up}, @@ -493,7 +505,7 @@ const sh_opcode_info sh_table[] = /* 11001111i8*1.... or.b #,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM0_8}, arch_sh1_up}, -/* 0000nnnn10000011 pref @ */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh4_nofp_up}, +/* 0000nnnn10000011 pref @ */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh4_nommu_nofpu_up}, /* 0000nnnn11010011 prefi @ */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofp_up}, @@ -565,9 +577,9 @@ const sh_opcode_info sh_table[] = /* 0000nnnn01000010 stc SPC, */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_up}, -/* 0000nnnn00111010 stc SGR, */{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_A}, arch_sh4_nofp_up}, +/* 0000nnnn00111010 stc SGR, */{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_A}, arch_sh4_nommu_nofpu_up}, -/* 0000nnnn11111010 stc DBR, */{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_F,HEX_A}, arch_sh4_nofp_up}, +/* 0000nnnn11111010 stc DBR, */{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up}, /* 0000nnnn1xxx0010 stc Rn_BANK, */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_up}, @@ -587,9 +599,9 @@ const sh_opcode_info sh_table[] = /* 0100nnnn00010011 stc.l GBR,@- */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}, arch_sh1_up}, -/* 0100nnnn00110010 stc.l SGR,@- */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_2}, arch_sh4_nofp_up}, +/* 0100nnnn00110010 stc.l SGR,@- */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_2}, arch_sh4_nommu_nofpu_up}, -/* 0100nnnn11110010 stc.l DBR,@- */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nofp_up}, +/* 0100nnnn11110010 stc.l DBR,@- */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nommu_nofpu_up}, /* 0100nnnn1xxx0011 stc.l Rn_BANK,@- */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_up}, @@ -842,7 +854,7 @@ const sh_opcode_info sh_table[] = {"pswap", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D,HEX_4}, arch_sh4al_dsp_up}, /* 1111nnnn01011101 fabs */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh2e_up}, -/* 1111nnnn01011101 fabs */{"fabs",{D_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh4_up}, +/* 1111nnn001011101 fabs */{"fabs",{D_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh4_up}, /* 1111nnnnmmmm0000 fadd ,*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh2e_up}, /* 1111nnn0mmm00000 fadd ,*/{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh4_up}, @@ -853,9 +865,9 @@ const sh_opcode_info sh_table[] = /* 1111nnnnmmmm0101 fcmp/gt ,*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up}, /* 1111nnn0mmm00101 fcmp/gt ,*/{"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh4_up}, -/* 1111nnn010111101 fcnvds ,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}, arch_sh4_up}, +/* 1111nnn010111101 fcnvds ,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N_D,HEX_B,HEX_D}, arch_sh4_up}, -/* 1111nnn010101101 fcnvsd FPUL,*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}, arch_sh4_up}, +/* 1111nnn010101101 fcnvsd FPUL,*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_A,HEX_D}, arch_sh4_up}, /* 1111nnnnmmmm0011 fdiv ,*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh2e_up}, /* 1111nnn0mmm00011 fdiv ,*/{"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh4_up}, @@ -869,42 +881,42 @@ const sh_opcode_info sh_table[] = /* 1111nnnn00011101 flds ,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}, arch_sh2e_up}, /* 1111nnnn00101101 float FPUL,*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh2e_up}, -/* 1111nnnn00101101 float FPUL,*/{"float",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh4_up}, +/* 1111nnn000101101 float FPUL,*/{"float",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh4_up}, /* 1111nnnnmmmm1110 fmac FR0,,*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}, arch_sh2e_up}, /* 1111nnnnmmmm1100 fmov ,*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh2e_up}, -/* 1111nnnnmmmm1100 fmov ,*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh4_up}, +/* 1111nnn1mmmm1100 fmov ,*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh4_up}, /* 1111nnnnmmmm1000 fmov @,*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up}, -/* 1111nnnnmmmm1000 fmov @,*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up}, +/* 1111nnn1mmmm1000 fmov @,*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up}, /* 1111nnnnmmmm1010 fmov ,@*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2e_up}, -/* 1111nnnnmmmm1010 fmov ,@*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up}, +/* 1111nnnnmmm11010 fmov ,@*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up}, /* 1111nnnnmmmm1001 fmov @+,*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2e_up}, -/* 1111nnnnmmmm1001 fmov @+,*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up}, +/* 1111nnn1mmmm1001 fmov @+,*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up}, /* 1111nnnnmmmm1011 fmov ,@-*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2e_up}, -/* 1111nnnnmmmm1011 fmov ,@-*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up}, +/* 1111nnnnmmm11011 fmov ,@-*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up}, /* 1111nnnnmmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2e_up}, -/* 1111nnnnmmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up}, +/* 1111nnn1mmmm0110 fmov @(R0,),*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up}, /* 1111nnnnmmmm0111 fmov ,@(R0,)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2e_up}, -/* 1111nnnnmmmm0111 fmov ,@(R0,)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up}, +/* 1111nnnnmmm10111 fmov ,@(R0,)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up}, -/* 1111nnnnmmmm1000 fmov.d @,*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up}, +/* 1111nnn1mmmm1000 fmov.d @,*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up}, -/* 1111nnnnmmmm1010 fmov.d ,@*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up}, +/* 1111nnnnmmm11010 fmov.d ,@*/{"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up}, -/* 1111nnnnmmmm1001 fmov.d @+,*/{"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up}, +/* 1111nnn1mmmm1001 fmov.d @+,*/{"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up}, -/* 1111nnnnmmmm1011 fmov.d ,@-*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up}, +/* 1111nnnnmmm11011 fmov.d ,@-*/{"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up}, -/* 1111nnnnmmmm0110 fmov.d @(R0,),*/{"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up}, +/* 1111nnn1mmmm0110 fmov.d @(R0,),*/{"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up}, -/* 1111nnnnmmmm0111 fmov.d ,@(R0,)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up}, +/* 1111nnnnmmm10111 fmov.d ,@(R0,)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up}, /* 1111nnnnmmmm1000 fmov.s @,*/{"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up}, @@ -922,20 +934,20 @@ const sh_opcode_info sh_table[] = /* 1111nnn0mmm00010 fmul ,*/{"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh4_up}, /* 1111nnnn01001101 fneg */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh2e_up}, -/* 1111nnnn01001101 fneg */{"fneg",{D_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh4_up}, +/* 1111nnn001001101 fneg */{"fneg",{D_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh4_up}, /* 1111011111111101 fpchg */{"fpchg",{0},{HEX_F,HEX_7,HEX_F,HEX_D}, arch_sh4a_up}, /* 1111101111111101 frchg */{"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}, arch_sh4_up}, -/* 1111nnn011111101 fsca FPUL, */{"fsca",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_F,HEX_D}, arch_sh4a_up}, +/* 1111nnn011111101 fsca FPUL, */{"fsca",{FPUL_M,D_REG_N},{HEX_F,REG_N_D,HEX_F,HEX_D}, arch_sh4_up}, /* 1111001111111101 fschg */{"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}, arch_sh4_up}, /* 1111nnnn01101101 fsqrt */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh3e_up}, -/* 1111nnnn01101101 fsqrt */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh4_up}, +/* 1111nnn001101101 fsqrt */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh4_up}, -/* 1111nnnn01111101 fssra */{"fssra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4a_up}, +/* 1111nnnn01111101 fsrra */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4_up}, /* 1111nnnn00001101 fsts FPUL,*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh2e_up}, @@ -945,7 +957,7 @@ const sh_opcode_info sh_table[] = /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2e_up}, /* 1111nnnn00111101 ftrc ,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh4_up}, -/* 1111nn0111111101 ftrv XMTRX_M4,*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}, arch_sh4_up}, +/* 1111nn0111111101 ftrv XMTRX_M4,*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_N_B01,HEX_F,HEX_D}, arch_sh4_up}, { 0, {0}, {0}, 0 } }; diff -uprN binutils-2.14.90.0.8/opcodes/sparc-opc.c binutils-2.15.90.0.1/opcodes/sparc-opc.c --- binutils-2.14.90.0.8/opcodes/sparc-opc.c 2002-10-29 20:09:13.000000000 -0800 +++ binutils-2.15.90.0.1/opcodes/sparc-opc.c 2004-03-03 12:24:34.000000000 -0800 @@ -1,6 +1,6 @@ /* Table of opcodes for the sparc. Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000 + 2000, 2002, 2004 Free Software Foundation, Inc. This file is part of the BFD library. @@ -1525,17 +1525,17 @@ CONDFC ("fbule", "cb013", 0xe, F_CONDBR { "fstoi", F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0, "f,g", F_FLOAT, v6 }, { "fqtoi", F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0, "R,g", F_FLOAT, v8 }, -{ "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0, "B,g", F_FLOAT, v9 }, -{ "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0, "f,g", F_FLOAT, v9 }, -{ "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0, "R,g", F_FLOAT, v9 }, +{ "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0, "B,H", F_FLOAT, v9 }, +{ "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0, "f,H", F_FLOAT, v9 }, +{ "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0, "R,H", F_FLOAT, v9 }, { "fitod", F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0, "f,H", F_FLOAT, v6 }, { "fitos", F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0, "f,g", F_FLOAT, v6 }, { "fitoq", F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0, "f,J", F_FLOAT, v8 }, -{ "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0, "f,H", F_FLOAT, v9 }, -{ "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0, "f,g", F_FLOAT, v9 }, -{ "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0, "f,J", F_FLOAT, v9 }, +{ "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0, "B,H", F_FLOAT, v9 }, +{ "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0, "B,g", F_FLOAT, v9 }, +{ "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0, "B,J", F_FLOAT, v9 }, { "fdtoq", F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0, "B,J", F_FLOAT, v8 }, { "fdtos", F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0, "B,g", F_FLOAT, v6 }, diff -uprN binutils-2.14.90.0.8/src-release binutils-2.15.90.0.1/src-release --- binutils-2.14.90.0.8/src-release 2004-01-14 13:07:42.000000000 -0800 +++ binutils-2.15.90.0.1/src-release 2004-03-03 12:24:33.000000000 -0800 @@ -1,5 +1,5 @@ # Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002, 2003 Free Software Foundation +# 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -136,7 +136,7 @@ do-proto-toplev: $(DEVO_SUPPORT) $(SUPPO tmp mv -f tmp Makefile.in # - ./configure sun4 + ./configure i686-pc-linux-gnu $(MAKE) configure-host configure-target \ ALL_GCC="" ALL_GCC_C="" ALL_GCC_CXX="" \ CC_FOR_TARGET="$(CC)" CXX_FOR_TARGET="$(CXX)" @@ -208,11 +208,14 @@ do-proto-toplev: $(DEVO_SUPPORT) $(SUPPO -rm -f $(PACKAGE)-$(VER) ln -s proto-toplev $(PACKAGE)-$(VER) +CVS_NAMES= \( -name CVS -o -name '.cvsignore' \) + .PHONY: do-tar do-tar: echo "==> Making $(PACKAGE)-$(VER).tar" -rm -f $(PACKAGE)-$(VER).tar - find $(PACKAGE)-$(VER) -follow -name CVS -prune -o -type f -print \ + find $(PACKAGE)-$(VER) -follow $(CVS_NAMES) -prune \ + -o -type f -print \ | tar cTfh - $(PACKAGE)-$(VER).tar .PHONY: do-bz2 @@ -224,7 +227,8 @@ do-bz2: .PHONY: do-md5sum do-md5sum: echo "==> Adding md5 checksum to top-level directory" - cd proto-toplev && find * -follow -name CVS -prune -o -type f -print \ + cd proto-toplev && find * -follow $(CVS_NAMES) -prune \ + -o -type f -print \ | xargs $(MD5PROG) > ../md5.sum mv md5.sum proto-toplev @@ -329,24 +333,5 @@ insight+dejagnu.tar: $(DIST_SUPPORT) $(I MD5PROG="$(MD5PROG)" \ SUPPORT_FILES="$(INSIGHTD_SUPPORT_DIRS)" -.PHONY: newlib.tar.bz2 -NEWLIB_SUPPORT_DIRS=libgloss -# taz configures for the sun4 target which won't configure newlib. -# We need newlib configured so that the .info files are made. -# Unfortunately, it is not enough to just configure newlib separately: -# taz will build the .info files but since SUBDIRS won't contain newlib, -# distclean won't be run (leaving Makefile, config.status, and the tmp files -# used in building the .info files, eg: *.def, *.ref). -# The problem isn't solvable however without a lot of extra work because -# target libraries are built in subdir $(target_alias) which gets nuked during -# the make distclean. For now punt on the issue of shipping newlib info files -# with newlib net releases and wait for a day when some native target (sun4?) -# supports newlib (if only minimally). -newlib.tar.bz2: $(DIST_SUPPORT) $(NEWLIB_SUPPORT_DIRS) newlib - $(MAKE) -f $(SELF) taz TOOL=newlib \ - MD5PROG="$(MD5PROG)" \ - SUPPORT_FILES="$(NEWLIB_SUPPORT_DIRS)" \ - DEVO_SUPPORT="$(DEVO_SUPPORT) COPYING.NEWLIB" newlib - .NOEXPORT: MAKEOVERRIDES= diff -uprN binutils-2.14.90.0.8/texinfo/texinfo.tex binutils-2.15.90.0.1/texinfo/texinfo.tex --- binutils-2.14.90.0.8/texinfo/texinfo.tex 2003-03-19 09:19:17.000000000 -0800 +++ binutils-2.15.90.0.1/texinfo/texinfo.tex 2004-03-03 12:24:34.000000000 -0800 @@ -3,10 +3,11 @@ % Load plain if necessary, i.e., if running under initex. \expandafter\ifx\csname fmtname\endcsname\relax\input plain\fi % -\def\texinfoversion{2003-02-03.16} +\def\texinfoversion{2004-02-19.09} % % Copyright (C) 1985, 1986, 1988, 1990, 1991, 1992, 1993, 1994, 1995, -% 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +% 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software +% Foundation, Inc. % % This texinfo.tex file is free software; you can redistribute it and/or % modify it under the terms of the GNU General Public License as @@ -23,23 +24,18 @@ % to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, % Boston, MA 02111-1307, USA. % -% In other words, you are welcome to use, share and improve this program. -% You are forbidden to forbid anyone else to use, share and improve -% what you give them. Help stamp out software-hoarding! -% +% As a special exception, when this file is read by TeX when processing +% a Texinfo source document, you may use the result without +% restriction. (This has been our intent since Texinfo was invented.) +% % Please try the latest version of texinfo.tex before submitting bug % reports; you can get the latest version from: -% ftp://ftp.gnu.org/gnu/texinfo/texinfo.tex -% (and all GNU mirrors, see http://www.gnu.org/order/ftp.html) +% http://www.gnu.org/software/texinfo/ (the Texinfo home page), or % ftp://tug.org/tex/texinfo.tex -% (and all CTAN mirrors, see http://www.ctan.org), -% and /home/gd/gnu/doc/texinfo.tex on the GNU machines. -% -% The GNU Texinfo home page is http://www.gnu.org/software/texinfo. -% -% The texinfo.tex in any given Texinfo distribution could well be out +% (and all CTAN mirrors, see http://www.ctan.org). +% The texinfo.tex in any given distribution could well be out % of date, so if that's what you're using, please check. -% +% % Send bug reports to bug-texinfo@gnu.org. Please include including a % complete document in each bug report with which we can reproduce the % problem. Patches are, of course, greatly appreciated. @@ -55,10 +51,13 @@ % The extra TeX runs get the cross-reference information correct. % Sometimes one run after texindex suffices, and sometimes you need more % than two; texi2dvi does it as many times as necessary. -% +% % It is possible to adapt texinfo.tex for other languages, to some % extent. You can get the existing language-specific files from the % full Texinfo distribution. +% +% The GNU Texinfo home page is http://www.gnu.org/software/texinfo. + \message{Loading texinfo [version \texinfoversion]:} @@ -71,11 +70,11 @@ \message{Basics,} \chardef\other=12 -% We never want plain's outer \+ definition in Texinfo. +% We never want plain's \outer definition of \+ in Texinfo. % For @tex, we can use \tabalign. \let\+ = \relax -% Save some parts of plain tex whose names we will redefine. +% Save some plain tex macros whose names we will redefine. \let\ptexb=\b \let\ptexbullet=\bullet \let\ptexc=\c @@ -85,13 +84,18 @@ \let\ptexend=\end \let\ptexequiv=\equiv \let\ptexexclam=\! +\let\ptexfootnote=\footnote \let\ptexgtr=> \let\ptexhat=^ \let\ptexi=\i +\let\ptexindent=\indent +\let\ptexnoindent=\noindent +\let\ptexinsert=\insert \let\ptexlbrace=\{ \let\ptexless=< \let\ptexplus=+ \let\ptexrbrace=\} +\let\ptexslash=\/ \let\ptexstar=\* \let\ptext=\t @@ -99,6 +103,15 @@ % starts a new line in the output. \newlinechar = `^^J +% Use TeX 3.0's \inputlineno to get the line number, for better error +% messages, but if we're using an old version of TeX, don't do anything. +% +\ifx\inputlineno\thisisundefined + \let\linenumber = \empty % Pre-3.0. +\else + \def\linenumber{l.\the\inputlineno:\space} +\fi + % Set up fixed words for English if not already set. \ifx\putwordAppendix\undefined \gdef\putwordAppendix{Appendix}\fi \ifx\putwordChapter\undefined \gdef\putwordChapter{Chapter}\fi @@ -137,42 +150,79 @@ \ifx\putwordDefspec\undefined \gdef\putwordDefspec{Special Form}\fi \ifx\putwordDefvar\undefined \gdef\putwordDefvar{Variable}\fi \ifx\putwordDefopt\undefined \gdef\putwordDefopt{User Option}\fi -\ifx\putwordDeftypevar\undefined\gdef\putwordDeftypevar{Variable}\fi \ifx\putwordDeffunc\undefined \gdef\putwordDeffunc{Function}\fi -\ifx\putwordDeftypefun\undefined\gdef\putwordDeftypefun{Function}\fi % In some macros, we cannot use the `\? notation---the left quote is % in some cases the escape char. \chardef\colonChar = `\: \chardef\commaChar = `\, \chardef\dotChar = `\. -\chardef\equalChar = `\= \chardef\exclamChar= `\! \chardef\questChar = `\? \chardef\semiChar = `\; -\chardef\spaceChar = `\ % \chardef\underChar = `\_ +\chardef\spaceChar = `\ % +\chardef\spacecat = 10 +\def\spaceisspace{\catcode\spaceChar=\spacecat} + % Ignore a token. % \def\gobble#1{} -% True if #1 is the empty string, i.e., called like `\ifempty{}'. -% -\def\ifempty#1{\ifemptyx #1\emptymarkA\emptymarkB}% -\def\ifemptyx#1#2\emptymarkB{\ifx #1\emptymarkA}% +% The following is used inside several \edef's. +\def\makecsname#1{\expandafter\noexpand\csname#1\endcsname} % Hyphenation fixes. -\hyphenation{ap-pen-dix} -\hyphenation{mini-buf-fer mini-buf-fers} -\hyphenation{eshell} -\hyphenation{white-space} +\hyphenation{ + Flor-i-da Ghost-script Ghost-view Mac-OS ap-pen-dix bit-map bit-maps + data-base data-bases eshell fall-ing half-way long-est man-u-script + man-u-scripts mini-buf-fer mini-buf-fers over-view par-a-digm + par-a-digms rec-tan-gu-lar ro-bot-ics se-vere-ly set-up spa-ces + stand-alone strong-est time-stamp time-stamps which-ever white-space + wide-spread wrap-around +} % Margin to add to right of even pages, to left of odd pages. \newdimen\bindingoffset \newdimen\normaloffset \newdimen\pagewidth \newdimen\pageheight +% For a final copy, take out the rectangles +% that mark overfull boxes (in case you have decided +% that the text looks ok even though it passes the margin). +% +\def\finalout{\overfullrule=0pt} + +% @| inserts a changebar to the left of the current line. It should +% surround any changed text. This approach does *not* work if the +% change spans more than two lines of output. To handle that, we would +% have adopt a much more difficult approach (putting marks into the main +% vertical list for the beginning and end of each change). +% +\def\|{% + % \vadjust can only be used in horizontal mode. + \leavevmode + % + % Append this vertical mode material after the current line in the output. + \vadjust{% + % We want to insert a rule with the height and depth of the current + % leading; that is exactly what \strutbox is supposed to record. + \vskip-\baselineskip + % + % \vadjust-items are inserted at the left edge of the type. So + % the \llap here moves out into the left-hand margin. + \llap{% + % + % For a thicker or thinner bar, change the `1pt'. + \vrule height\baselineskip width1pt + % + % This is the space between the bar and the text. + \hskip 12pt + }% + }% +} + % Sometimes it is convenient to have everything in the transcript file % and nothing on the terminal. We don't just call \tracingall here, % since that produces some useless output on the terminal. We also make @@ -197,12 +247,12 @@ \tracingassigns1 \fi \tracingcommands3 % 3 gives us more in etex - \errorcontextlines\maxdimen + \errorcontextlines16 }% % add check for \lastpenalty to plain's definitions. If the last thing % we did was a \nobreak, we don't want to insert more space. -% +% \def\smallbreak{\ifnum\lastpenalty<10000\par\ifdim\lastskip<\smallskipamount \removelastskip\penalty-50\smallskip\fi\fi} \def\medbreak{\ifnum\lastpenalty<10000\par\ifdim\lastskip<\medskipamount @@ -255,7 +305,7 @@ % the page break happens to be in the middle of an example. \shipout\vbox{% % Do this early so pdf references go to the beginning of the page. - \ifpdfmakepagedest \pdfmkdest{\the\pageno} \fi + \ifpdfmakepagedest \pdfdest name{\the\pageno} xyz\fi % \ifcropmarks \vbox to \outervsize\bgroup \hsize = \outerhsize @@ -336,132 +386,162 @@ % the input line (except we remove a trailing comment). #1 should be a % macro which expects an ordinary undelimited TeX argument. % -\def\parsearg#1{% - \let\next = #1% +\def\parsearg{\parseargusing{}} +\def\parseargusing#1#2{% + \def\next{#2}% \begingroup \obeylines - \futurelet\temp\parseargx -} - -% If the next token is an obeyed space (from an @example environment or -% the like), remove it and recurse. Otherwise, we're done. -\def\parseargx{% - % \obeyedspace is defined far below, after the definition of \sepspaces. - \ifx\obeyedspace\temp - \expandafter\parseargdiscardspace - \else - \expandafter\parseargline - \fi + \spaceisspace + #1% + \parseargline\empty% Insert the \empty token, see \finishparsearg below. } -% Remove a single space (as the delimiter token to the macro call). -{\obeyspaces % - \gdef\parseargdiscardspace {\futurelet\temp\parseargx}} - {\obeylines % \gdef\parseargline#1^^M{% \endgroup % End of the group started in \parsearg. - % - % First remove any @c comment, then any @comment. - % Result of each macro is put in \toks0. - \argremovec #1\c\relax % - \expandafter\argremovecomment \the\toks0 \comment\relax % - % - % Call the caller's macro, saved as \next in \parsearg. - \expandafter\next\expandafter{\the\toks0}% + \argremovecomment #1\comment\ArgTerm% }% } -% Since all \c{,omment} does is throw away the argument, we can let TeX -% do that for us. The \relax here is matched by the \relax in the call -% in \parseargline; it could be more or less anything, its purpose is -% just to delimit the argument to the \c. -\def\argremovec#1\c#2\relax{\toks0 = {#1}} -\def\argremovecomment#1\comment#2\relax{\toks0 = {#1}} +% First remove any @comment, then any @c comment. +\def\argremovecomment#1\comment#2\ArgTerm{\argremovec #1\c\ArgTerm} +\def\argremovec#1\c#2\ArgTerm{\argcheckspaces#1\^^M\ArgTerm} -% \argremovec{,omment} might leave us with trailing spaces, though; e.g., +% Each occurence of `\^^M' or `\^^M' is replaced by a single space. +% +% \argremovec might leave us with trailing space, e.g., % @end itemize @c foo -% will have two active spaces as part of the argument with the -% `itemize'. Here we remove all active spaces from #1, and assign the -% result to \toks0. -% -% This loses if there are any *other* active characters besides spaces -% in the argument -- _ ^ +, for example -- since they get expanded. -% Fortunately, Texinfo does not define any such commands. (If it ever -% does, the catcode of the characters in questionwill have to be changed -% here.) But this means we cannot call \removeactivespaces as part of -% \argremovec{,omment}, since @c uses \parsearg, and thus the argument -% that \parsearg gets might well have any character at all in it. +% This space token undergoes the same procedure and is eventually removed +% by \finishparsearg. % -\def\removeactivespaces#1{% - \begingroup - \ignoreactivespaces - \edef\temp{#1}% - \global\toks0 = \expandafter{\temp}% - \endgroup +\def\argcheckspaces#1\^^M{\argcheckspacesX#1\^^M \^^M} +\def\argcheckspacesX#1 \^^M{\argcheckspacesY#1\^^M} +\def\argcheckspacesY#1\^^M#2\^^M#3\ArgTerm{% + \def\temp{#3}% + \ifx\temp\empty + % We cannot use \next here, as it holds the macro to run; + % thus we reuse \temp. + \let\temp\finishparsearg + \else + \let\temp\argcheckspaces + \fi + % Put the space token in: + \temp#1 #3\ArgTerm } -% Change the active space to expand to nothing. +% If a _delimited_ argument is enclosed in braces, they get stripped; so +% to get _exactly_ the rest of the line, we had to prevent such situation. +% We prepended an \empty token at the very beginning and we expand it now, +% just before passing the control to \next. +% (Similarily, we have to think about #3 of \argcheckspacesY above: it is +% either the null string, or it ends with \^^M---thus there is no danger +% that a pair of braces would be stripped. % -\begingroup - \obeyspaces - \gdef\ignoreactivespaces{\obeyspaces\let =\empty} -\endgroup +% But first, we have to remove the trailing space token. +% +\def\finishparsearg#1 \ArgTerm{\expandafter\next\expandafter{#1}} +% \parseargdef\foo{...} +% is roughly equivalent to +% \def\foo{\parsearg\Xfoo} +% \def\Xfoo#1{...} +% +% Actually, I use \csname\string\foo\endcsname, ie. \\foo, as it is my +% favourite TeX trick. --kasal, 16nov03 -\def\flushcr{\ifx\par\lisppar \def\next##1{}\else \let\next=\relax \fi \next} +\def\parseargdef#1{% + \expandafter \doparseargdef \csname\string#1\endcsname #1% +} +\def\doparseargdef#1#2{% + \def#2{\parsearg#1}% + \def#1##1% +} -%% These are used to keep @begin/@end levels from running away -%% Call \inENV within environments (after a \begingroup) -\newif\ifENV \ENVfalse \def\inENV{\ifENV\relax\else\ENVtrue\fi} -\def\ENVcheck{% -\ifENV\errmessage{Still within an environment; press RETURN to continue} -\endgroup\fi} % This is not perfect, but it should reduce lossage +% Several utility definitions with active space: +{ + \obeyspaces + \gdef\obeyedspace{ } -% @begin foo is the same as @foo, for now. -\newhelp\EMsimple{Press RETURN to continue.} + % Make each space character in the input produce a normal interword + % space in the output. Don't allow a line break at this space, as this + % is used only in environments like @example, where each line of input + % should produce a line of output anyway. + % + \gdef\sepspaces{\obeyspaces\let =\tie} + + % If an index command is used in an @example environment, any spaces + % therein should become regular spaces in the raw index file, not the + % expansion of \tie (\leavevmode \penalty \@M \ ). + \gdef\unsepspaces{\let =\space} +} -\outer\def\begin{\parsearg\beginxxx} -\def\beginxxx #1{% -\expandafter\ifx\csname #1\endcsname\relax -{\errhelp=\EMsimple \errmessage{Undefined command @begin #1}}\else -\csname #1\endcsname\fi} +\def\flushcr{\ifx\par\lisppar \def\next##1{}\else \let\next=\relax \fi \next} -% @end foo executes the definition of \Efoo. -% -\def\end{\parsearg\endxxx} -\def\endxxx #1{% - \removeactivespaces{#1}% - \edef\endthing{\the\toks0}% - % - \expandafter\ifx\csname E\endthing\endcsname\relax - \expandafter\ifx\csname \endthing\endcsname\relax - % There's no \foo, i.e., no ``environment'' foo. - \errhelp = \EMsimple - \errmessage{Undefined command `@end \endthing'}% - \else - \unmatchedenderror\endthing - \fi +% Define the framework for environments in texinfo.tex. It's used like this: +% +% \envdef\foo{...} +% \def\Efoo{...} +% +% It's the responsibility of \envdef to insert \begingroup before the +% actual body; @end closes the group after calling \Efoo. \envdef also +% defines \thisenv, so the current environment is known; @end checks +% whether the environment name matches. The \checkenv macro can also be +% used to check whether the current environment is the one expected. +% +% Non-false conditionals (@iftex, @ifset) don't fit into this, so they +% are not treated as enviroments; they don't open a group. (The +% implementation of @end takes care not to call \endgroup in this +% special case.) + + +% At runtime, environments start with this: +\def\startenvironment#1{\begingroup\def\thisenv{#1}} +% initialize +\let\thisenv\empty + +% ... but they get defined via ``\envdef\foo{...}'': +\long\def\envdef#1#2{\def#1{\startenvironment#1#2}} +\def\envparseargdef#1#2{\parseargdef#1{\startenvironment#1#2}} + +% Check whether we're in the right environment: +\def\checkenv#1{% + \def\temp{#1}% + \ifx\thisenv\temp \else - % Everything's ok; the right environment has been started. - \csname E\endthing\endcsname + \badenverr \fi } -% There is an environment #1, but it hasn't been started. Give an error. -% -\def\unmatchedenderror#1{% +% Evironment mismatch, #1 expected: +\def\badenverr{% \errhelp = \EMsimple - \errmessage{This `@end #1' doesn't have a matching `@#1'}% + \errmessage{This command can appear only \inenvironment\temp, + not \inenvironment\thisenv}% +} +\def\inenvironment#1{% + \ifx#1\empty + out of any environment% + \else + in environment \expandafter\string#1% + \fi } -% Define the control sequence \E#1 to give an unmatched @end error. +% @end foo executes the definition of \Efoo. +% But first, it executes a specialized version of \checkenv % -\def\defineunmatchedend#1{% - \expandafter\def\csname E#1\endcsname{\unmatchedenderror{#1}}% +\parseargdef\end{% + \if 1\csname iscond.#1\endcsname + \else + % The general wording of \badenverr may not be ideal, but... --kasal, 06nov03 + \expandafter\checkenv\csname#1\endcsname + \csname E#1\endcsname + \endgroup + \fi } +\newhelp\EMsimple{Press RETURN to continue.} + %% Simple single-character @ commands @@ -493,6 +573,9 @@ !gdef!rbraceatcmd[@}]% !endgroup +% @comma{} to avoid , parsing problems. +\let\comma = , + % Accents: @, @dotaccent @ringaccent @ubaraccent @udotaccent % Others are defined by plain TeX: @` @' @" @^ @~ @= @u @v @H. \let\, = \c @@ -502,10 +585,12 @@ \let\ubaraccent = \b \let\udotaccent = \d -% Other special characters: @questiondown @exclamdown +% Other special characters: @questiondown @exclamdown @ordf @ordm % Plain TeX defines: @AA @AE @O @OE @L (plus lowercase versions) @ss. \def\questiondown{?`} \def\exclamdown{!`} +\def\ordf{\leavevmode\raise1ex\hbox{\selectfonts\lllsize \underbar{a}}} +\def\ordm{\leavevmode\raise1ex\hbox{\selectfonts\lllsize \underbar{o}}} % Dotless i and dotless j, used for accents. \def\imacro{i} @@ -518,6 +603,25 @@ \fi\fi } +% The \TeX{} logo, as in plain, but resetting the spacing so that a +% period following counts as ending a sentence. (Idea found in latex.) +% +\edef\TeX{\TeX \spacefactor=3000 } + +% @LaTeX{} logo. Not quite the same results as the definition in +% latex.ltx, since we use a different font for the raised A; it's most +% convenient for us to use an explicitly smaller font, rather than using +% the \scriptstyle font (since we don't reset \scriptstyle and +% \scriptscriptstyle). +% +\def\LaTeX{% + L\kern-.36em + {\setbox0=\hbox{T}% + \vbox to \ht0{\hbox{\selectfonts\lllsize A}\vss}}% + \kern-.15em + \TeX +} + % Be sure we're in horizontal mode when doing a tie, since we make space % equivalent to this in @example-like environments. Otherwise, a space % at the beginning of a line will start with \penalty -- and @@ -536,6 +640,9 @@ % @* forces a line break. \def\*{\hfil\break\hbox{}\ignorespaces} +% @/ allows a line break. +\let\/=\allowbreak + % @. is an end-of-sentence period. \def\.{.\spacefactor=3000 } @@ -564,63 +671,18 @@ % explicit \vfill so that the extra space is at the bottom. The % threshold for doing this is if the group is more than \vfilllimit % percent of a page (\vfilllimit can be changed inside of @tex). -% +% \newbox\groupbox \def\vfilllimit{0.7} % -\def\group{\begingroup - \ifnum\catcode13=\active \else +\envdef\group{% + \ifnum\catcode`\^^M=\active \else \errhelp = \groupinvalidhelp \errmessage{@group invalid in context where filling is enabled}% \fi - % - % The \vtop we start below produces a box with normal height and large - % depth; thus, TeX puts \baselineskip glue before it, and (when the - % next line of text is done) \lineskip glue after it. (See p.82 of - % the TeXbook.) Thus, space below is not quite equal to space - % above. But it's pretty close. - \def\Egroup{% - \egroup % End the \vtop. - % \dimen0 is the vertical size of the group's box. - \dimen0 = \ht\groupbox \advance\dimen0 by \dp\groupbox - % \dimen2 is how much space is left on the page (more or less). - \dimen2 = \pageheight \advance\dimen2 by -\pagetotal - % if the group doesn't fit on the current page, and it's a big big - % group, force a page break. - \ifdim \dimen0 > \dimen2 - \ifdim \pagetotal < \vfilllimit\pageheight - \page - \fi - \fi - \copy\groupbox - \endgroup % End the \group. - }% + \startsavinginserts % \setbox\groupbox = \vtop\bgroup - % We have to put a strut on the last line in case the @group is in - % the midst of an example, rather than completely enclosing it. - % Otherwise, the interline space between the last line of the group - % and the first line afterwards is too small. But we can't put the - % strut in \Egroup, since there it would be on a line by itself. - % Hence this just inserts a strut at the beginning of each line. - \everypar = {\strut}% - % - % Since we have a strut on every line, we don't need any of TeX's - % normal interline spacing. - \offinterlineskip - % - % OK, but now we have to do something about blank - % lines in the input in @example-like environments, which normally - % just turn into \lisppar, which will insert no space now that we've - % turned off the interline space. Simplest is to make them be an - % empty paragraph. - \ifx\par\lisppar - \edef\par{\leavevmode \par}% - % - % Reset ^^M's definition to new definition of \par. - \obeylines - \fi - % % Do @comment since we are called inside an environment such as % @example, where each end-of-line in the input causes an % end-of-line in the output. We don't want the end-of-line after @@ -630,6 +692,32 @@ \comment } % +% The \vtop produces a box with normal height and large depth; thus, TeX puts +% \baselineskip glue before it, and (when the next line of text is done) +% \lineskip glue after it. Thus, space below is not quite equal to space +% above. But it's pretty close. +\def\Egroup{% + % To get correct interline space between the last line of the group + % and the first line afterwards, we have to propagate \prevdepth. + \endgraf % Not \par, as it may have been set to \lisppar. + \global\dimen1 = \prevdepth + \egroup % End the \vtop. + % \dimen0 is the vertical size of the group's box. + \dimen0 = \ht\groupbox \advance\dimen0 by \dp\groupbox + % \dimen2 is how much space is left on the page (more or less). + \dimen2 = \pageheight \advance\dimen2 by -\pagetotal + % if the group doesn't fit on the current page, and it's a big big + % group, force a page break. + \ifdim \dimen0 > \dimen2 + \ifdim \pagetotal < \vfilllimit\pageheight + \page + \fi + \fi + \box\groupbox + \prevdepth = \dimen1 + \checkinserts +} +% % TeX puts in an \escapechar (i.e., `@') at the beginning of the help % message, so this ends up printing `@group can only ...'. % @@ -642,10 +730,8 @@ where each line of input produces a line \newdimen\mil \mil=0.001in -\def\need{\parsearg\needx} - % Old definition--didn't work. -%\def\needx #1{\par % +%\parseargdef\need{\par % %% This method tries to make TeX break the page naturally %% if the depth of the box does not fit. %{\baselineskip=0pt% @@ -653,7 +739,7 @@ where each line of input produces a line %\prevdepth=-1000pt %}} -\def\needx#1{% +\parseargdef\need{% % Ensure vertical mode, so we don't make a big box in the middle of a % paragraph. \par @@ -692,37 +778,11 @@ where each line of input produces a line \fi } -% @br forces paragraph break +% @br forces paragraph break (and is undocumented). \let\br = \par -% @dots{} output an ellipsis using the current font. -% We do .5em per period so that it has the same spacing in a typewriter -% font as three actual period characters. -% -\def\dots{% - \leavevmode - \hbox to 1.5em{% - \hskip 0pt plus 0.25fil minus 0.25fil - .\hss.\hss.% - \hskip 0pt plus 0.5fil minus 0.5fil - }% -} - -% @enddots{} is an end-of-sentence ellipsis. -% -\def\enddots{% - \leavevmode - \hbox to 2em{% - \hskip 0pt plus 0.25fil minus 0.25fil - .\hss.\hss.\hss.% - \hskip 0pt plus 0.5fil minus 0.5fil - }% - \spacefactor=3000 -} - - -% @page forces the start of a new page +% @page forces the start of a new page. % \def\page{\par\vfill\supereject} @@ -734,13 +794,11 @@ where each line of input produces a line \newskip\exdentamount % This defn is used inside fill environments such as @defun. -\def\exdent{\parsearg\exdentyyy} -\def\exdentyyy #1{{\hfil\break\hbox{\kern -\exdentamount{\rm#1}}\hfil\break}} +\parseargdef\exdent{\hfil\break\hbox{\kern -\exdentamount{\rm#1}}\hfil\break} % This defn is used inside nofill environments such as @example. -\def\nofillexdent{\parsearg\nofillexdentyyy} -\def\nofillexdentyyy #1{{\advance \leftskip by -\exdentamount -\leftline{\hskip\leftskip{\rm#1}}}} +\parseargdef\nofillexdent{{\advance \leftskip by -\exdentamount + \leftline{\hskip\leftskip{\rm#1}}}} % @inmargin{WHICH}{TEXT} puts TEXT in the WHICH margin next to the current % paragraph. For more general purposes, use the \margin insertion @@ -771,10 +829,10 @@ where each line of input produces a line % @inmargin{TEXT [, RIGHT-TEXT]} % (if RIGHT-TEXT is given, use TEXT for left page, RIGHT-TEXT for right; % else use TEXT for both). -% +% \def\inmargin#1{\parseinmargin #1,,\finish} \def\parseinmargin#1,#2,#3\finish{% not perfect, but better than nothing. - \setbox0 = \hbox{\ignorespaces #2}% + \setbox0 = \hbox{\ignorespaces #2}% \ifdim\wd0 > 0pt \def\lefttext{#1}% have both texts \def\righttext{#2}% @@ -792,8 +850,19 @@ where each line of input produces a line } % @include file insert text of that file as input. -% Allow normal characters that we make active in the argument (a file name). -\def\include{\begingroup +% +\def\include{\parseargusing\filenamecatcodes\includezzz} +\def\includezzz#1{% + \pushthisfilestack + \def\thisfile{#1}% + {% + \makevalueexpandable + \def\temp{\input #1 }% + \expandafter + }\temp + \popthisfilestack +} +\def\filenamecatcodes{% \catcode`\\=\other \catcode`~=\other \catcode`^=\other @@ -802,33 +871,50 @@ where each line of input produces a line \catcode`<=\other \catcode`>=\other \catcode`+=\other - \parsearg\includezzz} -% Restore active chars for included file. -\def\includezzz#1{\endgroup\begingroup - % Read the included file in a group so nested @include's work. - \def\thisfile{#1}% - \let\value=\expandablevalue - \input\thisfile -\endgroup} + \catcode`-=\other +} + +\def\pushthisfilestack{% + \expandafter\pushthisfilestackX\popthisfilestack\StackTerm +} +\def\pushthisfilestackX{% + \expandafter\pushthisfilestackY\thisfile\StackTerm +} +\def\pushthisfilestackY #1\StackTerm #2\StackTerm {% + \gdef\popthisfilestack{\gdef\thisfile{#1}\gdef\popthisfilestack{#2}}% +} + +\def\popthisfilestack{\errthisfilestackempty} +\def\errthisfilestackempty{\errmessage{Internal error: + the stack of filenames is empty.}} \def\thisfile{} % @center line % outputs that line, centered. % -\def\center{\parsearg\docenter} -\def\docenter#1{{% - \ifhmode \hfil\break \fi - \advance\hsize by -\leftskip - \advance\hsize by -\rightskip - \line{\hfil \ignorespaces#1\unskip \hfil}% - \ifhmode \break \fi -}} +\parseargdef\center{% + \ifhmode + \let\next\centerH + \else + \let\next\centerV + \fi + \next{\hfil \ignorespaces#1\unskip \hfil}% +} +\def\centerH#1{% + {% + \hfil\break + \advance\hsize by -\leftskip + \advance\hsize by -\rightskip + \line{#1}% + \break + }% +} +\def\centerV#1{\line{\kern\leftskip #1\kern\rightskip}} % @sp n outputs n lines of vertical space -\def\sp{\parsearg\spxxx} -\def\spxxx #1{\vskip #1\baselineskip} +\parseargdef\sp{\vskip #1\baselineskip} % @comment ...line which is ignored... % @c is the same as @comment @@ -843,13 +929,13 @@ where each line of input produces a line % @paragraphindent NCHARS % We'll use ems for NCHARS, close enough. -% We cannot implement @paragraphindent asis, though. -% +% NCHARS can also be the word `asis' or `none'. +% We cannot feasibly implement @paragraphindent asis, though. +% \def\asisword{asis} % no translation, these are keywords \def\noneword{none} % -\def\paragraphindent{\parsearg\doparagraphindent} -\def\doparagraphindent#1{% +\parseargdef\paragraphindent{% \def\temp{#1}% \ifx\temp\asisword \else @@ -866,8 +952,7 @@ where each line of input produces a line % We'll use ems for NCHARS like @paragraphindent. % It seems @exampleindent asis isn't necessary, but % I preserve it to make it similar to @paragraphindent. -\def\exampleindent{\parsearg\doexampleindent} -\def\doexampleindent#1{% +\parseargdef\exampleindent{% \def\temp{#1}% \ifx\temp\asisword \else @@ -879,48 +964,97 @@ where each line of input produces a line \fi } +% @firstparagraphindent WORD +% If WORD is `none', then suppress indentation of the first paragraph +% after a section heading. If WORD is `insert', then do indent at such +% paragraphs. +% +% The paragraph indentation is suppressed or not by calling +% \suppressfirstparagraphindent, which the sectioning commands do. +% We switch the definition of this back and forth according to WORD. +% By default, we suppress indentation. +% +\def\suppressfirstparagraphindent{\dosuppressfirstparagraphindent} +\def\insertword{insert} +% +\parseargdef\firstparagraphindent{% + \def\temp{#1}% + \ifx\temp\noneword + \let\suppressfirstparagraphindent = \dosuppressfirstparagraphindent + \else\ifx\temp\insertword + \let\suppressfirstparagraphindent = \relax + \else + \errhelp = \EMsimple + \errmessage{Unknown @firstparagraphindent option `\temp'}% + \fi\fi +} + +% Here is how we actually suppress indentation. Redefine \everypar to +% \kern backwards by \parindent, and then reset itself to empty. +% +% We also make \indent itself not actually do anything until the next +% paragraph. +% +\gdef\dosuppressfirstparagraphindent{% + \gdef\indent{% + \restorefirstparagraphindent + \indent + }% + \gdef\noindent{% + \restorefirstparagraphindent + \noindent + }% + \global\everypar = {% + \kern -\parindent + \restorefirstparagraphindent + }% +} + +\gdef\restorefirstparagraphindent{% + \global \let \indent = \ptexindent + \global \let \noindent = \ptexnoindent + \global \everypar = {}% +} + + % @asis just yields its argument. Used with @table, for example. % \def\asis#1{#1} % @math outputs its argument in math mode. -% We don't use $'s directly in the definition of \math because we need -% to set catcodes according to plain TeX first, to allow for subscripts, -% superscripts, special math chars, etc. -% -\let\implicitmath = $%$ font-lock fix % % One complication: _ usually means subscripts, but it could also mean % an actual _ character, as in @math{@var{some_variable} + 1}. So make -% _ within @math be active (mathcode "8000), and distinguish by seeing -% if the current family is \slfam, which is what @var uses. -% -{\catcode\underChar = \active -\gdef\mathunderscore{% - \catcode\underChar=\active - \def_{\ifnum\fam=\slfam \_\else\sb\fi}% -}} -% +% _ active, and distinguish by seeing if the current family is \slfam, +% which is what @var uses. +{ + \catcode\underChar = \active + \gdef\mathunderscore{% + \catcode\underChar=\active + \def_{\ifnum\fam=\slfam \_\else\sb\fi}% + } +} % Another complication: we want \\ (and @\) to output a \ character. % FYI, plain.tex uses \\ as a temporary control sequence (why?), but % this is not advertised and we don't care. Texinfo does not % otherwise define @\. -% +% % The \mathchar is class=0=ordinary, family=7=ttfam, position=5C=\. \def\mathbackslash{\ifnum\fam=\ttfam \mathchar"075C \else\backslash \fi} % \def\math{% \tex - \mathcode`\_="8000 \mathunderscore + \mathunderscore \let\\ = \mathbackslash \mathactive - \implicitmath\finishmath} -\def\finishmath#1{#1\implicitmath\Etex} + $\finishmath +} +\def\finishmath#1{#1$\endgroup} % Close the group opened by \tex. % Some active characters (such as <) are spaced differently in math. -% We have to reset their definitions in case the @math was an -% argument to a command which set the catcodes (such as @item or @section). -% +% We have to reset their definitions in case the @math was an argument +% to a command which sets the catcodes (such as @item or @section). +% { \catcode`^ = \active \catcode`< = \active @@ -935,8 +1069,33 @@ where each line of input produces a line } % @bullet and @minus need the same treatment as @math, just above. -\def\bullet{\implicitmath\ptexbullet\implicitmath} -\def\minus{\implicitmath-\implicitmath} +\def\bullet{$\ptexbullet$} +\def\minus{$-$} + +% @dots{} outputs an ellipsis using the current font. +% We do .5em per period so that it has the same spacing in a typewriter +% font as three actual period characters. +% +\def\dots{% + \leavevmode + \hbox to 1.5em{% + \hskip 0pt plus 0.25fil + .\hfil.\hfil.% + \hskip 0pt plus 0.5fil + }% +} + +% @enddots{} is an end-of-sentence ellipsis. +% +\def\enddots{% + \dots + \spacefactor=3000 +} + +% @comma{} is so commas can be inserted into text without messing up +% Texinfo's parsing. +% +\let\comma = , % @refill is a no-op. \let\refill=\relax @@ -952,20 +1111,20 @@ where each line of input produces a line % So open here the files we need to have open while reading the input. % This makes it possible to make a .fmt file for texinfo. \def\setfilename{% + \fixbackslash % Turn off hack to swallow `\input texinfo'. \iflinks - \readauxfile + \tryauxfile + % Open the new aux file. TeX will close it automatically at exit. + \immediate\openout\auxfile=\jobname.aux \fi % \openindices needs to do some work in any case. \openindices - \fixbackslash % Turn off hack to swallow `\input texinfo'. - \global\let\setfilename=\comment % Ignore extra @setfilename cmds. + \let\setfilename=\comment % Ignore extra @setfilename cmds. % % If texinfo.cnf is present on the system, read it. % Useful for site-wide @afourpaper, etc. - % Just to be on the safe side, close the input stream before the \input. \openin 1 texinfo.cnf - \ifeof1 \let\temp=\relax \else \def\temp{\input texinfo.cnf }\fi - \closein1 - \temp + \ifeof 1 \else \input texinfo.cnf \fi + \closein 1 % \comment % Ignore the actual filename. } @@ -1012,6 +1171,7 @@ where each line of input produces a line \pdftrue \pdfoutput = 1 \input pdfcolor + \pdfcatalog{/PageMode /UseOutlines}% \def\dopdfimage#1#2#3{% \def\imagewidth{#2}% \def\imageheight{#3}% @@ -1032,7 +1192,13 @@ where each line of input produces a line \ifnum\pdftexversion < 14 \else \pdfrefximage \pdflastximage \fi} - \def\pdfmkdest#1{{\normalturnoffactive \pdfdest name{#1} xyz}} + \def\pdfmkdest#1{{% + % We have to set dummies so commands such as @code in a section title + % aren't expanded. + \atdummies + \normalturnoffactive + \pdfdest name{#1} xyz% + }} \def\pdfmkpgn#1{#1} \let\linkcolor = \Blue % was Cyan, but that seems light? \def\endlink{\Black\pdfendlink} @@ -1041,48 +1207,94 @@ where each line of input produces a line \def\expnumber#1{\expandafter\ifx\csname#1\endcsname\relax 0% \else \csname#1\endcsname \fi} \def\advancenumber#1{\tempnum=\expnumber{#1}\relax - \advance\tempnum by1 + \advance\tempnum by 1 \expandafter\xdef\csname#1\endcsname{\the\tempnum}} - \def\pdfmakeoutlines{{% - \openin 1 \jobname.toc - \ifeof 1\else\begingroup - \closein 1 - % Thanh's hack / proper braces in bookmarks + % + % #1 is the section text. #2 is the pdf expression for the number + % of subentries (or empty, for subsubsections). #3 is the node + % text, which might be empty if this toc entry had no + % corresponding node. #4 is the page number. + % + \def\dopdfoutline#1#2#3#4{% + % Generate a link to the node text if that exists; else, use the + % page number. We could generate a destination for the section + % text in the case where a section has no node, but it doesn't + % seem worthwhile, since most documents are normally structured. + \def\pdfoutlinedest{#3}% + \ifx\pdfoutlinedest\empty \def\pdfoutlinedest{#4}\fi + % + \pdfoutline goto name{\pdfmkpgn{\pdfoutlinedest}}#2{#1}% + } + % + \def\pdfmakeoutlines{% + \begingroup + % Thanh's hack / proper braces in bookmarks \edef\mylbrace{\iftrue \string{\else}\fi}\let\{=\mylbrace \edef\myrbrace{\iffalse{\else\string}\fi}\let\}=\myrbrace % - \def\chapentry ##1##2##3{} - \def\secentry ##1##2##3##4{\advancenumber{chap##2}} - \def\subsecentry ##1##2##3##4##5{\advancenumber{sec##2.##3}} - \def\subsubsecentry ##1##2##3##4##5##6{\advancenumber{subsec##2.##3.##4}} - \let\appendixentry = \chapentry - \let\unnumbchapentry = \chapentry - \let\unnumbsecentry = \secentry - \let\unnumbsubsecentry = \subsecentry - \let\unnumbsubsubsecentry = \subsubsecentry + % Read toc silently, to get counts of subentries for \pdfoutline. + \def\numchapentry##1##2##3##4{% + \def\thischapnum{##2}% + \let\thissecnum\empty + \let\thissubsecnum\empty + }% + \def\numsecentry##1##2##3##4{% + \advancenumber{chap\thischapnum}% + \def\thissecnum{##2}% + \let\thissubsecnum\empty + }% + \def\numsubsecentry##1##2##3##4{% + \advancenumber{sec\thissecnum}% + \def\thissubsecnum{##2}% + }% + \def\numsubsubsecentry##1##2##3##4{% + \advancenumber{subsec\thissubsecnum}% + }% + \let\thischapnum\empty + \let\thissecnum\empty + \let\thissubsecnum\empty + % + % use \def rather than \let here because we redefine \chapentry et + % al. a second time, below. + \def\appentry{\numchapentry}% + \def\appsecentry{\numsecentry}% + \def\appsubsecentry{\numsubsecentry}% + \def\appsubsubsecentry{\numsubsubsecentry}% + \def\unnchapentry{\numchapentry}% + \def\unnsecentry{\numsecentry}% + \def\unnsubsecentry{\numsubsecentry}% + \def\unnsubsubsecentry{\numsubsubsecentry}% \input \jobname.toc - \def\chapentry ##1##2##3{% - \pdfoutline goto name{\pdfmkpgn{##3}}count-\expnumber{chap##2}{##1}} - \def\secentry ##1##2##3##4{% - \pdfoutline goto name{\pdfmkpgn{##4}}count-\expnumber{sec##2.##3}{##1}} - \def\subsecentry ##1##2##3##4##5{% - \pdfoutline goto name{\pdfmkpgn{##5}}count-\expnumber{subsec##2.##3.##4}{##1}} - \def\subsubsecentry ##1##2##3##4##5##6{% - \pdfoutline goto name{\pdfmkpgn{##6}}{##1}} - \let\appendixentry = \chapentry - \let\unnumbchapentry = \chapentry - \let\unnumbsecentry = \secentry - \let\unnumbsubsecentry = \subsecentry - \let\unnumbsubsubsecentry = \subsubsecentry % - % Make special characters normal for writing to the pdf file. + % Read toc second time, this time actually producing the outlines. + % The `-' means take the \expnumber as the absolute number of + % subentries, which we calculated on our first read of the .toc above. % + % We use the node names as the destinations. + \def\numchapentry##1##2##3##4{% + \dopdfoutline{##1}{count-\expnumber{chap##2}}{##3}{##4}}% + \def\numsecentry##1##2##3##4{% + \dopdfoutline{##1}{count-\expnumber{sec##2}}{##3}{##4}}% + \def\numsubsecentry##1##2##3##4{% + \dopdfoutline{##1}{count-\expnumber{subsec##2}}{##3}{##4}}% + \def\numsubsubsecentry##1##2##3##4{% count is always zero + \dopdfoutline{##1}{}{##3}{##4}}% + % + % PDF outlines are displayed using system fonts, instead of + % document fonts. Therefore we cannot use special characters, + % since the encoding is unknown. For example, the eogonek from + % Latin 2 (0xea) gets translated to a | character. Info from + % Staszek Wawrykiewicz, 19 Jan 2004 04:09:24 +0100. + % + % xx to do this right, we have to translate 8-bit characters to + % their "best" equivalent, based on the @documentencoding. Right + % now, I guess we'll just let the pdf reader have its way. \indexnofonts - \let\tt=\relax \turnoffactive \input \jobname.toc - \endgroup\fi - }} + \endgroup + } + % \def\makelinks #1,{% \def\params{#1}\def\E{END}% \ifx\params\E @@ -1091,7 +1303,7 @@ where each line of input produces a line \let\nextmakelinks=\makelinks \ifnum\lnkcount>0,\fi \picknum{#1}% - \startlink attr{/Border [0 0 0]} + \startlink attr{/Border [0 0 0]} goto name{\pdfmkpgn{\the\pgn}}% \linkcolor #1% \advance\lnkcount by 1% @@ -1113,7 +1325,6 @@ where each line of input produces a line \def\ppn#1{\pgn=#1\gobble} \def\ppnn{\pgn=\first} \def\pdfmklnk#1{\lnkcount=0\makelinks #1,END,} - \def\addtokens#1#2{\edef\addtoks{\noexpand#1={\the#1#2}}\addtoks} \def\skipspaces#1{\def\PP{#1}\def\D{|}% \ifx\PP\D\let\nextsp\relax \else\let\nextsp\skipspaces @@ -1131,22 +1342,21 @@ where each line of input produces a line \def\pdfurl#1{% \begingroup \normalturnoffactive\def\@{@}% - \let\value=\expandablevalue + \makevalueexpandable \leavevmode\Red \startlink attr{/Border [0 0 0]}% user{/Subtype /Link /A << /S /URI /URI (#1) >>}% - % #1 \endgroup} \def\pdfgettoks#1.{\setbox\boxA=\hbox{\toksA={#1.}\toksB={}\maketoks}} \def\addtokens#1#2{\edef\addtoks{\noexpand#1={\the#1#2}}\addtoks} \def\adn#1{\addtokens{\toksC}{#1}\global\countA=1\let\next=\maketoks} \def\poptoks#1#2|ENDTOKS|{\let\first=#1\toksD={#1}\toksA={#2}} \def\maketoks{% - \expandafter\poptoks\the\toksA|ENDTOKS| + \expandafter\poptoks\the\toksA|ENDTOKS|\relax \ifx\first0\adn0 \else\ifx\first1\adn1 \else\ifx\first2\adn2 \else\ifx\first3\adn3 \else\ifx\first4\adn4 \else\ifx\first5\adn5 \else\ifx\first6\adn6 - \else\ifx\first7\adn7 \else\ifx\first8\adn8 \else\ifx\first9\adn9 + \else\ifx\first7\adn7 \else\ifx\first8\adn8 \else\ifx\first9\adn9 \else \ifnum0=\countA\else\makelink\fi \ifx\first.\let\next=\done\else @@ -1166,16 +1376,34 @@ where each line of input produces a line \message{fonts,} -% Font-change commands. + +% Change the current font style to #1, remembering it in \curfontstyle. +% For now, we do not accumulate font styles: @b{@i{foo}} prints foo in +% italics, not bold italics. +% +\def\setfontstyle#1{% + \def\curfontstyle{#1}% not as a control sequence, because we are \edef'd. + \csname ten#1\endcsname % change the current font +} + +% Select #1 fonts with the current style. +% +\def\selectfonts#1{\csname #1fonts\endcsname \csname\curfontstyle\endcsname} + +\def\rm{\fam=0 \setfontstyle{rm}} +\def\it{\fam=\itfam \setfontstyle{it}} +\def\sl{\fam=\slfam \setfontstyle{sl}} +\def\bf{\fam=\bffam \setfontstyle{bf}} +\def\tt{\fam=\ttfam \setfontstyle{tt}} % Texinfo sort of supports the sans serif font style, which plain TeX does not. -% So we set up a \sf analogous to plain's \rm, etc. +% So we set up a \sf. \newfam\sffam -\def\sf{\fam=\sffam \tensf} +\def\sf{\fam=\sffam \setfontstyle{sf}} \let\li = \sf % Sometimes we call it \li, not \sf. -% We don't need math for this one. -\def\ttsl{\tenttsl} +% We don't need math for this font style. +\def\ttsl{\setfontstyle{ttsl}} % Default leading. \newdimen\textleading \textleading = 13.2pt @@ -1226,6 +1454,7 @@ where each line of input produces a line \def\scshape{csc} \def\scbshape{csc} +% Text fonts (11.2pt, magstep1). \newcount\mainmagstep \ifx\bigger\relax % not really supported. @@ -1237,10 +1466,6 @@ where each line of input produces a line \setfont\textrm\rmshape{10}{\mainmagstep} \setfont\texttt\ttshape{10}{\mainmagstep} \fi -% Instead of cmb10, you may want to use cmbx10. -% cmbx10 is a prettier font on its own, but cmb10 -% looks better when embedded in a line with cmr10 -% (in Bob's opinion). \setfont\textbf\bfshape{10}{\mainmagstep} \setfont\textit\itshape{10}{\mainmagstep} \setfont\textsl\slshape{10}{\mainmagstep} @@ -1250,10 +1475,11 @@ where each line of input produces a line \font\texti=cmmi10 scaled \mainmagstep \font\textsy=cmsy10 scaled \mainmagstep -% A few fonts for @defun, etc. -\setfont\defbf\bxshape{10}{\magstep1} %was 1314 +% A few fonts for @defun names and args. +\setfont\defbf\bfshape{10}{\magstep1} \setfont\deftt\ttshape{10}{\magstep1} -\def\df{\let\tentt=\deftt \let\tenbf = \defbf \bf} +\setfont\defttsl\ttslshape{10}{\magstep1} +\def\df{\let\tentt=\deftt \let\tenbf = \defbf \let\tenttsl=\defttsl \bf} % Fonts for indices, footnotes, small examples (9pt). \setfont\smallrm\rmshape{9}{1000} @@ -1279,7 +1505,7 @@ where each line of input produces a line \font\smalleri=cmmi8 \font\smallersy=cmsy8 -% Fonts for title page: +% Fonts for title page (20.4pt): \setfont\titlerm\rmbshape{12}{\magstep3} \setfont\titleit\itbshape{10}{\magstep4} \setfont\titlesl\slbshape{10}{\magstep4} @@ -1325,11 +1551,21 @@ where each line of input produces a line \setfont\ssecttsl\ttslshape{10}{1315} \setfont\ssecsf\sfbshape{12}{\magstephalf} \let\ssecbf\ssecrm -\setfont\ssecsc\scbshape{10}{\magstep1} +\setfont\ssecsc\scbshape{10}{1315} \font\sseci=cmmi12 scaled \magstephalf \font\ssecsy=cmsy10 scaled 1315 -% The smallcaps and symbol fonts should actually be scaled \magstep1.5, -% but that is not a standard magnification. + +% Reduced fonts for @acro in text (10pt). +\setfont\reducedrm\rmshape{10}{1000} +\setfont\reducedtt\ttshape{10}{1000} +\setfont\reducedbf\bfshape{10}{1000} +\setfont\reducedit\itshape{10}{1000} +\setfont\reducedsl\slshape{10}{1000} +\setfont\reducedsf\sfshape{10}{1000} +\setfont\reducedsc\scshape{10}{1000} +\setfont\reducedttsl\ttslshape{10}{1000} +\font\reducedi=cmmi10 +\font\reducedsy=cmsy10 % In order for the font changes to affect most math symbols and letters, % we have to define the \textfont of the standard families. Since @@ -1344,50 +1580,72 @@ where each line of input produces a line } % The font-changing commands redefine the meanings of \tenSTYLE, instead -% of just \STYLE. We do this so that font changes will continue to work -% in math mode, where it is the current \fam that is relevant in most -% cases, not the current font. Plain TeX does \def\bf{\fam=\bffam -% \tenbf}, for example. By redefining \tenbf, we obviate the need to -% redefine \bf itself. +% of just \STYLE. We do this because \STYLE needs to also set the +% current \fam for math mode. Our \STYLE (e.g., \rm) commands hardwire +% \tenSTYLE to set the current font. +% +% Each font-changing command also sets the names \lsize (one size lower) +% and \lllsize (three sizes lower). These relative commands are used in +% the LaTeX logo and acronyms. +% +% This all needs generalizing, badly. +% \def\textfonts{% \let\tenrm=\textrm \let\tenit=\textit \let\tensl=\textsl \let\tenbf=\textbf \let\tentt=\texttt \let\smallcaps=\textsc - \let\tensf=\textsf \let\teni=\texti \let\tensy=\textsy \let\tenttsl=\textttsl + \let\tensf=\textsf \let\teni=\texti \let\tensy=\textsy + \let\tenttsl=\textttsl + \def\lsize{reduced}\def\lllsize{smaller}% \resetmathfonts \setleading{\textleading}} \def\titlefonts{% \let\tenrm=\titlerm \let\tenit=\titleit \let\tensl=\titlesl \let\tenbf=\titlebf \let\tentt=\titlett \let\smallcaps=\titlesc \let\tensf=\titlesf \let\teni=\titlei \let\tensy=\titlesy \let\tenttsl=\titlettsl + \def\lsize{chap}\def\lllsize{subsec}% \resetmathfonts \setleading{25pt}} \def\titlefont#1{{\titlefonts\rm #1}} \def\chapfonts{% \let\tenrm=\chaprm \let\tenit=\chapit \let\tensl=\chapsl \let\tenbf=\chapbf \let\tentt=\chaptt \let\smallcaps=\chapsc \let\tensf=\chapsf \let\teni=\chapi \let\tensy=\chapsy \let\tenttsl=\chapttsl + \def\lsize{sec}\def\lllsize{text}% \resetmathfonts \setleading{19pt}} \def\secfonts{% \let\tenrm=\secrm \let\tenit=\secit \let\tensl=\secsl \let\tenbf=\secbf \let\tentt=\sectt \let\smallcaps=\secsc - \let\tensf=\secsf \let\teni=\seci \let\tensy=\secsy \let\tenttsl=\secttsl + \let\tensf=\secsf \let\teni=\seci \let\tensy=\secsy + \let\tenttsl=\secttsl + \def\lsize{subsec}\def\lllsize{reduced}% \resetmathfonts \setleading{16pt}} \def\subsecfonts{% \let\tenrm=\ssecrm \let\tenit=\ssecit \let\tensl=\ssecsl \let\tenbf=\ssecbf \let\tentt=\ssectt \let\smallcaps=\ssecsc - \let\tensf=\ssecsf \let\teni=\sseci \let\tensy=\ssecsy \let\tenttsl=\ssecttsl + \let\tensf=\ssecsf \let\teni=\sseci \let\tensy=\ssecsy + \let\tenttsl=\ssecttsl + \def\lsize{text}\def\lllsize{small}% \resetmathfonts \setleading{15pt}} -\let\subsubsecfonts = \subsecfonts % Maybe make sssec fonts scaled magstephalf? +\let\subsubsecfonts = \subsecfonts +\def\reducedfonts{% + \let\tenrm=\reducedrm \let\tenit=\reducedit \let\tensl=\reducedsl + \let\tenbf=\reducedbf \let\tentt=\reducedtt \let\reducedcaps=\reducedsc + \let\tensf=\reducedsf \let\teni=\reducedi \let\tensy=\reducedsy + \let\tenttsl=\reducedttsl + \def\lsize{small}\def\lllsize{smaller}% + \resetmathfonts \setleading{10.5pt}} \def\smallfonts{% \let\tenrm=\smallrm \let\tenit=\smallit \let\tensl=\smallsl \let\tenbf=\smallbf \let\tentt=\smalltt \let\smallcaps=\smallsc \let\tensf=\smallsf \let\teni=\smalli \let\tensy=\smallsy \let\tenttsl=\smallttsl + \def\lsize{smaller}\def\lllsize{smaller}% \resetmathfonts \setleading{10.5pt}} \def\smallerfonts{% \let\tenrm=\smallerrm \let\tenit=\smallerit \let\tensl=\smallersl \let\tenbf=\smallerbf \let\tentt=\smallertt \let\smallcaps=\smallersc \let\tensf=\smallersf \let\teni=\smalleri \let\tensy=\smallersy \let\tenttsl=\smallerttsl + \def\lsize{smaller}\def\lllsize{smaller}% \resetmathfonts \setleading{9.5pt}} % Set the fonts to use with the @small... environments. @@ -1396,22 +1654,21 @@ where each line of input produces a line % About \smallexamplefonts. If we use \smallfonts (9pt), @smallexample % can fit this many characters: % 8.5x11=86 smallbook=72 a4=90 a5=69 -% If we use \smallerfonts (8pt), then we can fit this many characters: +% If we use \scriptfonts (8pt), then we can fit this many characters: % 8.5x11=90+ smallbook=80 a4=90+ a5=77 % For me, subjectively, the few extra characters that fit aren't worth % the additional smallness of 8pt. So I'm making the default 9pt. -% +% % By the way, for comparison, here's what fits with @example (10pt): % 8.5x11=71 smallbook=60 a4=75 a5=58 -% -% I wish we used A4 paper on this side of the Atlantic. -% +% +% I wish the USA used A4 paper. % --karl, 24jan03. % Set up the default fonts, so we can use them for creating boxes. % -\textfonts +\textfonts \rm % Define these so they can be easily changed for other fonts. \def\angleleft{$\langle$} @@ -1422,7 +1679,7 @@ where each line of input produces a line % Fonts for short table of contents. \setfont\shortcontrm\rmshape{12}{1000} -\setfont\shortcontbf\bxshape{12}{1000} +\setfont\shortcontbf\bfshape{10}{\magstep1} % no cmb12 \setfont\shortcontsl\slshape{12}{1000} \setfont\shortconttt\ttshape{12}{1000} @@ -1431,15 +1688,23 @@ where each line of input produces a line % \smartitalic{ARG} outputs arg in italics, followed by an italic correction % unless the following character is such as not to need one. -\def\smartitalicx{\ifx\next,\else\ifx\next-\else\ifx\next.\else\/\fi\fi\fi} +\def\smartitalicx{\ifx\next,\else\ifx\next-\else\ifx\next.\else + \ptexslash\fi\fi\fi} \def\smartslanted#1{{\ifusingtt\ttsl\sl #1}\futurelet\next\smartitalicx} \def\smartitalic#1{{\ifusingtt\ttsl\it #1}\futurelet\next\smartitalicx} +% like \smartslanted except unconditionally uses \ttsl. +% @var is set to this for defun arguments. +\def\ttslanted#1{{\ttsl #1}\futurelet\next\smartitalicx} + +% like \smartslanted except unconditionally use \sl. We never want +% ttsl for book titles, do we? +\def\cite#1{{\sl #1}\futurelet\next\smartitalicx} + \let\i=\smartitalic \let\var=\smartslanted \let\dfn=\smartslanted \let\emph=\smartitalic -\let\cite=\smartslanted \def\b#1{{\bf #1}} \let\strong=\b @@ -1454,7 +1719,7 @@ where each line of input produces a line % Set sfcode to normal for the chars that usually have another value. % Can't use plain's \frenchspacing because it uses the `\x notation, and % sometimes \x has an active definition that messes things up. -% +% \catcode`@=11 \def\frenchspacing{% \sfcode\dotChar =\@m \sfcode\questChar=\@m \sfcode\exclamChar=\@m @@ -1466,7 +1731,6 @@ where each line of input produces a line {\tt \rawbackslash \frenchspacing #1}% \null } -\let\ttfont=\t \def\samp#1{`\tclose{#1}'\null} \setfont\keyrm\rmshape{8}{1000} \font\keysy=cmsy9 @@ -1507,7 +1771,7 @@ where each line of input produces a line \null } -% We *must* turn on hyphenation at `-' and `_' in \code. +% We *must* turn on hyphenation at `-' and `_' in @code. % Otherwise, it is too hard to avoid overfull hboxes % in the Emacs manual, the Library manual, etc. @@ -1525,10 +1789,6 @@ where each line of input produces a line \catcode`\_=\active \let_\codeunder \codex } - % - % If we end up with any active - characters when handling the index, - % just treat them as a normal -. - \global\def\indexbreaks{\catcode`\-=\active \let-\realdash} } \def\realdash{-} @@ -1552,8 +1812,7 @@ where each line of input produces a line % @kbdinputstyle -- arg is `distinct' (@kbd uses slanted tty font always), % `example' (@kbd uses ttsl only inside of @example and friends), % or `code' (@kbd uses normal tty font always). -\def\kbdinputstyle{\parsearg\kbdinputstylexxx} -\def\kbdinputstylexxx#1{% +\parseargdef\kbdinputstyle{% \def\arg{#1}% \ifx\arg\worddistinct \gdef\kbdexamplefont{\ttsl}\gdef\kbdfont{\ttsl}% @@ -1563,7 +1822,7 @@ where each line of input produces a line \gdef\kbdexamplefont{\tt}\gdef\kbdfont{\tt}% \else \errhelp = \EMsimple - \errmessage{Unknown @kbdinputstyle `\arg'}% + \errmessage{Unknown @kbdinputstyle option `\arg'}% \fi\fi\fi } \def\worddistinct{distinct} @@ -1614,7 +1873,7 @@ where each line of input produces a line % rms does not like angle brackets --karl, 17may97. % So now @email is just like @uref, unless we are pdf. -% +% %\def\email#1{\angleleft{\tt #1}\angleright} \ifpdf \def\email#1{\doemail#1,,\finish} @@ -1653,12 +1912,29 @@ where each line of input produces a line \def\sc#1{{\smallcaps#1}} % smallcaps font \def\ii#1{{\it #1}} % italic font -% @acronym downcases the argument and prints in smallcaps. -\def\acronym#1{{\smallcaps \lowercase{#1}}} +\def\acronym#1{\doacronym #1,,\finish} +\def\doacronym#1,#2,#3\finish{% + {\selectfonts\lsize #1}% + \def\temp{#2}% + \ifx\temp\empty \else + \space ({\unsepspaces \ignorespaces \temp \unskip})% + \fi +} -% @pounds{} is a sterling sign. +% @pounds{} is a sterling sign, which is in the CM italic font. +% \def\pounds{{\it\$}} +% @registeredsymbol - R in a circle. The font for the R should really +% be smaller yet, but lllsize is the best we can do for now. +% Adapted from the plain.tex definition of \copyright. +% +\def\registeredsymbol{% + $^{{\ooalign{\hfil\raise.07ex\hbox{\selectfonts\lllsize R}% + \hfil\crcr\Orb}}% + }$% +} + \message{page headings,} @@ -1677,87 +1953,103 @@ where each line of input produces a line \newif\ifsetshortcontentsaftertitlepage \let\setshortcontentsaftertitlepage = \setshortcontentsaftertitlepagetrue -\def\shorttitlepage{\parsearg\shorttitlepagezzz} -\def\shorttitlepagezzz #1{\begingroup\hbox{}\vskip 1.5in \chaprm \centerline{#1}% +\parseargdef\shorttitlepage{\begingroup\hbox{}\vskip 1.5in \chaprm \centerline{#1}% \endgroup\page\hbox{}\page} -\def\titlepage{\begingroup \parindent=0pt \textfonts - \let\subtitlerm=\tenrm - \def\subtitlefont{\subtitlerm \normalbaselineskip = 13pt \normalbaselines}% - % - \def\authorfont{\authorrm \normalbaselineskip = 16pt \normalbaselines - \let\tt=\authortt}% - % - % Leave some space at the very top of the page. - \vglue\titlepagetopglue - % - % Now you can print the title using @title. - \def\title{\parsearg\titlezzz}% - \def\titlezzz##1{\leftline{\titlefonts\rm ##1} - % print a rule at the page bottom also. - \finishedtitlepagefalse - \vskip4pt \hrule height 4pt width \hsize \vskip4pt}% - % No rule at page bottom unless we print one at the top with @title. - \finishedtitlepagetrue - % - % Now you can put text using @subtitle. - \def\subtitle{\parsearg\subtitlezzz}% - \def\subtitlezzz##1{{\subtitlefont \rightline{##1}}}% - % - % @author should come last, but may come many times. - \def\author{\parsearg\authorzzz}% - \def\authorzzz##1{\ifseenauthor\else\vskip 0pt plus 1filll\seenauthortrue\fi - {\authorfont \leftline{##1}}}% - % - % Most title ``pages'' are actually two pages long, with space - % at the top of the second. We don't want the ragged left on the second. - \let\oldpage = \page - \def\page{% +\envdef\titlepage{% + % Open one extra group, as we want to close it in the middle of \Etitlepage. + \begingroup + \parindent=0pt \textfonts + % Leave some space at the very top of the page. + \vglue\titlepagetopglue + % No rule at page bottom unless we print one at the top with @title. + \finishedtitlepagetrue + % + % Most title ``pages'' are actually two pages long, with space + % at the top of the second. We don't want the ragged left on the second. + \let\oldpage = \page + \def\page{% \iffinishedtitlepage\else - \finishtitlepage + \finishtitlepage \fi - \oldpage \let\page = \oldpage - \hbox{}}% -% \def\page{\oldpage \hbox{}} + \page + \null + }% } \def\Etitlepage{% - \iffinishedtitlepage\else - \finishtitlepage - \fi - % It is important to do the page break before ending the group, - % because the headline and footline are only empty inside the group. - % If we use the new definition of \page, we always get a blank page - % after the title page, which we certainly don't want. - \oldpage - \endgroup - % - % Need this before the \...aftertitlepage checks so that if they are - % in effect the toc pages will come out with page numbers. - \HEADINGSon - % - % If they want short, they certainly want long too. - \ifsetshortcontentsaftertitlepage - \shortcontents - \contents - \global\let\shortcontents = \relax - \global\let\contents = \relax - \fi - % - \ifsetcontentsaftertitlepage - \contents - \global\let\contents = \relax - \global\let\shortcontents = \relax - \fi + \iffinishedtitlepage\else + \finishtitlepage + \fi + % It is important to do the page break before ending the group, + % because the headline and footline are only empty inside the group. + % If we use the new definition of \page, we always get a blank page + % after the title page, which we certainly don't want. + \oldpage + \endgroup + % + % Need this before the \...aftertitlepage checks so that if they are + % in effect the toc pages will come out with page numbers. + \HEADINGSon + % + % If they want short, they certainly want long too. + \ifsetshortcontentsaftertitlepage + \shortcontents + \contents + \global\let\shortcontents = \relax + \global\let\contents = \relax + \fi + % + \ifsetcontentsaftertitlepage + \contents + \global\let\contents = \relax + \global\let\shortcontents = \relax + \fi } \def\finishtitlepage{% - \vskip4pt \hrule height 2pt width \hsize - \vskip\titlepagebottomglue - \finishedtitlepagetrue + \vskip4pt \hrule height 2pt width \hsize + \vskip\titlepagebottomglue + \finishedtitlepagetrue +} + +%%% Macros to be used within @titlepage: + +\let\subtitlerm=\tenrm +\def\subtitlefont{\subtitlerm \normalbaselineskip = 13pt \normalbaselines} + +\def\authorfont{\authorrm \normalbaselineskip = 16pt \normalbaselines + \let\tt=\authortt} + +\parseargdef\title{% + \checkenv\titlepage + \leftline{\titlefonts\rm #1} + % print a rule at the page bottom also. + \finishedtitlepagefalse + \vskip4pt \hrule height 4pt width \hsize \vskip4pt } +\parseargdef\subtitle{% + \checkenv\titlepage + {\subtitlefont \rightline{#1}}% +} + +% @author should come last, but may come many times. +% It can also be used inside @quotation. +% +\parseargdef\author{% + \def\temp{\quotation}% + \ifx\thisenv\temp + \def\quotationauthor{#1}% printed in \Equotation. + \else + \checkenv\titlepage + \ifseenauthor\else \vskip 0pt plus 1filll \seenauthortrue \fi + {\authorfont \leftline{#1}}% + \fi +} + + %%% Set up page headings and footings. \let\thispage=\folio @@ -1767,7 +2059,7 @@ where each line of input produces a line \newtoks\evenfootline % footline on even pages \newtoks\oddfootline % footline on odd pages -% Now make Tex use those variables +% Now make TeX use those variables \headline={{\textfonts\rm \ifodd\pageno \the\oddheadline \else \the\evenheadline \fi}} \footline={{\textfonts\rm \ifodd\pageno \the\oddfootline @@ -1781,32 +2073,27 @@ where each line of input produces a line % @evenfooting @thisfile|| % @oddfooting ||@thisfile -\def\evenheading{\parsearg\evenheadingxxx} -\def\oddheading{\parsearg\oddheadingxxx} -\def\everyheading{\parsearg\everyheadingxxx} - -\def\evenfooting{\parsearg\evenfootingxxx} -\def\oddfooting{\parsearg\oddfootingxxx} -\def\everyfooting{\parsearg\everyfootingxxx} - -{\catcode`\@=0 % -\gdef\evenheadingxxx #1{\evenheadingyyy #1@|@|@|@|\finish} -\gdef\evenheadingyyy #1@|#2@|#3@|#4\finish{% +\def\evenheading{\parsearg\evenheadingxxx} +\def\evenheadingxxx #1{\evenheadingyyy #1\|\|\|\|\finish} +\def\evenheadingyyy #1\|#2\|#3\|#4\finish{% \global\evenheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} -\gdef\oddheadingxxx #1{\oddheadingyyy #1@|@|@|@|\finish} -\gdef\oddheadingyyy #1@|#2@|#3@|#4\finish{% +\def\oddheading{\parsearg\oddheadingxxx} +\def\oddheadingxxx #1{\oddheadingyyy #1\|\|\|\|\finish} +\def\oddheadingyyy #1\|#2\|#3\|#4\finish{% \global\oddheadline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} -\gdef\everyheadingxxx#1{\oddheadingxxx{#1}\evenheadingxxx{#1}}% +\parseargdef\everyheading{\oddheadingxxx{#1}\evenheadingxxx{#1}}% -\gdef\evenfootingxxx #1{\evenfootingyyy #1@|@|@|@|\finish} -\gdef\evenfootingyyy #1@|#2@|#3@|#4\finish{% +\def\evenfooting{\parsearg\evenfootingxxx} +\def\evenfootingxxx #1{\evenfootingyyy #1\|\|\|\|\finish} +\def\evenfootingyyy #1\|#2\|#3\|#4\finish{% \global\evenfootline={\rlap{\centerline{#2}}\line{#1\hfil#3}}} -\gdef\oddfootingxxx #1{\oddfootingyyy #1@|@|@|@|\finish} -\gdef\oddfootingyyy #1@|#2@|#3@|#4\finish{% +\def\oddfooting{\parsearg\oddfootingxxx} +\def\oddfootingxxx #1{\oddfootingyyy #1\|\|\|\|\finish} +\def\oddfootingyyy #1\|#2\|#3\|#4\finish{% \global\oddfootline = {\rlap{\centerline{#2}}\line{#1\hfil#3}}% % % Leave some space for the footline. Hopefully ok to assume @@ -1815,9 +2102,8 @@ where each line of input produces a line \global\advance\vsize by -\baselineskip } -\gdef\everyfootingxxx#1{\oddfootingxxx{#1}\evenfootingxxx{#1}} -% -}% unbind the catcode of @. +\parseargdef\everyfooting{\oddfootingxxx{#1}\evenfootingxxx{#1}} + % @headings double turns headings on for double-sided printing. % @headings single turns headings on for single-sided printing. @@ -1831,7 +2117,7 @@ where each line of input produces a line \def\headings #1 {\csname HEADINGS#1\endcsname} -\def\HEADINGSoff{ +\def\HEADINGSoff{% \global\evenheadline={\hfil} \global\evenfootline={\hfil} \global\oddheadline={\hfil} \global\oddfootline={\hfil}} \HEADINGSoff @@ -1840,7 +2126,7 @@ where each line of input produces a line % chapter name on inside top of right hand pages, document % title on inside top of left hand pages, and page numbers on outside top % edge of all pages. -\def\HEADINGSdouble{ +\def\HEADINGSdouble{% \global\pageno=1 \global\evenfootline={\hfil} \global\oddfootline={\hfil} @@ -1852,7 +2138,7 @@ where each line of input produces a line % For single-sided printing, chapter title goes across top left of page, % page number on top right. -\def\HEADINGSsingle{ +\def\HEADINGSsingle{% \global\pageno=1 \global\evenfootline={\hfil} \global\oddfootline={\hfil} @@ -1899,12 +2185,11 @@ where each line of input produces a line % @settitle line... specifies the title of the document, for headings. % It generates no output of its own. \def\thistitle{\putwordNoTitle} -\def\settitle{\parsearg\settitlezzz} -\def\settitlezzz #1{\gdef\thistitle{#1}} +\def\settitle{\parsearg{\gdef\thistitle}} \message{tables,} -% Tables -- @table, @ftable, @vtable, @item(x), @kitem(x), @xitem(x). +% Tables -- @table, @ftable, @vtable, @item(x). % default indentation of table text \newdimen\tableindent \tableindent=.8in @@ -1916,7 +2201,7 @@ where each line of input produces a line % used internally for \itemindent minus \itemmargin \newdimen\itemmax -% Note @table, @vtable, and @vtable define @item, @itemx, etc., with +% Note @table, @ftable, and @vtable define @item, @itemx, etc., with % these defs. % They also define \itemindex % to index the item name in whatever manner is desired (perhaps none). @@ -1928,22 +2213,10 @@ where each line of input produces a line \def\internalBitem{\smallbreak \parsearg\itemzzz} \def\internalBitemx{\itemxpar \parsearg\itemzzz} -\def\internalBxitem "#1"{\def\xitemsubtopix{#1} \smallbreak \parsearg\xitemzzz} -\def\internalBxitemx "#1"{\def\xitemsubtopix{#1} \itemxpar \parsearg\xitemzzz} - -\def\internalBkitem{\smallbreak \parsearg\kitemzzz} -\def\internalBkitemx{\itemxpar \parsearg\kitemzzz} - -\def\kitemzzz #1{\dosubind {kw}{\code{#1}}{for {\bf \lastfunction}}% - \itemzzz {#1}} - -\def\xitemzzz #1{\dosubind {kw}{\code{#1}}{for {\bf \xitemsubtopic}}% - \itemzzz {#1}} - \def\itemzzz #1{\begingroup % \advance\hsize by -\rightskip \advance\hsize by -\tableindent - \setbox0=\hbox{\itemfont{#1}}% + \setbox0=\hbox{\itemindicate{#1}}% \itemindex{#1}% \nobreak % This prevents a break before @itemx. % @@ -1997,92 +2270,95 @@ where each line of input produces a line \fi } -\def\item{\errmessage{@item while not in a table}} -\def\itemx{\errmessage{@itemx while not in a table}} -\def\kitem{\errmessage{@kitem while not in a table}} -\def\kitemx{\errmessage{@kitemx while not in a table}} -\def\xitem{\errmessage{@xitem while not in a table}} -\def\xitemx{\errmessage{@xitemx while not in a table}} - -% Contains a kludge to get @end[description] to work. -\def\description{\tablez{\dontindex}{1}{}{}{}{}} +\def\item{\errmessage{@item while not in a list environment}} +\def\itemx{\errmessage{@itemx while not in a list environment}} % @table, @ftable, @vtable. -\def\table{\begingroup\inENV\obeylines\obeyspaces\tablex} -{\obeylines\obeyspaces% -\gdef\tablex #1^^M{% -\tabley\dontindex#1 \endtabley}} - -\def\ftable{\begingroup\inENV\obeylines\obeyspaces\ftablex} -{\obeylines\obeyspaces% -\gdef\ftablex #1^^M{% -\tabley\fnitemindex#1 \endtabley -\def\Eftable{\endgraf\afterenvbreak\endgroup}% -\let\Etable=\relax}} - -\def\vtable{\begingroup\inENV\obeylines\obeyspaces\vtablex} -{\obeylines\obeyspaces% -\gdef\vtablex #1^^M{% -\tabley\vritemindex#1 \endtabley -\def\Evtable{\endgraf\afterenvbreak\endgroup}% -\let\Etable=\relax}} - -\def\dontindex #1{} -\def\fnitemindex #1{\doind {fn}{\code{#1}}}% -\def\vritemindex #1{\doind {vr}{\code{#1}}}% - -{\obeyspaces % -\gdef\tabley#1#2 #3 #4 #5 #6 #7\endtabley{\endgroup% -\tablez{#1}{#2}{#3}{#4}{#5}{#6}}} - -\def\tablez #1#2#3#4#5#6{% -\aboveenvbreak % -\begingroup % -\def\Edescription{\Etable}% Necessary kludge. -\let\itemindex=#1% -\ifnum 0#3>0 \advance \leftskip by #3\mil \fi % -\ifnum 0#4>0 \tableindent=#4\mil \fi % -\ifnum 0#5>0 \advance \rightskip by #5\mil \fi % -\def\itemfont{#2}% -\itemmax=\tableindent % -\advance \itemmax by -\itemmargin % -\advance \leftskip by \tableindent % -\exdentamount=\tableindent -\parindent = 0pt -\parskip = \smallskipamount -\ifdim \parskip=0pt \parskip=2pt \fi% -\def\Etable{\endgraf\afterenvbreak\endgroup}% -\let\item = \internalBitem % -\let\itemx = \internalBitemx % -\let\kitem = \internalBkitem % -\let\kitemx = \internalBkitemx % -\let\xitem = \internalBxitem % -\let\xitemx = \internalBxitemx % +\envdef\table{% + \let\itemindex\gobble + \tablex +} +\envdef\ftable{% + \def\itemindex ##1{\doind {fn}{\code{##1}}}% + \tablex +} +\envdef\vtable{% + \def\itemindex ##1{\doind {vr}{\code{##1}}}% + \tablex +} +\def\tablex#1{% + \def\itemindicate{#1}% + \parsearg\tabley +} +\def\tabley#1{% + {% + \makevalueexpandable + \edef\temp{\noexpand\tablez #1\space\space\space}% + \expandafter + }\temp \endtablez } +\def\tablez #1 #2 #3 #4\endtablez{% + \aboveenvbreak + \ifnum 0#1>0 \advance \leftskip by #1\mil \fi + \ifnum 0#2>0 \tableindent=#2\mil \fi + \ifnum 0#3>0 \advance \rightskip by #3\mil \fi + \itemmax=\tableindent + \advance \itemmax by -\itemmargin + \advance \leftskip by \tableindent + \exdentamount=\tableindent + \parindent = 0pt + \parskip = \smallskipamount + \ifdim \parskip=0pt \parskip=2pt \fi + \let\item = \internalBitem + \let\itemx = \internalBitemx +} +\def\Etable{\endgraf\afterenvbreak} +\let\Eftable\Etable +\let\Evtable\Etable +\let\Eitemize\Etable +\let\Eenumerate\Etable % This is the counter used by @enumerate, which is really @itemize \newcount \itemno -\def\itemize{\parsearg\itemizezzz} +\envdef\itemize{\parsearg\doitemize} + +\def\doitemize#1{% + \aboveenvbreak + \itemmax=\itemindent + \advance\itemmax by -\itemmargin + \advance\leftskip by \itemindent + \exdentamount=\itemindent + \parindent=0pt + \parskip=\smallskipamount + \ifdim\parskip=0pt \parskip=2pt \fi + \def\itemcontents{#1}% + % @itemize with no arg is equivalent to @itemize @bullet. + \ifx\itemcontents\empty\def\itemcontents{\bullet}\fi + \let\item=\itemizeitem +} -\def\itemizezzz #1{% - \begingroup % ended by the @end itemize - \itemizey {#1}{\Eitemize} -} - -\def\itemizey #1#2{% -\aboveenvbreak % -\itemmax=\itemindent % -\advance \itemmax by -\itemmargin % -\advance \leftskip by \itemindent % -\exdentamount=\itemindent -\parindent = 0pt % -\parskip = \smallskipamount % -\ifdim \parskip=0pt \parskip=2pt \fi% -\def#2{\endgraf\afterenvbreak\endgroup}% -\def\itemcontents{#1}% -\let\item=\itemizeitem} +% Definition of @item while inside @itemize and @enumerate. +% +\def\itemizeitem{% + \advance\itemno by 1 % for enumerations + {\let\par=\endgraf \smallbreak}% reasonable place to break + {% + % If the document has an @itemize directly after a section title, a + % \nobreak will be last on the list, and \sectionheading will have + % done a \vskip-\parskip. In that case, we don't want to zero + % parskip, or the item text will crash with the heading. On the + % other hand, when there is normal text preceding the item (as there + % usually is), we do want to zero parskip, or there would be too much + % space. In that case, we won't have a \nobreak before. At least + % that's the theory. + \ifnum\lastpenalty<10000 \parskip=0in \fi + \noindent + \hbox to 0pt{\hss \itemcontents \kern\itemmargin}% + \vadjust{\penalty 1200}}% not good to break after first line of item. + \flushcr +} % \splitoff TOKENS\endmark defines \first to be the first token in % TOKENS, and \rest to be the remainder. @@ -2093,11 +2369,8 @@ where each line of input produces a line % or number, to specify the first label in the enumerated list. No % argument is the same as `1'. % -\def\enumerate{\parsearg\enumeratezzz} -\def\enumeratezzz #1{\enumeratey #1 \endenumeratey} +\envparseargdef\enumerate{\enumeratey #1 \endenumeratey} \def\enumeratey #1 #2\endenumeratey{% - \begingroup % ended by the @end enumerate - % % If we were given no argument, pretend we were given `1'. \def\thearg{#1}% \ifx\thearg\empty \def\thearg{1}\fi @@ -2168,13 +2441,13 @@ where each line of input produces a line }% } -% Call itemizey, adding a period to the first argument and supplying the +% Call \doitemize, adding a period to the first argument and supplying the % common last two arguments. Also subtract one from the initial value in % \itemno, since @item increments \itemno. % \def\startenumeration#1{% \advance\itemno by -1 - \itemizey{#1.}\Eenumerate\flushcr + \doitemize{#1.}\flushcr } % @alphaenumerate and @capsenumerate are abbreviations for giving an arg @@ -2185,16 +2458,6 @@ where each line of input produces a line \def\Ealphaenumerate{\Eenumerate} \def\Ecapsenumerate{\Eenumerate} -% Definition of @item while inside @itemize. - -\def\itemizeitem{% -\advance\itemno by 1 -{\let\par=\endgraf \smallbreak}% -\ifhmode \errmessage{In hmode at itemizeitem}\fi -{\parskip=0in \hskip 0pt -\hbox to 0pt{\hss \itemcontents\hskip \itemmargin}% -\vadjust{\penalty 1200}}% -\flushcr} % @multitable macros % Amy Hendrickson, 8/18/94, 3/6/96 @@ -2221,24 +2484,14 @@ where each line of input produces a line % @multitable {Column 1 template} {Column 2 template} {Column 3 template} % @item ... % using the widest term desired in each column. -% -% For those who want to use more than one line's worth of words in -% the preamble, break the line within one argument and it -% will parse correctly, i.e., -% -% @multitable {Column 1 template} {Column 2 template} {Column 3 -% template} -% Not: -% @multitable {Column 1 template} {Column 2 template} -% {Column 3 template} % Each new table line starts with @item, each subsequent new column % starts with @tab. Empty columns may be produced by supplying @tab's % with nothing between them for as many times as empty columns are needed, % ie, @tab@tab@tab will produce two empty columns. -% @item, @tab, @multitable or @end multitable do not need to be on their -% own lines, but it will not hurt if they are. +% @item, @tab do not need to be on their own lines, but it will not hurt +% if they are. % Sample multitable: @@ -2282,13 +2535,12 @@ where each line of input produces a line \def\xcolumnfractions{\columnfractions} \newif\ifsetpercent -% #1 is the part of the @columnfraction before the decimal point, which -% is presumably either 0 or the empty string (but we don't check, we -% just throw it away). #2 is the decimal part, which we use as the -% percent of \hsize for this column. -\def\pickupwholefraction#1.#2 {% +% #1 is the @columnfraction, usually a decimal number like .5, but might +% be just 1. We just use it, whatever it is. +% +\def\pickupwholefraction#1 {% \global\advance\colcount by 1 - \expandafter\xdef\csname col\the\colcount\endcsname{.#2\hsize}% + \expandafter\xdef\csname col\the\colcount\endcsname{#1\hsize}% \setuptable } @@ -2321,18 +2573,30 @@ where each line of input produces a line \go } +% multitable-only commands. +% +% @headitem starts a heading row, which we typeset in bold. +% Assignments have to be global since we are inside the implicit group +% of an alignment entry. Note that \everycr resets \everytab. +\def\headitem{\checkenv\multitable \crcr \global\everytab={\bf}\the\everytab}% +% +% A \tab used to include \hskip1sp. But then the space in a template +% line is not enough. That is bad. So let's go back to just `&' until +% we encounter the problem it was intended to solve again. +% --karl, nathan@acm.org, 20apr99. +\def\tab{\checkenv\multitable &\the\everytab}% + % @multitable ... @end multitable definitions: % -\def\multitable{\parsearg\dotable} -\def\dotable#1{\bgroup +\newtoks\everytab % insert after every tab. +% +\envdef\multitable{% \vskip\parskip - \let\item=\crcrwithfootnotes - % A \tab used to include \hskip1sp. But then the space in a template - % line is not enough. That is bad. So let's go back to just & until - % we encounter the problem it was intended to solve again. --karl, - % nathan@acm.org, 20apr99. - \let\tab=&% - \let\startfootins=\startsavedfootnote + \startsavinginserts + % + % @item within a multitable starts a normal row. + \let\item\crcr + % \tolerance=9500 \hbadness=9500 \setmultitablespacing @@ -2340,70 +2604,80 @@ where each line of input produces a line \parindent=\multitableparindent \overfullrule=0pt \global\colcount=0 - \def\Emultitable{% - \global\setpercentfalse - \crcrwithfootnotes\crcr - \egroup\egroup + % + \everycr = {% + \noalign{% + \global\everytab={}% + \global\colcount=0 % Reset the column counter. + % Check for saved footnotes, etc. + \checkinserts + % Keeps underfull box messages off when table breaks over pages. + %\filbreak + % Maybe so, but it also creates really weird page breaks when the + % table breaks over pages. Wouldn't \vfil be better? Wait until the + % problem manifests itself, so it can be fixed for real --karl. + }% }% % + \parsearg\domultitable +} +\def\domultitable#1{% % To parse everything between @multitable and @item: \setuptable#1 \endsetuptable % - % \everycr will reset column counter, \colcount, at the end of - % each line. Every column entry will cause \colcount to advance by one. - % The table preamble - % looks at the current \colcount to find the correct column width. - \everycr{\noalign{% - % - % \filbreak%% keeps underfull box messages off when table breaks over pages. - % Maybe so, but it also creates really weird page breaks when the table - % breaks over pages. Wouldn't \vfil be better? Wait until the problem - % manifests itself, so it can be fixed for real --karl. - \global\colcount=0\relax}}% - % % This preamble sets up a generic column definition, which will % be used as many times as user calls for columns. % \vtop will set a single line and will also let text wrap and % continue for many paragraphs if desired. - \halign\bgroup&\global\advance\colcount by 1\relax - \multistrut\vtop{\hsize=\expandafter\csname col\the\colcount\endcsname - % - % In order to keep entries from bumping into each other - % we will add a \leftskip of \multitablecolspace to all columns after - % the first one. - % - % If a template has been used, we will add \multitablecolspace - % to the width of each template entry. - % - % If the user has set preamble in terms of percent of \hsize we will - % use that dimension as the width of the column, and the \leftskip - % will keep entries from bumping into each other. Table will start at - % left margin and final column will justify at right margin. - % - % Make sure we don't inherit \rightskip from the outer environment. - \rightskip=0pt - \ifnum\colcount=1 - % The first column will be indented with the surrounding text. - \advance\hsize by\leftskip - \else - \ifsetpercent \else - % If user has not set preamble in terms of percent of \hsize - % we will advance \hsize by \multitablecolspace. - \advance\hsize by \multitablecolspace - \fi - % In either case we will make \leftskip=\multitablecolspace: - \leftskip=\multitablecolspace - \fi - % Ignoring space at the beginning and end avoids an occasional spurious - % blank line, when TeX decides to break the line at the space before the - % box from the multistrut, so the strut ends up on a line by itself. - % For example: - % @multitable @columnfractions .11 .89 - % @item @code{#} - % @tab Legal holiday which is valid in major parts of the whole country. - % Is automatically provided with highlighting sequences respectively marking - % characters. - \noindent\ignorespaces##\unskip\multistrut}\cr + \halign\bgroup &% + \global\advance\colcount by 1 + \multistrut + \vtop{% + % Use the current \colcount to find the correct column width: + \hsize=\expandafter\csname col\the\colcount\endcsname + % + % In order to keep entries from bumping into each other + % we will add a \leftskip of \multitablecolspace to all columns after + % the first one. + % + % If a template has been used, we will add \multitablecolspace + % to the width of each template entry. + % + % If the user has set preamble in terms of percent of \hsize we will + % use that dimension as the width of the column, and the \leftskip + % will keep entries from bumping into each other. Table will start at + % left margin and final column will justify at right margin. + % + % Make sure we don't inherit \rightskip from the outer environment. + \rightskip=0pt + \ifnum\colcount=1 + % The first column will be indented with the surrounding text. + \advance\hsize by\leftskip + \else + \ifsetpercent \else + % If user has not set preamble in terms of percent of \hsize + % we will advance \hsize by \multitablecolspace. + \advance\hsize by \multitablecolspace + \fi + % In either case we will make \leftskip=\multitablecolspace: + \leftskip=\multitablecolspace + \fi + % Ignoring space at the beginning and end avoids an occasional spurious + % blank line, when TeX decides to break the line at the space before the + % box from the multistrut, so the strut ends up on a line by itself. + % For example: + % @multitable @columnfractions .11 .89 + % @item @code{#} + % @tab Legal holiday which is valid in major parts of the whole country. + % Is automatically provided with highlighting sequences respectively + % marking characters. + \noindent\ignorespaces##\unskip\multistrut + }\cr +} +\def\Emultitable{% + \crcr + \egroup % end the \halign + \global\setpercentfalse } \def\setmultitablespacing{% test to see if user has set \multitablelinespace. @@ -2433,163 +2707,33 @@ width0pt\relax} \fi %% than skip between lines in the table. \fi} -% In case a @footnote appears inside an alignment, save the footnote -% text to a box and make the \insert when a row of the table is -% finished. Otherwise, the insertion is lost, it never migrates to the -% main vertical list. --kasal, 22jan03. -% -\newbox\savedfootnotes -% -% \dotable \let's \startfootins to this, so that \dofootnote will call -% it instead of starting the insertion right away. -\def\startsavedfootnote{% - \global\setbox\savedfootnotes = \vbox\bgroup - \unvbox\savedfootnotes -} -\def\crcrwithfootnotes{% - \crcr - \ifvoid\savedfootnotes \else - \noalign{\insert\footins{\box\savedfootnotes}}% - \fi -} \message{conditionals,} -% Prevent errors for section commands. -% Used in @ignore and in failing conditionals. -\def\ignoresections{% - \let\chapter=\relax - \let\unnumbered=\relax - \let\top=\relax - \let\unnumberedsec=\relax - \let\unnumberedsection=\relax - \let\unnumberedsubsec=\relax - \let\unnumberedsubsection=\relax - \let\unnumberedsubsubsec=\relax - \let\unnumberedsubsubsection=\relax - \let\section=\relax - \let\subsec=\relax - \let\subsubsec=\relax - \let\subsection=\relax - \let\subsubsection=\relax - \let\appendix=\relax - \let\appendixsec=\relax - \let\appendixsection=\relax - \let\appendixsubsec=\relax - \let\appendixsubsection=\relax - \let\appendixsubsubsec=\relax - \let\appendixsubsubsection=\relax - \let\contents=\relax - \let\smallbook=\relax - \let\titlepage=\relax -} - -% Used in nested conditionals, where we have to parse the Texinfo source -% and so want to turn off most commands, in case they are used -% incorrectly. -% -% We use \empty instead of \relax for the @def... commands, so that \end -% doesn't throw an error. For instance: -% @ignore -% @deffn ... -% @end deffn -% @end ignore -% -% The @end deffn is going to get expanded, because we're trying to allow -% nested conditionals. But we don't want to expand the actual @deffn, -% since it might be syntactically correct and intended to be ignored. -% Since \end checks for \relax, using \empty does not cause an error. -% -\def\ignoremorecommands{% - \let\defcodeindex = \relax - \let\defcv = \empty - \let\defcvx = \empty - \let\Edefcv = \empty - \let\deffn = \empty - \let\deffnx = \empty - \let\Edeffn = \empty - \let\defindex = \relax - \let\defivar = \empty - \let\defivarx = \empty - \let\Edefivar = \empty - \let\defmac = \empty - \let\defmacx = \empty - \let\Edefmac = \empty - \let\defmethod = \empty - \let\defmethodx = \empty - \let\Edefmethod = \empty - \let\defop = \empty - \let\defopx = \empty - \let\Edefop = \empty - \let\defopt = \empty - \let\defoptx = \empty - \let\Edefopt = \empty - \let\defspec = \empty - \let\defspecx = \empty - \let\Edefspec = \empty - \let\deftp = \empty - \let\deftpx = \empty - \let\Edeftp = \empty - \let\deftypefn = \empty - \let\deftypefnx = \empty - \let\Edeftypefn = \empty - \let\deftypefun = \empty - \let\deftypefunx = \empty - \let\Edeftypefun = \empty - \let\deftypeivar = \empty - \let\deftypeivarx = \empty - \let\Edeftypeivar = \empty - \let\deftypemethod = \empty - \let\deftypemethodx = \empty - \let\Edeftypemethod = \empty - \let\deftypeop = \empty - \let\deftypeopx = \empty - \let\Edeftypeop = \empty - \let\deftypevar = \empty - \let\deftypevarx = \empty - \let\Edeftypevar = \empty - \let\deftypevr = \empty - \let\deftypevrx = \empty - \let\Edeftypevr = \empty - \let\defun = \empty - \let\defunx = \empty - \let\Edefun = \empty - \let\defvar = \empty - \let\defvarx = \empty - \let\Edefvar = \empty - \let\defvr = \empty - \let\defvrx = \empty - \let\Edefvr = \empty - \let\clear = \relax - \let\down = \relax - \let\evenfooting = \relax - \let\evenheading = \relax - \let\everyfooting = \relax - \let\everyheading = \relax - \let\headings = \relax - \let\include = \relax - \let\item = \relax - \let\lowersections = \relax - \let\oddfooting = \relax - \let\oddheading = \relax - \let\printindex = \relax - \let\pxref = \relax - \let\raisesections = \relax - \let\ref = \relax - \let\set = \relax - \let\setchapternewpage = \relax - \let\setchapterstyle = \relax - \let\settitle = \relax - \let\up = \relax - \let\verbatiminclude = \relax - \let\xref = \relax -} + +% @iftex, @ifnotdocbook, @ifnothtml, @ifnotinfo, @ifnotplaintext, +% @ifnotxml always succeed. They currently do nothing; we don't +% attempt to check whether the conditionals are properly nested. But we +% have to remember that they are conditionals, so that @end doesn't +% attempt to close an environment group. +% +\def\makecond#1{% + \expandafter\let\csname #1\endcsname = \relax + \expandafter\let\csname iscond.#1\endcsname = 1 +} +\makecond{iftex} +\makecond{ifnotdocbook} +\makecond{ifnothtml} +\makecond{ifnotinfo} +\makecond{ifnotplaintext} +\makecond{ifnotxml} % Ignore @ignore, @ifhtml, @ifinfo, and the like. % \def\direntry{\doignore{direntry}} -\def\documentdescriptionword{documentdescription} \def\documentdescription{\doignore{documentdescription}} +\def\docbook{\doignore{docbook}} \def\html{\doignore{html}} +\def\ifdocbook{\doignore{ifdocbook}} \def\ifhtml{\doignore{ifhtml}} \def\ifinfo{\doignore{ifinfo}} \def\ifnottex{\doignore{ifnottex}} @@ -2599,198 +2743,133 @@ width0pt\relax} \fi \def\menu{\doignore{menu}} \def\xml{\doignore{xml}} -% @dircategory CATEGORY -- specify a category of the dir file -% which this file should belong to. Ignore this in TeX. -\let\dircategory = \comment - -% Ignore text until a line `@end #1'. +% Ignore text until a line `@end #1', keeping track of nested conditionals. % +% A count to remember the depth of nesting. +\newcount\doignorecount + \def\doignore#1{\begingroup - % Don't complain about control sequences we have declared \outer. - \ignoresections - % - % Define a command to swallow text until we reach `@end #1'. - % This @ is a catcode 12 token (that is the normal catcode of @ in - % this texinfo.tex file). We change the catcode of @ below to match. - \long\def\doignoretext##1@end #1{\enddoignore}% + % Scan in ``verbatim'' mode: + \catcode`\@ = \other + \catcode`\{ = \other + \catcode`\} = \other % % Make sure that spaces turn into tokens that match what \doignoretext wants. - \catcode\spaceChar = 10 + \spaceisspace % - % Ignore braces, too, so mismatched braces don't cause trouble. - \catcode`\{ = 9 - \catcode`\} = 9 - % - % We must not have @c interpreted as a control sequence. - \catcode`\@ = 12 - % - \def\ignoreword{#1}% - \ifx\ignoreword\documentdescriptionword - % The c kludge breaks documentdescription, since - % `documentdescription' contains a `c'. Means not everything will - % be ignored inside @documentdescription, but oh well... - \else - % Make the letter c a comment character so that the rest of the line - % will be ignored. This way, the document can have (for example) - % @c @end ifinfo - % and the @end ifinfo will be properly ignored. - % (We've just changed @ to catcode 12.) - \catcode`\c = 14 - \fi - % - % And now expand the command defined above. - \doignoretext -} - -% What we do to finish off ignored text. -% -\def\enddoignore{\endgroup\ignorespaces}% - -\newif\ifwarnedobs\warnedobsfalse -\def\obstexwarn{% - \ifwarnedobs\relax\else - % We need to warn folks that they may have trouble with TeX 3.0. - % This uses \immediate\write16 rather than \message to get newlines. - \immediate\write16{} - \immediate\write16{WARNING: for users of Unix TeX 3.0!} - \immediate\write16{This manual trips a bug in TeX version 3.0 (tex hangs).} - \immediate\write16{If you are running another version of TeX, relax.} - \immediate\write16{If you are running Unix TeX 3.0, kill this TeX process.} - \immediate\write16{ Then upgrade your TeX installation if you can.} - \immediate\write16{ (See ftp://ftp.gnu.org/non-gnu/TeX.README.)} - \immediate\write16{If you are stuck with version 3.0, run the} - \immediate\write16{ script ``tex3patch'' from the Texinfo distribution} - \immediate\write16{ to use a workaround.} - \immediate\write16{} - \global\warnedobstrue - \fi -} - -% **In TeX 3.0, setting text in \nullfont hangs tex. For a -% workaround (which requires the file ``dummy.tfm'' to be installed), -% uncomment the following line: -%%%%%\font\nullfont=dummy\let\obstexwarn=\relax - -% Ignore text, except that we keep track of conditional commands for -% purposes of nesting, up to an `@end #1' command. -% -\def\nestedignore#1{% - \obstexwarn - % We must actually expand the ignored text to look for the @end - % command, so that nested ignore constructs work. Thus, we put the - % text into a \vbox and then do nothing with the result. To minimize - % the chance of memory overflow, we follow the approach outlined on - % page 401 of the TeXbook. - % - \setbox0 = \vbox\bgroup - % Don't complain about control sequences we have declared \outer. - \ignoresections - % - % Define `@end #1' to end the box, which will in turn undefine the - % @end command again. - \expandafter\def\csname E#1\endcsname{\egroup\ignorespaces}% - % - % We are going to be parsing Texinfo commands. Most cause no - % trouble when they are used incorrectly, but some commands do - % complicated argument parsing or otherwise get confused, so we - % undefine them. - % - % We can't do anything about stray @-signs, unfortunately; - % they'll produce `undefined control sequence' errors. - \ignoremorecommands - % - % Set the current font to be \nullfont, a TeX primitive, and define - % all the font commands to also use \nullfont. We don't use - % dummy.tfm, as suggested in the TeXbook, because some sites - % might not have that installed. Therefore, math mode will still - % produce output, but that should be an extremely small amount of - % stuff compared to the main input. - % - \nullfont - \let\tenrm=\nullfont \let\tenit=\nullfont \let\tensl=\nullfont - \let\tenbf=\nullfont \let\tentt=\nullfont \let\smallcaps=\nullfont - \let\tensf=\nullfont - % Similarly for index fonts. - \let\smallrm=\nullfont \let\smallit=\nullfont \let\smallsl=\nullfont - \let\smallbf=\nullfont \let\smalltt=\nullfont \let\smallsc=\nullfont - \let\smallsf=\nullfont - % Similarly for smallexample fonts. - \let\smallerrm=\nullfont \let\smallerit=\nullfont \let\smallersl=\nullfont - \let\smallerbf=\nullfont \let\smallertt=\nullfont \let\smallersc=\nullfont - \let\smallersf=\nullfont - % - % Don't complain when characters are missing from the fonts. - \tracinglostchars = 0 - % - % Don't bother to do space factor calculations. - \frenchspacing - % - % Don't report underfull hboxes. - \hbadness = 10000 + % Count number of #1's that we've seen. + \doignorecount = 0 + % + % Swallow text until we reach the matching `@end #1'. + \dodoignore {#1}% +} + +{ \catcode`_=11 % We want to use \_STOP_ which cannot appear in texinfo source. + \obeylines % + % + \gdef\dodoignore#1{% + % #1 contains the string `ifinfo'. % - % Do minimal line-breaking. - \pretolerance = 10000 + % Define a command to find the next `@end #1', which must be on a line + % by itself. + \long\def\doignoretext##1^^M@end #1{\doignoretextyyy##1^^M@#1\_STOP_}% + % And this command to find another #1 command, at the beginning of a + % line. (Otherwise, we would consider a line `@c @ifset', for + % example, to count as an @ifset for nesting.) + \long\def\doignoretextyyy##1^^M@#1##2\_STOP_{\doignoreyyy{##2}\_STOP_}% % - % Do not execute instructions in @tex. - \def\tex{\doignore{tex}}% - % Do not execute macro definitions. - % `c' is a comment character, so the word `macro' will get cut off. - \def\macro{\doignore{ma}}% + % And now expand that command. + \obeylines % + \doignoretext ^^M% + }% +} + +\def\doignoreyyy#1{% + \def\temp{#1}% + \ifx\temp\empty % Nothing found. + \let\next\doignoretextzzz + \else % Found a nested condition, ... + \advance\doignorecount by 1 + \let\next\doignoretextyyy % ..., look for another. + % If we're here, #1 ends with ^^M\ifinfo (for example). + \fi + \next #1% the token \_STOP_ is present just after this macro. +} + +% We have to swallow the remaining "\_STOP_". +% +\def\doignoretextzzz#1{% + \ifnum\doignorecount = 0 % We have just found the outermost @end. + \let\next\enddoignore + \else % Still inside a nested condition. + \advance\doignorecount by -1 + \let\next\doignoretext % Look for the next @end. + \fi + \next } +% Finish off ignored text. +\def\enddoignore{\endgroup\ignorespaces} + + % @set VAR sets the variable VAR to an empty value. % @set VAR REST-OF-LINE sets VAR to the value REST-OF-LINE. % % Since we want to separate VAR from REST-OF-LINE (which might be % empty), we can't just use \parsearg; we have to insert a space of our % own to delimit the rest of the line, and then take it out again if we -% didn't need it. Make sure the catcode of space is correct to avoid -% losing inside @example, for instance. +% didn't need it. +% We rely on the fact that \parsearg sets \catcode`\ =10. % -\def\set{\begingroup\catcode` =10 - \catcode`\-=12 \catcode`\_=12 % Allow - and _ in VAR. - \parsearg\setxxx} -\def\setxxx#1{\setyyy#1 \endsetyyy} +\parseargdef\set{\setyyy#1 \endsetyyy} \def\setyyy#1 #2\endsetyyy{% - \def\temp{#2}% - \ifx\temp\empty \global\expandafter\let\csname SET#1\endcsname = \empty - \else \setzzz{#1}#2\endsetzzz % Remove the trailing space \setxxx inserted. - \fi - \endgroup + {% + \makevalueexpandable + \def\temp{#2}% + \edef\next{\gdef\makecsname{SET#1}}% + \ifx\temp\empty + \next{}% + \else + \setzzz#2\endsetzzz + \fi + }% } -% Can't use \xdef to pre-expand #2 and save some time, since \temp or -% \next or other control sequences that we've defined might get us into -% an infinite loop. Consider `@set foo @cite{bar}'. -\def\setzzz#1#2 \endsetzzz{\expandafter\gdef\csname SET#1\endcsname{#2}} +% Remove the trailing space \setxxx inserted. +\def\setzzz#1 \endsetzzz{\next{#1}} % @clear VAR clears (i.e., unsets) the variable VAR. % -\def\clear{\parsearg\clearxxx} -\def\clearxxx#1{\global\expandafter\let\csname SET#1\endcsname=\relax} +\parseargdef\clear{% + {% + \makevalueexpandable + \global\expandafter\let\csname SET#1\endcsname=\relax + }% +} % @value{foo} gets the text saved in variable foo. +\def\value{\begingroup\makevalueexpandable\valuexxx} +\def\valuexxx#1{\expandablevalue{#1}\endgroup} { - \catcode`\_ = \active + \catcode`\- = \active \catcode`\_ = \active % - % We might end up with active _ or - characters in the argument if - % we're called from @code, as @code{@value{foo-bar_}}. So \let any - % such active characters to their normal equivalents. - \gdef\value{\begingroup + \gdef\makevalueexpandable{% + \let\value = \expandablevalue + % We don't want these characters active, ... \catcode`\-=\other \catcode`\_=\other - \indexbreaks \let_\normalunderscore - \valuexxx} + % ..., but we might end up with active ones in the argument if + % we're called from @code, as @code{@value{foo-bar_}}, though. + % So \let them to their normal equivalents. + \let-\realdash \let_\normalunderscore + } } -\def\valuexxx#1{\expandablevalue{#1}\endgroup} % We have this subroutine so that we can handle at least some @value's -% properly in indexes (we \let\value to this in \indexdummies). Ones -% whose names contain - or _ still won't work, but we can't do anything -% about that. The command has to be fully expandable (if the variable -% is set), since the result winds up in the index file. This means that -% if the variable's value contains other Texinfo commands, it's almost -% certain it will fail (although perhaps we could fix that with -% sufficient work to do a one-level expansion on the result, instead of -% complete). +% properly in indexes (we call \makevalueexpandable in \indexdummies). +% The command has to be fully expandable (if the variable is set), since +% the result winds up in the index file. This means that if the +% variable's value contains other Texinfo commands, it's almost certain +% it will fail (although perhaps we could fix that with sufficient work +% to do a one-level expansion on the result, instead of complete). % \def\expandablevalue#1{% \expandafter\ifx\csname SET#1\endcsname\relax @@ -2804,55 +2883,36 @@ width0pt\relax} \fi % @ifset VAR ... @end ifset reads the `...' iff VAR has been defined % with @set. % -\def\ifset{\parsearg\doifset} -\def\doifset#1{% - \expandafter\ifx\csname SET#1\endcsname\relax - \let\next=\ifsetfail - \else - \let\next=\ifsetsucceed - \fi - \next +% To get special treatment of `@end ifset,' call \makeond and the redefine. +% +\makecond{ifset} +\def\ifset{\parsearg{\doifset{\let\next=\ifsetfail}}} +\def\doifset#1#2{% + {% + \makevalueexpandable + \let\next=\empty + \expandafter\ifx\csname SET#2\endcsname\relax + #1% If not set, redefine \next. + \fi + \expandafter + }\next } -\def\ifsetsucceed{\conditionalsucceed{ifset}} -\def\ifsetfail{\nestedignore{ifset}} -\defineunmatchedend{ifset} +\def\ifsetfail{\doignore{ifset}} % @ifclear VAR ... @end ifclear reads the `...' iff VAR has never been % defined with @set, or has been undefined with @clear. % -\def\ifclear{\parsearg\doifclear} -\def\doifclear#1{% - \expandafter\ifx\csname SET#1\endcsname\relax - \let\next=\ifclearsucceed - \else - \let\next=\ifclearfail - \fi - \next -} -\def\ifclearsucceed{\conditionalsucceed{ifclear}} -\def\ifclearfail{\nestedignore{ifclear}} -\defineunmatchedend{ifclear} - -% @iftex, @ifnothtml, @ifnotinfo, @ifnotplaintext always succeed; we -% read the text following, through the first @end iftex (etc.). Make -% `@end iftex' (etc.) valid only after an @iftex. -% -\def\iftex{\conditionalsucceed{iftex}} -\def\ifnothtml{\conditionalsucceed{ifnothtml}} -\def\ifnotinfo{\conditionalsucceed{ifnotinfo}} -\def\ifnotplaintext{\conditionalsucceed{ifnotplaintext}} -\defineunmatchedend{iftex} -\defineunmatchedend{ifnothtml} -\defineunmatchedend{ifnotinfo} -\defineunmatchedend{ifnotplaintext} - -% True conditional. Since \set globally defines its variables, we can -% just start and end a group (to keep the @end definition undefined at -% the outer level). -% -\def\conditionalsucceed#1{\begingroup - \expandafter\def\csname E#1\endcsname{\endgroup}% -} +% The `\else' inside the `\doifset' parameter is a trick to reuse the +% above code: if the variable is not set, do nothing, if it is set, +% then redefine \next to \ifclearfail. +% +\makecond{ifclear} +\def\ifclear{\parsearg{\doifset{\else \let\next=\ifclearfail}}} +\def\ifclearfail{\doignore{ifclear}} + +% @dircategory CATEGORY -- specify a category of the dir file +% which this file should belong to. Ignore this in TeX. +\let\dircategory=\comment % @defininfoenclose. \let\definfoenclose=\comment @@ -2903,10 +2963,10 @@ width0pt\relax} \fi % @synindex foo bar makes index foo feed into index bar. % Do this instead of @defindex foo if you don't want it as a separate index. -% +% % @syncodeindex foo bar similar, but put all entries made for index foo % inside @code. -% +% \def\synindex#1 #2 {\dosynindex\doindex{#1}{#2}} \def\syncodeindex#1 #2 {\dosynindex\docodeindex{#1}{#2}} @@ -2948,13 +3008,13 @@ width0pt\relax} \fi % Take care of Texinfo commands that can appear in an index entry. % Since there are some commands we want to expand, and others we don't, % we have to laboriously prevent expansion for those that we don't. -% +% \def\indexdummies{% \def\@{@}% change to @@ when we switch to @ as escape char in index files. \def\ {\realbackslash\space }% % Need these in case \tex is in effect and \{ is a \delimiter again. % But can't use \lbracecmd and \rbracecmd because texindex assumes - % braces and backslashes are used only as delimiters. + % braces and backslashes are used only as delimiters. \let\{ = \mylbrace \let\} = \myrbrace % @@ -2963,14 +3023,14 @@ width0pt\relax} \fi % words, not control letters, because the \space would be incorrect % for control characters, but is needed to separate the control word % from whatever follows. - % + % % For control letters, we have \definedummyletter, which omits the % space. - % + % % These can be used both for control words that take an argument and % those that do not. If it is followed by {arg} in the input, then % that will dutifully get written to the index (or wherever). - % + % \def\definedummyword##1{% \expandafter\def\csname ##1\endcsname{\realbackslash ##1\space}% }% @@ -2983,9 +3043,9 @@ width0pt\relax} \fi } % For the aux file, @ is the escape character. So we want to redefine -% everything using @ instead of \realbackslash. When everything uses +% everything using @ instead of \realbackslash. When everything uses % @, this will be simpler. -% +% \def\atdummies{% \def\@{@@}% \def\ {@ }% @@ -3006,31 +3066,16 @@ width0pt\relax} \fi % Called from \indexdummies and \atdummies. \definedummyword and % \definedummyletter must be defined first. -% +% \def\commondummies{% % \normalturnoffactive % - % Control letters and accents. + \commondummiesnofonts + % \definedummyletter{_}% - \definedummyletter{,}% - \definedummyletter{"}% - \definedummyletter{`}% - \definedummyletter{'}% - \definedummyletter{^}% - \definedummyletter{~}% - \definedummyletter{=}% - \definedummyword{u}% - \definedummyword{v}% - \definedummyword{H}% - \definedummyword{dotaccent}% - \definedummyword{ringaccent}% - \definedummyword{tieaccent}% - \definedummyword{ubaraccent}% - \definedummyword{udotaccent}% - \definedummyword{dotless}% % - % Other non-English letters. + % Non-English letters. \definedummyword{AA}% \definedummyword{AE}% \definedummyword{L}% @@ -3042,6 +3087,10 @@ width0pt\relax} \fi \definedummyword{oe}% \definedummyword{o}% \definedummyword{ss}% + \definedummyword{exclamdown}% + \definedummyword{questiondown}% + \definedummyword{ordf}% + \definedummyword{ordm}% % % Although these internal commands shouldn't show up, sometimes they do. \definedummyword{bf}% @@ -3053,37 +3102,13 @@ width0pt\relax} \fi \definedummyword{tclose}% \definedummyword{tt}% % - % Texinfo font commands. - \definedummyword{b}% - \definedummyword{i}% - \definedummyword{r}% - \definedummyword{sc}% - \definedummyword{t}% - % + \definedummyword{LaTeX}% \definedummyword{TeX}% - \definedummyword{acronym}% - \definedummyword{cite}% - \definedummyword{code}% - \definedummyword{command}% - \definedummyword{dfn}% - \definedummyword{dots}% - \definedummyword{emph}% - \definedummyword{env}% - \definedummyword{file}% - \definedummyword{kbd}% - \definedummyword{key}% - \definedummyword{math}% - \definedummyword{option}% - \definedummyword{samp}% - \definedummyword{strong}% - \definedummyword{uref}% - \definedummyword{url}% - \definedummyword{var}% - \definedummyword{w}% % % Assorted special characters. \definedummyword{bullet}% \definedummyword{copyright}% + \definedummyword{registeredsymbol}% \definedummyword{dots}% \definedummyword{enddots}% \definedummyword{equiv}% @@ -3095,10 +3120,9 @@ width0pt\relax} \fi \definedummyword{print}% \definedummyword{result}% % - % Handle some cases of @value -- where the variable name does not - % contain - or _, and the value does not contain any + % Handle some cases of @value -- where it does not contain any % (non-fully-expandable) commands. - \let\value = \expandablevalue + \makevalueexpandable % % Normal spaces, not active ones. \unsepspaces @@ -3107,45 +3131,91 @@ width0pt\relax} \fi \turnoffmacros } -% If an index command is used in an @example environment, any spaces -% therein should become regular spaces in the raw index file, not the -% expansion of \tie (\leavevmode \penalty \@M \ ). -{\obeyspaces - \gdef\unsepspaces{\obeyspaces\let =\space}} - +% \commondummiesnofonts: common to \commondummies and \indexnofonts. +% +% Better have this without active chars. +{ + \catcode`\~=\other + \gdef\commondummiesnofonts{% + % Control letters and accents. + \definedummyletter{!}% + \definedummyletter{"}% + \definedummyletter{'}% + \definedummyletter{*}% + \definedummyletter{,}% + \definedummyletter{.}% + \definedummyletter{/}% + \definedummyletter{:}% + \definedummyletter{=}% + \definedummyletter{?}% + \definedummyletter{^}% + \definedummyletter{`}% + \definedummyletter{~}% + \definedummyword{u}% + \definedummyword{v}% + \definedummyword{H}% + \definedummyword{dotaccent}% + \definedummyword{ringaccent}% + \definedummyword{tieaccent}% + \definedummyword{ubaraccent}% + \definedummyword{udotaccent}% + \definedummyword{dotless}% + % + % Texinfo font commands. + \definedummyword{b}% + \definedummyword{i}% + \definedummyword{r}% + \definedummyword{sc}% + \definedummyword{t}% + % + % Commands that take arguments. + \definedummyword{acronym}% + \definedummyword{cite}% + \definedummyword{code}% + \definedummyword{command}% + \definedummyword{dfn}% + \definedummyword{emph}% + \definedummyword{env}% + \definedummyword{file}% + \definedummyword{kbd}% + \definedummyword{key}% + \definedummyword{math}% + \definedummyword{option}% + \definedummyword{samp}% + \definedummyword{strong}% + \definedummyword{tie}% + \definedummyword{uref}% + \definedummyword{url}% + \definedummyword{var}% + \definedummyword{verb}% + \definedummyword{w}% + } +} % \indexnofonts is used when outputting the strings to sort the index % by, and when constructing control sequence names. It eliminates all % control sequences and just writes whatever the best ASCII sort string % would be for a given command (usually its argument). % -\def\indexdummytex{TeX} -\def\indexdummydots{...} -% \def\indexnofonts{% + \def\definedummyword##1{% + \expandafter\let\csname ##1\endcsname\asis + }% + \let\definedummyletter=\definedummyword + % + \commondummiesnofonts + % + % Don't no-op \tt, since it isn't a user-level command + % and is used in the definitions of the active chars like <, >, |, etc. + % Likewise with the other plain tex font commands. + %\let\tt=\asis + % \def\ { }% \def\@{@}% % how to handle braces? \def\_{\normalunderscore}% % - \let\,=\asis - \let\"=\asis - \let\`=\asis - \let\'=\asis - \let\^=\asis - \let\~=\asis - \let\==\asis - \let\u=\asis - \let\v=\asis - \let\H=\asis - \let\dotaccent=\asis - \let\ringaccent=\asis - \let\tieaccent=\asis - \let\ubaraccent=\asis - \let\udotaccent=\asis - \let\dotless=\asis - % - % Other non-English letters. + % Non-English letters. \def\AA{AA}% \def\AE{AE}% \def\L{L}% @@ -3159,130 +3229,164 @@ width0pt\relax} \fi \def\ss{ss}% \def\exclamdown{!}% \def\questiondown{?}% + \def\ordf{a}% + \def\ordm{o}% % - % Don't no-op \tt, since it isn't a user-level command - % and is used in the definitions of the active chars like <, >, |, etc. - % Likewise with the other plain tex font commands. - %\let\tt=\asis + \def\LaTeX{LaTeX}% + \def\TeX{TeX}% % - % Texinfo font commands. - \let\b=\asis - \let\i=\asis - \let\r=\asis - \let\sc=\asis - \let\t=\asis - % - \let\TeX=\indexdummytex - \let\acronym=\asis - \let\cite=\asis - \let\code=\asis - \let\command=\asis - \let\dfn=\asis - \let\dots=\indexdummydots - \let\emph=\asis - \let\env=\asis - \let\file=\asis - \let\kbd=\asis - \let\key=\asis - \let\math=\asis - \let\option=\asis - \let\samp=\asis - \let\strong=\asis - \let\uref=\asis - \let\url=\asis - \let\var=\asis - \let\w=\asis + % Assorted special characters. + % (The following {} will end up in the sort string, but that's ok.) + \def\bullet{bullet}% + \def\copyright{copyright}% + \def\registeredsymbol{R}% + \def\dots{...}% + \def\enddots{...}% + \def\equiv{==}% + \def\error{error}% + \def\expansion{==>}% + \def\minus{-}% + \def\pounds{pounds}% + \def\point{.}% + \def\print{-|}% + \def\result{=>}% } \let\indexbackslash=0 %overridden during \printindex. \let\SETmarginindex=\relax % put index entries in margin (undocumented)? -% For \ifx comparisons. -\def\emptymacro{\empty} - % Most index entries go through here, but \dosubind is the general case. -% -\def\doind#1#2{\dosubind{#1}{#2}\empty} +% #1 is the index name, #2 is the entry text. +\def\doind#1#2{\dosubind{#1}{#2}{}} % Workhorse for all \fooindexes. % #1 is name of index, #2 is stuff to put there, #3 is subentry -- -% \empty if called from \doind, as we usually are. The main exception -% is with defuns, which call us directly. +% empty if called from \doind, as we usually are (the main exception +% is with most defuns, which call us directly). % \def\dosubind#1#2#3{% + \iflinks + {% + % Store the main index entry text (including the third arg). + \toks0 = {#2}% + % If third arg is present, precede it with a space. + \def\thirdarg{#3}% + \ifx\thirdarg\empty \else + \toks0 = \expandafter{\the\toks0 \space #3}% + \fi + % + \edef\writeto{\csname#1indfile\endcsname}% + % + \ifvmode + \dosubindsanitize + \else + \dosubindwrite + \fi + }% + \fi +} + +% Write the entry in \toks0 to the index file: +% +\def\dosubindwrite{% % Put the index entry in the margin if desired. \ifx\SETmarginindex\relax\else - \insert\margin{\hbox{\vrule height8pt depth3pt width0pt #2}}% + \insert\margin{\hbox{\vrule height8pt depth3pt width0pt \the\toks0}}% \fi - {% - \count255=\lastpenalty - {% - \indexdummies % Must do this here, since \bf, etc expand at this stage - \escapechar=`\\ - {% - \let\folio = 0% We will expand all macros now EXCEPT \folio. - \def\rawbackslashxx{\indexbackslash}% \indexbackslash isn't defined now - % so it will be output as is; and it will print as backslash. - % - % The main index entry text. - \toks0 = {#2}% - % - % If third arg is present, precede it with space in sort key. - \def\thirdarg{#3}% - \ifx\thirdarg\emptymacro \else - % If the third (subentry) arg is present, add it to the index - % line to write. - \toks0 = \expandafter{\the\toks0 \space #3}% - \fi - % - % Process the index entry with all font commands turned off, to - % get the string to sort by. - {\indexnofonts - \edef\temp{\the\toks0}% need full expansion - \xdef\indexsorttmp{\temp}% - }% - % - % Set up the complete index entry, with both the sort key and - % the original text, including any font commands. We write - % three arguments to \entry to the .?? file (four in the - % subentry case), texindex reduces to two when writing the .??s - % sorted result. - \edef\temp{% - \write\csname#1indfile\endcsname{% - \realbackslash entry{\indexsorttmp}{\folio}{\the\toks0}}% - }% - % - % If a skip is the last thing on the list now, preserve it - % by backing up by \lastskip, doing the \write, then inserting - % the skip again. Otherwise, the whatsit generated by the - % \write will make \lastskip zero. The result is that sequences - % like this: - % @end defun - % @tindex whatever - % @defun ... - % will have extra space inserted, because the \medbreak in the - % start of the @defun won't see the skip inserted by the @end of - % the previous defun. - % - % But don't do any of this if we're not in vertical mode. We - % don't want to do a \vskip and prematurely end a paragraph. - % - % Avoid page breaks due to these extra skips, too. - % - \iflinks - \ifvmode - \skip0 = \lastskip - \ifdim\lastskip = 0pt \else \nobreak\vskip-\skip0 \fi - \fi - % - \temp % do the write - % - \ifvmode \ifdim\skip0 = 0pt \else \nobreak\vskip\skip0 \fi \fi - \fi - }% - }% - \penalty\count255 + % + % Remember, we are within a group. + \indexdummies % Must do this here, since \bf, etc expand at this stage + \escapechar=`\\ + \def\backslashcurfont{\indexbackslash}% \indexbackslash isn't defined now + % so it will be output as is; and it will print as backslash. + % + % Process the index entry with all font commands turned off, to + % get the string to sort by. + {\indexnofonts + \edef\temp{\the\toks0}% need full expansion + \xdef\indexsorttmp{\temp}% + }% + % + % Set up the complete index entry, with both the sort key and + % the original text, including any font commands. We write + % three arguments to \entry to the .?? file (four in the + % subentry case), texindex reduces to two when writing the .??s + % sorted result. + \edef\temp{% + \write\writeto{% + \string\entry{\indexsorttmp}{\noexpand\folio}{\the\toks0}}% }% + \temp +} + +% Take care of unwanted page breaks: +% +% If a skip is the last thing on the list now, preserve it +% by backing up by \lastskip, doing the \write, then inserting +% the skip again. Otherwise, the whatsit generated by the +% \write will make \lastskip zero. The result is that sequences +% like this: +% @end defun +% @tindex whatever +% @defun ... +% will have extra space inserted, because the \medbreak in the +% start of the @defun won't see the skip inserted by the @end of +% the previous defun. +% +% But don't do any of this if we're not in vertical mode. We +% don't want to do a \vskip and prematurely end a paragraph. +% +% Avoid page breaks due to these extra skips, too. +% +% But wait, there is a catch there: +% We'll have to check whether \lastskip is zero skip. \ifdim is not +% sufficient for this purpose, as it ignores stretch and shrink parts +% of the skip. The only way seems to be to check the textual +% representation of the skip. +% +% The following is almost like \def\zeroskipmacro{0.0pt} except that +% the ``p'' and ``t'' characters have catcode \other, not 11 (letter). +% +\edef\zeroskipmacro{\expandafter\the\csname z@skip\endcsname} +% +% ..., ready, GO: +% +\def\dosubindsanitize{% + % \lastskip and \lastpenalty cannot both be nonzero simultaneously. + \skip0 = \lastskip + \edef\lastskipmacro{\the\lastskip}% + \count255 = \lastpenalty + % + % If \lastskip is nonzero, that means the last item was a + % skip. And since a skip is discardable, that means this + % -\skip0 glue we're inserting is preceded by a + % non-discardable item, therefore it is not a potential + % breakpoint, therefore no \nobreak needed. + \ifx\lastskipmacro\zeroskipmacro + \else + \vskip-\skip0 + \fi + % + \dosubindwrite + % + \ifx\lastskipmacro\zeroskipmacro + % if \lastskip was zero, perhaps the last item was a + % penalty, and perhaps it was >=10000, e.g., a \nobreak. + % In that case, we want to re-insert the penalty; since we + % just inserted a non-discardable item, any following glue + % (such as a \parskip) would be a breakpoint. For example: + % @deffn deffn-whatever + % @vindex index-whatever + % Description. + % would allow a break between the index-whatever whatsit + % and the "Description." paragraph. + \ifnum\count255>9999 \nobreak \fi + \else + % On the other hand, if we had a nonzero \lastskip, + % this make-up glue would be preceded by a non-discardable item + % (the whatsit from the \write), so we must insert a \nobreak. + \nobreak\vskip\skip0 + \fi } % The index entry written in the file actually looks like @@ -3320,13 +3424,12 @@ width0pt\relax} \fi % @printindex causes a particular index (the ??s file) to get printed. % It does not print any chapter heading (usually an @unnumbered). % -\def\printindex{\parsearg\doprintindex} -\def\doprintindex#1{\begingroup +\parseargdef\printindex{\begingroup \dobreak \chapheadingskip{10000}% % \smallfonts \rm \tolerance = 9500 - \indexbreaks + \everypar = {}% don't want the \kern\-parindent from indentation suppression. % % See if the index file exists and is nonempty. % Change catcode of @ here so that if the index file contains @@ -3353,7 +3456,7 @@ width0pt\relax} \fi % Index files are almost Texinfo source, but we use \ as the escape % character. It would be better to use @, but that's too big a change % to make right now. - \def\indexbackslash{\rawbackslashxx}% + \def\indexbackslash{\backslashcurfont}% \catcode`\\ = 0 \escapechar = `\\ \begindoublecolumns @@ -3391,81 +3494,102 @@ width0pt\relax} \fi \nobreak }} -% This typesets a paragraph consisting of #1, dot leaders, and then #2 -% flush to the right margin. It is used for index and table of contents -% entries. The paragraph is indented by \leftskip. -% -\def\entry#1#2{\begingroup - % - % Start a new paragraph if necessary, so our assignments below can't - % affect previous text. - \par - % - % Do not fill out the last line with white space. - \parfillskip = 0in - % - % No extra space above this paragraph. - \parskip = 0in - % - % Do not prefer a separate line ending with a hyphen to fewer lines. - \finalhyphendemerits = 0 - % - % \hangindent is only relevant when the entry text and page number - % don't both fit on one line. In that case, bob suggests starting the - % dots pretty far over on the line. Unfortunately, a large - % indentation looks wrong when the entry text itself is broken across - % lines. So we use a small indentation and put up with long leaders. - % - % \hangafter is reset to 1 (which is the value we want) at the start - % of each paragraph, so we need not do anything with that. - \hangindent = 2em - % - % When the entry text needs to be broken, just fill out the first line - % with blank space. - \rightskip = 0pt plus1fil - % - % A bit of stretch before each entry for the benefit of balancing columns. - \vskip 0pt plus1pt - % - % Start a ``paragraph'' for the index entry so the line breaking - % parameters we've set above will have an effect. - \noindent - % - % Insert the text of the index entry. TeX will do line-breaking on it. - #1% - % The following is kludged to not output a line of dots in the index if - % there are no page numbers. The next person who breaks this will be - % cursed by a Unix daemon. - \def\tempa{{\rm }}% - \def\tempb{#2}% - \edef\tempc{\tempa}% - \edef\tempd{\tempb}% - \ifx\tempc\tempd\ \else% - % - % If we must, put the page number on a line of its own, and fill out - % this line with blank space. (The \hfil is overwhelmed with the - % fill leaders glue in \indexdotfill if the page number does fit.) - \hfil\penalty50 - \null\nobreak\indexdotfill % Have leaders before the page number. - % - % The `\ ' here is removed by the implicit \unskip that TeX does as - % part of (the primitive) \par. Without it, a spurious underfull - % \hbox ensues. - \ifpdf - \pdfgettoks#2.\ \the\toksA % The page number ends the paragraph. - \else - \ #2% The page number ends the paragraph. - \fi - \fi% - \par -\endgroup} - -% Like \dotfill except takes at least 1 em. -\def\indexdotfill{\cleaders - \hbox{$\mathsurround=0pt \mkern1.5mu ${\it .}$ \mkern1.5mu$}\hskip 1em plus 1fill} - -\def\primary #1{\line{#1\hfil}} - +% \entry typesets a paragraph consisting of the text (#1), dot leaders, and +% then page number (#2) flushed to the right margin. It is used for index +% and table of contents entries. The paragraph is indented by \leftskip. +% +% A straightforward implementation would start like this: +% \def\entry#1#2{... +% But this frozes the catcodes in the argument, and can cause problems to +% @code, which sets - active. This problem was fixed by a kludge--- +% ``-'' was active throughout whole index, but this isn't really right. +% +% The right solution is to prevent \entry from swallowing the whole text. +% --kasal, 21nov03 +\def\entry{% + \begingroup + % + % Start a new paragraph if necessary, so our assignments below can't + % affect previous text. + \par + % + % Do not fill out the last line with white space. + \parfillskip = 0in + % + % No extra space above this paragraph. + \parskip = 0in + % + % Do not prefer a separate line ending with a hyphen to fewer lines. + \finalhyphendemerits = 0 + % + % \hangindent is only relevant when the entry text and page number + % don't both fit on one line. In that case, bob suggests starting the + % dots pretty far over on the line. Unfortunately, a large + % indentation looks wrong when the entry text itself is broken across + % lines. So we use a small indentation and put up with long leaders. + % + % \hangafter is reset to 1 (which is the value we want) at the start + % of each paragraph, so we need not do anything with that. + \hangindent = 2em + % + % When the entry text needs to be broken, just fill out the first line + % with blank space. + \rightskip = 0pt plus1fil + % + % A bit of stretch before each entry for the benefit of balancing + % columns. + \vskip 0pt plus1pt + % + % Swallow the left brace of the text (first parameter): + \afterassignment\doentry + \let\temp = +} +\def\doentry{% + \bgroup % Instead of the swallowed brace. + \noindent + \aftergroup\finishentry + % And now comes the text of the entry. +} +\def\finishentry#1{% + % #1 is the page number. + % + % The following is kludged to not output a line of dots in the index if + % there are no page numbers. The next person who breaks this will be + % cursed by a Unix daemon. + \def\tempa{{\rm }}% + \def\tempb{#1}% + \edef\tempc{\tempa}% + \edef\tempd{\tempb}% + \ifx\tempc\tempd + \ % + \else + % + % If we must, put the page number on a line of its own, and fill out + % this line with blank space. (The \hfil is overwhelmed with the + % fill leaders glue in \indexdotfill if the page number does fit.) + \hfil\penalty50 + \null\nobreak\indexdotfill % Have leaders before the page number. + % + % The `\ ' here is removed by the implicit \unskip that TeX does as + % part of (the primitive) \par. Without it, a spurious underfull + % \hbox ensues. + \ifpdf + \pdfgettoks#1.% + \ \the\toksA + \else + \ #1% + \fi + \fi + \par + \endgroup +} + +% Like \dotfill except takes at least 1 em. +\def\indexdotfill{\cleaders + \hbox{$\mathsurround=0pt \mkern1.5mu ${\it .}$ \mkern1.5mu$}\hskip 1em plus 1fill} + +\def\primary #1{\line{#1\hfil}} + \newskip\secondaryindent \secondaryindent=0.5cm \def\secondary#1#2{{% \parfillskip=0in @@ -3569,7 +3693,7 @@ width0pt\relax} \fi \wd0=\hsize \wd2=\hsize \hbox to\pagewidth{\box0\hfil\box2}% } -% +% % All done with double columns. \def\enddoublecolumns{% \output = {% @@ -3627,6 +3751,12 @@ width0pt\relax} \fi \message{sectioning,} % Chapters, sections, etc. +% \unnumberedno is an oxymoron, of course. But we count the unnumbered +% sections so that we can refer to them unambiguously in the pdf +% outlines by their "section number". We avoid collisions with chapter +% numbers by starting them at 10000. (If a document ever has 10000 +% chapters, we're in trouble anyway, I'm sure.) +\newcount\unnumberedno \unnumberedno = 10000 \newcount\chapno \newcount\secno \secno=0 \newcount\subsecno \subsecno=0 @@ -3634,9 +3764,12 @@ width0pt\relax} \fi % This counter is funny since it counts through charcodes of letters A, B, ... \newcount\appendixno \appendixno = `\@ +% % \def\appendixletter{\char\the\appendixno} -% We do the following for the sake of pdftex, which needs the actual +% We do the following ugly conditional instead of the above simple +% construct for the sake of pdftex, which needs the actual % letter in the expansion, not just typeset. +% \def\appendixletter{% \ifnum\appendixno=`A A% \else\ifnum\appendixno=`B B% @@ -3674,11 +3807,12 @@ width0pt\relax} \fi % Each @chapter defines this as the name of the chapter. % page headings and footings can use it. @section does likewise. +% However, they are not reliable, because we don't use marks. \def\thischapter{} \def\thissection{} \newcount\absseclevel % used to calculate proper heading level -\newcount\secbase\secbase=0 % @raise/lowersections modify this count +\newcount\secbase\secbase=0 % @raisesections/@lowersections modify this count % @raisesections: treat @section as chapter, @subsection as section, etc. \def\raisesections{\global\advance\secbase by -1} @@ -3693,113 +3827,105 @@ width0pt\relax} \fi % #2 is text for heading \def\numhead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 \ifcase\absseclevel - \chapterzzz{#2} -\or - \seczzz{#2} -\or - \numberedsubseczzz{#2} -\or - \numberedsubsubseczzz{#2} -\else - \ifnum \absseclevel<0 - \chapterzzz{#2} + \chapterzzz{#2}% + \or \seczzz{#2}% + \or \numberedsubseczzz{#2}% + \or \numberedsubsubseczzz{#2}% \else - \numberedsubsubseczzz{#2} + \ifnum \absseclevel<0 \chapterzzz{#2}% + \else \numberedsubsubseczzz{#2}% + \fi \fi -\fi + \suppressfirstparagraphindent } % like \numhead, but chooses appendix heading levels \def\apphead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 \ifcase\absseclevel - \appendixzzz{#2} -\or - \appendixsectionzzz{#2} -\or - \appendixsubseczzz{#2} -\or - \appendixsubsubseczzz{#2} -\else - \ifnum \absseclevel<0 - \appendixzzz{#2} + \appendixzzz{#2}% + \or \appendixsectionzzz{#2}% + \or \appendixsubseczzz{#2}% + \or \appendixsubsubseczzz{#2}% \else - \appendixsubsubseczzz{#2} + \ifnum \absseclevel<0 \appendixzzz{#2}% + \else \appendixsubsubseczzz{#2}% + \fi \fi -\fi + \suppressfirstparagraphindent } % like \numhead, but chooses numberless heading levels \def\unnmhead#1#2{\absseclevel=\secbase\advance\absseclevel by #1 -\ifcase\absseclevel - \unnumberedzzz{#2} -\or - \unnumberedseczzz{#2} -\or - \unnumberedsubseczzz{#2} -\or - \unnumberedsubsubseczzz{#2} -\else - \ifnum \absseclevel<0 - \unnumberedzzz{#2} + \ifcase\absseclevel + \unnumberedzzz{#2}% + \or \unnumberedseczzz{#2}% + \or \unnumberedsubseczzz{#2}% + \or \unnumberedsubsubseczzz{#2}% \else - \unnumberedsubsubseczzz{#2} + \ifnum \absseclevel<0 \unnumberedzzz{#2}% + \else \unnumberedsubsubseczzz{#2}% + \fi \fi -\fi + \suppressfirstparagraphindent } -% @chapter, @appendix, @unnumbered. -\def\thischaptername{No Chapter Title} -\outer\def\chapter{\parsearg\chapteryyy} -\def\chapteryyy #1{\numhead0{#1}} % normally numhead0 calls chapterzzz -\def\chapterzzz #1{% - \secno=0 \subsecno=0 \subsubsecno=0 - \global\advance \chapno by 1 \message{\putwordChapter\space \the\chapno}% - \chapmacro {#1}{\the\chapno}% - \gdef\thissection{#1}% - \gdef\thischaptername{#1}% - % We don't substitute the actual chapter name into \thischapter - % because we don't want its macros evaluated now. - \xdef\thischapter{\putwordChapter{} \the\chapno: \noexpand\thischaptername}% - \writetocentry{chap}{#1}{{\the\chapno}} - \donoderef +% @chapter, @appendix, @unnumbered. Increment top-level counter, reset +% all lower-level sectioning counters to zero. +% +% Also set \chaplevelprefix, which we prepend to @float sequence numbers +% (e.g., figures), q.v. By default (before any chapter), that is empty. +\let\chaplevelprefix = \empty +% +\outer\parseargdef\chapter{\numhead0{#1}} % normally numhead0 calls chapterzzz +\def\chapterzzz#1{% + % section resetting is \global in case the chapter is in a group, such + % as an @include file. + \global\secno=0 \global\subsecno=0 \global\subsubsecno=0 + \global\advance\chapno by 1 + % + % Used for \float. + \gdef\chaplevelprefix{\the\chapno.}% + \resetallfloatnos + % + \message{\putwordChapter\space \the\chapno}% + % + % Write the actual heading. + \chapmacro{#1}{Ynumbered}{\the\chapno}% + % + % So @section and the like are numbered underneath this chapter. \global\let\section = \numberedsec \global\let\subsection = \numberedsubsec \global\let\subsubsection = \numberedsubsubsec } -% we use \chapno to avoid indenting back -\def\appendixbox#1{% - \setbox0 = \hbox{\putwordAppendix{} \the\chapno}% - \hbox to \wd0{#1\hss}} - -\outer\def\appendix{\parsearg\appendixyyy} -\def\appendixyyy #1{\apphead0{#1}} % normally apphead0 calls appendixzzz -\def\appendixzzz #1{% - \secno=0 \subsecno=0 \subsubsecno=0 - \global\advance \appendixno by 1 - \message{\putwordAppendix\space \appendixletter}% - \chapmacro {#1}{\appendixbox{\putwordAppendix{} \appendixletter}}% - \gdef\thissection{#1}% - \gdef\thischaptername{#1}% - \xdef\thischapter{\putwordAppendix{} \appendixletter: \noexpand\thischaptername}% - \writetocentry{appendix}{#1}{{\appendixletter}} - \appendixnoderef +\outer\parseargdef\appendix{\apphead0{#1}} % normally apphead0 calls appendixzzz +\def\appendixzzz#1{% + \global\secno=0 \global\subsecno=0 \global\subsubsecno=0 + \global\advance\appendixno by 1 + \gdef\chaplevelprefix{\appendixletter.}% + \resetallfloatnos + % + \def\appendixnum{\putwordAppendix\space \appendixletter}% + \message{\appendixnum}% + % + \chapmacro{#1}{Yappendix}{\appendixletter}% + % \global\let\section = \appendixsec \global\let\subsection = \appendixsubsec \global\let\subsubsection = \appendixsubsubsec } % @centerchap is like @unnumbered, but the heading is centered. -\outer\def\centerchap{\parsearg\centerchapyyy} -\def\centerchapyyy #1{{\let\unnumbchapmacro=\centerchapmacro \unnumberedyyy{#1}}} - -% @top is like @unnumbered. -\outer\def\top{\parsearg\unnumberedyyy} +\outer\parseargdef\centerchap{{\unnumberedyyy{#1}}} -\outer\def\unnumbered{\parsearg\unnumberedyyy} -\def\unnumberedyyy #1{\unnmhead0{#1}} % normally unnmhead0 calls unnumberedzzz -\def\unnumberedzzz #1{% - \secno=0 \subsecno=0 \subsubsecno=0 +\outer\parseargdef\unnumbered{\unnmhead0{#1}} % normally unnmhead0 calls unnumberedzzz +\def\unnumberedzzz#1{% + \global\secno=0 \global\subsecno=0 \global\subsubsecno=0 + \global\advance\unnumberedno by 1 + % + % Since an unnumbered has no number, no prefix for figures. + \global\let\chaplevelprefix = \empty + \resetallfloatnos % % This used to be simply \message{#1}, but TeX fully expands the % argument to \message. Therefore, if #1 contained @-commands, TeX @@ -3812,112 +3938,84 @@ width0pt\relax} \fi % \the to achieve this: TeX expands \the only once, % simply yielding the contents of . (We also do this for % the toc entries.) - \toks0 = {#1}\message{(\the\toks0)}% + \toks0 = {#1}% + \message{(\the\toks0)}% + % + \chapmacro{#1}{Ynothing}{\the\unnumberedno}% % - \unnumbchapmacro {#1}% - \gdef\thischapter{#1}\gdef\thissection{#1}% - \writetocentry{unnumbchap}{#1}{{\the\chapno}} - \unnumbnoderef \global\let\section = \unnumberedsec \global\let\subsection = \unnumberedsubsec \global\let\subsubsection = \unnumberedsubsubsec } -% Sections. -\outer\def\numberedsec{\parsearg\secyyy} -\def\secyyy #1{\numhead1{#1}} % normally calls seczzz -\def\seczzz #1{% - \subsecno=0 \subsubsecno=0 \global\advance \secno by 1 % - \gdef\thissection{#1}\secheading {#1}{\the\chapno}{\the\secno}% - \writetocentry{sec}{#1}{{\the\chapno}{\the\secno}} - \donoderef - \nobreak -} - -\outer\def\appendixsection{\parsearg\appendixsecyyy} -\outer\def\appendixsec{\parsearg\appendixsecyyy} -\def\appendixsecyyy #1{\apphead1{#1}} % normally calls appendixsectionzzz -\def\appendixsectionzzz #1{% - \subsecno=0 \subsubsecno=0 \global\advance \secno by 1 % - \gdef\thissection{#1}\secheading {#1}{\appendixletter}{\the\secno}% - \writetocentry{sec}{#1}{{\appendixletter}{\the\secno}} - \appendixnoderef - \nobreak -} +% @top is like @unnumbered. +\let\top\unnumbered -\outer\def\unnumberedsec{\parsearg\unnumberedsecyyy} -\def\unnumberedsecyyy #1{\unnmhead1{#1}} % normally calls unnumberedseczzz -\def\unnumberedseczzz #1{% - \plainsecheading {#1}\gdef\thissection{#1}% - \writetocentry{unnumbsec}{#1}{{\the\chapno}{\the\secno}} - \unnumbnoderef - \nobreak +% Sections. +\outer\parseargdef\numberedsec{\numhead1{#1}} % normally calls seczzz +\def\seczzz#1{% + \global\subsecno=0 \global\subsubsecno=0 \global\advance\secno by 1 + \sectionheading{#1}{sec}{Ynumbered}{\the\chapno.\the\secno}% +} + +\outer\parseargdef\appendixsection{\apphead1{#1}} % normally calls appendixsectionzzz +\def\appendixsectionzzz#1{% + \global\subsecno=0 \global\subsubsecno=0 \global\advance\secno by 1 + \sectionheading{#1}{sec}{Yappendix}{\appendixletter.\the\secno}% +} +\let\appendixsec\appendixsection + +\outer\parseargdef\unnumberedsec{\unnmhead1{#1}} % normally calls unnumberedseczzz +\def\unnumberedseczzz#1{% + \global\subsecno=0 \global\subsubsecno=0 \global\advance\secno by 1 + \sectionheading{#1}{sec}{Ynothing}{\the\unnumberedno.\the\secno}% } % Subsections. -\outer\def\numberedsubsec{\parsearg\numberedsubsecyyy} -\def\numberedsubsecyyy #1{\numhead2{#1}} % normally calls numberedsubseczzz -\def\numberedsubseczzz #1{% - \gdef\thissection{#1}\subsubsecno=0 \global\advance \subsecno by 1 % - \subsecheading {#1}{\the\chapno}{\the\secno}{\the\subsecno}% - \writetocentry{subsec}{#1}{{\the\chapno}{\the\secno}{\the\subsecno}} - \donoderef - \nobreak -} - -\outer\def\appendixsubsec{\parsearg\appendixsubsecyyy} -\def\appendixsubsecyyy #1{\apphead2{#1}} % normally calls appendixsubseczzz -\def\appendixsubseczzz #1{% - \gdef\thissection{#1}\subsubsecno=0 \global\advance \subsecno by 1 % - \subsecheading {#1}{\appendixletter}{\the\secno}{\the\subsecno}% - \writetocentry{subsec}{#1}{{\appendixletter}{\the\secno}{\the\subsecno}} - \appendixnoderef - \nobreak -} - -\outer\def\unnumberedsubsec{\parsearg\unnumberedsubsecyyy} -\def\unnumberedsubsecyyy #1{\unnmhead2{#1}} %normally calls unnumberedsubseczzz -\def\unnumberedsubseczzz #1{% - \plainsubsecheading {#1}\gdef\thissection{#1}% - \writetocentry{unnumbsubsec}{#1}{{\the\chapno}{\the\secno}{\the\subsecno}} - \unnumbnoderef - \nobreak +\outer\parseargdef\numberedsubsec{\numhead2{#1}} % normally calls numberedsubseczzz +\def\numberedsubseczzz#1{% + \global\subsubsecno=0 \global\advance\subsecno by 1 + \sectionheading{#1}{subsec}{Ynumbered}{\the\chapno.\the\secno.\the\subsecno}% +} + +\outer\parseargdef\appendixsubsec{\apphead2{#1}} % normally calls appendixsubseczzz +\def\appendixsubseczzz#1{% + \global\subsubsecno=0 \global\advance\subsecno by 1 + \sectionheading{#1}{subsec}{Yappendix}% + {\appendixletter.\the\secno.\the\subsecno}% +} + +\outer\parseargdef\unnumberedsubsec{\unnmhead2{#1}} %normally calls unnumberedsubseczzz +\def\unnumberedsubseczzz#1{% + \global\subsubsecno=0 \global\advance\subsecno by 1 + \sectionheading{#1}{subsec}{Ynothing}% + {\the\unnumberedno.\the\secno.\the\subsecno}% } % Subsubsections. -\outer\def\numberedsubsubsec{\parsearg\numberedsubsubsecyyy} -\def\numberedsubsubsecyyy #1{\numhead3{#1}} % normally numberedsubsubseczzz -\def\numberedsubsubseczzz #1{% - \gdef\thissection{#1}\global\advance \subsubsecno by 1 % - \subsubsecheading {#1} - {\the\chapno}{\the\secno}{\the\subsecno}{\the\subsubsecno}% - \writetocentry{subsubsec}{#1}{{\the\chapno}{\the\secno}{\the\subsecno}{\the\subsubsecno}} - \donoderef - \nobreak -} - -\outer\def\appendixsubsubsec{\parsearg\appendixsubsubsecyyy} -\def\appendixsubsubsecyyy #1{\apphead3{#1}} % normally appendixsubsubseczzz -\def\appendixsubsubseczzz #1{% - \gdef\thissection{#1}\global\advance \subsubsecno by 1 % - \subsubsecheading {#1} - {\appendixletter}{\the\secno}{\the\subsecno}{\the\subsubsecno}% - \writetocentry{subsubsec}{#1}{{\appendixletter}{\the\secno}{\the\subsecno}{\the\subsubsecno}} - \appendixnoderef - \nobreak -} - -\outer\def\unnumberedsubsubsec{\parsearg\unnumberedsubsubsecyyy} -\def\unnumberedsubsubsecyyy #1{\unnmhead3{#1}} %normally unnumberedsubsubseczzz -\def\unnumberedsubsubseczzz #1{% - \plainsubsubsecheading {#1}\gdef\thissection{#1}% - \writetocentry{unnumbsubsubsec}{#1}{{\the\chapno}{\the\secno}{\the\subsecno}{\the\subsubsecno}} - \unnumbnoderef - \nobreak +\outer\parseargdef\numberedsubsubsec{\numhead3{#1}} % normally numberedsubsubseczzz +\def\numberedsubsubseczzz#1{% + \global\advance\subsubsecno by 1 + \sectionheading{#1}{subsubsec}{Ynumbered}% + {\the\chapno.\the\secno.\the\subsecno.\the\subsubsecno}% +} + +\outer\parseargdef\appendixsubsubsec{\apphead3{#1}} % normally appendixsubsubseczzz +\def\appendixsubsubseczzz#1{% + \global\advance\subsubsecno by 1 + \sectionheading{#1}{subsubsec}{Yappendix}% + {\appendixletter.\the\secno.\the\subsecno.\the\subsubsecno}% +} + +\outer\parseargdef\unnumberedsubsubsec{\unnmhead3{#1}} %normally unnumberedsubsubseczzz +\def\unnumberedsubsubseczzz#1{% + \global\advance\subsubsecno by 1 + \sectionheading{#1}{subsubsec}{Ynothing}% + {\the\unnumberedno.\the\secno.\the\subsecno.\the\subsubsecno}% } % These are variants which are not "outer", so they can appear in @ifinfo. -% Actually, they should now be obsolete; ordinary section commands should work. +% Actually, they are now be obsolete; ordinary section commands should work. \def\infotop{\parsearg\unnumberedzzz} \def\infounnumbered{\parsearg\unnumberedzzz} \def\infounnumberedsec{\parsearg\unnumberedseczzz} @@ -3937,9 +4035,9 @@ width0pt\relax} \fi % These macros control what the section commands do, according % to what kind of chapter we are in (ordinary, appendix, or unnumbered). % Define them by default for a numbered chapter. -\global\let\section = \numberedsec -\global\let\subsection = \numberedsubsec -\global\let\subsubsection = \numberedsubsubsec +\let\section = \numberedsec +\let\subsection = \numberedsubsec +\let\subsubsection = \numberedsubsubsec % Define @majorheading, @heading and @subheading @@ -3952,23 +4050,27 @@ width0pt\relax} \fi % if justification is not attempted. Hence \raggedright. -\def\majorheading{\parsearg\majorheadingzzz} -\def\majorheadingzzz #1{% +\def\majorheading{% {\advance\chapheadingskip by 10pt \chapbreak }% - {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 - \parindent=0pt\raggedright - \rm #1\hfill}}\bigskip \par\penalty 200} + \parsearg\chapheadingzzz +} -\def\chapheading{\parsearg\chapheadingzzz} -\def\chapheadingzzz #1{\chapbreak % +\def\chapheading{\chapbreak \parsearg\chapheadingzzz} +\def\chapheadingzzz#1{% {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt\raggedright - \rm #1\hfill}}\bigskip \par\penalty 200} + \rm #1\hfill}}% + \bigskip \par\penalty 200\relax + \suppressfirstparagraphindent +} % @heading, @subheading, @subsubheading. -\def\heading{\parsearg\plainsecheading} -\def\subheading{\parsearg\plainsubsecheading} -\def\subsubheading{\parsearg\plainsubsubsecheading} +\parseargdef\heading{\sectionheading{#1}{sec}{Yomitfromtoc}{} + \suppressfirstparagraphindent} +\parseargdef\subheading{\sectionheading{#1}{subsec}{Yomitfromtoc}{} + \suppressfirstparagraphindent} +\parseargdef\subsubheading{\sectionheading{#1}{subsubsec}{Yomitfromtoc}{} + \suppressfirstparagraphindent} % These macros generate a chapter, section, etc. heading only % (including whitespace, linebreaking, etc. around it), @@ -4001,7 +4103,7 @@ width0pt\relax} \fi \global\let\pagealignmacro=\chappager \global\def\HEADINGSon{\HEADINGSsingle}} -\def\CHAPPAGodd{ +\def\CHAPPAGodd{% \global\let\contentsalignmacro = \chapoddpage \global\let\pchapsepmacro=\chapoddpage \global\let\pagealignmacro=\chapoddpage @@ -4009,30 +4111,79 @@ width0pt\relax} \fi \CHAPPAGon -\def\CHAPFplain{ +\def\CHAPFplain{% \global\let\chapmacro=\chfplain -\global\let\unnumbchapmacro=\unnchfplain \global\let\centerchapmacro=\centerchfplain} -% Plain chapter opening. -% #1 is the text, #2 the chapter number or empty if unnumbered. -\def\chfplain#1#2{% +% Normal chapter opening. +% +% #1 is the text, #2 is the section type (Ynumbered, Ynothing, +% Yappendix, Yomitfromtoc), #3 the chapter number. +% +% To test against our argument. +\def\Ynothingkeyword{Ynothing} +\def\Yomitfromtockeyword{Yomitfromtoc} +\def\Yappendixkeyword{Yappendix} +% +\def\chfplain#1#2#3{% \pchapsepmacro {% \chapfonts \rm - \def\chapnum{#2}% - \setbox0 = \hbox{#2\ifx\chapnum\empty\else\enspace\fi}% + % + % Have to define \thissection before calling \donoderef, because the + % xref code eventually uses it. On the other hand, it has to be called + % after \pchapsepmacro, or the headline will change too soon. + \gdef\thissection{#1}% + \gdef\thischaptername{#1}% + % + % Only insert the separating space if we have a chapter/appendix + % number, and don't print the unnumbered ``number''. + \def\temptype{#2}% + \ifx\temptype\Ynothingkeyword + \setbox0 = \hbox{}% + \def\toctype{unnchap}% + \def\thischapter{#1}% + \else\ifx\temptype\Yomitfromtockeyword + \setbox0 = \hbox{}% contents like unnumbered, but no toc entry + \def\toctype{omit}% + \xdef\thischapter{}% + \else\ifx\temptype\Yappendixkeyword + \setbox0 = \hbox{\putwordAppendix{} #3\enspace}% + \def\toctype{app}% + % We don't substitute the actual chapter name into \thischapter + % because we don't want its macros evaluated now. And we don't + % use \thissection because that changes with each section. + % + \xdef\thischapter{\putwordAppendix{} \appendixletter: + \noexpand\thischaptername}% + \else + \setbox0 = \hbox{#3\enspace}% + \def\toctype{numchap}% + \xdef\thischapter{\putwordChapter{} \the\chapno: + \noexpand\thischaptername}% + \fi\fi\fi + % + % Write the toc entry for this chapter. Must come before the + % \donoderef, because we include the current node name in the toc + % entry, and \donoderef resets it to empty. + \writetocentry{\toctype}{#1}{#3}% + % + % For pdftex, we have to write out the node definition (aka, make + % the pdfdest) after any page break, but before the actual text has + % been typeset. If the destination for the pdf outline is after the + % text, then jumping from the outline may wind up with the text not + % being visible, for instance under high magnification. + \donoderef{#2}% + % + % Typeset the actual heading. \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright - \hangindent = \wd0 \centerparametersmaybe + \hangindent=\wd0 \centerparametersmaybe \unhbox0 #1\par}% }% \nobreak\bigskip % no page break after a chapter title \nobreak } -% Plain opening for unnumbered. -\def\unnchfplain#1{\chfplain{#1}{}} - % @centerchap -- centered and unnumbered. \let\centerparametersmaybe = \relax \def\centerchfplain#1{{% @@ -4041,11 +4192,14 @@ width0pt\relax} \fi \leftskip = \rightskip \parfillskip = 0pt }% - \chfplain{#1}{}% + \chfplain{#1}{Ynothing}{}% }} \CHAPFplain % The default +% I don't think this chapter style is supported any more, so I'm not +% updating it with the new noderef stuff. We'll see. --karl, 11aug03. +% \def\unnchfopen #1{% \chapoddpage {\chapfonts \vbox{\hyphenpenalty=10000\tolerance=5000 \parindent=0pt\raggedright @@ -4063,61 +4217,95 @@ width0pt\relax} \fi \hfill {\rm #1}\hfill}}\bigskip \par\nobreak } -\def\CHAPFopen{ +\def\CHAPFopen{% \global\let\chapmacro=\chfopen -\global\let\unnumbchapmacro=\unnchfopen \global\let\centerchapmacro=\centerchfopen} -% Section titles. +% Section titles. These macros combine the section number parts and +% call the generic \sectionheading to do the printing. +% \newskip\secheadingskip -\def\secheadingbreak{\dobreak \secheadingskip {-1000}} -\def\secheading#1#2#3{\sectionheading{sec}{#2.#3}{#1}} -\def\plainsecheading#1{\sectionheading{sec}{}{#1}} +\def\secheadingbreak{\dobreak \secheadingskip{-1000}} % Subsection titles. -\newskip \subsecheadingskip -\def\subsecheadingbreak{\dobreak \subsecheadingskip {-500}} -\def\subsecheading#1#2#3#4{\sectionheading{subsec}{#2.#3.#4}{#1}} -\def\plainsubsecheading#1{\sectionheading{subsec}{}{#1}} +\newskip\subsecheadingskip +\def\subsecheadingbreak{\dobreak \subsecheadingskip{-500}} % Subsubsection titles. -\let\subsubsecheadingskip = \subsecheadingskip -\let\subsubsecheadingbreak = \subsecheadingbreak -\def\subsubsecheading#1#2#3#4#5{\sectionheading{subsubsec}{#2.#3.#4.#5}{#1}} -\def\plainsubsubsecheading#1{\sectionheading{subsubsec}{}{#1}} +\def\subsubsecheadingskip{\subsecheadingskip} +\def\subsubsecheadingbreak{\subsecheadingbreak} -% Print any size section title. -% -% #1 is the section type (sec/subsec/subsubsec), #2 is the section -% number (maybe empty), #3 the text. -\def\sectionheading#1#2#3{% - {% - \expandafter\advance\csname #1headingskip\endcsname by \parskip - \csname #1headingbreak\endcsname - }% +% Print any size, any type, section title. +% +% #1 is the text, #2 is the section level (sec/subsec/subsubsec), #3 is +% the section type for xrefs (Ynumbered, Ynothing, Yappendix), #4 is the +% section number. +% +\def\sectionheading#1#2#3#4{% {% % Switch to the right set of fonts. - \csname #1fonts\endcsname \rm + \csname #2fonts\endcsname \rm % - % Only insert the separating space if we have a section number. - \def\secnum{#2}% - \setbox0 = \hbox{#2\ifx\secnum\empty\else\enspace\fi}% + % Insert space above the heading. + \csname #2headingbreak\endcsname % + % Only insert the space after the number if we have a section number. + \def\sectionlevel{#2}% + \def\temptype{#3}% + % + \ifx\temptype\Ynothingkeyword + \setbox0 = \hbox{}% + \def\toctype{unn}% + \gdef\thissection{#1}% + \else\ifx\temptype\Yomitfromtockeyword + % for @headings -- no section number, don't include in toc, + % and don't redefine \thissection. + \setbox0 = \hbox{}% + \def\toctype{omit}% + \let\sectionlevel=\empty + \else\ifx\temptype\Yappendixkeyword + \setbox0 = \hbox{#4\enspace}% + \def\toctype{app}% + \gdef\thissection{#1}% + \else + \setbox0 = \hbox{#4\enspace}% + \def\toctype{num}% + \gdef\thissection{#1}% + \fi\fi\fi + % + % Write the toc entry (before \donoderef). See comments in \chfplain. + \writetocentry{\toctype\sectionlevel}{#1}{#4}% + % + % Write the node reference (= pdf destination for pdftex). + % Again, see comments in \chfplain. + \donoderef{#3}% + % + % Output the actual section heading. \vbox{\hyphenpenalty=10000 \tolerance=5000 \parindent=0pt \raggedright - \hangindent = \wd0 % zero if no section number - \unhbox0 #3}% + \hangindent=\wd0 % zero if no section number + \unhbox0 #1}% }% - % Add extra space after the heading -- either a line space or a - % paragraph space, whichever is more. (Some people like to set - % \parskip to large values for some reason.) Don't allow stretch, though. + % Add extra space after the heading -- half of whatever came above it. + % Don't allow stretch, though. + \kern .5 \csname #2headingskip\endcsname + % + % Do not let the kern be a potential breakpoint, as it would be if it + % was followed by glue. \nobreak - \ifdim\parskip>\normalbaselineskip - \kern\parskip - \else - \kern\normalbaselineskip - \fi + % + % We'll almost certainly start a paragraph next, so don't let that + % glue accumulate. (Not a breakpoint because it's preceded by a + % discardable item.) + \vskip-\parskip + % + % This \nobreak is purely so the last item on the list is a \penalty + % of 10000. This is so other code, for instance \parsebodycommon, can + % check for and avoid allowing breakpoints. Otherwise, it would + % insert a valid breakpoint between: + % @section sec-whatever + % @deffn def-whatever \nobreak } @@ -4127,119 +4315,152 @@ width0pt\relax} \fi \newwrite\tocfile % Write an entry to the toc file, opening it if necessary. -% Called from @chapter, etc. We supply {\folio} at the end of the -% argument, which will end up as the last argument to the \...entry macro. -% -% Usage: \writetocentry{chap}{The Name of The Game}{{\the\chapno}} +% Called from @chapter, etc. +% +% Example usage: \writetocentry{sec}{Section Name}{\the\chapno.\the\secno} +% We append the current node name (if any) and page number as additional +% arguments for the \{chap,sec,...}entry macros which will eventually +% read this. The node name is used in the pdf outlines as the +% destination to jump to. +% % We open the .toc file for writing here instead of at @setfilename (or % any other fixed time) so that @contents can be anywhere in the document. +% But if #1 is `omit', then we don't do anything. This is used for the +% table of contents chapter openings themselves. % \newif\iftocfileopened +\def\omitkeyword{omit}% +% \def\writetocentry#1#2#3{% - \iftocfileopened\else - \immediate\openout\tocfile = \jobname.toc - \global\tocfileopenedtrue - \fi - % - \iflinks - \toks0 = {#2}% - \edef\temp{\write\tocfile{\realbackslash #1entry{\the\toks0}#3{\folio}}}% - \temp + \edef\writetoctype{#1}% + \ifx\writetoctype\omitkeyword \else + \iftocfileopened\else + \immediate\openout\tocfile = \jobname.toc + \global\tocfileopenedtrue + \fi + % + \iflinks + \toks0 = {#2}% + \toks2 = \expandafter{\lastnode}% + \edef\temp{\write\tocfile{\realbackslash #1entry{\the\toks0}{#3}% + {\the\toks2}{\noexpand\folio}}}% + \temp + \fi \fi % - % Tell \shipout to create a page destination if we're doing pdf, which - % will be the target of the links in the table of contents. We can't - % just do it on every page because the title pages are numbered 1 and - % 2 (the page numbers aren't printed), and so are the first two pages - % of the document. Thus, we'd have two destinations named `1', and - % two named `2'. - \ifpdf \pdfmakepagedesttrue \fi + % Tell \shipout to create a pdf destination on each page, if we're + % writing pdf. These are used in the table of contents. We can't + % just write one on every page because the title pages are numbered + % 1 and 2 (the page numbers aren't printed), and so are the first + % two pages of the document. Thus, we'd have two destinations named + % `1', and two named `2'. + \ifpdf \global\pdfmakepagedesttrue \fi } \newskip\contentsrightmargin \contentsrightmargin=1in \newcount\savepageno \newcount\lastnegativepageno \lastnegativepageno = -1 -% Finish up the main text and prepare to read what we've written -% to \tocfile. +% Prepare to read what we've written to \tocfile. % \def\startcontents#1{% - % If @setchapternewpage on, and @headings double, the contents should - % start on an odd page, unlike chapters. Thus, we maintain - % \contentsalignmacro in parallel with \pagealignmacro. - % From: Torbjorn Granlund - \contentsalignmacro - \immediate\closeout\tocfile - % - % Don't need to put `Contents' or `Short Contents' in the headline. - % It is abundantly clear what they are. - \unnumbchapmacro{#1}\def\thischapter{}% - \savepageno = \pageno - \begingroup % Set up to handle contents files properly. - \catcode`\\=0 \catcode`\{=1 \catcode`\}=2 \catcode`\@=11 - % We can't do this, because then an actual ^ in a section - % title fails, e.g., @chapter ^ -- exponentiation. --karl, 9jul97. - %\catcode`\^=7 % to see ^^e4 as \"a etc. juha@piuha.ydi.vtt.fi - \raggedbottom % Worry more about breakpoints than the bottom. - \advance\hsize by -\contentsrightmargin % Don't use the full line length. - % - % Roman numerals for page numbers. - \ifnum \pageno>0 \global\pageno = \lastnegativepageno \fi + % If @setchapternewpage on, and @headings double, the contents should + % start on an odd page, unlike chapters. Thus, we maintain + % \contentsalignmacro in parallel with \pagealignmacro. + % From: Torbjorn Granlund + \contentsalignmacro + \immediate\closeout\tocfile + % + % Don't need to put `Contents' or `Short Contents' in the headline. + % It is abundantly clear what they are. + \def\thischapter{}% + \chapmacro{#1}{Yomitfromtoc}{}% + % + \savepageno = \pageno + \begingroup % Set up to handle contents files properly. + \catcode`\\=0 \catcode`\{=1 \catcode`\}=2 \catcode`\@=11 + % We can't do this, because then an actual ^ in a section + % title fails, e.g., @chapter ^ -- exponentiation. --karl, 9jul97. + %\catcode`\^=7 % to see ^^e4 as \"a etc. juha@piuha.ydi.vtt.fi + \raggedbottom % Worry more about breakpoints than the bottom. + \advance\hsize by -\contentsrightmargin % Don't use the full line length. + % + % Roman numerals for page numbers. + \ifnum \pageno>0 \global\pageno = \lastnegativepageno \fi } % Normal (long) toc. \def\contents{% - \startcontents{\putwordTOC}% - \openin 1 \jobname.toc - \ifeof 1 \else - \closein 1 - \input \jobname.toc - \fi - \vfill \eject - \contentsalignmacro % in case @setchapternewpage odd is in effect - \pdfmakeoutlines - \endgroup - \lastnegativepageno = \pageno - \global\pageno = \savepageno + \startcontents{\putwordTOC}% + \openin 1 \jobname.toc + \ifeof 1 \else + \input \jobname.toc + \fi + \vfill \eject + \contentsalignmacro % in case @setchapternewpage odd is in effect + \ifeof 1 \else + \pdfmakeoutlines + \fi + \closein 1 + \endgroup + \lastnegativepageno = \pageno + \global\pageno = \savepageno } % And just the chapters. \def\summarycontents{% - \startcontents{\putwordShortTOC}% - % - \let\chapentry = \shortchapentry - \let\appendixentry = \shortappendixentry - \let\unnumbchapentry = \shortunnumberedentry - % We want a true roman here for the page numbers. - \secfonts - \let\rm=\shortcontrm \let\bf=\shortcontbf - \let\sl=\shortcontsl \let\tt=\shortconttt - \rm - \hyphenpenalty = 10000 - \advance\baselineskip by 1pt % Open it up a little. - \def\secentry ##1##2##3##4{} - \def\subsecentry ##1##2##3##4##5{} - \def\subsubsecentry ##1##2##3##4##5##6{} - \let\unnumbsecentry = \secentry - \let\unnumbsubsecentry = \subsecentry - \let\unnumbsubsubsecentry = \subsubsecentry - \openin 1 \jobname.toc - \ifeof 1 \else - \closein 1 - \input \jobname.toc - \fi - \vfill \eject - \contentsalignmacro % in case @setchapternewpage odd is in effect - \endgroup - \lastnegativepageno = \pageno - \global\pageno = \savepageno + \startcontents{\putwordShortTOC}% + % + \let\numchapentry = \shortchapentry + \let\appentry = \shortchapentry + \let\unnchapentry = \shortunnchapentry + % We want a true roman here for the page numbers. + \secfonts + \let\rm=\shortcontrm \let\bf=\shortcontbf + \let\sl=\shortcontsl \let\tt=\shortconttt + \rm + \hyphenpenalty = 10000 + \advance\baselineskip by 1pt % Open it up a little. + \def\numsecentry##1##2##3##4{} + \let\appsecentry = \numsecentry + \let\unnsecentry = \numsecentry + \let\numsubsecentry = \numsecentry + \let\appsubsecentry = \numsecentry + \let\unnsubsecentry = \numsecentry + \let\numsubsubsecentry = \numsecentry + \let\appsubsubsecentry = \numsecentry + \let\unnsubsubsecentry = \numsecentry + \openin 1 \jobname.toc + \ifeof 1 \else + \input \jobname.toc + \fi + \closein 1 + \vfill \eject + \contentsalignmacro % in case @setchapternewpage odd is in effect + \endgroup + \lastnegativepageno = \pageno + \global\pageno = \savepageno } \let\shortcontents = \summarycontents -\ifpdf - \pdfcatalog{/PageMode /UseOutlines}% -\fi +% Typeset the label for a chapter or appendix for the short contents. +% The arg is, e.g., `A' for an appendix, or `3' for a chapter. +% +\def\shortchaplabel#1{% + % This space should be enough, since a single number is .5em, and the + % widest letter (M) is 1em, at least in the Computer Modern fonts. + % But use \hss just in case. + % (This space doesn't include the extra space that gets added after + % the label; that gets put in by \shortchapentry above.) + % + % We'd like to right-justify chapter numbers, but that looks strange + % with appendix letters. And right-justifying numbers and + % left-justifying letters looks strange when there is less than 10 + % chapters. Have to read the whole toc once to know how many chapters + % there are before deciding ... + \hbox to 1em{#1\hss}% +} % These macros generate individual entries in the table of contents. % The first argument is the chapter or section name. @@ -4247,58 +4468,46 @@ width0pt\relax} \fi % The arguments in between are the chapter number, section number, ... % Chapters, in the main contents. -\def\chapentry#1#2#3{\dochapentry{#2\labelspace#1}{#3}} +\def\numchapentry#1#2#3#4{\dochapentry{#2\labelspace#1}{#4}} % % Chapters, in the short toc. % See comments in \dochapentry re vbox and related settings. -\def\shortchapentry#1#2#3{% - \tocentry{\shortchaplabel{#2}\labelspace #1}{\doshortpageno\bgroup#3\egroup}% +\def\shortchapentry#1#2#3#4{% + \tocentry{\shortchaplabel{#2}\labelspace #1}{\doshortpageno\bgroup#4\egroup}% } % Appendices, in the main contents. -\def\appendixentry#1#2#3{% - \dochapentry{\appendixbox{\putwordAppendix{} #2}\labelspace#1}{#3}} +% Need the word Appendix, and a fixed-size box. +% +\def\appendixbox#1{% + % We use M since it's probably the widest letter. + \setbox0 = \hbox{\putwordAppendix{} M}% + \hbox to \wd0{\putwordAppendix{} #1\hss}} % -% Appendices, in the short toc. -\let\shortappendixentry = \shortchapentry - -% Typeset the label for a chapter or appendix for the short contents. -% The arg is, e.g., `Appendix A' for an appendix, or `3' for a chapter. -% We could simplify the code here by writing out an \appendixentry -% command in the toc file for appendices, instead of using \chapentry -% for both, but it doesn't seem worth it. -% -\newdimen\shortappendixwidth -% -\def\shortchaplabel#1{% - % This space should be enough, since a single number is .5em, and the - % widest letter (M) is 1em, at least in the Computer Modern fonts. - % But use \hss just in case. - % (This space doesn't include the extra space that gets added after - % the label; that gets put in by \shortchapentry above.) - \dimen0 = 1em - \hbox to \dimen0{#1\hss}% -} +\def\appentry#1#2#3#4{\dochapentry{\appendixbox{#2}\labelspace#1}{#4}} % Unnumbered chapters. -\def\unnumbchapentry#1#2#3{\dochapentry{#1}{#3}} -\def\shortunnumberedentry#1#2#3{\tocentry{#1}{\doshortpageno\bgroup#3\egroup}} +\def\unnchapentry#1#2#3#4{\dochapentry{#1}{#4}} +\def\shortunnchapentry#1#2#3#4{\tocentry{#1}{\doshortpageno\bgroup#4\egroup}} % Sections. -\def\secentry#1#2#3#4{\dosecentry{#2.#3\labelspace#1}{#4}} -\def\unnumbsecentry#1#2#3#4{\dosecentry{#1}{#4}} +\def\numsecentry#1#2#3#4{\dosecentry{#2\labelspace#1}{#4}} +\let\appsecentry=\numsecentry +\def\unnsecentry#1#2#3#4{\dosecentry{#1}{#4}} % Subsections. -\def\subsecentry#1#2#3#4#5{\dosubsecentry{#2.#3.#4\labelspace#1}{#5}} -\def\unnumbsubsecentry#1#2#3#4#5{\dosubsecentry{#1}{#5}} +\def\numsubsecentry#1#2#3#4{\dosubsecentry{#2\labelspace#1}{#4}} +\let\appsubsecentry=\numsubsecentry +\def\unnsubsecentry#1#2#3#4{\dosubsecentry{#1}{#4}} % And subsubsections. -\def\subsubsecentry#1#2#3#4#5#6{% - \dosubsubsecentry{#2.#3.#4.#5\labelspace#1}{#6}} -\def\unnumbsubsubsecentry#1#2#3#4#5#6{\dosubsubsecentry{#1}{#6}} +\def\numsubsubsecentry#1#2#3#4{\dosubsubsecentry{#2\labelspace#1}{#4}} +\let\appsubsubsecentry=\numsubsubsecentry +\def\unnsubsubsecentry#1#2#3#4{\dosubsubsecentry{#1}{#4}} % This parameter controls the indentation of the various levels. -\newdimen\tocindent \tocindent = 3pc +% Same as \defaultparindent. +\newdimen\tocindent \tocindent = 15pt % Now for the actual typesetting. In all these, #1 is the text and #2 is the % page number. @@ -4329,17 +4538,8 @@ width0pt\relax} \fi \tocentry{#1}{\dopageno\bgroup#2\egroup}% \endgroup} -% Final typesetting of a toc entry; we use the same \entry macro as for -% the index entries, but we want to suppress hyphenation here. (We -% can't do that in the \entry macro, since index entries might consist -% of hyphenated-identifiers-that-do-not-fit-on-a-line-and-nothing-else.) -\def\tocentry#1#2{\begingroup - \vskip 0pt plus1pt % allow a little stretch for the sake of nice page breaks - % Do not use \turnoffactive in these arguments. Since the toc is - % typeset in cmr, characters such as _ would come out wrong; we - % have to do the usual translation tricks. - \entry{#1}{#2}% -\endgroup} +% We use the same \entry macro as for the index entries. +\let\tocentry = \entry % Space between chapter (or whatever) number and the title. \def\labelspace{\hskip1em \relax} @@ -4349,15 +4549,15 @@ width0pt\relax} \fi \def\chapentryfonts{\secfonts \rm} \def\secentryfonts{\textfonts} -\let\subsecentryfonts = \textfonts -\let\subsubsecentryfonts = \textfonts +\def\subsecentryfonts{\textfonts} +\def\subsubsecentryfonts{\textfonts} \message{environments,} % @foo ... @end foo. % @point{}, @result{}, @expansion{}, @print{}, @equiv{}. -% +% % Since these characters are used in examples, it should be an even number of % \tt widths. Each \tt character is 1en, so two makes it 1em. % @@ -4369,7 +4569,7 @@ width0pt\relax} \fi % The @error{} command. % Adapted from the TeXbook's \boxit. -% +% \newbox\errorbox % {\tentt \global\dimen0 = 3em}% Width of the box. @@ -4377,10 +4577,10 @@ width0pt\relax} \fi % The text. (`r' is open on the right, `e' somewhat less so on the left.) \setbox0 = \hbox{\kern-.75pt \tensf error\kern-1.5pt} % -\global\setbox\errorbox=\hbox to \dimen0{\hfil +\setbox\errorbox=\hbox to \dimen0{\hfil \hsize = \dimen0 \advance\hsize by -5.8pt % Space to left+right. \advance\hsize by -2\dimen2 % Rules. - \vbox{ + \vbox{% \hrule height\dimen2 \hbox{\vrule width\dimen2 \kern3pt % Space to left of text. \vtop{\kern2.4pt \box0 \kern2.4pt}% Space above/below. @@ -4394,14 +4594,13 @@ width0pt\relax} \fi % One exception: @ is still an escape character, so that @end tex works. % But \@ or @@ will get a plain tex @ character. -\def\tex{\begingroup +\envdef\tex{% \catcode `\\=0 \catcode `\{=1 \catcode `\}=2 \catcode `\$=3 \catcode `\&=4 \catcode `\#=6 \catcode `\^=7 \catcode `\_=8 \catcode `\~=\active \let~=\tie \catcode `\%=14 \catcode `\+=\other \catcode `\"=\other - \catcode `\==\other \catcode `\|=\other \catcode `\<=\other \catcode `\>=\other @@ -4416,19 +4615,23 @@ width0pt\relax} \fi \let\equiv=\ptexequiv \let\!=\ptexexclam \let\i=\ptexi + \let\indent=\ptexindent + \let\noindent=\ptexnoindent \let\{=\ptexlbrace \let\+=\tabalign \let\}=\ptexrbrace + \let\/=\ptexslash \let\*=\ptexstar \let\t=\ptext % \def\endldots{\mathinner{\ldots\ldots\ldots\ldots}}% \def\enddots{\relax\ifmmode\endldots\else$\mathsurround=0pt \endldots\,$\fi}% \def\@{@}% -\let\Etex=\endgroup} +} +% There is no need to define \Etex. % Define @lisp ... @end lisp. -% @lisp does a \begingroup so it can rebind things, +% @lisp environment forms a group so it can rebind things, % including the definition of @end lisp (which normally is erroneous). % Amount to narrow the margins by for @lisp. @@ -4439,19 +4642,6 @@ width0pt\relax} \fi % have any width. \def\lisppar{\null\endgraf} -% Make each space character in the input produce a normal interword -% space in the output. Don't allow a line break at this space, as this -% is used only in environments like @example, where each line of input -% should produce a line of output anyway. -% -{\obeyspaces % -\gdef\sepspaces{\obeyspaces\let =\tie}} - -% Define \obeyedspace to be our active space, whatever it is. This is -% for use in \parsearg. -{\sepspaces% -\global\let\obeyedspace= } - % This space is always present above and below environments. \newskip\envskipamount \envskipamount = 0pt @@ -4469,7 +4659,7 @@ width0pt\relax} \fi \removelastskip % it's not a good place to break if the last penalty was \nobreak % or better ... - \ifnum\lastpenalty>10000 \else \penalty-50 \fi + \ifnum\lastpenalty<10000 \penalty-50 \fi \vskip\envskipamount \fi \fi @@ -4501,52 +4691,52 @@ width0pt\relax} \fi % \newskip\lskip\newskip\rskip -\def\cartouche{% -\par % can't be in the midst of a paragraph. -\begingroup - \lskip=\leftskip \rskip=\rightskip - \leftskip=0pt\rightskip=0pt %we want these *outside*. - \cartinner=\hsize \advance\cartinner by-\lskip - \advance\cartinner by-\rskip - \cartouter=\hsize - \advance\cartouter by 18.4pt % allow for 3pt kerns on either -% side, and for 6pt waste from -% each corner char, and rule thickness - \normbskip=\baselineskip \normpskip=\parskip \normlskip=\lineskip - % Flag to tell @lisp, etc., not to narrow margin. - \let\nonarrowing=\comment - \vbox\bgroup - \baselineskip=0pt\parskip=0pt\lineskip=0pt - \carttop - \hbox\bgroup - \hskip\lskip - \vrule\kern3pt - \vbox\bgroup - \hsize=\cartinner - \kern3pt - \begingroup - \baselineskip=\normbskip - \lineskip=\normlskip - \parskip=\normpskip - \vskip -\parskip +\envdef\cartouche{% + \ifhmode\par\fi % can't be in the midst of a paragraph. + \startsavinginserts + \lskip=\leftskip \rskip=\rightskip + \leftskip=0pt\rightskip=0pt % we want these *outside*. + \cartinner=\hsize \advance\cartinner by-\lskip + \advance\cartinner by-\rskip + \cartouter=\hsize + \advance\cartouter by 18.4pt % allow for 3pt kerns on either + % side, and for 6pt waste from + % each corner char, and rule thickness + \normbskip=\baselineskip \normpskip=\parskip \normlskip=\lineskip + % Flag to tell @lisp, etc., not to narrow margin. + \let\nonarrowing=\comment + \vbox\bgroup + \baselineskip=0pt\parskip=0pt\lineskip=0pt + \carttop + \hbox\bgroup + \hskip\lskip + \vrule\kern3pt + \vbox\bgroup + \kern3pt + \hsize=\cartinner + \baselineskip=\normbskip + \lineskip=\normlskip + \parskip=\normpskip + \vskip -\parskip + \comment % For explanation, see the end of \def\group. +} \def\Ecartouche{% - \endgroup - \kern3pt - \egroup - \kern3pt\vrule - \hskip\rskip - \egroup - \cartbot - \egroup -\endgroup -}} + \ifhmode\par\fi + \kern3pt + \egroup + \kern3pt\vrule + \hskip\rskip + \egroup + \cartbot + \egroup + \checkinserts +} % This macro is called at the beginning of all the @example variants, % inside a group. \def\nonfillstart{% \aboveenvbreak - \inENV % This group ends at the end of the body \hfuzz = 12pt % Don't be fussy \sepspaces % Make spaces be word-separators rather than space tokens. \let\par = \lisppar % don't ignore blank lines @@ -4559,103 +4749,99 @@ width0pt\relax} \fi \ifx\nonarrowing\relax \advance \leftskip by \lispnarrowing \exdentamount=\lispnarrowing - \let\exdent=\nofillexdent - \let\nonarrowing=\relax \fi + \let\exdent=\nofillexdent } -% Define the \E... control sequence only if we are inside the particular -% environment, so the error checking in \end will work. -% -% To end an @example-like environment, we first end the paragraph (via -% \afterenvbreak's vertical glue), and then the group. That way we keep -% the zero \parskip that the environments set -- \parskip glue will be -% inserted at the beginning of the next paragraph in the document, after -% the environment. +% If you want all examples etc. small: @set dispenvsize small. +% If you want even small examples the full size: @set dispenvsize nosmall. +% This affects the following displayed environments: +% @example, @display, @format, @lisp % -\def\nonfillfinish{\afterenvbreak\endgroup} +\def\smallword{small} +\def\nosmallword{nosmall} +\let\SETdispenvsize\relax +\def\setnormaldispenv{% + \ifx\SETdispenvsize\smallword + \smallexamplefonts \rm + \fi +} +\def\setsmalldispenv{% + \ifx\SETdispenvsize\nosmallword + \else + \smallexamplefonts \rm + \fi +} -% @lisp: indented, narrowed, typewriter font. -\def\lisp{\begingroup - \nonfillstart - \let\Elisp = \nonfillfinish - \tt - \let\kbdfont = \kbdexamplefont % Allow @kbd to do something special. - \gobble % eat return +% We often define two environments, @foo and @smallfoo. +% Let's do it by one command: +\def\makedispenv #1#2{ + \expandafter\envdef\csname#1\endcsname {\setnormaldispenv #2} + \expandafter\envdef\csname small#1\endcsname {\setsmalldispenv #2} + \expandafter\let\csname E#1\endcsname \afterenvbreak + \expandafter\let\csname Esmall#1\endcsname \afterenvbreak } -% @example: Same as @lisp. -\def\example{\begingroup \def\Eexample{\nonfillfinish\endgroup}\lisp} +% Define two synonyms: +\def\maketwodispenvs #1#2#3{ + \makedispenv{#1}{#3} + \makedispenv{#2}{#3} +} +% @lisp: indented, narrowed, typewriter font; @example: same as @lisp. +% % @smallexample and @smalllisp: use smaller fonts. % Originally contributed by Pavel@xerox. -\def\smalllisp{\begingroup - \def\Esmalllisp{\nonfillfinish\endgroup}% - \def\Esmallexample{\nonfillfinish\endgroup}% - \smallexamplefonts - \lisp +% +\maketwodispenvs {lisp}{example}{% + \nonfillstart + \tt + \let\kbdfont = \kbdexamplefont % Allow @kbd to do something special. + \gobble % eat return } -\let\smallexample = \smalllisp - -% @display: same as @lisp except keep current font. +% @display/@smalldisplay: same as @lisp except keep current font. % -\def\display{\begingroup +\makedispenv {display}{% \nonfillstart - \let\Edisplay = \nonfillfinish \gobble } -% -% @smalldisplay: @display plus smaller fonts. -% -\def\smalldisplay{\begingroup - \def\Esmalldisplay{\nonfillfinish\endgroup}% - \smallexamplefonts \rm - \display -} -% @format: same as @display except don't narrow margins. +% @format/@smallformat: same as @display except don't narrow margins. % -\def\format{\begingroup - \let\nonarrowing = t +\makedispenv{format}{% + \let\nonarrowing = t% \nonfillstart - \let\Eformat = \nonfillfinish \gobble } -% -% @smallformat: @format plus smaller fonts. -% -\def\smallformat{\begingroup - \def\Esmallformat{\nonfillfinish\endgroup}% - \smallexamplefonts \rm - \format -} -% @flushleft (same as @format). -% -\def\flushleft{\begingroup \def\Eflushleft{\nonfillfinish\endgroup}\format} +% @flushleft: same as @format, but doesn't obey \SETdispenvsize. +\envdef\flushleft{% + \let\nonarrowing = t% + \nonfillstart + \gobble +} +\let\Eflushleft = \afterenvbreak % @flushright. % -\def\flushright{\begingroup - \let\nonarrowing = t +\envdef\flushright{% + \let\nonarrowing = t% \nonfillstart - \let\Eflushright = \nonfillfinish \advance\leftskip by 0pt plus 1fill \gobble } +\let\Eflushright = \afterenvbreak % @quotation does normal linebreaking (hence we can't use \nonfillstart) -% and narrows the margins. +% and narrows the margins. We keep \parskip nonzero in general, since +% we're doing normal filling. So, when using \aboveenvbreak and +% \afterenvbreak, temporarily make \parskip 0. % -\def\quotation{% - \begingroup\inENV %This group ends at the end of the @quotation body +\envdef\quotation{% {\parskip=0pt \aboveenvbreak}% because \aboveenvbreak inserts \parskip \parindent=0pt - % We have retained a nonzero parskip for the environment, since we're - % doing normal filling. So to avoid extra space below the environment... - \def\Equotation{\parskip = 0pt \nonfillfinish}% % % @cartouche defines \nonarrowing to inhibit narrowing at next level down. \ifx\nonarrowing\relax @@ -4664,11 +4850,32 @@ width0pt\relax} \fi \exdentamount = \lispnarrowing \let\nonarrowing = \relax \fi + \parsearg\quotationlabel +} + +% We have retained a nonzero parskip for the environment, since we're +% doing normal filling. +% +\def\Equotation{% + \par + \ifx\quotationauthor\undefined\else + % indent a bit. + \leftline{\kern 2\leftskip \sl ---\quotationauthor}% + \fi + {\parskip=0pt \afterenvbreak}% +} + +% If we're given an argument, typeset it in bold with a colon after. +\def\quotationlabel#1{% + \def\temp{#1}% + \ifx\temp\empty \else + {\bf #1: }% + \fi } % LaTeX-like @verbatim...@end verbatim and @verb{...} -% If we want to allow any as delimiter, +% If we want to allow any as delimiter, % we need the curly braces so that makeinfo sees the @verb command, eg: % `@verbx...x' would look like the '@verbx' command. --janneke@gnu.org % @@ -4685,7 +4892,7 @@ width0pt\relax} \fi % % [Knuth] p. 380 \def\uncatcodespecials{% - \def\do##1{\catcode`##1=12}\dospecials} + \def\do##1{\catcode`##1=\other}\dospecials} % % [Knuth] pp. 380,381,391 % Disable Spanish ligatures ?` and !` of \tt font @@ -4733,6 +4940,8 @@ width0pt\relax} \fi } \endgroup \def\setupverbatim{% + \nonfillstart + \advance\leftskip by -\defbodyindent % Easiest (and conventionally used) font for verbatim \tt \def\par{\leavevmode\egroup\box0\endgraf}% @@ -4746,15 +4955,15 @@ width0pt\relax} \fi \everypar{\starttabbox}% } -% Do the @verb magic: verbatim text is quoted by unique -% delimiter characters. Before first delimiter expect a +% Do the @verb magic: verbatim text is quoted by unique +% delimiter characters. Before first delimiter expect a % right brace, after last delimiter expect closing brace: % % \def\doverb'{'#1'}'{#1} % % [Knuth] p. 382; only eat outer {} \begingroup - \catcode`[=1\catcode`]=2\catcode`\{=12\catcode`\}=12 + \catcode`[=1\catcode`]=2\catcode`\{=\other\catcode`\}=\other \gdef\doverb{#1[\def\next##1#1}[##1\endgroup]\next] \endgroup % @@ -4766,18 +4975,11 @@ width0pt\relax} \fi % % \def\doverbatim#1@end verbatim{#1} % -% For Texinfo it's a lot easier than for LaTeX, +% For Texinfo it's a lot easier than for LaTeX, % because texinfo's \verbatim doesn't stop at '\end{verbatim}': % we need not redefine '\', '{' and '}'. % % Inspired by LaTeX's verbatim command set [latex.ltx] -%% Include LaTeX hack for completeness -- never know -%% \begingroup -%% \catcode`|=0 \catcode`[=1 -%% \catcode`]=2\catcode`\{=12\catcode`\}=12\catcode`\ =\active -%% \catcode`\\=12|gdef|doverbatim#1@end verbatim[ -%% #1|endgroup|def|Everbatim[]|end[verbatim]] -%% |endgroup % \begingroup \catcode`\ =\active @@ -4785,62 +4987,41 @@ width0pt\relax} \fi % ignore everything up to the first ^^M, that's the newline at the end % of the @verbatim input line itself. Otherwise we get an extra blank % line in the output. - \gdef\doverbatim#1^^M#2@end verbatim{#2\end{verbatim}}% + \xdef\doverbatim#1^^M#2@end verbatim{#2\noexpand\end\gobble verbatim}% + % We really want {...\end verbatim} in the body of the macro, but + % without the active space; thus we have to use \xdef and \gobble. \endgroup % -\def\verbatim{% - \def\Everbatim{\nonfillfinish\endgroup}% - \begingroup - \nonfillstart - \advance\leftskip by -\defbodyindent - \begingroup\setupverbatim\doverbatim +\envdef\verbatim{% + \setupverbatim\doverbatim } +\let\Everbatim = \afterenvbreak + % @verbatiminclude FILE - insert text of file in verbatim environment. % -% Allow normal characters that we make active in the argument (a file name). -\def\verbatiminclude{% - \begingroup - \catcode`\\=\other - \catcode`~=\other - \catcode`^=\other - \catcode`_=\other - \catcode`|=\other - \catcode`<=\other - \catcode`>=\other - \catcode`+=\other - \parsearg\doverbatiminclude -} -\def\setupverbatiminclude{% - \begingroup - \nonfillstart - \advance\leftskip by -\defbodyindent - \begingroup\setupverbatim -} +\def\verbatiminclude{\parseargusing\filenamecatcodes\doverbatiminclude} % \def\doverbatiminclude#1{% - % Restore active chars for included file. - \endgroup - \begingroup - \let\value=\expandablevalue - \def\thisfile{#1}% - \expandafter\expandafter\setupverbatiminclude\input\thisfile - \endgroup - \nonfillfinish - \endgroup + {% + \makevalueexpandable + \setupverbatim + \input #1 + \afterenvbreak + }% } % @copying ... @end copying. % Save the text away for @insertcopying later. Many commands won't be % allowed in this context, but that's ok. -% +% % We save the uninterpreted tokens, rather than creating a box. % Saving the text in a box would be much easier, but then all the % typesetting commands (@smallbook, font changes, etc.) have to be done % beforehand -- and a) we want @copying to be done first in the source % file; b) letting users define the frontmatter in as flexible order as % possible is very desirable. -% +% \def\copying{\begingroup % Define a command to swallow text until we reach `@end copying'. % \ is the escape char in this texinfo.tex file, so it is the @@ -4863,15 +5044,15 @@ width0pt\relax} \fi % end-of-line to be a \par, as would happen with the normal active % definition of ^^M. On the third hand, two ^^M's in a row should still % generate a \par. -% +% % Our approach is to make ^^M insert a space and a penalty1 normally; % then it can also check if \lastpenalty=1. If it does, then manually % do \par. -% +% % This messes up the normal definitions of @c[omment], so we redefine % it. Similarly for @ignore. (These commands are used in the gcc % manual for man page generation.) -% +% % Seems pretty fragile, most line-oriented commands will presumably % fail, but for the limited use of getting the copying text (which % should be quite simple) inserted, we can hope it's ok. @@ -4902,580 +5083,335 @@ width0pt\relax} \fi \message{defuns,} % @defun etc. -% Allow user to change definition object font (\df) internally -\def\setdeffont#1 {\csname DEF#1\endcsname} - \newskip\defbodyindent \defbodyindent=.4in \newskip\defargsindent \defargsindent=50pt \newskip\deflastargmargin \deflastargmargin=18pt -\newcount\parencount - -% We want ()&[] to print specially on the defun line. -% -\def\activeparens{% - \catcode`\(=\active \catcode`\)=\active - \catcode`\&=\active - \catcode`\[=\active \catcode`\]=\active -} - -% Make control sequences which act like normal parenthesis chars. -\let\lparen = ( \let\rparen = ) - -{\activeparens % Now, smart parens don't turn on until &foo (see \amprm) - -% Be sure that we always have a definition for `(', etc. For example, -% if the fn name has parens in it, \boldbrax will not be in effect yet, -% so TeX would otherwise complain about undefined control sequence. -\global\let(=\lparen \global\let)=\rparen -\global\let[=\lbrack \global\let]=\rbrack - -\gdef\functionparens{\boldbrax\let&=\amprm\parencount=0 } -\gdef\boldbrax{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb} -% This is used to turn on special parens -% but make & act ordinary (given that it's active). -\gdef\boldbraxnoamp{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb\let&=\ampnr} - -% Definitions of (, ) and & used in args for functions. -% This is the definition of ( outside of all parentheses. -\gdef\oprm#1 {{\rm\char`\(}#1 \bf \let(=\opnested - \global\advance\parencount by 1 -} -% -% This is the definition of ( when already inside a level of parens. -\gdef\opnested{\char`\(\global\advance\parencount by 1 } -% -\gdef\clrm{% Print a paren in roman if it is taking us back to depth of 0. - % also in that case restore the outer-level definition of (. - \ifnum \parencount=1 {\rm \char `\)}\sl \let(=\oprm \else \char `\) \fi - \global\advance \parencount by -1 } -% If we encounter &foo, then turn on ()-hacking afterwards -\gdef\amprm#1 {{\rm\}\let(=\oprm \let)=\clrm\ } -% -\gdef\normalparens{\boldbrax\let&=\ampnr} -} % End of definition inside \activeparens -%% These parens (in \boldbrax) actually are a little bolder than the -%% contained text. This is especially needed for [ and ] -\def\opnr{{\sf\char`\(}\global\advance\parencount by 1 } -\def\clnr{{\sf\char`\)}\global\advance\parencount by -1 } -\let\ampnr = \& -\def\lbrb{{\bf\char`\[}} -\def\rbrb{{\bf\char`\]}} - -% Active &'s sneak into the index arguments, so make sure it's defined. -{ - \catcode`& = \active - \global\let& = \ampnr -} - -% \defname, which formats the name of the @def (not the args). -% #1 is the function name. -% #2 is the type of definition, such as "Function". -% -\def\defname#1#2{% - % How we'll output the type name. Putting it in brackets helps - % distinguish it from the body text that may end up on the next line - % just below it. - \ifempty{#2}% - \def\defnametype{}% +% Start the processing of @deffn: +\def\startdefun{% + \ifnum\lastpenalty<10000 + \medbreak \else - \def\defnametype{[\rm #2]}% + % If there are two @def commands in a row, we'll have a \nobreak, + % which is there to keep the function description together with its + % header. But if there's nothing but headers, we need to allow a + % break somewhere. Check for penalty 10002 (inserted by + % \defargscommonending) instead of 10000, since the sectioning + % commands insert a \penalty10000, and we don't want to allow a break + % between a section heading and a defun. + \ifnum\lastpenalty=10002 \penalty2000 \fi + % + % Similarly, after a section heading, do not allow a break. + % But do insert the glue. + \medskip % preceded by discardable penalty, so not a breakpoint \fi % - % Get the values of \leftskip and \rightskip as they were outside the @def... - \dimen2=\leftskip - \advance\dimen2 by -\defbodyindent - % - % Figure out values for the paragraph shape. - \setbox0=\hbox{\hskip \deflastargmargin{\defnametype}}% - \dimen0=\hsize \advance \dimen0 by -\wd0 % compute size for first line - \dimen1=\hsize \advance \dimen1 by -\defargsindent % size for continuations - \parshape 2 0in \dimen0 \defargsindent \dimen1 - % - % Output arg 2 ("Function" or some such) but stuck inside a box of - % width 0 so it does not interfere with linebreaking. - \noindent - % - {% Adjust \hsize to exclude the ambient margins, - % so that \rightline will obey them. - \advance \hsize by -\dimen2 - \dimen3 = 0pt % was -1.25pc - \rlap{\rightline{\defnametype\kern\dimen3}}% - }% - % - % Allow all lines to be underfull without complaint: - \tolerance=10000 \hbadness=10000 - \advance\leftskip by -\defbodyindent - \exdentamount=\defbodyindent - {\df #1}\enskip % output function name - % \defunargs will be called next to output the arguments, if any. -} - -% Common pieces to start any @def... -% #1 is the \E... control sequence to end the definition (which we define). -% #2 is the \...x control sequence (which our caller defines). -% #3 is the control sequence to process the header, such as \defunheader. -% -\def\parsebodycommon#1#2#3{% - \begingroup\inENV - % If there are two @def commands in a row, we'll have a \nobreak, - % which is there to keep the function description together with its - % header. But if there's nothing but headers, we want to allow a - % break after all. Check for penalty 10002 (inserted by - % \defargscommonending) instead of 10000, since the sectioning - % commands insert a \penalty10000, and we don't want to allow a break - % between a section heading and a defun. - \ifnum\lastpenalty=10002 \penalty0 \fi - \medbreak - % - % Define the \E... end token that this defining construct specifies - % so that it will exit this group. - \def#1{\endgraf\endgroup\medbreak}% - % \parindent=0in \advance\leftskip by \defbodyindent \exdentamount=\defbodyindent } -% Common part of the \...x definitions. -% -\def\defxbodycommon{% - % As with \parsebodycommon above, allow line break if we have multiple - % x headers in a row. It's not a great place, though. - \ifnum\lastpenalty=10000 \penalty1000 \fi +\def\dodefunx#1{% + % First, check whether we are in the right environment: + \checkenv#1% % - \begingroup\obeylines -} - -% Process body of @defun, @deffn, @defmac, etc. -% -\def\defparsebody#1#2#3{% - \parsebodycommon{#1}{#2}{#3}% - \def#2{\defxbodycommon \activeparens \spacesplit#3}% - \catcode\equalChar=\active - \begingroup\obeylines\activeparens - \spacesplit#3% -} - -% #1, #2, #3 are the common arguments (see \parsebodycommon above). -% #4, delimited by the space, is the class name. -% -\def\defmethparsebody#1#2#3#4 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 {\defxbodycommon \activeparens \spacesplit{#3{##1}}}% - \begingroup\obeylines\activeparens - % The \empty here prevents misinterpretation of a construct such as - % @deffn {whatever} {Enharmonic comma} - % See comments at \deftpparsebody, although in our case we don't have - % to remove the \empty afterwards, since it is empty. - \spacesplit{#3{#4}}\empty + % As above, allow line break if we have multiple x headers in a row. + % It's not a great place, though. + \ifnum\lastpenalty=10002 \penalty3000 \fi + % + % And now, it's time to reuse the body of the original defun: + \expandafter\gobbledefun#1% } +\def\gobbledefun#1\startdefun{} -% Used for @deftypemethod and @deftypeivar. -% #1, #2, #3 are the common arguments (see \defparsebody). -% #4, delimited by a space, is the class name. -% #5 is the method's return type. +% \printdefunline \deffnheader{text} % -\def\deftypemethparsebody#1#2#3#4 #5 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 ##2 {\defxbodycommon \activeparens \spacesplit{#3{##1}{##2}}}% - \begingroup\obeylines\activeparens - \spacesplit{#3{#4}{#5}}% -} - -% Used for @deftypeop. The change from \deftypemethparsebody is an -% extra argument at the beginning which is the `category', instead of it -% being the hardwired string `Method' or `Instance Variable'. We have -% to account for this both in the \...x definition and in parsing the -% input at hand. Thus also need a control sequence (passed as #5) for -% the \E... definition to assign the category name to. -% -\def\deftypeopparsebody#1#2#3#4#5 #6 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 ##2 ##3 {\def#4{##1}% - \defxbodycommon \activeparens \spacesplit{#3{##2}{##3}}}% - \begingroup\obeylines\activeparens - \spacesplit{#3{#5}{#6}}% +\def\printdefunline#1#2{% + \begingroup + % call \deffnheader: + #1#2 \endheader + % common ending: + \interlinepenalty = 10000 + \advance\rightskip by 0pt plus 1fil + \endgraf + \nobreak\vskip -\parskip + \penalty 10002 % signal to \startdefun and \dodefunx + % Some of the @defun-type tags do not enable magic parentheses, + % rendering the following check redundant. But we don't optimize. + \checkparencounts + \endgroup } -% For @defop. -\def\defopparsebody #1#2#3#4#5 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 ##2 {\def#4{##1}% - \defxbodycommon \activeparens \spacesplit{#3{##2}}}% - \begingroup\obeylines\activeparens - \spacesplit{#3{#5}}% -} +\def\Edefun{\endgraf\medbreak} -% These parsing functions are similar to the preceding ones -% except that they do not make parens into active characters. -% These are used for "variables" since they have no arguments. +% \makedefun{deffn} creates \deffn, \deffnx and \Edeffn; +% the only thing remainnig is to define \deffnheader. % -\def\defvarparsebody #1#2#3{% - \parsebodycommon{#1}{#2}{#3}% - \def#2{\defxbodycommon \spacesplit#3}% - \catcode\equalChar=\active - \begingroup\obeylines - \spacesplit#3% -} - -% @defopvar. -\def\defopvarparsebody #1#2#3#4#5 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 ##2 {\def#4{##1}% - \defxbodycommon \spacesplit{#3{##2}}}% - \begingroup\obeylines - \spacesplit{#3{#5}}% -} - -\def\defvrparsebody#1#2#3#4 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 {\defxbodycommon \spacesplit{#3{##1}}}% - \begingroup\obeylines - \spacesplit{#3{#4}}% +\def\makedefun#1{% + \expandafter\let\csname E#1\endcsname = \Edefun + \edef\temp{\noexpand\domakedefun + \makecsname{#1}\makecsname{#1x}\makecsname{#1header}}% + \temp } -% This loses on `@deftp {Data Type} {struct termios}' -- it thinks the -% type is just `struct', because we lose the braces in `{struct -% termios}' when \spacesplit reads its undelimited argument. Sigh. -% \let\deftpparsebody=\defvrparsebody +% \domakedefun \deffn \deffnx \deffnheader % -% So, to get around this, we put \empty in with the type name. That -% way, TeX won't find exactly `{...}' as an undelimited argument, and -% won't strip off the braces. +% Define \deffn and \deffnx, without parameters. +% \deffnheader has to be defined explicitly. % -\def\deftpparsebody #1#2#3#4 {% - \parsebodycommon{#1}{#2}{#3}% - \def#2##1 {\defxbodycommon \spacesplit{#3{##1}}}% - \begingroup\obeylines - \spacesplit{\parsetpheaderline{#3{#4}}}\empty +\def\domakedefun#1#2#3{% + \envdef#1{% + \startdefun + \parseargusing\activeparens{\printdefunline#3}% + }% + \def#2{\dodefunx#1}% + \def#3% } -% Fine, but then we have to eventually remove the \empty *and* the -% braces (if any). That's what this does. -% -\def\removeemptybraces\empty#1\relax{#1} +%%% Untyped functions: -% After \spacesplit has done its work, this is called -- #1 is the final -% thing to call, #2 the type name (which starts with \empty), and #3 -% (which might be empty) the arguments. -% -\def\parsetpheaderline#1#2#3{% - #1{\removeemptybraces#2\relax}{#3}% -}% +% @deffn category name args +\makedefun{deffn}{\deffngeneral{}} -% Split up #2 (the rest of the input line) at the first space token. -% call #1 with two arguments: -% the first is all of #2 before the space token, -% the second is all of #2 after that space token. -% If #2 contains no space token, all of it is passed as the first arg -% and the second is passed as empty. -% -{\obeylines % - \gdef\spacesplit#1#2^^M{\endgroup\spacesplitx{#1}#2 \relax\spacesplitx}% - \long\gdef\spacesplitx#1#2 #3#4\spacesplitx{% - \ifx\relax #3% - #1{#2}{}% - \else % - #1{#2}{#3#4}% - \fi}% -} +% @deffn category class name args +\makedefun{defop}#1 {\defopon{#1\ \putwordon}} -% Define @defun. +% \defopon {category on}class name args +\def\defopon#1#2 {\deffngeneral{\putwordon\ \code{#2}}{#1\ \code{#2}} } -% This is called to end the arguments processing for all the @def... commands. +% \deffngeneral {subind}category name args % -\def\defargscommonending{% - \interlinepenalty = 10000 - \advance\rightskip by 0pt plus 1fil - \endgraf - \nobreak\vskip -\parskip - \penalty 10002 % signal to \parsebodycommon. -} - -% This expands the args and terminates the paragraph they comprise. -% -\def\defunargs#1{\functionparens \sl -% Expand, preventing hyphenation at `-' chars. -% Note that groups don't affect changes in \hyphenchar. -% Set the font temporarily and use \font in case \setfont made \tensl a macro. -{\tensl\hyphenchar\font=0}% -#1% -{\tensl\hyphenchar\font=45}% -\ifnum\parencount=0 \else \errmessage{Unbalanced parentheses in @def}\fi% - \defargscommonending -} - -\def\deftypefunargs #1{% -% Expand, preventing hyphenation at `-' chars. -% Note that groups don't affect changes in \hyphenchar. -% Use \boldbraxnoamp, not \functionparens, so that & is not special. -\boldbraxnoamp -\tclose{#1}% avoid \code because of side effects on active chars - \defargscommonending -} - -% Do complete processing of one @defun or @defunx line already parsed. - -% @deffn Command forward-char nchars - -\def\deffn{\defmethparsebody\Edeffn\deffnx\deffnheader} - -\def\deffnheader #1#2#3{\doind {fn}{\code{#2}}% -\begingroup\defname {#2}{#1}\defunargs{#3}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody +\def\deffngeneral#1#2 #3 #4\endheader{% + % Remember that \dosubind{fn}{foo}{} is equivalent to \doind{fn}{foo}. + \dosubind{fn}{\code{#3}}{#1}% + \defname{#2}{}{#3}\magicamp\defunargs{#4\unskip}% } -% @defun == @deffn Function - -\def\defun{\defparsebody\Edefun\defunx\defunheader} +%%% Typed functions: -\def\defunheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index -\begingroup\defname {#1}{\putwordDeffunc}% -\defunargs {#2}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody -} +% @deftypefn category type name args +\makedefun{deftypefn}{\deftypefngeneral{}} -% @deftypefun int foobar (int @var{foo}, float @var{bar}) +% @deftypeop category class type name args +\makedefun{deftypeop}#1 {\deftypeopon{#1\ \putwordon}} -\def\deftypefun{\defparsebody\Edeftypefun\deftypefunx\deftypefunheader} +% \deftypeopon {category on}class type name args +\def\deftypeopon#1#2 {\deftypefngeneral{\putwordon\ \code{#2}}{#1\ \code{#2}} } -% #1 is the data type. #2 is the name and args. -\def\deftypefunheader #1#2{\deftypefunheaderx{#1}#2 \relax} -% #1 is the data type, #2 the name, #3 the args. -\def\deftypefunheaderx #1#2 #3\relax{% -\doind {fn}{\code{#2}}% Make entry in function index -\begingroup\defname {\defheaderxcond#1\relax$.$#2}{\putwordDeftypefun}% -\deftypefunargs {#3}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody +% \deftypefngeneral {subind}category type name args +% +\def\deftypefngeneral#1#2 #3 #4 #5\endheader{% + \dosubind{fn}{\code{#4}}{#1}% + \defname{#2}{#3}{#4}\defunargs{#5\unskip}% } -% @deftypefn {Library Function} int foobar (int @var{foo}, float @var{bar}) +%%% Typed variables: -\def\deftypefn{\defmethparsebody\Edeftypefn\deftypefnx\deftypefnheader} +% @deftypevr category type var args +\makedefun{deftypevr}{\deftypecvgeneral{}} -% \defheaderxcond#1\relax$.$ -% puts #1 in @code, followed by a space, but does nothing if #1 is null. -\def\defheaderxcond#1#2$.${\ifx#1\relax\else\code{#1#2} \fi} - -% #1 is the classification. #2 is the data type. #3 is the name and args. -\def\deftypefnheader #1#2#3{\deftypefnheaderx{#1}{#2}#3 \relax} -% #1 is the classification, #2 the data type, #3 the name, #4 the args. -\def\deftypefnheaderx #1#2#3 #4\relax{% -\doind {fn}{\code{#3}}% Make entry in function index -\begingroup -\normalparens % notably, turn off `&' magic, which prevents -% at least some C++ text from working -\defname {\defheaderxcond#2\relax$.$#3}{#1}% -\deftypefunargs {#4}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody -} +% @deftypecv category class type var args +\makedefun{deftypecv}#1 {\deftypecvof{#1\ \putwordof}} -% @defmac == @deffn Macro +% \deftypecvof {category of}class type var args +\def\deftypecvof#1#2 {\deftypecvgeneral{\putwordof\ \code{#2}}{#1\ \code{#2}} } -\def\defmac{\defparsebody\Edefmac\defmacx\defmacheader} - -\def\defmacheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index -\begingroup\defname {#1}{\putwordDefmac}% -\defunargs {#2}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody +% \deftypecvgeneral {subind}category type var args +% +\def\deftypecvgeneral#1#2 #3 #4 #5\endheader{% + \dosubind{vr}{\code{#4}}{#1}% + \defname{#2}{#3}{#4}\defunargs{#5\unskip}% } -% @defspec == @deffn Special Form +%%% Untyped variables: -\def\defspec{\defparsebody\Edefspec\defspecx\defspecheader} +% @defvr category var args +\makedefun{defvr}#1 {\deftypevrheader{#1} {} } -\def\defspecheader #1#2{\doind {fn}{\code{#1}}% Make entry in function index -\begingroup\defname {#1}{\putwordDefspec}% -\defunargs {#2}\endgroup % -\catcode\equalChar=\other % Turn off change made in \defparsebody -} +% @defcv category class var args +\makedefun{defcv}#1 {\defcvof{#1\ \putwordof}} -% @defop CATEGORY CLASS OPERATION ARG... -% -\def\defop #1 {\def\defoptype{#1}% -\defopparsebody\Edefop\defopx\defopheader\defoptype} -% -\def\defopheader#1#2#3{% - \dosubind{fn}{\code{#2}}{\putwordon\ \code{#1}}% function index entry - \begingroup - \defname{#2}{\defoptype\ \putwordon\ #1}% - \defunargs{#3}% - \endgroup -} - -% @deftypeop CATEGORY CLASS TYPE OPERATION ARG... -% -\def\deftypeop #1 {\def\deftypeopcategory{#1}% - \deftypeopparsebody\Edeftypeop\deftypeopx\deftypeopheader - \deftypeopcategory} -% -% #1 is the class name, #2 the data type, #3 the operation name, #4 the args. -\def\deftypeopheader#1#2#3#4{% - \dosubind{fn}{\code{#3}}{\putwordon\ \code{#1}}% entry in function index - \begingroup - \defname{\defheaderxcond#2\relax$.$#3} - {\deftypeopcategory\ \putwordon\ \code{#1}}% - \deftypefunargs{#4}% - \endgroup -} +% \defcvof {category of}class var args +\def\defcvof#1#2 {\deftypecvof{#1}#2 {} } -% @deftypemethod CLASS TYPE METHOD ARG... -% -\def\deftypemethod{% - \deftypemethparsebody\Edeftypemethod\deftypemethodx\deftypemethodheader} -% -% #1 is the class name, #2 the data type, #3 the method name, #4 the args. -\def\deftypemethodheader#1#2#3#4{% - \dosubind{fn}{\code{#3}}{\putwordon\ \code{#1}}% entry in function index - \begingroup - \defname{\defheaderxcond#2\relax$.$#3}{\putwordMethodon\ \code{#1}}% - \deftypefunargs{#4}% - \endgroup +%%% Type: +% @deftp category name args +\makedefun{deftp}#1 #2 #3\endheader{% + \doind{tp}{\code{#2}}% + \defname{#1}{}{#2}\defunargs{#3\unskip}% } -% @deftypeivar CLASS TYPE VARNAME -% -\def\deftypeivar{% - \deftypemethparsebody\Edeftypeivar\deftypeivarx\deftypeivarheader} -% -% #1 is the class name, #2 the data type, #3 the variable name. -\def\deftypeivarheader#1#2#3{% - \dosubind{vr}{\code{#3}}{\putwordof\ \code{#1}}% entry in variable index - \begingroup - \defname{\defheaderxcond#2\relax$.$#3} - {\putwordInstanceVariableof\ \code{#1}}% - \defvarargs{#3}% - \endgroup -} +% Remaining @defun-like shortcuts: +\makedefun{defun}{\deffnheader{\putwordDeffunc} } +\makedefun{defmac}{\deffnheader{\putwordDefmac} } +\makedefun{defspec}{\deffnheader{\putwordDefspec} } +\makedefun{deftypefun}{\deftypefnheader{\putwordDeffunc} } +\makedefun{defvar}{\defvrheader{\putwordDefvar} } +\makedefun{defopt}{\defvrheader{\putwordDefopt} } +\makedefun{deftypevar}{\deftypevrheader{\putwordDefvar} } +\makedefun{defmethod}{\defopon\putwordMethodon} +\makedefun{deftypemethod}{\deftypeopon\putwordMethodon} +\makedefun{defivar}{\defcvof\putwordInstanceVariableof} +\makedefun{deftypeivar}{\deftypecvof\putwordInstanceVariableof} -% @defmethod == @defop Method -% -\def\defmethod{\defmethparsebody\Edefmethod\defmethodx\defmethodheader} +% \defname, which formats the name of the @def (not the args). +% #1 is the category, such as "Function". +% #2 is the return type, if any. +% #3 is the function name. +% +% We are followed by (but not passed) the arguments, if any. % -% #1 is the class name, #2 the method name, #3 the args. -\def\defmethodheader#1#2#3{% - \dosubind{fn}{\code{#2}}{\putwordon\ \code{#1}}% entry in function index - \begingroup - \defname{#2}{\putwordMethodon\ \code{#1}}% - \defunargs{#3}% - \endgroup +\def\defname#1#2#3{% + % Get the values of \leftskip and \rightskip as they were outside the @def... + \advance\leftskip by -\defbodyindent + % + % How we'll format the type name. Putting it in brackets helps + % distinguish it from the body text that may end up on the next line + % just below it. + \def\temp{#1}% + \setbox0=\hbox{\kern\deflastargmargin \ifx\temp\empty\else [\rm\temp]\fi} + % + % Figure out line sizes for the paragraph shape. + % The first line needs space for \box0; but if \rightskip is nonzero, + % we need only space for the part of \box0 which exceeds it: + \dimen0=\hsize \advance\dimen0 by -\wd0 \advance\dimen0 by \rightskip + % The continuations: + \dimen2=\hsize \advance\dimen2 by -\defargsindent + % (plain.tex says that \dimen1 should be used only as global.) + \parshape 2 0in \dimen0 \defargsindent \dimen2 + % + % Put the type name to the right margin. + \noindent + \hbox to 0pt{% + \hfil\box0 \kern-\hsize + % \hsize has to be shortened this way: + \kern\leftskip + % Intentionally do not respect \rightskip, since we need the space. + }% + % + % Allow all lines to be underfull without complaint: + \tolerance=10000 \hbadness=10000 + \exdentamount=\defbodyindent + {% + % defun fonts. We use typewriter by default (used to be bold) because: + % . we're printing identifiers, they should be in tt in principle. + % . in languages with many accents, such as Czech or French, it's + % common to leave accents off identifiers. The result looks ok in + % tt, but exceedingly strange in rm. + % . we don't want -- and --- to be treated as ligatures. + % . this still does not fix the ?` and !` ligatures, but so far no + % one has made identifiers using them :). + \df \tt + \def\temp{#2}% return value type + \ifx\temp\empty\else \tclose{\temp} \fi + #3% output function name + }% + {\rm\enskip}% hskip 0.5 em of \tenrm + % + \boldbrax + % arguments will be output next, if any. } -% @defcv {Class Option} foo-class foo-flag - -\def\defcv #1 {\def\defcvtype{#1}% -\defopvarparsebody\Edefcv\defcvx\defcvarheader\defcvtype} - -\def\defcvarheader #1#2#3{% - \dosubind{vr}{\code{#2}}{\putwordof\ \code{#1}}% variable index entry - \begingroup - \defname{#2}{\defcvtype\ \putwordof\ #1}% - \defvarargs{#3}% - \endgroup +% Print arguments in slanted roman (not ttsl), inconsistently with using +% tt for the name. This is because literal text is sometimes needed in +% the argument list (groff manual), and ttsl and tt are not very +% distinguishable. Prevent hyphenation at `-' chars. +% +\def\defunargs#1{% + % use sl by default (not ttsl), + % tt for the names. + \df \sl \hyphenchar\font=0 + % + % On the other hand, if an argument has two dashes (for instance), we + % want a way to get ttsl. Let's try @var for that. + \let\var=\ttslanted + #1% + \sl\hyphenchar\font=45 } -% @defivar CLASS VARNAME == @defcv {Instance Variable} CLASS VARNAME -% -\def\defivar{\defvrparsebody\Edefivar\defivarx\defivarheader} +% We want ()&[] to print specially on the defun line. % -\def\defivarheader#1#2#3{% - \dosubind{vr}{\code{#2}}{\putwordof\ \code{#1}}% entry in var index - \begingroup - \defname{#2}{\putwordInstanceVariableof\ #1}% - \defvarargs{#3}% - \endgroup -} - -% @defvar -% First, define the processing that is wanted for arguments of @defvar. -% This is actually simple: just print them in roman. -% This must expand the args and terminate the paragraph they make up -\def\defvarargs #1{\normalparens #1% - \defargscommonending -} - -% @defvr Counter foo-count - -\def\defvr{\defvrparsebody\Edefvr\defvrx\defvrheader} - -\def\defvrheader #1#2#3{\doind {vr}{\code{#2}}% -\begingroup\defname {#2}{#1}\defvarargs{#3}\endgroup} - -% @defvar == @defvr Variable - -\def\defvar{\defvarparsebody\Edefvar\defvarx\defvarheader} - -\def\defvarheader #1#2{\doind {vr}{\code{#1}}% Make entry in var index -\begingroup\defname {#1}{\putwordDefvar}% -\defvarargs {#2}\endgroup % +\def\activeparens{% + \catcode`\(=\active \catcode`\)=\active + \catcode`\[=\active \catcode`\]=\active + \catcode`\&=\active } -% @defopt == @defvr {User Option} +% Make control sequences which act like normal parenthesis chars. +\let\lparen = ( \let\rparen = ) -\def\defopt{\defvarparsebody\Edefopt\defoptx\defoptheader} +% Be sure that we always have a definition for `(', etc. For example, +% if the fn name has parens in it, \boldbrax will not be in effect yet, +% so TeX would otherwise complain about undefined control sequence. +{ + \activeparens + \global\let(=\lparen \global\let)=\rparen + \global\let[=\lbrack \global\let]=\rbrack + \global\let& = \& -\def\defoptheader #1#2{\doind {vr}{\code{#1}}% Make entry in var index -\begingroup\defname {#1}{\putwordDefopt}% -\defvarargs {#2}\endgroup % + \gdef\boldbrax{\let(=\opnr\let)=\clnr\let[=\lbrb\let]=\rbrb} + \gdef\magicamp{\let&=\amprm} } -% @deftypevar int foobar - -\def\deftypevar{\defvarparsebody\Edeftypevar\deftypevarx\deftypevarheader} - -% #1 is the data type. #2 is the name, perhaps followed by text that -% is actually part of the data type, which should not be put into the index. -\def\deftypevarheader #1#2{% -\dovarind#2 \relax% Make entry in variables index -\begingroup\defname {\defheaderxcond#1\relax$.$#2}{\putwordDeftypevar}% - \defargscommonending -\endgroup} -\def\dovarind#1 #2\relax{\doind{vr}{\code{#1}}} - -% @deftypevr {Global Flag} int enable - -\def\deftypevr{\defvrparsebody\Edeftypevr\deftypevrx\deftypevrheader} - -\def\deftypevrheader #1#2#3{\dovarind#3 \relax% -\begingroup\defname {\defheaderxcond#2\relax$.$#3}{#1} - \defargscommonending -\endgroup} +\newcount\parencount -% Now define @deftp -% Args are printed in bold, a slight difference from @defvar. +% If we encounter &foo, then turn on ()-hacking afterwards +\newif\ifampseen +\def\amprm#1 {\ampseentrue{\bf\ }} -\def\deftpargs #1{\bf \defvarargs{#1}} +\def\parenfont{% + \ifampseen + % At the first level, print parens in roman, + % otherwise use the default font. + \ifnum \parencount=1 \rm \fi + \else + % The \sf parens (in \boldbrax) actually are a little bolder than + % the contained text. This is especially needed for [ and ] . + \sf + \fi +} +\def\infirstlevel#1{% + \ifampseen + \ifnum\parencount=1 + #1% + \fi + \fi +} +\def\bfafterword#1 {#1 \bf} -% @deftp Class window height width ... +\def\opnr{% + \global\advance\parencount by 1 + {\parenfont(}% + \infirstlevel \bfafterword +} +\def\clnr{% + {\parenfont)}% + \infirstlevel \sl + \global\advance\parencount by -1 +} -\def\deftp{\deftpparsebody\Edeftp\deftpx\deftpheader} +\newcount\brackcount +\def\lbrb{% + \global\advance\brackcount by 1 + {\bf[}% +} +\def\rbrb{% + {\bf]}% + \global\advance\brackcount by -1 +} -\def\deftpheader #1#2#3{\doind {tp}{\code{#2}}% -\begingroup\defname {#2}{#1}\deftpargs{#3}\endgroup} - -% These definitions are used if you use @defunx (etc.) -% anywhere other than immediately after a @defun or @defunx. -% -\def\defcvx#1 {\errmessage{@defcvx in invalid context}} -\def\deffnx#1 {\errmessage{@deffnx in invalid context}} -\def\defivarx#1 {\errmessage{@defivarx in invalid context}} -\def\defmacx#1 {\errmessage{@defmacx in invalid context}} -\def\defmethodx#1 {\errmessage{@defmethodx in invalid context}} -\def\defoptx #1 {\errmessage{@defoptx in invalid context}} -\def\defopx#1 {\errmessage{@defopx in invalid context}} -\def\defspecx#1 {\errmessage{@defspecx in invalid context}} -\def\deftpx#1 {\errmessage{@deftpx in invalid context}} -\def\deftypefnx#1 {\errmessage{@deftypefnx in invalid context}} -\def\deftypefunx#1 {\errmessage{@deftypefunx in invalid context}} -\def\deftypeivarx#1 {\errmessage{@deftypeivarx in invalid context}} -\def\deftypemethodx#1 {\errmessage{@deftypemethodx in invalid context}} -\def\deftypeopx#1 {\errmessage{@deftypeopx in invalid context}} -\def\deftypevarx#1 {\errmessage{@deftypevarx in invalid context}} -\def\deftypevrx#1 {\errmessage{@deftypevrx in invalid context}} -\def\defunx#1 {\errmessage{@defunx in invalid context}} -\def\defvarx#1 {\errmessage{@defvarx in invalid context}} -\def\defvrx#1 {\errmessage{@defvrx in invalid context}} +\def\checkparencounts{% + \ifnum\parencount=0 \else \badparencount \fi + \ifnum\brackcount=0 \else \badbrackcount \fi +} +\def\badparencount{% + \errmessage{Unbalanced parentheses in @def}% + \global\parencount=0 +} +\def\badbrackcount{% + \errmessage{Unbalanced square braces in @def}% + \global\brackcount=0 +} \message{macros,} @@ -5484,28 +5420,33 @@ width0pt\relax} \fi % To do this right we need a feature of e-TeX, \scantokens, % which we arrange to emulate with a temporary file in ordinary TeX. \ifx\eTeXversion\undefined - \newwrite\macscribble - \def\scanmacro#1{% - \begingroup \newlinechar`\^^M - % Undo catcode changes of \startcontents and \doprintindex - \catcode`\@=0 \catcode`\\=\other \escapechar=`\@ - % Append \endinput to make sure that TeX does not see the ending newline. - \toks0={#1\endinput}% - \immediate\openout\macscribble=\jobname.tmp - \immediate\write\macscribble{\the\toks0}% - \immediate\closeout\macscribble - \let\xeatspaces\eatspaces - \input \jobname.tmp - \endgroup -} -\else -\def\scanmacro#1{% -\begingroup \newlinechar`\^^M -% Undo catcode changes of \startcontents and \doprintindex -\catcode`\@=0 \catcode`\\=\other \escapechar=`\@ -\let\xeatspaces\eatspaces\scantokens{#1\endinput}\endgroup} + \newwrite\macscribble + \def\scantokens#1{% + \toks0={#1\endinput}% + \immediate\openout\macscribble=\jobname.tmp + \immediate\write\macscribble{\the\toks0}% + \immediate\closeout\macscribble + \input \jobname.tmp + } \fi +\def\scanmacro#1{% + \begingroup + \newlinechar`\^^M + \let\xeatspaces\eatspaces + % Undo catcode changes of \startcontents and \doprintindex + \catcode`\@=0 \catcode`\\=\other \escapechar=`\@ + % ... and \example + \spaceisspace + % + % Append \endinput to make sure that TeX does not see the ending newline. + % + % I've verified that it is necessary both for e-TeX and for ordinary TeX + % --kasal, 29nov03 + \scantokens{#1\endinput}% + \endgroup +} + \newcount\paramno % Count of parameters \newtoks\macname % Macro name \newif\ifrecursive % Is it recursive? @@ -5513,7 +5454,7 @@ width0pt\relax} \fi % \do\macro1\do\macro2... % Utility routines. -% Thisdoes \let #1 = #2, except with \csnames. +% This does \let #1 = #2, except with \csnames. \def\cslet#1#2{% \expandafter\expandafter \expandafter\let @@ -5610,8 +5551,7 @@ width0pt\relax} \fi \else \expandafter\parsemacbody \fi} -\def\unmacro{\parsearg\dounmacro} -\def\dounmacro#1{% +\parseargdef\unmacro{% \if1\csname ismacro.#1\endcsname \global\cslet{#1}{macsave.#1}% \global\expandafter\let \csname ismacro.#1\endcsname=0% @@ -5628,7 +5568,7 @@ width0pt\relax} \fi % Called by \do from \dounmacro on each macro. The idea is to omit any % macro definitions that have been changed to \relax. -% +% \def\unmacrodo#1{% \ifx#1\relax % remove this @@ -5761,16 +5701,18 @@ width0pt\relax} \fi % @alias. % We need some trickery to remove the optional spaces around the equal % sign. Just make them active and then expand them all to nothing. -\def\alias{\begingroup\obeyspaces\parsearg\aliasxxx} +\def\alias{\parseargusing\obeyspaces\aliasxxx} \def\aliasxxx #1{\aliasyyy#1\relax} -\def\aliasyyy #1=#2\relax{\ignoreactivespaces -\edef\next{\global\let\expandafter\noexpand\csname#1\endcsname=% - \expandafter\noexpand\csname#2\endcsname}% -\expandafter\endgroup\next} +\def\aliasyyy #1=#2\relax{% + {% + \expandafter\let\obeyedspace=\empty + \xdef\next{\global\let\makecsname{#1}=\makecsname{#2}}% + }% + \next +} \message{cross references,} -% @xref etc. \newwrite\auxfile @@ -5782,64 +5724,61 @@ width0pt\relax} \fi \def\inforefzzz #1,#2,#3,#4**{\putwordSee{} \putwordInfo{} \putwordfile{} \file{\ignorespaces #3{}}, node \samp{\ignorespaces#1{}}} -% @node's job is to define \lastnode. -\def\node{\ENVcheck\parsearg\nodezzz} -\def\nodezzz#1{\nodexxx [#1,]} -\def\nodexxx[#1,#2]{\gdef\lastnode{#1}} +% @node's only job in TeX is to define \lastnode, which is used in +% cross-references. +\parseargdef\node{\checkenv{}\nodexxx #1,\finishnodeparse} +\def\nodexxx#1,#2\finishnodeparse{\gdef\lastnode{#1}} \let\nwnode=\node -\let\lastnode=\relax +\let\lastnode=\empty -% The sectioning commands (@chapter, etc.) call these. -\def\donoderef{% - \ifx\lastnode\relax\else - \expandafter\expandafter\expandafter\setref{\lastnode}% - {Ysectionnumberandtype}% - \global\let\lastnode=\relax - \fi -} -\def\unnumbnoderef{% - \ifx\lastnode\relax\else - \expandafter\expandafter\expandafter\setref{\lastnode}{Ynothing}% - \global\let\lastnode=\relax - \fi -} -\def\appendixnoderef{% - \ifx\lastnode\relax\else - \expandafter\expandafter\expandafter\setref{\lastnode}% - {Yappendixletterandtype}% - \global\let\lastnode=\relax +% Write a cross-reference definition for the current node. #1 is the +% type (Ynumbered, Yappendix, Ynothing). +% +\def\donoderef#1{% + \ifx\lastnode\empty\else + \setref{\lastnode}{#1}% + \global\let\lastnode=\empty \fi } - % @anchor{NAME} -- define xref target at arbitrary point. % \newcount\savesfregister -\gdef\savesf{\relax \ifhmode \savesfregister=\spacefactor \fi} -\gdef\restoresf{\relax \ifhmode \spacefactor=\savesfregister \fi} -\gdef\anchor#1{\savesf \setref{#1}{Ynothing}\restoresf \ignorespaces} +% +\def\savesf{\relax \ifhmode \savesfregister=\spacefactor \fi} +\def\restoresf{\relax \ifhmode \spacefactor=\savesfregister \fi} +\def\anchor#1{\savesf \setref{#1}{Ynothing}\restoresf \ignorespaces} % \setref{NAME}{SNT} defines a cross-reference point NAME (a node or an -% anchor), namely NAME-title (the corresponding @chapter/etc. name), -% NAME-pg (the page number), and NAME-snt (section number and type). -% Called from \foonoderef. -% -% We have to set \indexdummies so commands such as @code in a section -% title aren't expanded. It would be nicer not to expand the titles in -% the first place, but there's so many layers that that is hard to do. -% -% Likewise, use \turnoffactive so that punctuation chars such as underscore -% and backslash work in node names. +% anchor), which consists of three parts: +% 1) NAME-title - the current sectioning name taken from \thissection, +% or the anchor name. +% 2) NAME-snt - section number and type, passed as the SNT arg, or +% empty for anchors. +% 3) NAME-pg - the page number. +% +% This is called from \donoderef, \anchor, and \dofloat. In the case of +% floats, there is an additional part, which is not written here: +% 4) NAME-lof - the text as it should appear in a @listoffloats. % -\def\setref#1#2{{% - \atdummies +\def\setref#1#2{% \pdfmkdest{#1}% - % - \turnoffactive - \dosetq{#1-title}{Ytitle}% - \dosetq{#1-pg}{Ypagenumber}% - \dosetq{#1-snt}{#2}% -}} + \iflinks + {% + \atdummies % preserve commands, but don't expand them + \turnoffactive + \otherbackslash + \edef\writexrdef##1##2{% + \write\auxfile{@xrdef{#1-% #1 of \setref, expanded by the \edef + ##1}{##2}}% these are parameters of \writexrdef + }% + \toks0 = \expandafter{\thissection}% + \immediate \writexrdef{title}{\the\toks0 }% + \immediate \writexrdef{snt}{\csname #2\endcsname}% \Ynumbered etc. + \writexrdef{pg}{\folio}% will be written later, during \shipout + }% + \fi +} % @xref, @pxref, and @ref generate cross-references. For \xrefX, #1 is % the node name, #2 the name of the Info cross-reference, #3 the printed @@ -5852,38 +5791,33 @@ width0pt\relax} \fi \def\xrefX[#1,#2,#3,#4,#5,#6]{\begingroup \unsepspaces \def\printedmanual{\ignorespaces #5}% - \def\printednodename{\ignorespaces #3}% - \setbox1=\hbox{\printedmanual}% - \setbox0=\hbox{\printednodename}% + \def\printedrefname{\ignorespaces #3}% + \setbox1=\hbox{\printedmanual\unskip}% + \setbox0=\hbox{\printedrefname\unskip}% \ifdim \wd0 = 0pt % No printed node name was explicitly given. \expandafter\ifx\csname SETxref-automatic-section-title\endcsname\relax % Use the node name inside the square brackets. - \def\printednodename{\ignorespaces #1}% + \def\printedrefname{\ignorespaces #1}% \else % Use the actual chapter/section title appear inside % the square brackets. Use the real section title if we have it. \ifdim \wd1 > 0pt % It is in another manual, so we don't have it. - \def\printednodename{\ignorespaces #1}% + \def\printedrefname{\ignorespaces #1}% \else \ifhavexrefs % We know the real title if we have the xref values. - \def\printednodename{\refx{#1-title}{}}% + \def\printedrefname{\refx{#1-title}{}}% \else % Otherwise just copy the Info node name. - \def\printednodename{\ignorespaces #1}% + \def\printedrefname{\ignorespaces #1}% \fi% \fi \fi \fi % - % If we use \unhbox0 and \unhbox1 to print the node names, TeX does not - % insert empty discretionaries after hyphens, which means that it will - % not find a line break at a hyphen in a node names. Since some manuals - % are best written with fairly long node names, containing hyphens, this - % is a loss. Therefore, we give the text of the node name again, so it - % is as if TeX is seeing it for the first time. + % Make link in pdf output. \ifpdf \leavevmode \getfilename{#4}% @@ -5893,53 +5827,86 @@ width0pt\relax} \fi goto file{\the\filename.pdf} name{#1}% \else \startlink attr{/Border [0 0 0]}% - goto name{#1}% + goto name{\pdfmkpgn{#1}}% \fi }% \linkcolor \fi % - \ifdim \wd1 > 0pt - \putwordsection{} ``\printednodename'' \putwordin{} \cite{\printedmanual}% + % Float references are printed completely differently: "Figure 1.2" + % instead of "[somenode], p.3". We distinguish them by the + % LABEL-title being set to a magic string. + {% + % Have to otherify everything special to allow the \csname to + % include an _ in the xref name, etc. + \indexnofonts + \turnoffactive + \otherbackslash + \expandafter\global\expandafter\let\expandafter\Xthisreftitle + \csname XR#1-title\endcsname + }% + \iffloat\Xthisreftitle + % If the user specified the print name (third arg) to the ref, + % print it instead of our usual "Figure 1.2". + \ifdim\wd0 = 0pt + \refx{#1-snt}% + \else + \printedrefname + \fi + % + % if the user also gave the printed manual name (fifth arg), append + % "in MANUALNAME". + \ifdim \wd1 > 0pt + \space \putwordin{} \cite{\printedmanual}% + \fi \else - % _ (for example) has to be the character _ for the purposes of the - % control sequence corresponding to the node, but it has to expand - % into the usual \leavevmode...\vrule stuff for purposes of - % printing. So we \turnoffactive for the \refx-snt, back on for the - % printing, back off for the \refx-pg. - {\turnoffactive \otherbackslash - % Only output a following space if the -snt ref is nonempty; for - % @unnumbered and @anchor, it won't be. - \setbox2 = \hbox{\ignorespaces \refx{#1-snt}{}}% - \ifdim \wd2 > 0pt \refx{#1-snt}\space\fi - }% - % [mynode], - [\printednodename],\space - % page 3 - \turnoffactive \otherbackslash \putwordpage\tie\refx{#1-pg}{}% + % node/anchor (non-float) references. + % + % If we use \unhbox0 and \unhbox1 to print the node names, TeX does not + % insert empty discretionaries after hyphens, which means that it will + % not find a line break at a hyphen in a node names. Since some manuals + % are best written with fairly long node names, containing hyphens, this + % is a loss. Therefore, we give the text of the node name again, so it + % is as if TeX is seeing it for the first time. + \ifdim \wd1 > 0pt + \putwordsection{} ``\printedrefname'' \putwordin{} \cite{\printedmanual}% + \else + % _ (for example) has to be the character _ for the purposes of the + % control sequence corresponding to the node, but it has to expand + % into the usual \leavevmode...\vrule stuff for purposes of + % printing. So we \turnoffactive for the \refx-snt, back on for the + % printing, back off for the \refx-pg. + {\turnoffactive \otherbackslash + % Only output a following space if the -snt ref is nonempty; for + % @unnumbered and @anchor, it won't be. + \setbox2 = \hbox{\ignorespaces \refx{#1-snt}{}}% + \ifdim \wd2 > 0pt \refx{#1-snt}\space\fi + }% + % output the `[mynode]' via a macro so it can be overridden. + \xrefprintnodename\printedrefname + % + % But we always want a comma and a space: + ,\space + % + % output the `page 3'. + \turnoffactive \otherbackslash \putwordpage\tie\refx{#1-pg}{}% + \fi \fi \endlink \endgroup} -% \dosetq is called from \setref to do the actual \write (\iflinks). +% This macro is called from \xrefX for the `[nodename]' part of xref +% output. It's a separate macro only so it can be changed more easily, +% since square brackets don't work well in some documents. Particularly +% one that Bob is working on :). % -\def\dosetq#1#2{% - {\let\folio=0% - \edef\next{\write\auxfile{\internalsetq{#1}{#2}}}% - \iflinks \next \fi - }% -} - -% \internalsetq{foo}{page} expands into -% CHARACTERS @xrdef{foo}{...expansion of \page...} -\def\internalsetq#1#2{@xrdef{#1}{\csname #2\endcsname}} +\def\xrefprintnodename#1{[#1]} -% Things to be expanded by \internalsetq. -% -\def\Ypagenumber{\folio} -\def\Ytitle{\thissection} +% Things referred to by \setref. +% \def\Ynothing{} -\def\Ysectionnumberandtype{% +\def\Yomitfromtoc{} +\def\Ynumbered{% \ifnum\secno=0 \putwordChapter@tie \the\chapno \else \ifnum\subsecno=0 @@ -5950,8 +5917,7 @@ width0pt\relax} \fi \putwordSection@tie \the\chapno.\the\secno.\the\subsecno.\the\subsubsecno \fi\fi\fi } - -\def\Yappendixletterandtype{% +\def\Yappendix{% \ifnum\secno=0 \putwordAppendix@tie @char\the\appendixno{}% \else \ifnum\subsecno=0 @@ -5964,15 +5930,6 @@ width0pt\relax} \fi \fi\fi\fi } -% Use TeX 3.0's \inputlineno to get the line number, for better error -% messages, but if we're using an old version of TeX, don't do anything. -% -\ifx\inputlineno\thisisundefined - \let\linenumber = \empty % Pre-3.0. -\else - \def\linenumber{\the\inputlineno:\space} -\fi - % Define \refx{NAME}{SUFFIX} to reference a cross-reference string named NAME. % If its value is nonempty, SUFFIX is output afterward. % @@ -5981,7 +5938,7 @@ width0pt\relax} \fi \indexnofonts \otherbackslash \expandafter\global\expandafter\let\expandafter\thisrefX - \csname X#1\endcsname + \csname XR#1\endcsname }% \ifx\thisrefX\relax % If not defined, say something at least. @@ -6003,11 +5960,44 @@ width0pt\relax} \fi #2% Output the suffix in any case. } -% This is the macro invoked by entries in the aux file. -% -\def\xrdef#1{\expandafter\gdef\csname X#1\endcsname} +% This is the macro invoked by entries in the aux file. Usually it's +% just a \def (we prepend XR to the control sequence name to avoid +% collisions). But if this is a float type, we have more work to do. +% +\def\xrdef#1#2{% + \expandafter\gdef\csname XR#1\endcsname{#2}% remember this xref value. + % + % Was that xref control sequence that we just defined for a float? + \expandafter\iffloat\csname XR#1\endcsname + % it was a float, and we have the (safe) float type in \iffloattype. + \expandafter\let\expandafter\floatlist + \csname floatlist\iffloattype\endcsname + % + % Is this the first time we've seen this float type? + \expandafter\ifx\floatlist\relax + \toks0 = {\do}% yes, so just \do + \else + % had it before, so preserve previous elements in list. + \toks0 = \expandafter{\floatlist\do}% + \fi + % + % Remember this xref in the control sequence \floatlistFLOATTYPE, + % for later use in \listoffloats. + \expandafter\xdef\csname floatlist\iffloattype\endcsname{\the\toks0{#1}}% + \fi +} % Read the last existing aux file, if any. No error if none exists. +% +\def\tryauxfile{% + \openin 1 \jobname.aux + \ifeof 1 \else + \readauxfile + \global\havexrefstrue + \fi + \closein 1 +} + \def\readauxfile{\begingroup \catcode`\^^@=\other \catcode`\^^A=\other @@ -6066,7 +6056,16 @@ width0pt\relax} \fi \catcode`\%=\other \catcode`+=\other % avoid \+ for paranoia even though we've turned it off % - % Make the characters 128-255 be printing characters + % This is to support \ in node names and titles, since the \ + % characters end up in a \csname. It's easier than + % leaving it active and making its active definition an actual \ + % character. What I don't understand is why it works in the *value* + % of the xrdef. Seems like it should be a catcode12 \, and that + % should not typeset properly. But it works, so I'm moving on for + % now. --karl, 15jan04. + \catcode`\\=\other + % + % Make the characters 128-255 be printing characters. {% \count 1=128 \def\loop{% @@ -6076,31 +6075,17 @@ width0pt\relax} \fi }% }% % - % Turn off \ as an escape so we do not lose on - % entries which were dumped with control sequences in their names. - % For example, @xrdef{$\leq $-fun}{page ...} made by @defun ^^ - % Reference to such entries still does not work the way one would wish, - % but at least they do not bomb out when the aux file is read in. - \catcode`\\=\other - % - % @ is our escape character in .aux files. + % @ is our escape character in .aux files, and we need braces. \catcode`\{=1 \catcode`\}=2 \catcode`\@=0 % - \openin 1 \jobname.aux - \ifeof 1 \else - \closein 1 - \input \jobname.aux - \global\havexrefstrue - \global\warnedobstrue - \fi - % Open the new aux file. TeX will close it automatically at exit. - \openout\auxfile=\jobname.aux + \input \jobname.aux \endgroup} -% Footnotes. +\message{insertions,} +% including footnotes. \newcount \footnoteno @@ -6114,19 +6099,19 @@ width0pt\relax} \fi % @footnotestyle is meaningful for info output only. \let\footnotestyle=\comment -\let\ptexfootnote=\footnote - {\catcode `\@=11 % % Auto-number footnotes. Otherwise like plain. \gdef\footnote{% + \let\indent=\ptexindent + \let\noindent=\ptexnoindent \global\advance\footnoteno by \@ne \edef\thisfootno{$^{\the\footnoteno}$}% % % In case the footnote comes at the end of a sentence, preserve the % extra spacing after we do the footnote number. \let\@sf\empty - \ifhmode\edef\@sf{\spacefactor\the\spacefactor}\/\fi + \ifhmode\edef\@sf{\spacefactor\the\spacefactor}\ptexslash\fi % % Remove inadvertent blank space before typesetting the footnote number. \unskip @@ -6137,17 +6122,12 @@ width0pt\relax} \fi % Don't bother with the trickery in plain.tex to not require the % footnote text as a parameter. Our footnotes don't need to be so general. % -% Oh yes, they do; otherwise, @ifset and anything else that uses -% \parseargline fail inside footnotes because the tokens are fixed when +% Oh yes, they do; otherwise, @ifset (and anything else that uses +% \parseargline) fails inside footnotes because the tokens are fixed when % the footnote is read. --karl, 16nov96. % -% The start of the footnote looks usually like this: -\gdef\startfootins{\insert\footins\bgroup} -% -% ... but this macro is redefined inside @multitable. -% \gdef\dofootnote{% - \startfootins + \insert\footins\bgroup % We want to typeset this text as a normal paragraph, even if the % footnote reference occurs in (for example) a display environment. % So reset some parameters. @@ -6183,40 +6163,66 @@ width0pt\relax} \fi } }%end \catcode `\@=11 -% @| inserts a changebar to the left of the current line. It should -% surround any changed text. This approach does *not* work if the -% change spans more than two lines of output. To handle that, we would -% have adopt a much more difficult approach (putting marks into the main -% vertical list for the beginning and end of each change). -% -\def\|{% - % \vadjust can only be used in horizontal mode. - \leavevmode - % - % Append this vertical mode material after the current line in the output. - \vadjust{% - % We want to insert a rule with the height and depth of the current - % leading; that is exactly what \strutbox is supposed to record. - \vskip-\baselineskip - % - % \vadjust-items are inserted at the left edge of the type. So - % the \llap here moves out into the left-hand margin. - \llap{% - % - % For a thicker or thinner bar, change the `1pt'. - \vrule height\baselineskip width1pt - % - % This is the space between the bar and the text. - \hskip 12pt - }% - }% +% In case a @footnote appears in a vbox, save the footnote text and create +% the real \insert just after the vbox finished. Otherwise, the insertion +% would be lost. +% Similarily, if a @footnote appears inside an alignment, save the footnote +% text to a box and make the \insert when a row of the table is finished. +% And the same can be done for other insert classes. --kasal, 16nov03. + +% Replace the \insert primitive by a cheating macro. +% Deeper inside, just make sure that the saved insertions are not spilled +% out prematurely. +% +\def\startsavinginserts{% + \ifx \insert\ptexinsert + \let\insert\saveinsert + \else + \let\checkinserts\relax + \fi } -% For a final copy, take out the rectangles -% that mark overfull boxes (in case you have decided -% that the text looks ok even though it passes the margin). +% This \insert replacement works for both \insert\footins{foo} and +% \insert\footins\bgroup foo\egroup, but it doesn't work for \insert27{foo}. % -\def\finalout{\overfullrule=0pt} +\def\saveinsert#1{% + \edef\next{\noexpand\savetobox \makeSAVEname#1}% + \afterassignment\next + % swallow the left brace + \let\temp = +} +\def\makeSAVEname#1{\makecsname{SAVE\expandafter\gobble\string#1}} +\def\savetobox#1{\global\setbox#1 = \vbox\bgroup \unvbox#1} + +\def\checksaveins#1{\ifvoid#1\else \placesaveins#1\fi} + +\def\placesaveins#1{% + \ptexinsert \csname\expandafter\gobblesave\string#1\endcsname + {\box#1}% +} + +% eat @SAVE -- beware, all of them have catcode \other: +{ + \def\dospecials{\do S\do A\do V\do E} \uncatcodespecials % ;-) + \gdef\gobblesave @SAVE{} +} + +% initialization: +\def\newsaveins #1{% + \edef\next{\noexpand\newsaveinsX \makeSAVEname#1}% + \next +} +\def\newsaveinsX #1{% + \csname newbox\endcsname #1% + \expandafter\def\expandafter\checkinserts\expandafter{\checkinserts + \checksaveins #1}% +} + +% initialize: +\let\checkinserts\empty +\newsaveins\footins +\newsaveins\margin + % @image. We use the macros from epsf.tex to support this. % If epsf.tex is not installed and @image is used, we complain. @@ -6226,12 +6232,12 @@ width0pt\relax} \fi % undone and the next image would fail. \openin 1 = epsf.tex \ifeof 1 \else - \closein 1 % Do not bother showing banner with epsf.tex v2.7k (available in % doc/epsf.tex and on ctan). \def\epsfannounce{\toks0 = }% \input epsf.tex \fi +\closein 1 % % We will only complain once about lack of epsf.tex. \newif\ifwarnednoepsf @@ -6267,7 +6273,7 @@ width0pt\relax} \fi \nobreak\bigskip % Usually we'll have text after the image which will insert % \parskip glue, so insert it here too to equalize the space - % above and below. + % above and below. \nobreak\vskip\parskip \nobreak \line\bgroup\hss @@ -6287,6 +6293,249 @@ width0pt\relax} \fi \endgroup} +% @float FLOATTYPE,LOC ... @end float for displayed figures, tables, etc. +% We don't actually implement floating yet, we just plop the float "here". +% But it seemed the best name for the future. +% +\envparseargdef\float{\dofloat #1,,,\finish} + +% #1 is the optional FLOATTYPE, the text label for this float, typically +% "Figure", "Table", "Example", etc. Can't contain commas. If omitted, +% this float will not be numbered and cannot be referred to. +% +% #2 is the optional xref label. Also must be present for the float to +% be referable. +% +% #3 is the optional positioning argument; for now, it is ignored. It +% will somehow specify the positions allowed to float to (here, top, bottom). +% +% We keep a separate counter for each FLOATTYPE, which we reset at each +% chapter-level command. +\let\resetallfloatnos=\empty +% +\def\dofloat#1,#2,#3,#4\finish{% + \let\thiscaption=\empty + \let\thisshortcaption=\empty + % + % don't lose footnotes inside @float. + \startsavinginserts + % + \vtop\bgroup + \def\floattype{#1}% + \def\floatlabel{#2}% + \def\floatloc{#3}% we do nothing with this yet. + % + \ifx\floattype\empty + \let\safefloattype=\empty + \else + {% + % the floattype might have accents or other special characters, + % but we need to use it in a control sequence name. + \indexnofonts + \turnoffactive + \xdef\safefloattype{\floattype}% + }% + \fi + % + % If label is given but no type, we handle that as the empty type. + \ifx\floatlabel\empty \else + % We want each FLOATTYPE to be numbered separately (Figure 1, + % Table 1, Figure 2, ...). (And if no label, no number.) + % + \expandafter\getfloatno\csname\safefloattype floatno\endcsname + \global\advance\floatno by 1 + % + {% + % This magic value for \thissection is output by \setref as the + % XREFLABEL-title value. \xrefX uses it to distinguish float + % labels (which have a completely different output format) from + % node and anchor labels. And \xrdef uses it to construct the + % lists of floats. + % + \edef\thissection{\floatmagic=\safefloattype}% + \setref{\floatlabel}{Yfloat}% + }% + \fi + % + % start with \parskip glue, I guess. + \vskip\parskip + % + % Don't suppress indentation if a float happens to start a section. + \restorefirstparagraphindent +} + +% we have these possibilities: +% @float Foo,lbl & @caption{Cap}: Foo 1.1: Cap +% @float Foo,lbl & no caption: Foo 1.1 +% @float Foo & @caption{Cap}: Foo: Cap +% @float Foo & no caption: Foo +% @float ,lbl & Caption{Cap}: 1.1: Cap +% @float ,lbl & no caption: 1.1 +% @float & @caption{Cap}: Cap +% @float & no caption: +% +\def\Efloat{% + \let\floatident = \empty + % + % In all cases, if we have a float type, it comes first. + \ifx\floattype\empty \else \def\floatident{\floattype}\fi + % + % If we have an xref label, the number comes next. + \ifx\floatlabel\empty \else + \ifx\floattype\empty \else % if also had float type, need tie first. + \appendtomacro\floatident{\tie}% + \fi + % the number. + \appendtomacro\floatident{\chaplevelprefix\the\floatno}% + \fi + % + % Start the printed caption with what we've constructed in + % \floatident, but keep it separate; we need \floatident again. + \let\captionline = \floatident + % + \ifx\thiscaption\empty \else + \ifx\floatident\empty \else + \appendtomacro\captionline{: }% had ident, so need a colon between + \fi + % + % caption text. + \appendtomacro\captionline\thiscaption + \fi + % + % If we have anything to print, print it, with space before. + % Eventually this needs to become an \insert. + \ifx\captionline\empty \else + \vskip.5\parskip + \captionline + \fi + % + % If have an xref label, write the list of floats info. Do this + % after the caption, to avoid chance of it being a breakpoint. + \ifx\floatlabel\empty \else + % Write the text that goes in the lof to the aux file as + % \floatlabel-lof. Besides \floatident, we include the short + % caption if specified, else the full caption if specified, else nothing. + {% + \atdummies \turnoffactive \otherbackslash + \immediate\write\auxfile{@xrdef{\floatlabel-lof}{% + \floatident + \ifx\thisshortcaption\empty + \ifx\thiscaption\empty \else : \thiscaption \fi + \else + : \thisshortcaption + \fi + }}% + }% + \fi + % + % Space below caption, if we printed anything. + \ifx\printedsomething\empty \else \vskip\parskip \fi + \egroup % end of \vtop + \checkinserts +} + +% Append the tokens #2 to the definition of macro #1, not expanding either. +% +\newtoks\appendtomacroAtoks +\newtoks\appendtomacroBtoks +\def\appendtomacro#1#2{% + \appendtomacroAtoks = \expandafter{#1}% + \appendtomacroBtoks = {#2}% + \edef#1{\the\appendtomacroAtoks \the\appendtomacroBtoks}% +} + +% @caption, @shortcaption are easy. +% +\long\def\caption#1{\checkenv\float \def\thiscaption{#1}} +\def\shortcaption#1{\checkenv\float \def\thisshortcaption{#1}} + +% The parameter is the control sequence identifying the counter we are +% going to use. Create it if it doesn't exist and assign it to \floatno. +\def\getfloatno#1{% + \ifx#1\relax + % Haven't seen this figure type before. + \csname newcount\endcsname #1% + % + % Remember to reset this floatno at the next chap. + \expandafter\gdef\expandafter\resetallfloatnos + \expandafter{\resetallfloatnos #1=0 }% + \fi + \let\floatno#1% +} + +% \setref calls this to get the XREFLABEL-snt value. We want an @xref +% to the FLOATLABEL to expand to "Figure 3.1". We call \setref when we +% first read the @float command. +% +\def\Yfloat{\floattype@tie \chaplevelprefix\the\floatno}% + +% Magic string used for the XREFLABEL-title value, so \xrefX can +% distinguish floats from other xref types. +\def\floatmagic{!!float!!} + +% #1 is the control sequence we are passed; we expand into a conditional +% which is true if #1 represents a float ref. That is, the magic +% \thissection value which we \setref above. +% +\def\iffloat#1{\expandafter\doiffloat#1==\finish} +% +% #1 is (maybe) the \floatmagic string. If so, #2 will be the +% (safe) float type for this float. We set \iffloattype to #2. +% +\def\doiffloat#1=#2=#3\finish{% + \def\temp{#1}% + \def\iffloattype{#2}% + \ifx\temp\floatmagic +} + +% @listoffloats FLOATTYPE - print a list of floats like a table of contents. +% +\parseargdef\listoffloats{% + \def\floattype{#1}% floattype + {% + % the floattype might have accents or other special characters, + % but we need to use it in a control sequence name. + \indexnofonts + \turnoffactive + \xdef\safefloattype{\floattype}% + }% + % + % \xrdef saves the floats as a \do-list in \floatlistSAFEFLOATTYPE. + \expandafter\ifx\csname floatlist\safefloattype\endcsname \relax + \ifhavexrefs + % if the user said @listoffloats foo but never @float foo. + \message{\linenumber No `\safefloattype' floats to list.}% + \fi + \else + \begingroup + \leftskip=\tocindent % indent these entries like a toc + \let\do=\listoffloatsdo + \csname floatlist\safefloattype\endcsname + \endgroup + \fi +} + +% This is called on each entry in a list of floats. We're passed the +% xref label, in the form LABEL-title, which is how we save it in the +% aux file. We strip off the -title and look up \XRLABEL-lof, which +% has the text we're supposed to typeset here. +% +% Figures without xref labels will not be included in the list (since +% they won't appear in the aux file). +% +\def\listoffloatsdo#1{\listoffloatsdoentry#1\finish} +\def\listoffloatsdoentry#1-title\finish{{% + % Can't fully expand XR#1-lof because it can contain anything. Just + % pass the control sequence. On the other hand, XR#1-pg is just the + % page number, and we want to fully expand that so we can get a link + % in pdf output. + \toksA = \expandafter{\csname XR#1-lof\endcsname}% + % + % use the same \entry macro we use to generate the TOC and index. + \edef\writeentry{\noexpand\entry{\the\toksA}{\csname XR#1-pg\endcsname}}% + \writeentry +}} + \message{localization,} % and i18n. @@ -6295,19 +6544,17 @@ width0pt\relax} \fi % properly. Single argument is the language abbreviation. % It would be nice if we could set up a hyphenation file here. % -\def\documentlanguage{\parsearg\dodocumentlanguage} -\def\dodocumentlanguage#1{% +\parseargdef\documentlanguage{% \tex % read txi-??.tex file in plain TeX. - % Read the file if it exists. - \openin 1 txi-#1.tex - \ifeof1 - \errhelp = \nolanghelp - \errmessage{Cannot read language file txi-#1.tex}% - \let\temp = \relax - \else - \def\temp{\input txi-#1.tex }% - \fi - \temp + % Read the file if it exists. + \openin 1 txi-#1.tex + \ifeof 1 + \errhelp = \nolanghelp + \errmessage{Cannot read language file txi-#1.tex}% + \else + \input txi-#1.tex + \fi + \closein 1 \endgroup } \newhelp\nolanghelp{The given language definition file cannot be found or @@ -6355,7 +6602,7 @@ should work if nowhere else does.} % Parameters in order: 1) textheight; 2) textwidth; 3) voffset; % 4) hoffset; 5) binding offset; 6) topskip; 7) physical page height; 8) % physical page width. -% +% % We also call \setleading{\textleading}, so the caller should define % \textleading. The caller should also set \parskip. % @@ -6423,7 +6670,7 @@ should work if nowhere else does.} \parskip = 3pt plus 2pt minus 1pt \textleading = 13.2pt % - % Double-side printing via postscript on Laserjet 4050 + % Double-side printing via postscript on Laserjet 4050 % prints double-sided nicely when \bindingoffset=10mm and \hoffset=-6mm. % To change the settings for a different printer or situation, adjust % \normaloffset until the front-side and back-side texts align. Then @@ -6464,7 +6711,7 @@ should work if nowhere else does.} \tableindent = 12mm }} -% A specific text layout, 24x15cm overall, intended for A4 paper. +% A specific text layout, 24x15cm overall, intended for A4 paper. \def\afourlatex{{\globaldefs = 1 \afourpaper \internalpagesizes{237mm}{150mm}% @@ -6490,8 +6737,7 @@ should work if nowhere else does.} % Perhaps we should allow setting the margins, \topskip, \parskip, % and/or leading, also. Or perhaps we should compute them somehow. % -\def\pagesizes{\parsearg\pagesizesxxx} -\def\pagesizesxxx#1{\pagesizesyyy #1,,\finish} +\parseargdef\pagesizes{\pagesizesyyy #1,,\finish} \def\pagesizesyyy#1,#2,#3\finish{{% \setbox0 = \hbox{\ignorespaces #2}\ifdim\wd0 > 0pt \hsize=#2\relax \fi \globaldefs = 1 @@ -6538,8 +6784,8 @@ should work if nowhere else does.} \def\normalplus{+} \def\normaldollar{$}%$ font-lock fix -% This macro is used to make a character print one way in ttfont -% where it can probably just be output, and another way in other fonts, +% This macro is used to make a character print one way in \tt +% (where it can probably be output as-is), and another way in other fonts, % where something hairier probably needs to be done. % % #1 is what to print if we are indeed using \tt; #2 is what to print @@ -6587,13 +6833,6 @@ should work if nowhere else does.} \catcode`\$=\active \def${\ifusingit{{\sl\$}}\normaldollar}%$ font-lock fix -% Set up an active definition for =, but don't enable it most of the time. -{\catcode`\==\active -\global\def={{\tt \char 61}}} - -\catcode`+=\active -\catcode`\_=\active - % If a .fmt file is being used, characters that might appear in a file % name cannot be active until we have parsed the command line. % So turn them off again, and have \everyjob (or @setfilename) turn them on. @@ -6602,15 +6841,16 @@ should work if nowhere else does.} \catcode`\@=0 -% \rawbackslashxx outputs one backslash character in current font, +% \backslashcurfont outputs one backslash character in current font, % as in \char`\\. -\global\chardef\rawbackslashxx=`\\ +\global\chardef\backslashcurfont=`\\ +\global\let\rawbackslashxx=\backslashcurfont % let existing .??s files work -% \rawbackslash defines an active \ to do \rawbackslashxx. +% \rawbackslash defines an active \ to do \backslashcurfont. % \otherbackslash defines an active \ to be a literal `\' character with % catcode other. {\catcode`\\=\active - @gdef@rawbackslash{@let\=@rawbackslashxx} + @gdef@rawbackslash{@let\=@backslashcurfont} @gdef@otherbackslash{@let\=@realbackslash} } @@ -6618,7 +6858,7 @@ should work if nowhere else does.} {\catcode`\\=\other @gdef@realbackslash{\}} % \normalbackslash outputs one backslash in fixed width font. -\def\normalbackslash{{\tt\rawbackslashxx}} +\def\normalbackslash{{\tt\backslashcurfont}} \catcode`\\=\active @@ -6635,12 +6875,13 @@ should work if nowhere else does.} @let>=@normalgreater @let+=@normalplus @let$=@normaldollar %$ font-lock fix + @unsepspaces } % Same as @turnoffactive except outputs \ as {\tt\char`\\} instead of % the literal character `\'. (Thus, \ is not expandable when this is in % effect.) -% +% @def@normalturnoffactive{@turnoffactive @let\=@normalbackslash} % Make _ and + \other characters, temporarily. @@ -6669,15 +6910,11 @@ should work if nowhere else does.} % Say @foo, not \foo, in error messages. @escapechar = `@@ -% These look ok in all fonts, so just make them not special. +% These look ok in all fonts, so just make them not special. @catcode`@& = @other @catcode`@# = @other @catcode`@% = @other -@c Set initial fonts. -@textfonts -@rm - @c Local variables: @c eval: (add-hook 'write-file-hooks 'time-stamp) @@ -6686,3 +6923,9 @@ should work if nowhere else does.} @c time-stamp-format: "%:y-%02m-%02d.%02H" @c time-stamp-end: "}" @c End: + +@c vim:sw=2: + +@ignore + arch-tag: e1b36e32-c96e-4135-a41a-0b2efa2ea115 +@end ignore