diff -Nru a/CREDITS b/CREDITS
--- a/CREDITS Mon Feb 24 11:06:12 2003
+++ b/CREDITS Mon Feb 24 11:06:12 2003
@@ -2746,6 +2746,14 @@
E: wsalamon@nai.com
D: portions of the Linux Security Module (LSM) framework and security modules
+N: Duncan Sands
+E: duncan.sands@wanadoo.fr
+W: http://topo.math.u-psud.fr/~sands
+D: Alcatel SpeedTouch USB driver
+S: 69 rue Dunois
+S: 75013 Paris
+S: France
+
N: Robert Sanders
E: gt8134b@prism.gatech.edu
D: Dosemu
diff -Nru a/Documentation/DocBook/kernel-hacking.tmpl b/Documentation/DocBook/kernel-hacking.tmpl
--- a/Documentation/DocBook/kernel-hacking.tmpl Mon Feb 24 11:06:10 2003
+++ b/Documentation/DocBook/kernel-hacking.tmpl Mon Feb 24 11:06:10 2003
@@ -993,25 +993,6 @@
-
- EXPORT_NO_SYMBOLS
-
-
-
- If a module exports no symbols then you can specify
-
-EXPORT_NO_SYMBOLS;
-
- anywhere in the module.
- In kernel 2.4 and earlier, if a module contains neither
- EXPORT_SYMBOL() nor
- EXPORT_NO_SYMBOLS then the module defaults to
- exporting all non-static global symbols.
- In kernel 2.5 onwards you must explicitly specify whether a module
- exports symbols or not.
-
-
-
EXPORT_SYMBOL_GPL()
diff -Nru a/Documentation/DocBook/videobook.tmpl b/Documentation/DocBook/videobook.tmpl
--- a/Documentation/DocBook/videobook.tmpl Mon Feb 24 11:06:14 2003
+++ b/Documentation/DocBook/videobook.tmpl Mon Feb 24 11:06:14 2003
@@ -739,8 +739,6 @@
MODULE_PARM(io, "i");
MODULE_PARM_DESC(io, "I/O address of the card.");
-EXPORT_NO_SYMBOLS;
-
int init_module(void)
{
if(io==-1)
diff -Nru a/Documentation/i2c/i2c-protocol b/Documentation/i2c/i2c-protocol
--- a/Documentation/i2c/i2c-protocol Mon Feb 24 11:06:13 2003
+++ b/Documentation/i2c/i2c-protocol Mon Feb 24 11:06:13 2003
@@ -52,10 +52,10 @@
We have found some I2C devices that needs the following modifications:
Flag I2C_M_NOSTART:
- In a combined transaction, no 'S Addr' is generated at some point.
- For example, setting I2C_M_NOSTART on the second partial message
+ In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
+ point. For example, setting I2C_M_NOSTART on the second partial message
generates something like:
- S Addr Rd [A] [Data] NA Wr [A] Data [A] P
+ S Addr Rd [A] [Data] NA Data [A] P
If you set the I2C_M_NOSTART variable for the first partial message,
we do not generate Addr, but we do generate the startbit S. This will
probably confuse all other clients on your bus, so don't try this.
@@ -65,4 +65,12 @@
need to emit an Rd instead of a Wr, or vice versa, you set this
flag. For example:
S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
-
+
+ Flags I2C_M_IGNORE_NAK
+ Normally message is interrupted immediately if there is [NA] from the
+ client. Setting this flag treats any [NA] as [A], and all of
+ message is sent.
+ These messages may still fail to SCL lo->hi timeout.
+
+ Flags I2C_M_NO_RD_ACK
+ In a read message, master A/NA bit is skipped.
diff -Nru a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol
--- a/Documentation/i2c/smbus-protocol Mon Feb 24 11:06:14 2003
+++ b/Documentation/i2c/smbus-protocol Mon Feb 24 11:06:14 2003
@@ -61,7 +61,7 @@
This is the reverse of Read Byte: it sends a single byte to a device.
See Read Byte for more information.
-S Addr Wr [A] Data NA P
+S Addr Wr [A] Data [A] P
SMBus Read Byte Data
diff -Nru a/Documentation/i2c/summary b/Documentation/i2c/summary
--- a/Documentation/i2c/summary Mon Feb 24 11:06:11 2003
+++ b/Documentation/i2c/summary Mon Feb 24 11:06:11 2003
@@ -4,7 +4,7 @@
=============
I2C (pronounce: I squared C) is a protocol developed by Philips. It is a
-slow two-wire protocol (10-100 kHz), but it suffices for many types of
+slow two-wire protocol (10-400 kHz), but it suffices for many types of
devices.
SMBus (System Management Bus) is a subset of the I2C protocol. Many
@@ -43,15 +43,15 @@
Included Bus Drivers
====================
-Note that not only stable drivers are patched into the kernel by 'mkpatch'.
+Note that only stable drivers are patched into the kernel by 'mkpatch'.
Base modules
------------
-i2c-core: The basic I2C code, including the /proc interface
-i2c-dev: The /dev interface
-i2c-proc: The /proc interface for device (client) drivers
+i2c-core: The basic I2C code, including the /proc/bus/i2c* interface
+i2c-dev: The /dev/i2c-* interface
+i2c-proc: The /proc/sys/dev/sensors interface for device (client) drivers
Algorithm drivers
-----------------
@@ -59,7 +59,7 @@
i2c-algo-8xx: An algorithm for CPM's I2C device in Motorola 8xx processors (NOT BUILT BY DEFAULT)
i2c-algo-bit: A bit-banging algorithm
i2c-algo-pcf: A PCF 8584 style algorithm
-i2c-algo-ibmocp: An algorithm for the I2C device in IBM 4xx processors (NOT BUILT BY DEFAULT)
+i2c-algo-ibm_ocp: An algorithm for the I2C device in IBM 4xx processors (NOT BUILT BY DEFAULT)
Adapter drivers
---------------
@@ -68,7 +68,7 @@
i2c-elv: ELV parallel port adapter (uses i2c-algo-bit)
i2c-pcf-epp: PCF8584 on a EPP parallel port (uses i2c-algo-pcf) (NOT mkpatched)
i2c-philips-par: Philips style parallel port adapter (uses i2c-algo-bit)
-i2c-adap_ibmocp: IBM 4xx processor I2C device (uses i2c-algo-ibmocp) (NOT BUILT BY DEFAULT)
+i2c-adap-ibm_ocp: IBM 4xx processor I2C device (uses i2c-algo-ibm_ocp) (NOT BUILT BY DEFAULT)
i2c-pport: Primitive parallel port adapter (uses i2c-algo-bit)
i2c-rpx: RPX board Motorola 8xx I2C device (uses i2c-algo-8xx) (NOT BUILT BY DEFAULT)
i2c-velleman: Velleman K9000 parallel port adapter (uses i2c-algo-bit)
diff -Nru a/Documentation/i2c/writing-clients b/Documentation/i2c/writing-clients
--- a/Documentation/i2c/writing-clients Mon Feb 24 11:06:08 2003
+++ b/Documentation/i2c/writing-clients Mon Feb 24 11:06:08 2003
@@ -448,9 +448,9 @@
/* Note that we reserve some space for foo_data too. If you don't
need it, remove it. We do it here to help to lessen memory
fragmentation. */
- if (! (new_client = kmalloc(sizeof(struct i2c_client)) +
+ if (! (new_client = kmalloc(sizeof(struct i2c_client) +
sizeof(struct foo_data),
- GFP_KERNEL)) {
+ GFP_KERNEL))) {
err = -ENOMEM;
goto ERROR0;
}
diff -Nru a/Documentation/networking/8139too.txt b/Documentation/networking/8139too.txt
--- a/Documentation/networking/8139too.txt Mon Feb 24 11:06:11 2003
+++ b/Documentation/networking/8139too.txt Mon Feb 24 11:06:11 2003
@@ -93,6 +93,8 @@
---------------
AOpen ALN-325C
AT-2500TX 10/100 PCI Fast Ethernet Network Adapter Card
+Cnet CNF401 'SinglePoint' 10/100 Base-TX
+Genius GF 100TXR4 Fast Ethernet 10/100M PCI Network Card
KTI KF-230TX
KTI KF-230TX/2
Lantech FastNet TX
diff -Nru a/Documentation/networking/alias.txt b/Documentation/networking/alias.txt
--- a/Documentation/networking/alias.txt Mon Feb 24 11:06:09 2003
+++ b/Documentation/networking/alias.txt Mon Feb 24 11:06:09 2003
@@ -2,7 +2,7 @@
IP-Aliasing:
============
-IP-aliases are additional IP-adresses/masks hooked up to a base
+IP-aliases are additional IP-addresses/masks hooked up to a base
interface by adding a colon and a string when running ifconfig.
This string is usually numeric, but this is not a must.
diff -Nru a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt
--- a/Documentation/networking/bonding.txt Mon Feb 24 11:06:08 2003
+++ b/Documentation/networking/bonding.txt Mon Feb 24 11:06:08 2003
@@ -258,7 +258,7 @@
Specifies the ip addresses to use when arp_interval is > 0. These are
the targets of the ARP request sent to determine the health of the link
to the targets. Specify these values in ddd.ddd.ddd.ddd format.
- Multiple ip adresses must be separated by a comma. At least one ip
+ Multiple ip addresses must be separated by a comma. At least one ip
address needs to be given for ARP monitoring to work. The maximum number
of targets that can be specified is set at 16.
diff -Nru a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt
--- a/Documentation/networking/ip-sysctl.txt Mon Feb 24 11:06:09 2003
+++ b/Documentation/networking/ip-sysctl.txt Mon Feb 24 11:06:09 2003
@@ -619,6 +619,37 @@
0 to disable any limiting, otherwise the maximal rate in jiffies(1)
Default: 100
+use_tempaddr - INTEGER
+ Preference for Privacy Extensions (RFC3041).
+ <= 0 : disable Privacy Extensions
+ == 1 : enable Privacy Extensions, but prefer public
+ addresses over temporary addresses.
+ > 1 : enable Privacy Extensions and prefer temporary
+ addresses over public addresses.
+ Default: 0 (for most devices)
+ -1 (for point-to-point devices and loopback devices)
+
+temp_valid_lft - INTEGER
+ valid lifetime (in seconds) for temporary addresses.
+ Default: 604800 (7 days)
+
+temp_prefered_lft - INTEGER
+ Preferred lifetime (in seconds) for temorary addresses.
+ Default: 86400 (1 day)
+
+max_desync_factor - INTEGER
+ Maximum value for DESYNC_FACTOR, which is a random value
+ that ensures that clients don't synchronize with each
+ other and generage new addresses at exactly the same time.
+ value is in seconds.
+ Default: 600
+
+regen_max_retry - INTEGER
+ Number of attempts before give up attempting to generate
+ valid temporary addresses.
+ Default: 5
+
+
IPv6 Update by:
Pekka Savola
YOSHIFUJI Hideaki / USAGI Project
diff -Nru a/Documentation/pnp.txt b/Documentation/pnp.txt
--- a/Documentation/pnp.txt Mon Feb 24 11:06:08 2003
+++ b/Documentation/pnp.txt Mon Feb 24 11:06:08 2003
@@ -233,7 +233,7 @@
The Old Way
...........
-a series of compatability functions have been created to make it easy to convert
+a series of compatibility functions have been created to make it easy to convert
ISAPNP drivers. They should serve as a temporary solution only.
diff -Nru a/Documentation/rpc-cache.txt b/Documentation/rpc-cache.txt
--- a/Documentation/rpc-cache.txt Mon Feb 24 11:06:08 2003
+++ b/Documentation/rpc-cache.txt Mon Feb 24 11:06:08 2003
@@ -146,7 +146,7 @@
Note: If a cache has no active readers on the channel, and has had not
active readers for more than 60 seconds, further requests will not be
added to the channel but instead all looks that do not find a valid
-entry will fail. This is partly for backward compatability: The
+entry will fail. This is partly for backward compatibility: The
previous nfs exports table was deemed to be authoritative and a
failed lookup meant a definite 'no'.
diff -Nru a/Documentation/s390/Debugging390.txt b/Documentation/s390/Debugging390.txt
--- a/Documentation/s390/Debugging390.txt Mon Feb 24 11:06:08 2003
+++ b/Documentation/s390/Debugging390.txt Mon Feb 24 11:06:08 2003
@@ -97,7 +97,7 @@
6 6 Input/Output interrupt Mask
7 7 External interrupt Mask used primarily for interprocessor signalling &
- clock interupts.
+ clock interrupts.
8-11 8-11 PSW Key used for complex memory protection mechanism not used under linux
@@ -2423,7 +2423,7 @@
There is a new device layer for channel devices, some
drivers e.g. lcs are registered with this layer.
If the device uses the channel device layer you'll be
-able to find what interupts it uses & the current state
+able to find what interrupts it uses & the current state
of the device.
See the manpage chandev.8 &type cat /proc/chandev for more info.
diff -Nru a/Documentation/s390/cds.txt b/Documentation/s390/cds.txt
--- a/Documentation/s390/cds.txt Mon Feb 24 11:06:13 2003
+++ b/Documentation/s390/cds.txt Mon Feb 24 11:06:13 2003
@@ -286,7 +286,7 @@
struct ccw1 {
__u8 cmd_code;/* command code */
- __u8 flags; /* flags, like IDA adressing, etc. */
+ __u8 flags; /* flags, like IDA addressing, etc. */
__u16 count; /* byte count */
__u32 cda; /* data address */
} __attribute__ ((packed,aligned(8)));
diff -Nru a/Documentation/s390/driver-model.txt b/Documentation/s390/driver-model.txt
--- a/Documentation/s390/driver-model.txt Mon Feb 24 11:06:07 2003
+++ b/Documentation/s390/driver-model.txt Mon Feb 24 11:06:07 2003
@@ -51,13 +51,10 @@
This is done in several steps.
-a. Some drivers need several ccw devices to make up one device. This drivers
- provide a 'chaining' interface (driver dependend) which allows to specify
- which ccw devices form a device.
-b. Each driver provides one or more parameter interfaces where parameters can
+a. Each driver can provide one or more parameter interfaces where parameters can
be specified. These interfaces are also in the driver's responsibility.
-c. After a. and b. have been performed, if neccessary, the device is finally
- brought up via the 'online' interface.
+b. After a. has been performed, if neccessary, the device is finally brought up
+ via the 'online' interface.
1.2 Writing a driver for ccw devices
@@ -84,7 +81,6 @@
struct ccw_device_id *ids;
int (*probe) (struct ccw_device *);
int (*remove) (struct ccw_device *);
- void (*release) (struct ccw_driver *);
int (*set_online) (struct ccw_device *);
int (*set_offline) (struct ccw_device *);
struct device_driver driver;
@@ -170,38 +166,56 @@
information about the interrupt from the irb parameter.
-2. System devices
------------------
+1.3 ccwgroup devices
+--------------------
+
+The ccwgroup mechanism is designed to handle devices consisting of multiple ccw
+devices, like lcs or ctc.
+
+The ccw driver provides a 'group' attribute. Piping bus ids of ccw devices to
+this attributes creates a ccwgroup device consisting of these ccw devices (if
+possible). This ccwgroup device can be set online or offline just like a normal
+ccw device.
-2.1 Channel paths
+To implement a ccwgroup driver, please refer to include/asm/ccwgroup.h. Keep in
+mind that most drivers will need to implement both a ccwgroup and a ccw driver
+(unless you have a meta ccw driver, like cu3088 for lcs and ctc).
+
+
+2. Channel paths
-----------------
-Every channel path is represented under sys/ as channel_path. (Unfortunately,
- is in decimal, which may look unfamiliar.)
+Channel paths show up, like subchannels, under the channel subsystem root (css0)
+and are called 'chp'. They have no driver and do not belong to any bus.
status - Can be 'online', 'logically offline' or 'n/a'.
Piping 'on' or 'off' sets the chpid logically online/offline.
-2.2 xpram
----------
+3. System devices
+-----------------
-xpram shows up under sys/ as 'xpram'.
+Note: cpus may yet be added here.
+3.1 xpram
+---------
-3. 'Legacy' devices
--------------------
+xpram shows up under sys/ as 'xpram'.
-The 'legacy' bus is for devices not detected, but specified by the user.
+4. Other devices
+----------------
-3.1 Netiucv
+4.1 Netiucv
-----------
-Netiucv connections show up under legacy/ as "netiucv". The interface
-number is assigned sequentially at module load.
-
-user - the user the connection goes to.
+The netiucv driver creates an attribute 'connection' under
+bus/iucv/drivers/NETIUCV. Piping to this attibute creates a new netiucv
+connection to the specified host.
+
+Netiucv connections show up under devices/iucv/ as "netiucv". The interface
+number is assigned sequentially to the connections defined via the 'connection'
+attribute. 'name' shows the connection partner.
buffer - maximum buffer size.
Pipe to it to change buffer size.
diff -Nru a/Documentation/scsi/ChangeLog.sym53c8xx_2 b/Documentation/scsi/ChangeLog.sym53c8xx_2
--- a/Documentation/scsi/ChangeLog.sym53c8xx_2 Mon Feb 24 11:06:09 2003
+++ b/Documentation/scsi/ChangeLog.sym53c8xx_2 Mon Feb 24 11:06:09 2003
@@ -102,7 +102,7 @@
Sun Sep 9 18:00 2001 Gerard Roudier
* version sym-2.1.12-20010909
- Change my email address.
- - Add infrastructure for the forthcoming 64 bit DMA adressing support.
+ - Add infrastructure for the forthcoming 64 bit DMA addressing support.
(Based on PCI 64 bit patch from David S. Miller)
- Donnot use anymore vm_offset_t type.
diff -Nru a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt
--- a/Documentation/scsi/scsi_mid_low_api.txt Mon Feb 24 11:06:12 2003
+++ b/Documentation/scsi/scsi_mid_low_api.txt Mon Feb 24 11:06:12 2003
@@ -22,13 +22,28 @@
a SCSI host and a PCI device is common but not required (e.g. with
ISA or MCA adapters).]
+This version of the document roughly matches linux kernel version 2.5.63 .
+
+Documentation
+=============
+There is a SCSI documentation directory within the kernel source tree.
+That directory is typically /usr/src/linux/Documentation/scsi . Most
+documents are in plain (i.e. ASCII) text. This file can be found in that
+directory, named scsi_mid_low_api.txt . Many LLDs are documented there
+(e.g. aic7xxx.txt). The SCSI mid-level is briefly described in scsi.txt
+(with a url to a document describing the SCSI subsystem in the lk 2.4
+series). Two upper level drivers have documents in that directory:
+st.txt (SCSI tape driver) and scsi-generic.txt .
+
+Some documentation (or urls) for LLDs may be in the C source code or
+in the same directory. For example to find a url about the USB mass
+storage driver see the /usr/src/linux/drivers/usb/storage directory.
+
The Linux kernel source Documentation/DocBook/scsidrivers.tmpl file
refers to this file. With the appropriate DocBook toolset, this permits
users to generate html, ps and pdf renderings of information within this
file (e.g. the interface functions).
-This version of the document roughly matches lk 2.5.50 .
-
Driver structure
================
Traditionally a LLD for the SCSI subsystem has been at least two files in
@@ -100,12 +115,11 @@
since the effected disk can be "cleaned up" the next time it is seen.
During LLD initialization the driver should register itself with the
-appropriate IO bus that it expects to find HBA(s) (e.g. the PCI bus). This
-can probably be done via sysfs (formerly known as driverfs). Any driver
-parameters (especially those that are writeable after the driver is
-loaded) could also be registered with sysfs at this point. At the end of
-driver initialization the SCSI mid level is typically not aware of its
-presence.
+appropriate IO bus on which it expects to find HBA(s) (e.g. the PCI bus).
+This can probably be done via sysfs. Any driver parameters (especially
+those that are writeable after the driver is loaded) could also be
+registered with sysfs at this point. At the end of driver initialization
+the SCSI mid level is typically not aware of its presence.
At some later time, the LLD becomes aware of a HBA and what follows
is a typical sequence of calls between the LLD and the mid level.
@@ -149,7 +163,7 @@
(a pointer is returned by scsi_register() ) and struct scsi_device
instances (a pointer is passed as the parameter to slave_alloc() and
slave_configure() ). Both classes of instances are "owned" by the
-mid-level. struct scsi_devices instances are freed after slave_destroy().
+mid-level. struct scsi_device instances are freed after slave_destroy().
struct Scsi_Host instances are freed after scsi_unregister().
@@ -249,6 +263,8 @@
/**
* scsi_add_host - perform sysfs registration and SCSI bus scan.
* @shost: pointer to scsi host instance
+ * @dev: pointer to struct device host instance of class type scsi
+ * (or related)
*
* Returns 0 on success, negative errno of failure (e.g. -ENOMEM)
*
@@ -256,7 +272,24 @@
* successful call to scsi_register().
* Defined in drivers/scsi/hosts.c
**/
-int scsi_add_host(struct Scsi_Host *shost)
+int scsi_add_host(struct Scsi_Host *shost, struct device * dev)
+
+
+/**
+ * scsi_add_timer - (re-)start timer on a SCSI command.
+ * @scmd: pointer to scsi command instance
+ * @timeout: duration of timeout in "jiffies"
+ * @complete: pointer to function to call if timeout expires
+ *
+ * Returns nothing
+ *
+ * Notes: All commands issued by upper levels already have a timeout
+ * associated with them. A LLD can use this function to change
+ * the existing timeout value.
+ * Defined in drivers/scsi/scsi_error.c
+ **/
+void scsi_add_timer(Scsi_Cmnd *scmd, int timeout, void (*complete)
+ (Scsi_Cmnd *))
/**
@@ -322,6 +355,21 @@
/**
+ * scsi_delete_timer - cancel timer on a SCSI command.
+ * @scmd: pointer to scsi command instance
+ *
+ * Returns 1 if able to cancel timer else 0 (i.e. too late or already
+ * cancelled).
+ *
+ * Notes: All commands issued by upper levels already have a timeout
+ * associated with them. A LLD can use this function to cancel the
+ * timer.
+ * Defined in drivers/scsi/scsi_error.c
+ **/
+int scsi_delete_timer(Scsi_Cmnd *scmd)
+
+
+/**
* scsi_partsize - parse partition table into cylinders, heads + sectors
* @buf: pointer to partition table
* @capacity: size of (total) disk in 512 byte sectors
@@ -404,15 +452,15 @@
/**
- * scsi_set_pci_device - place PCI device reference in host structure
+ * scsi_set_device - place device reference in host structure
* @shost: a pointer to a scsi host instance
- * @pdev: pointer to PCI device instance to assign
+ * @pdev: pointer to device instance to assign
*
* Returns nothing
*
* Notes: Defined in drivers/scsi/hosts.h .
**/
-void scsi_set_pci_device(struct Scsi_Host * shost, struct pci_dev * pdev)
+void scsi_set_device(struct Scsi_Host * shost, struct device * dev)
/**
@@ -430,6 +478,26 @@
/**
+ * scsi_track_queue_full - track successive QUEUE_FULL events on given
+ * device to determine if and when there is a need
+ * to adjust the queue depth on the device.
+ * @SDptr: pointer to SCSI device instance
+ * @depth: Current number of outstanding SCSI commands on this device,
+ * not counting the one returned as QUEUE_FULL.
+ *
+ * Returns 0 - no change needed
+ * >0 - adjust queue depth to this new depth
+ * -1 - drop back to untagged operation using host->cmd_per_lun
+ * as the untagged command depth
+ *
+ * Notes: LLDs may call this at any time and we will do "The Right
+ * Thing"; interrupt context safe.
+ * Defined in drivers/scsi/scsi.c .
+ **/
+int scsi_track_queue_full(Scsi_Device *SDptr, int depth)
+
+
+/**
* scsi_unblock_requests - allow further commands to be queued to given host
*
* @SHpnt: pointer to host to unblock commands on
@@ -1008,4 +1076,4 @@
Douglas Gilbert
dgilbert@interlog.com
-29th November 2002
+21st February 2003
diff -Nru a/Documentation/sonypi.txt b/Documentation/sonypi.txt
--- a/Documentation/sonypi.txt Mon Feb 24 11:06:07 2003
+++ b/Documentation/sonypi.txt Mon Feb 24 11:06:07 2003
@@ -1,6 +1,6 @@
Sony Programmable I/O Control Device Driver Readme
--------------------------------------------------
- Copyright (C) 2001-2002 Stelian Pop
+ Copyright (C) 2001-2003 Stelian Pop
Copyright (C) 2001-2002 Alcôve
Copyright (C) 2001 Michael Ashley
Copyright (C) 2001 Junichi Morita
@@ -44,7 +44,7 @@
to /etc/modules.conf file, when the driver is compiled as a module or by
adding the following to the kernel command line (in your bootloader):
- sonypi=minor[,verbose[,fnkeyinit[,camera[,compat[,mask]]]]]
+ sonypi=minor[,verbose[,fnkeyinit[,camera[,compat[,mask[,useinput]]]]]]
where:
@@ -96,6 +96,11 @@
SONYPI_THUMBPHRASE_MASK 0x0200
SONYPI_MEYE_MASK 0x0400
SONYPI_MEMORYSTICK_MASK 0x0800
+
+ useinput: if set (which is the default) jogdial events are
+ forwarded to the input subsystem as mouse wheel
+ events.
+
Module use:
-----------
diff -Nru a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
--- a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Mon Feb 24 11:06:09 2003
+++ b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl Mon Feb 24 11:06:09 2003
@@ -1377,8 +1377,6 @@
module_init(alsa_card_mychip_init)
module_exit(alsa_card_mychip_exit)
-
- EXPORT_NO_SYMBOLS; /* for old kernels only */
]]>
diff -Nru a/Documentation/sound/oss/PSS-updates b/Documentation/sound/oss/PSS-updates
--- a/Documentation/sound/oss/PSS-updates Mon Feb 24 11:06:14 2003
+++ b/Documentation/sound/oss/PSS-updates Mon Feb 24 11:06:14 2003
@@ -10,7 +10,7 @@
This parameter is basically a flag. A 0 will leave the joystick port
disabled, while a non-zero value would enable the joystick port. The default
-setting is pss_enable_joystick=0 as this keeps this driver fully compatable
+setting is pss_enable_joystick=0 as this keeps this driver fully compatible
with systems that were using previous versions of this driver. If you wish to
enable the joystick port you will have to add pss_enable_joystick=1 as an
argument to the driver. To actually use the joystick port you will then have
@@ -31,7 +31,7 @@
assigned to the CDROM port when you loaded your pss sound driver. (ex.
modprobe pss pss_cdrom_port=0x340 && modprobe aztcd aztcd=0x340) The default
setting of this parameter leaves the CDROM port disabled to maintain full
-compatability with systems using previous versions of this driver.
+compatibility with systems using previous versions of this driver.
Other options have also been added for the added convenience and utility
of the user. These options are only available if this driver is loaded as a
@@ -49,7 +49,7 @@
mpu401 && rmmod sound && rmmod soundcore" and retain the full functionality of
his CDROM and/or joystick port(s) while gaining back the memory previously used
by the sound drivers. This default setting of this parameter is 0 to retain
-full behavioral compatability with previous versions of this driver.
+full behavioral compatibility with previous versions of this driver.
pss_keep_settings
@@ -60,7 +60,7 @@
emulations by default on the driver's unloading (as it probably should), so
specifying it now will ensure that all future versions of this driver will
continue to work as expected. The default value of this parameter is 1 to
-retain full behavioral compatability with previous versions of this driver.
+retain full behavioral compatibility with previous versions of this driver.
pss_firmware
diff -Nru a/Documentation/sysrq.txt b/Documentation/sysrq.txt
--- a/Documentation/sysrq.txt Mon Feb 24 11:06:09 2003
+++ b/Documentation/sysrq.txt Mon Feb 24 11:06:09 2003
@@ -164,7 +164,7 @@
If for some reason you feel the need to call the handle_sysrq function from
within a function called by handle_sysrq, you must be aware that you are in
-a lock (you are also in an interupt handler, which means don't sleep!), so
+a lock (you are also in an interrupt handler, which means don't sleep!), so
you must call __handle_sysrq_nolock instead.
* I have more questions, who can I ask?
diff -Nru a/Documentation/video4linux/meye.txt b/Documentation/video4linux/meye.txt
--- a/Documentation/video4linux/meye.txt Mon Feb 24 11:06:12 2003
+++ b/Documentation/video4linux/meye.txt Mon Feb 24 11:06:12 2003
@@ -1,6 +1,6 @@
Vaio Picturebook Motion Eye Camera Driver Readme
------------------------------------------------
- Copyright (C) 2001-2002 Stelian Pop
+ Copyright (C) 2001-2003 Stelian Pop
Copyright (C) 2001-2002 Alcôve
Copyright (C) 2000 Andrew Tridgell
diff -Nru a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt
--- a/Documentation/vm/hugetlbpage.txt Mon Feb 24 11:06:08 2003
+++ b/Documentation/vm/hugetlbpage.txt Mon Feb 24 11:06:08 2003
@@ -66,7 +66,7 @@
/proc/sys/vm_nr_hugepages indicates the current number of configured hugetlb
pages in the kernel. Super user privileges are required for modification of
-this value. The allocation of hugetlb pages is posible only if there are
+this value. The allocation of hugetlb pages is possible only if there are
enough physically contiguous free pages in system OR if there are enough
hugetlb pages free that can be transfered back to regular memory pool.
diff -Nru a/MAINTAINERS b/MAINTAINERS
--- a/MAINTAINERS Mon Feb 24 11:06:11 2003
+++ b/MAINTAINERS Mon Feb 24 11:06:11 2003
@@ -215,6 +215,14 @@
L: linux-scsi@vger.kernel.org
S: Maintained
+ALCATEL SPEEDTOUCH USB DRIVER
+P: Duncan Sands
+M: duncan.sands@wanadoo.fr
+L: linux-usb-users@lists.sourceforge.net
+L: linux-usb-devel@lists.sourceforge.net
+W: http://www.linux-usb.org/SpeedTouch/
+S: Maintained
+
ALPHA PORT
P: Richard Henderson
M: rth@twiddle.net
@@ -266,6 +274,13 @@
L: linux-net@vger.kernel.org
S: Maintained
+ATM
+P: Chas Williams
+M: chas@cmf.nrl.navy.mil
+L: linux-atm-general@lists.sourceforge.net
+W: http://linux-atm.sourceforge.net
+S: Maintained
+
AX.25 NETWORK LAYER
P: Ralf Baechle
M: ralf@linux-mips.org
@@ -308,6 +323,15 @@
W: http://www.holtmann.org/linux/bluetooth/
S: Maintained
+BONDING DRIVER
+P: Chad Tindel
+M: ctindel@users.sourceforge.net
+P: Jay Vosburgh
+M: fubar@us.ibm.com
+L: bonding-devel@lists.sourceforge.net
+W: http://sourceforge.net/projects/bonding/
+S: Supported
+
BTTV VIDEO4LINUX DRIVER
P: Gerd Knorr
M: kraxel@bytesex.org
@@ -1238,6 +1262,8 @@
M: kuznet@ms2.inr.ac.ru
P: Pekka Savola (ipv6)
M: pekkas@netcore.fi
+P: James Morris
+M: jmorris@intercode.com.au
L: netdev@oss.sgi.com
S: Maintained
@@ -1565,11 +1591,11 @@
S: Supported
SGI VISUAL WORKSTATION 320 AND 540
-P: Bent Hagemark
-M: bh@sgi.com
-P: Ingo Molnar
-M: mingo@redhat.com
-S: Maintained
+P: Andrey Panin
+M: pazke@orbita1.ru
+L: linux-visws@lists.sf.net
+W: http://linux-visws.sf.net
+S: Maintained for 2.5.
SIS 5513 IDE CONTROLLER DRIVER
P: Lionel Bouton
diff -Nru a/Makefile b/Makefile
--- a/Makefile Mon Feb 24 11:06:08 2003
+++ b/Makefile Mon Feb 24 11:06:08 2003
@@ -1,6 +1,6 @@
VERSION = 2
PATCHLEVEL = 5
-SUBLEVEL = 62
+SUBLEVEL = 63
EXTRAVERSION =
# *DOCUMENTATION*
diff -Nru a/README b/README
--- a/README Mon Feb 24 11:06:13 2003
+++ b/README Mon Feb 24 11:06:13 2003
@@ -67,12 +67,12 @@
- You can also upgrade between 2.5.xx releases by patching. Patches are
distributed in the traditional gzip and the new bzip2 format. To
install by patching, get all the newer patch files, enter the
- directory in which you unpacked the kernel source and execute:
+ top level directory of the kernel source (linux-2.5.xx) and execute:
- gzip -cd patchXX.gz | patch -p0
+ gzip -cd ../patch-2.5.xx.gz | patch -p1
or
- bzip2 -dc patchXX.bz2 | patch -p0
+ bzip2 -dc ../patch-2.5.xx.bz2 | patch -p1
(repeat xx for all versions bigger than the version of your current
source tree, _in_order_) and you should be ok. You may want to remove
@@ -148,8 +148,6 @@
- Check the top Makefile for further site-dependent configuration
(default SVGA mode etc).
-
- - Finally, do a "make dep" to set up all the dependencies correctly.
COMPILING the kernel:
diff -Nru a/arch/alpha/Kconfig b/arch/alpha/Kconfig
--- a/arch/alpha/Kconfig Mon Feb 24 11:06:12 2003
+++ b/arch/alpha/Kconfig Mon Feb 24 11:06:12 2003
@@ -935,6 +935,7 @@
source "net/bluetooth/Kconfig"
+source "arch/alpha/oprofile/Kconfig"
menu "Kernel hacking"
diff -Nru a/arch/alpha/Makefile b/arch/alpha/Makefile
--- a/arch/alpha/Makefile Mon Feb 24 11:06:11 2003
+++ b/arch/alpha/Makefile Mon Feb 24 11:06:11 2003
@@ -92,9 +92,10 @@
head-y := arch/alpha/kernel/head.o
-core-y += arch/alpha/kernel/ arch/alpha/mm/
-core-$(CONFIG_MATHEMU) += arch/alpha/math-emu/
-libs-y += arch/alpha/lib/
+core-y += arch/alpha/kernel/ arch/alpha/mm/
+core-$(CONFIG_MATHEMU) += arch/alpha/math-emu/
+drivers-$(CONFIG_OPROFILE) += arch/alpha/oprofile/
+libs-y += arch/alpha/lib/
# export what is needed by arch/alpha/boot/Makefile
LIBS_Y := $(patsubst %/, %/lib.a, $(libs-y))
diff -Nru a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile
--- a/arch/alpha/kernel/Makefile Mon Feb 24 11:06:09 2003
+++ b/arch/alpha/kernel/Makefile Mon Feb 24 11:06:09 2003
@@ -3,8 +3,8 @@
#
EXTRA_TARGETS := head.o
-
EXTRA_AFLAGS := $(CFLAGS)
+EXTRA_CFLAGS := -Werror -Wno-sign-compare
obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \
irq_alpha.o signal.o setup.o ptrace.o time.o semaphore.o \
diff -Nru a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
--- a/arch/alpha/kernel/alpha_ksyms.c Mon Feb 24 11:06:08 2003
+++ b/arch/alpha/kernel/alpha_ksyms.c Mon Feb 24 11:06:08 2003
@@ -119,10 +119,6 @@
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(clear_page);
-EXPORT_SYMBOL(__delay);
-EXPORT_SYMBOL(__udelay);
-EXPORT_SYMBOL(udelay);
-
EXPORT_SYMBOL(__direct_map_base);
EXPORT_SYMBOL(__direct_map_size);
diff -Nru a/arch/alpha/kernel/core_irongate.c b/arch/alpha/kernel/core_irongate.c
--- a/arch/alpha/kernel/core_irongate.c Mon Feb 24 11:06:12 2003
+++ b/arch/alpha/kernel/core_irongate.c Mon Feb 24 11:06:12 2003
@@ -236,14 +236,15 @@
unsigned long size;
size = initrd_end - initrd_start;
- free_bootmem(__pa(initrd_start), PAGE_ALIGN(size));
+ free_bootmem_node(NODE_DATA(0), __pa(initrd_start),
+ PAGE_ALIGN(size));
if (!move_initrd(pci_mem))
printk("irongate_init_arch: initrd too big "
"(%ldK)\ndisabling initrd\n",
size / 1024);
}
#endif
- reserve_bootmem(pci_mem, memtop - pci_mem);
+ reserve_bootmem_node(NODE_DATA(0), pci_mem, memtop - pci_mem);
printk("irongate_init_arch: temporarily reserving "
"region %08lx-%08lx for PCI\n", pci_mem, memtop - 1);
}
diff -Nru a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
--- a/arch/alpha/kernel/entry.S Mon Feb 24 11:06:07 2003
+++ b/arch/alpha/kernel/entry.S Mon Feb 24 11:06:07 2003
@@ -582,6 +582,7 @@
lda $8, 0x3fff
bsr $1, undo_switch_stack
bic $sp, $8, $8
+ mov $17, $0
ret
.end alpha_switch_to
diff -Nru a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
--- a/arch/alpha/kernel/irq_alpha.c Mon Feb 24 11:06:08 2003
+++ b/arch/alpha/kernel/irq_alpha.c Mon Feb 24 11:06:08 2003
@@ -74,7 +74,7 @@
alpha_mv.device_interrupt(vector, regs);
return;
case 4:
- perf_irq(vector, regs);
+ perf_irq(la_ptr, regs);
return;
default:
printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
diff -Nru a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
--- a/arch/alpha/kernel/ptrace.c Mon Feb 24 11:06:13 2003
+++ b/arch/alpha/kernel/ptrace.c Mon Feb 24 11:06:13 2003
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
@@ -255,6 +256,8 @@
struct pt_regs *regs)
{
struct task_struct *child;
+ unsigned long tmp;
+ size_t copied;
long ret;
lock_kernel();
@@ -265,6 +268,9 @@
/* are we already being traced? */
if (current->ptrace & PT_PTRACED)
goto out_notsk;
+ ret = security_ptrace(current->parent, current);
+ if (ret)
+ goto out_notsk;
/* set the ptrace bit in the process ptrace flags. */
current->ptrace |= PT_PTRACED;
ret = 0;
@@ -272,6 +278,7 @@
}
if (pid == 1) /* you may not mess with init */
goto out_notsk;
+
ret = -ESRCH;
read_lock(&tasklist_lock);
child = find_task_by_pid(pid);
@@ -280,77 +287,65 @@
read_unlock(&tasklist_lock);
if (!child)
goto out_notsk;
+
if (request == PTRACE_ATTACH) {
ret = ptrace_attach(child);
goto out;
}
- ret = -ESRCH;
- if (!(child->ptrace & PT_PTRACED)) {
- DBG(DBG_MEM, ("child not traced\n"));
- goto out;
- }
- if (child->state != TASK_STOPPED) {
- DBG(DBG_MEM, ("child process not stopped\n"));
- if (request != PTRACE_KILL)
- goto out;
- }
- if (child->parent != current) {
- DBG(DBG_MEM, ("child not parent of this process\n"));
+
+ ret = ptrace_check_attach(child, request == PTRACE_KILL);
+ if (ret < 0)
goto out;
- }
switch (request) {
/* When I and D space are separate, these will need to be fixed. */
case PTRACE_PEEKTEXT: /* read word at location addr. */
- case PTRACE_PEEKDATA: {
- unsigned long tmp;
- int copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
+ case PTRACE_PEEKDATA:
+ copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
ret = -EIO;
if (copied != sizeof(tmp))
- goto out;
+ break;
regs->r0 = 0; /* special return: no errors */
ret = tmp;
- goto out;
- }
+ break;
/* Read register number ADDR. */
case PTRACE_PEEKUSR:
regs->r0 = 0; /* special return: no errors */
ret = get_reg(child, addr);
DBG(DBG_MEM, ("peek $%ld->%#lx\n", addr, ret));
- goto out;
+ break;
/* When I and D space are separate, this will have to be fixed. */
case PTRACE_POKETEXT: /* write the word at location addr. */
- case PTRACE_POKEDATA: {
- unsigned long tmp = data;
- int copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1);
+ case PTRACE_POKEDATA:
+ tmp = data;
+ copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1);
ret = (copied == sizeof(tmp)) ? 0 : -EIO;
- goto out;
- }
+ break;
case PTRACE_POKEUSR: /* write the specified register */
DBG(DBG_MEM, ("poke $%ld<-%#lx\n", addr, data));
ret = put_reg(child, addr, data);
- goto out;
+ break;
- case PTRACE_SYSCALL: /* continue and stop at next
- (return from) syscall */
+ case PTRACE_SYSCALL:
+ /* continue and stop at next (return from) syscall */
case PTRACE_CONT: /* restart after signal. */
ret = -EIO;
if ((unsigned long) data > _NSIG)
- goto out;
+ break;
if (request == PTRACE_SYSCALL)
set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
else
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
child->exit_code = data;
- wake_up_process(child);
/* make sure single-step breakpoint is gone. */
ptrace_cancel_bpt(child);
- ret = data;
- goto out;
+ wake_up_process(child);
+ ret = 0;
+ break;
/*
* Make the child exit. Best I can do is send it a sigkill.
@@ -358,19 +353,19 @@
* exit.
*/
case PTRACE_KILL:
- if (child->state != TASK_ZOMBIE) {
- wake_up_process(child);
- child->exit_code = SIGKILL;
- }
+ ret = 0;
+ if (child->state == TASK_ZOMBIE)
+ break;
+ child->exit_code = SIGKILL;
/* make sure single-step breakpoint is gone. */
ptrace_cancel_bpt(child);
- ret = 0;
+ wake_up_process(child);
goto out;
case PTRACE_SINGLESTEP: /* execute single instruction. */
ret = -EIO;
if ((unsigned long) data > _NSIG)
- goto out;
+ break;
/* Mark single stepping. */
child->thread_info->bpt_nsaved = -1;
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
diff -Nru a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
--- a/arch/alpha/kernel/sys_sable.c Mon Feb 24 11:06:08 2003
+++ b/arch/alpha/kernel/sys_sable.c Mon Feb 24 11:06:08 2003
@@ -268,7 +268,7 @@
{ 32+3, 32+3, 32+3, 32+3, 32+3}, /* IdSel 7, slot 1 */
{ 32+4, 32+4, 32+4, 32+4, 32+4}, /* IdSel 8, slot 2 */
};
- const long min_idsel = 0, max_idsel = 8, irqs_per_slot = 5;
+ long min_idsel = 0, max_idsel = 8, irqs_per_slot = 5;
return COMMON_TABLE_LOOKUP;
}
diff -Nru a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
--- a/arch/alpha/kernel/sys_wildfire.c Mon Feb 24 11:06:09 2003
+++ b/arch/alpha/kernel/sys_wildfire.c Mon Feb 24 11:06:09 2003
@@ -314,7 +314,7 @@
{ 56, 56, 56+1, 56+2, 56+3}, /* IdSel 6 PCI 1 slot 6 */
{ 60, 60, 60+1, 60+2, 60+3}, /* IdSel 7 PCI 1 slot 7 */
};
- const long min_idsel = 0, max_idsel = 7, irqs_per_slot = 5;
+ long min_idsel = 0, max_idsel = 7, irqs_per_slot = 5;
struct pci_controller *hose = dev->sysdata;
int irq = COMMON_TABLE_LOOKUP;
diff -Nru a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile
--- a/arch/alpha/lib/Makefile Mon Feb 24 11:06:14 2003
+++ b/arch/alpha/lib/Makefile Mon Feb 24 11:06:14 2003
@@ -3,6 +3,8 @@
#
EXTRA_AFLAGS := $(CFLAGS)
+EXTRA_CFLAGS := -Werror
+
L_TARGET := lib.a
# Many of these routines have implementations tuned for ev6.
diff -Nru a/arch/alpha/lib/ev6-memcpy.S b/arch/alpha/lib/ev6-memcpy.S
--- a/arch/alpha/lib/ev6-memcpy.S Mon Feb 24 11:06:08 2003
+++ b/arch/alpha/lib/ev6-memcpy.S Mon Feb 24 11:06:08 2003
@@ -243,6 +243,6 @@
.end memcpy
-/* For backwards module compatability. */
+/* For backwards module compatibility. */
__memcpy = memcpy
.globl __memcpy
diff -Nru a/arch/alpha/lib/udelay.c b/arch/alpha/lib/udelay.c
--- a/arch/alpha/lib/udelay.c Mon Feb 24 11:06:12 2003
+++ b/arch/alpha/lib/udelay.c Mon Feb 24 11:06:12 2003
@@ -1,15 +1,16 @@
-#include
-#include /* for udelay's use of smp_processor_id */
-#include
-#include
-#include
-
/*
* Copyright (C) 1993, 2000 Linus Torvalds
*
* Delay routines, using a pre-computed "loops_per_jiffy" value.
*/
+#include
+#include
+#include /* for udelay's use of smp_processor_id */
+#include
+#include
+#include
+
/*
* Use only for very small delays (< 1 msec).
*
@@ -18,7 +19,8 @@
* a 1GHz box, that's about 2 seconds.
*/
-void __delay(int loops)
+void
+__delay(int loops)
{
int tmp;
__asm__ __volatile__(
@@ -30,18 +32,24 @@
: "=&r" (tmp), "=r" (loops) : "1"(loops));
}
-void __udelay(unsigned long usecs, unsigned long lpj)
+#ifdef CONFIG_SMP
+#define LPJ cpu_data[smp_processor_id()].loops_per_jiffy
+#else
+#define LPJ loops_per_jiffy
+#endif
+
+void
+udelay(unsigned long usecs)
{
- usecs *= (((unsigned long)HZ << 32) / 1000000) * lpj;
+ usecs *= (((unsigned long)HZ << 32) / 1000000) * LPJ;
__delay((long)usecs >> 32);
}
+EXPORT_SYMBOL(udelay);
-void udelay(unsigned long usecs)
+void
+ndelay(unsigned long nsecs)
{
-#ifdef CONFIG_SMP
- __udelay(usecs, cpu_data[smp_processor_id()].loops_per_jiffy);
-#else
- __udelay(usecs, loops_per_jiffy);
-#endif
+ nsecs *= (((unsigned long)HZ << 32) / 1000000000) * LPJ;
+ __delay((long)nsecs >> 32);
}
-
+EXPORT_SYMBOL(ndelay);
diff -Nru a/arch/alpha/math-emu/Makefile b/arch/alpha/math-emu/Makefile
--- a/arch/alpha/math-emu/Makefile Mon Feb 24 11:06:10 2003
+++ b/arch/alpha/math-emu/Makefile Mon Feb 24 11:06:10 2003
@@ -2,6 +2,6 @@
# Makefile for the FPU instruction emulation.
#
-CFLAGS += -Iinclude/math-emu -w
+EXTRA_CFLAGS := -w
obj-$(CONFIG_MATHEMU) += math.o qrnnd.o
diff -Nru a/arch/alpha/mm/Makefile b/arch/alpha/mm/Makefile
--- a/arch/alpha/mm/Makefile Mon Feb 24 11:06:14 2003
+++ b/arch/alpha/mm/Makefile Mon Feb 24 11:06:14 2003
@@ -2,6 +2,8 @@
# Makefile for the linux alpha-specific parts of the memory manager.
#
+EXTRA_CFLAGS := -Werror
+
obj-y := init.o fault.o extable.o remap.o
obj-$(CONFIG_DISCONTIGMEM) += numa.o
diff -Nru a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c
--- a/arch/alpha/mm/numa.c Mon Feb 24 11:06:07 2003
+++ b/arch/alpha/mm/numa.c Mon Feb 24 11:06:07 2003
@@ -279,7 +279,8 @@
initrd_end,
phys_to_virt(PFN_PHYS(max_low_pfn)));
} else {
- reserve_bootmem_node(NODE_DATA(KVADDR_TO_NID(initrd_start)),
+ nid = NODE_DATA(kvaddr_to_nid(initrd_start));
+ reserve_bootmem_node(nid,
virt_to_phys((void *)initrd_start),
INITRD_SIZE);
}
@@ -349,8 +350,8 @@
initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
printk("Memory: %luk/%luk available (%luk kernel code, %luk reserved, "
- "%luk data, %luk init)\n",
- nr_free_pages() << (PAGE_SHIFT-10),
+ "%luk data, %luk init)\n",
+ (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
num_physpages << (PAGE_SHIFT-10),
codesize >> 10,
reservedpages << (PAGE_SHIFT-10),
diff -Nru a/arch/alpha/oprofile/Kconfig b/arch/alpha/oprofile/Kconfig
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/Kconfig Mon Feb 24 11:06:14 2003
@@ -0,0 +1,23 @@
+
+menu "Profiling support"
+ depends on EXPERIMENTAL
+
+config PROFILING
+ bool "Profiling support (EXPERIMENTAL)"
+ help
+ Say Y here to enable the extended profiling support mechanisms used
+ by profilers such as OProfile.
+
+
+config OPROFILE
+ tristate "OProfile system profiling (EXPERIMENTAL)"
+ depends on PROFILING
+ help
+ OProfile is a profiling system capable of profiling the
+ whole system, include the kernel, kernel modules, libraries,
+ and applications.
+
+ If unsure, say N.
+
+endmenu
+
diff -Nru a/arch/alpha/oprofile/Makefile b/arch/alpha/oprofile/Makefile
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/Makefile Mon Feb 24 11:06:14 2003
@@ -0,0 +1,18 @@
+EXTRA_CFLAGS := -Werror -Wno-sign-compare
+
+obj-$(CONFIG_OPROFILE) += oprofile.o
+
+DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
+ oprof.o cpu_buffer.o buffer_sync.o \
+ event_buffer.o oprofile_files.o \
+ oprofilefs.o oprofile_stats.o )
+
+oprofile-y := $(DRIVER_OBJS) common.o
+oprofile-$(CONFIG_ALPHA_GENERIC) += op_model_ev4.o \
+ op_model_ev5.o \
+ op_model_ev6.o \
+ op_model_ev67.o
+oprofile-$(CONFIG_ALPHA_EV4) += op_model_ev4.o
+oprofile-$(CONFIG_ALPHA_EV5) += op_model_ev5.o
+oprofile-$(CONFIG_ALPHA_EV6) += op_model_ev6.o \
+ op_model_ev67.o
diff -Nru a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/common.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,188 @@
+/**
+ * @file arch/alpha/oprofile/common.c
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "op_impl.h"
+
+extern struct op_axp_model op_model_ev4 __attribute__((weak));
+extern struct op_axp_model op_model_ev5 __attribute__((weak));
+extern struct op_axp_model op_model_pca56 __attribute__((weak));
+extern struct op_axp_model op_model_ev6 __attribute__((weak));
+extern struct op_axp_model op_model_ev67 __attribute__((weak));
+
+static struct op_axp_model *model;
+
+extern void (*perf_irq)(unsigned long, struct pt_regs *);
+static void (*save_perf_irq)(unsigned long, struct pt_regs *);
+
+static struct op_counter_config ctr[20];
+static struct op_system_config sys;
+static struct op_register_config reg;
+
+/* Called from do_entInt to handle the performance monitor interrupt. */
+
+static void
+op_handle_interrupt(unsigned long which, struct pt_regs *regs)
+{
+ model->handle_interrupt(which, regs, ctr);
+
+ /* If the user has selected an interrupt frequency that is
+ not exactly the width of the counter, write a new value
+ into the counter such that it'll overflow after N more
+ events. */
+ if ((reg.need_reset >> which) & 1)
+ model->reset_ctr(®, which);
+}
+
+static int
+op_axp_setup(void)
+{
+ unsigned long i, e;
+
+ /* Install our interrupt handler into the existing hook. */
+ save_perf_irq = perf_irq;
+ perf_irq = op_handle_interrupt;
+
+ /* Compute the mask of enabled counters. */
+ for (i = e = 0; i < model->num_counters; ++i)
+ if (ctr[0].enabled)
+ e |= 1 << i;
+ reg.enable = e;
+
+ /* Pre-compute the values to stuff in the hardware registers. */
+ model->reg_setup(®, ctr, &sys);
+
+ /* Configure the registers on all cpus. */
+ smp_call_function(model->cpu_setup, ®, 0, 1);
+ model->cpu_setup(®);
+ return 0;
+}
+
+static void
+op_axp_shutdown(void)
+{
+ /* Remove our interrupt handler. We may be removing this module. */
+ perf_irq = save_perf_irq;
+}
+
+static void
+op_axp_cpu_start(void *dummy)
+{
+ wrperfmon(1, reg.enable);
+}
+
+static int
+op_axp_start(void)
+{
+ smp_call_function(op_axp_cpu_start, NULL, 0, 1);
+ op_axp_cpu_start(NULL);
+ return 0;
+}
+
+static inline void
+op_axp_cpu_stop(void *dummy)
+{
+ /* Disable performance monitoring for all counters. */
+ wrperfmon(0, -1);
+}
+
+static void
+op_axp_stop(void)
+{
+ smp_call_function(op_axp_cpu_stop, NULL, 0, 1);
+ op_axp_cpu_stop(NULL);
+}
+
+static int
+op_axp_create_files(struct super_block * sb, struct dentry * root)
+{
+ int i;
+
+ for (i = 0; i < model->num_counters; ++i) {
+ struct dentry *dir;
+ char buf[3];
+
+ snprintf(buf, sizeof buf, "%d", i);
+ dir = oprofilefs_mkdir(sb, root, buf);
+
+ oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
+ oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
+ oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
+ /* Dummies. */
+ oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
+ oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
+ oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
+ }
+
+ if (model->can_set_proc_mode) {
+ oprofilefs_create_ulong(sb, root, "enable_pal",
+ &sys.enable_pal);
+ oprofilefs_create_ulong(sb, root, "enable_kernel",
+ &sys.enable_kernel);
+ oprofilefs_create_ulong(sb, root, "enable_user",
+ &sys.enable_user);
+ }
+
+ return 0;
+}
+
+static struct oprofile_operations oprof_axp_ops = {
+ .create_files = op_axp_create_files,
+ .setup = op_axp_setup,
+ .shutdown = op_axp_shutdown,
+ .start = op_axp_start,
+ .stop = op_axp_stop,
+ .cpu_type = NULL /* To be filled in below. */
+};
+
+int __init
+oprofile_arch_init(struct oprofile_operations **ops)
+{
+ struct op_axp_model *lmodel = NULL;
+
+ switch (implver()) {
+ case IMPLVER_EV4:
+ lmodel = &op_model_ev4;
+ break;
+ case IMPLVER_EV5:
+ /* 21164PC has a slightly different set of events.
+ Recognize the chip by the presence of the MAX insns. */
+ if (!amask(AMASK_MAX))
+ lmodel = &op_model_pca56;
+ else
+ lmodel = &op_model_ev5;
+ break;
+ case IMPLVER_EV6:
+ /* 21264A supports ProfileMe.
+ Recognize the chip by the presence of the CIX insns. */
+ if (!amask(AMASK_CIX))
+ lmodel = &op_model_ev67;
+ else
+ lmodel = &op_model_ev6;
+ break;
+ }
+
+ if (!lmodel)
+ return ENODEV;
+ model = lmodel;
+
+ oprof_axp_ops.cpu_type = lmodel->cpu_type;
+ *ops = &oprof_axp_ops;
+
+ printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
+ lmodel->cpu_type);
+
+ return 0;
+}
diff -Nru a/arch/alpha/oprofile/op_impl.h b/arch/alpha/oprofile/op_impl.h
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/op_impl.h Mon Feb 24 11:06:14 2003
@@ -0,0 +1,55 @@
+/**
+ * @file arch/alpha/oprofile/op_impl.h
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ */
+
+#ifndef OP_IMPL_H
+#define OP_IMPL_H 1
+
+/* Per-counter configuration as set via oprofilefs. */
+struct op_counter_config {
+ unsigned long enabled;
+ unsigned long event;
+ unsigned long count;
+ /* Dummies because I am too lazy to hack the userspace tools. */
+ unsigned long kernel;
+ unsigned long user;
+ unsigned long unit_mask;
+};
+
+/* System-wide configuration as set via oprofilefs. */
+struct op_system_config {
+ unsigned long enable_pal;
+ unsigned long enable_kernel;
+ unsigned long enable_user;
+};
+
+/* Cached values for the various performance monitoring registers. */
+struct op_register_config {
+ unsigned long enable;
+ unsigned long mux_select;
+ unsigned long proc_mode;
+ unsigned long freq;
+ unsigned long reset_values;
+ unsigned long need_reset;
+};
+
+/* Per-architecture configury and hooks. */
+struct op_axp_model {
+ void (*reg_setup) (struct op_register_config *,
+ struct op_counter_config *,
+ struct op_system_config *);
+ void (*cpu_setup) (void *);
+ void (*reset_ctr) (struct op_register_config *, unsigned long);
+ void (*handle_interrupt) (unsigned long, struct pt_regs *,
+ struct op_counter_config *);
+ char *cpu_type;
+ unsigned char num_counters;
+ unsigned char can_set_proc_mode;
+};
+
+#endif
diff -Nru a/arch/alpha/oprofile/op_model_ev4.c b/arch/alpha/oprofile/op_model_ev4.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/op_model_ev4.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,117 @@
+/**
+ * @file arch/alpha/oprofile/op_model_ev4.c
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "op_impl.h"
+
+
+/* Compute all of the registers in preparation for enabling profiling. */
+
+static void
+ev4_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys)
+{
+ unsigned long ctl = 0, count, hilo;
+
+ /* Select desired events. We've mapped the event numbers
+ such that they fit directly into the event selection fields.
+
+ Note that there is no "off" setting. In both cases we select
+ the EXTERNAL event source, hoping that it'll be the lowest
+ frequency, and set the frequency counter to LOW. The interrupts
+ for these "disabled" counter overflows are ignored by the
+ interrupt handler.
+
+ This is most irritating, becuase the hardware *can* enable and
+ disable the interrupts for these counters independently, but the
+ wrperfmon interface doesn't allow it. */
+
+ ctl |= (ctr[0].enabled ? ctr[0].event << 8 : 14 << 8);
+ ctl |= (ctr[1].enabled ? (ctr[1].event - 16) << 32 : 7ul << 32);
+
+ /* EV4 can not read or write its counter registers. The only
+ thing one can do at all is see if you overflow and get an
+ interrupt. We can set the width of the counters, to some
+ extent. Take the interrupt count selected by the user,
+ map it onto one of the possible values, and write it back. */
+
+ count = ctr[0].count;
+ if (count <= 4096)
+ count = 4096, hilo = 1;
+ else
+ count = 65536, hilo = 0;
+ ctr[0].count = count;
+ ctl |= (ctr[0].enabled && hilo) << 3;
+
+ count = ctr[1].count;
+ if (count <= 256)
+ count = 256, hilo = 1;
+ else
+ count = 4096, hilo = 0;
+ ctr[1].count = count;
+ ctl |= (ctr[1].enabled && hilo);
+
+ reg->mux_select = ctl;
+
+ /* Select performance monitoring options. */
+ /* ??? Need to come up with some mechanism to trace only
+ selected processes. EV4 does not have a mechanism to
+ select kernel or user mode only. For now, enable always. */
+ reg->proc_mode = 0;
+
+ /* Frequency is folded into mux_select for EV4. */
+ reg->freq = 0;
+
+ /* See above regarding no writes. */
+ reg->reset_values = 0;
+ reg->need_reset = 0;
+
+}
+
+/* Program all of the registers in preparation for enabling profiling. */
+
+static void
+ev4_cpu_setup(void *x)
+{
+ struct op_register_config *reg = x;
+
+ wrperfmon(2, reg->mux_select);
+ wrperfmon(3, reg->proc_mode);
+}
+
+static void
+ev4_handle_interrupt(unsigned long which, struct pt_regs *regs,
+ struct op_counter_config *ctr)
+{
+ /* EV4 can't properly disable counters individually.
+ Discard "disabled" events now. */
+ if (!ctr[which].enabled)
+ return;
+
+ /* Record the sample. */
+ oprofile_add_sample(regs->pc, !user_mode(regs),
+ which, smp_processor_id());
+}
+
+
+struct op_axp_model op_model_ev4 = {
+ .reg_setup = ev4_reg_setup,
+ .cpu_setup = ev4_cpu_setup,
+ .reset_ctr = NULL,
+ .handle_interrupt = ev4_handle_interrupt,
+ .cpu_type = "alpha/ev4",
+ .num_counters = 2,
+ .can_set_proc_mode = 0,
+};
diff -Nru a/arch/alpha/oprofile/op_model_ev5.c b/arch/alpha/oprofile/op_model_ev5.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/op_model_ev5.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,212 @@
+/**
+ * @file arch/alpha/oprofile/op_model_ev5.c
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "op_impl.h"
+
+
+/* Compute all of the registers in preparation for enabling profiling.
+
+ The 21164 (EV5) and 21164PC (PCA65) vary in the bit placement and
+ meaning of the "CBOX" events. Given that we don't care about meaning
+ at this point, arrange for the difference in bit placement to be
+ handled by common code. */
+
+static void
+common_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys,
+ int cbox1_ofs, int cbox2_ofs)
+{
+ int i, ctl, reset, need_reset;
+
+ /* Select desired events. The event numbers are selected such
+ that they map directly into the event selection fields:
+
+ PCSEL0: 0, 1
+ PCSEL1: 24-39
+ CBOX1: 40-47
+ PCSEL2: 48-63
+ CBOX2: 64-71
+
+ There are two special cases, in that CYCLES can be measured
+ on PCSEL[02], and SCACHE_WRITE can be measured on CBOX[12].
+ These event numbers are canonicalizes to their first appearance. */
+
+ ctl = 0;
+ for (i = 0; i < 3; ++i) {
+ unsigned long event = ctr[i].event;
+ if (!ctr[i].enabled)
+ continue;
+
+ /* Remap the duplicate events, as described above. */
+ if (i == 2) {
+ if (event == 0)
+ event = 12+48;
+ else if (event == 2+41)
+ event = 4+65;
+ }
+
+ /* Convert the event numbers onto mux_select bit mask. */
+ if (event < 2)
+ ctl |= event << 31;
+ else if (event < 24)
+ /* error */;
+ else if (event < 40)
+ ctl |= (event - 24) << 4;
+ else if (event < 48)
+ ctl |= (event - 40) << cbox1_ofs | 15 << 4;
+ else if (event < 64)
+ ctl |= event - 48;
+ else if (event < 72)
+ ctl |= (event - 64) << cbox2_ofs | 15;
+ }
+ reg->mux_select = ctl;
+
+ /* Select processor mode. */
+ /* ??? Need to come up with some mechanism to trace only selected
+ processes. For now select from pal, kernel and user mode. */
+ ctl = 0;
+ ctl |= !sys->enable_pal << 9;
+ ctl |= !sys->enable_kernel << 8;
+ ctl |= !sys->enable_user << 30;
+ reg->proc_mode = ctl;
+
+ /* Select interrupt frequencies. Take the interrupt count selected
+ by the user, and map it onto one of the possible counter widths.
+ If the user value is in between, compute a value to which the
+ counter is reset at each interrupt. */
+
+ ctl = reset = need_reset = 0;
+ for (i = 0; i < 3; ++i) {
+ unsigned long max, hilo, count = ctr[i].count;
+ if (!ctr[i].enabled)
+ continue;
+
+ if (count <= 256)
+ count = 256, hilo = 3, max = 256;
+ else {
+ max = (i == 2 ? 16384 : 65536);
+ hilo = 2;
+ if (count > max)
+ count = max;
+ }
+ ctr[i].count = count;
+
+ ctl |= hilo << (8 - i*2);
+ reset |= (max - count) << (48 - 16*i);
+ if (count != max)
+ need_reset |= 1 << i;
+ }
+ reg->freq = ctl;
+ reg->reset_values = reset;
+ reg->need_reset = need_reset;
+}
+
+static void
+ev5_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys)
+{
+ common_reg_setup(reg, ctr, sys, 19, 22);
+}
+
+static void
+pca56_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys)
+{
+ common_reg_setup(reg, ctr, sys, 8, 11);
+}
+
+/* Program all of the registers in preparation for enabling profiling. */
+
+static void
+ev5_cpu_setup (void *x)
+{
+ struct op_register_config *reg = x;
+
+ wrperfmon(2, reg->mux_select);
+ wrperfmon(3, reg->proc_mode);
+ wrperfmon(4, reg->freq);
+ wrperfmon(6, reg->reset_values);
+}
+
+/* CTR is a counter for which the user has requested an interrupt count
+ in between one of the widths selectable in hardware. Reset the count
+ for CTR to the value stored in REG->RESET_VALUES.
+
+ For EV5, this means disabling profiling, reading the current values,
+ masking in the value for the desired register, writing, then turning
+ profiling back on.
+
+ This can be streamlined if profiling is only enabled for user mode.
+ In that case we know that the counters are not currently incrementing
+ (due to being in kernel mode). */
+
+static void
+ev5_reset_ctr(struct op_register_config *reg, unsigned long ctr)
+{
+ unsigned long values, mask, not_pk, reset_values;
+
+ mask = (ctr == 0 ? 0xfffful << 48
+ : ctr == 1 ? 0xfffful << 32
+ : 0x3fff << 16);
+
+ not_pk = 1 << 9 | 1 << 8;
+
+ reset_values = reg->reset_values;
+
+ if ((reg->proc_mode & not_pk) == not_pk) {
+ values = wrperfmon(5, 0);
+ values = (reset_values & mask) | (values & ~mask & -2);
+ wrperfmon(6, values);
+ } else {
+ wrperfmon(0, -1);
+ values = wrperfmon(5, 0);
+ values = (reset_values & mask) | (values & ~mask & -2);
+ wrperfmon(6, values);
+ wrperfmon(1, reg->enable);
+ }
+}
+
+static void
+ev5_handle_interrupt(unsigned long which, struct pt_regs *regs,
+ struct op_counter_config *ctr)
+{
+ /* Record the sample. */
+ oprofile_add_sample(regs->pc, !user_mode(regs),
+ which, smp_processor_id());
+}
+
+
+struct op_axp_model op_model_ev5 = {
+ .reg_setup = ev5_reg_setup,
+ .cpu_setup = ev5_cpu_setup,
+ .reset_ctr = ev5_reset_ctr,
+ .handle_interrupt = ev5_handle_interrupt,
+ .cpu_type = "alpha/ev5",
+ .num_counters = 3,
+ .can_set_proc_mode = 1,
+};
+
+struct op_axp_model op_model_pca56 = {
+ .reg_setup = pca56_reg_setup,
+ .cpu_setup = ev5_cpu_setup,
+ .reset_ctr = ev5_reset_ctr,
+ .handle_interrupt = ev5_handle_interrupt,
+ .cpu_type = "alpha/pca56",
+ .num_counters = 3,
+ .can_set_proc_mode = 1,
+};
diff -Nru a/arch/alpha/oprofile/op_model_ev6.c b/arch/alpha/oprofile/op_model_ev6.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/op_model_ev6.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,104 @@
+/**
+ * @file arch/alpha/oprofile/op_model_ev6.c
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "op_impl.h"
+
+
+/* Compute all of the registers in preparation for enabling profiling. */
+
+static void
+ev6_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys)
+{
+ unsigned long ctl, reset, need_reset, i;
+
+ /* Select desired events. We've mapped the event numbers
+ such that they fit directly into the event selection fields. */
+ ctl = 0;
+ if (ctr[0].enabled && ctr[0].event)
+ ctl |= (ctr[0].event & 1) << 4;
+ if (ctr[1].enabled)
+ ctl |= (ctr[1].event - 2) & 15;
+ reg->mux_select = ctl;
+
+ /* Select logging options. */
+ /* ??? Need to come up with some mechanism to trace only
+ selected processes. EV6 does not have a mechanism to
+ select kernel or user mode only. For now, enable always. */
+ reg->proc_mode = 0;
+
+ /* EV6 cannot change the width of the counters as with the
+ other implementations. But fortunately, we can write to
+ the counters and set the value such that it will overflow
+ at the right time. */
+ reset = need_reset = 0;
+ for (i = 0; i < 2; ++i) {
+ unsigned long count = ctr[i].count;
+ if (!ctr[i].enabled)
+ continue;
+
+ if (count > 0x100000)
+ count = 0x100000;
+ ctr[i].count = count;
+ reset |= (0x100000 - count) << (i ? 6 : 28);
+ if (count != 0x100000)
+ need_reset |= 1 << i;
+ }
+ reg->reset_values = reset;
+ reg->need_reset = need_reset;
+}
+
+/* Program all of the registers in preparation for enabling profiling. */
+
+static void
+ev6_cpu_setup (void *x)
+{
+ struct op_register_config *reg = x;
+
+ wrperfmon(2, reg->mux_select);
+ wrperfmon(3, reg->proc_mode);
+ wrperfmon(6, reg->reset_values | 3);
+}
+
+/* CTR is a counter for which the user has requested an interrupt count
+ in between one of the widths selectable in hardware. Reset the count
+ for CTR to the value stored in REG->RESET_VALUES. */
+
+static void
+ev6_reset_ctr(struct op_register_config *reg, unsigned long ctr)
+{
+ wrperfmon(6, reg->reset_values | (1 << ctr));
+}
+
+static void
+ev6_handle_interrupt(unsigned long which, struct pt_regs *regs,
+ struct op_counter_config *ctr)
+{
+ /* Record the sample. */
+ oprofile_add_sample(regs->pc, !user_mode(regs),
+ which, smp_processor_id());
+}
+
+
+struct op_axp_model op_model_ev6 = {
+ .reg_setup = ev6_reg_setup,
+ .cpu_setup = ev6_cpu_setup,
+ .reset_ctr = ev6_reset_ctr,
+ .handle_interrupt = ev6_handle_interrupt,
+ .cpu_type = "alpha/ev6",
+ .num_counters = 2,
+ .can_set_proc_mode = 0,
+};
diff -Nru a/arch/alpha/oprofile/op_model_ev67.c b/arch/alpha/oprofile/op_model_ev67.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/alpha/oprofile/op_model_ev67.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,265 @@
+/**
+ * @file arch/alpha/oprofile/op_model_ev67.c
+ *
+ * @remark Copyright 2002 OProfile authors
+ * @remark Read the file COPYING
+ *
+ * @author Richard Henderson
+ * @author Falk Hueffner
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "op_impl.h"
+
+
+/* Compute all of the registers in preparation for enabling profiling. */
+
+static void
+ev67_reg_setup(struct op_register_config *reg,
+ struct op_counter_config *ctr,
+ struct op_system_config *sys)
+{
+ unsigned long ctl, reset, need_reset, i;
+
+ /* Select desired events. */
+ ctl = 1UL << 4; /* Enable ProfileMe mode. */
+
+ /* The event numbers are chosen so we can use them directly if
+ PCTR1 is enabled. */
+ if (ctr[1].enabled) {
+ ctl |= (ctr[1].event & 3) << 2;
+ } else {
+ if (ctr[0].event == 0) /* cycles */
+ ctl |= 1UL << 2;
+ }
+ reg->mux_select = ctl;
+
+ /* Select logging options. */
+ /* ??? Need to come up with some mechanism to trace only
+ selected processes. EV67 does not have a mechanism to
+ select kernel or user mode only. For now, enable always. */
+ reg->proc_mode = 0;
+
+ /* EV67 cannot change the width of the counters as with the
+ other implementations. But fortunately, we can write to
+ the counters and set the value such that it will overflow
+ at the right time. */
+ reset = need_reset = 0;
+ for (i = 0; i < 2; ++i) {
+ unsigned long count = ctr[i].count;
+ if (!ctr[i].enabled)
+ continue;
+
+ if (count > 0x100000)
+ count = 0x100000;
+ ctr[i].count = count;
+ reset |= (0x100000 - count) << (i ? 6 : 28);
+ if (count != 0x100000)
+ need_reset |= 1 << i;
+ }
+ reg->reset_values = reset;
+ reg->need_reset = need_reset;
+}
+
+/* Program all of the registers in preparation for enabling profiling. */
+
+static void
+ev67_cpu_setup (void *x)
+{
+ struct op_register_config *reg = x;
+
+ wrperfmon(2, reg->mux_select);
+ wrperfmon(3, reg->proc_mode);
+ wrperfmon(6, reg->reset_values | 3);
+}
+
+/* CTR is a counter for which the user has requested an interrupt count
+ in between one of the widths selectable in hardware. Reset the count
+ for CTR to the value stored in REG->RESET_VALUES. */
+
+static void
+ev67_reset_ctr(struct op_register_config *reg, unsigned long ctr)
+{
+ wrperfmon(6, reg->reset_values | (1 << ctr));
+}
+
+/* ProfileMe conditions which will show up as counters. We can also
+ detect the following, but it seems unlikely that anybody is
+ interested in counting them:
+ * Reset
+ * MT_FPCR (write to floating point control register)
+ * Arithmetic trap
+ * Dstream Fault
+ * Machine Check (ECC fault, etc.)
+ * OPCDEC (illegal opcode)
+ * Floating point disabled
+ * Differentiate between DTB single/double misses and 3 or 4 level
+ page tables
+ * Istream access violation
+ * Interrupt
+ * Icache Parity Error.
+ * Instruction killed (nop, trapb)
+
+ Unfortunately, there seems to be no way to detect Dcache and Bcache
+ misses; the latter could be approximated by making the counter
+ count Bcache misses, but that is not precise.
+
+ We model this as 20 counters:
+ * PCTR0
+ * PCTR1
+ * 9 ProfileMe events, induced by PCTR0
+ * 9 ProfileMe events, induced by PCTR1
+*/
+
+enum profileme_counters {
+ PM_STALLED, /* Stalled for at least one cycle
+ between the fetch and map stages */
+ PM_TAKEN, /* Conditional branch taken */
+ PM_MISPREDICT, /* Branch caused mispredict trap */
+ PM_ITB_MISS, /* ITB miss */
+ PM_DTB_MISS, /* DTB miss */
+ PM_REPLAY, /* Replay trap */
+ PM_LOAD_STORE, /* Load-store order trap */
+ PM_ICACHE_MISS, /* Icache miss */
+ PM_UNALIGNED, /* Unaligned Load/Store */
+ PM_NUM_COUNTERS
+};
+
+static inline void
+op_add_pm(unsigned long pc, int kern, unsigned long counter,
+ struct op_counter_config *ctr, unsigned long event)
+{
+ unsigned long fake_counter = 2 + event;
+ if (counter == 1)
+ fake_counter += PM_NUM_COUNTERS;
+ if (ctr[fake_counter].enabled)
+ oprofile_add_sample(pc, kern, fake_counter,
+ smp_processor_id());
+}
+
+static void
+ev67_handle_interrupt(unsigned long which, struct pt_regs *regs,
+ struct op_counter_config *ctr)
+{
+ unsigned long pmpc, pctr_ctl;
+ int kern = !user_mode(regs);
+ int mispredict = 0;
+ union {
+ unsigned long v;
+ struct {
+ unsigned reserved: 30; /* 0-29 */
+ unsigned overcount: 3; /* 30-32 */
+ unsigned icache_miss: 1; /* 33 */
+ unsigned trap_type: 4; /* 34-37 */
+ unsigned load_store: 1; /* 38 */
+ unsigned trap: 1; /* 39 */
+ unsigned mispredict: 1; /* 40 */
+ } fields;
+ } i_stat;
+
+ enum trap_types {
+ TRAP_REPLAY,
+ TRAP_INVALID0,
+ TRAP_DTB_DOUBLE_MISS_3,
+ TRAP_DTB_DOUBLE_MISS_4,
+ TRAP_FP_DISABLED,
+ TRAP_UNALIGNED,
+ TRAP_DTB_SINGLE_MISS,
+ TRAP_DSTREAM_FAULT,
+ TRAP_OPCDEC,
+ TRAP_INVALID1,
+ TRAP_MACHINE_CHECK,
+ TRAP_INVALID2,
+ TRAP_ARITHMETIC,
+ TRAP_INVALID3,
+ TRAP_MT_FPCR,
+ TRAP_RESET
+ };
+
+ pmpc = wrperfmon(9, 0);
+ /* ??? Don't know how to handle physical-mode PALcode address. */
+ if (pmpc & 1)
+ return;
+ pmpc &= ~2; /* clear reserved bit */
+
+ i_stat.v = wrperfmon(8, 0);
+ if (i_stat.fields.trap) {
+ switch (i_stat.fields.trap_type) {
+ case TRAP_INVALID1:
+ case TRAP_INVALID2:
+ case TRAP_INVALID3:
+ /* Pipeline redirection ocurred. PMPC points
+ to PALcode. Recognize ITB miss by PALcode
+ offset address, and get actual PC from
+ EXC_ADDR. */
+ oprofile_add_sample(regs->pc, kern, which,
+ smp_processor_id());
+ if ((pmpc & ((1 << 15) - 1)) == 581)
+ op_add_pm(regs->pc, kern, which,
+ ctr, PM_ITB_MISS);
+ /* Most other bit and counter values will be
+ those for the first instruction in the
+ fault handler, so we're done. */
+ return;
+ case TRAP_REPLAY:
+ op_add_pm(pmpc, kern, which, ctr,
+ (i_stat.fields.load_store
+ ? PM_LOAD_STORE : PM_REPLAY));
+ break;
+ case TRAP_DTB_DOUBLE_MISS_3:
+ case TRAP_DTB_DOUBLE_MISS_4:
+ case TRAP_DTB_SINGLE_MISS:
+ op_add_pm(pmpc, kern, which, ctr, PM_DTB_MISS);
+ break;
+ case TRAP_UNALIGNED:
+ op_add_pm(pmpc, kern, which, ctr, PM_UNALIGNED);
+ break;
+ case TRAP_INVALID0:
+ case TRAP_FP_DISABLED:
+ case TRAP_DSTREAM_FAULT:
+ case TRAP_OPCDEC:
+ case TRAP_MACHINE_CHECK:
+ case TRAP_ARITHMETIC:
+ case TRAP_MT_FPCR:
+ case TRAP_RESET:
+ break;
+ }
+
+ /* ??? JSR/JMP/RET/COR or HW_JSR/HW_JMP/HW_RET/HW_COR
+ mispredicts do not set this bit but can be
+ recognized by the presence of one of these
+ instructions at the PMPC location with bit 39
+ set. */
+ if (i_stat.fields.mispredict) {
+ mispredict = 1;
+ op_add_pm(pmpc, kern, which, ctr, PM_MISPREDICT);
+ }
+ }
+
+ oprofile_add_sample(pmpc, kern, which, smp_processor_id());
+
+ pctr_ctl = wrperfmon(5, 0);
+ if (pctr_ctl & (1UL << 27))
+ op_add_pm(pmpc, kern, which, ctr, PM_STALLED);
+
+ /* Unfortunately, TAK is undefined on mispredicted branches.
+ ??? It is also undefined for non-cbranch insns, should
+ check that. */
+ if (!mispredict && pctr_ctl & (1UL << 0))
+ op_add_pm(pmpc, kern, which, ctr, PM_TAKEN);
+}
+
+struct op_axp_model op_model_ev67 = {
+ .reg_setup = ev67_reg_setup,
+ .cpu_setup = ev67_cpu_setup,
+ .reset_ctr = ev67_reset_ctr,
+ .handle_interrupt = ev67_handle_interrupt,
+ .cpu_type = "alpha/ev67",
+ .num_counters = 20,
+ .can_set_proc_mode = 0,
+};
diff -Nru a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
--- a/arch/arm/mm/alignment.c Mon Feb 24 11:06:08 2003
+++ b/arch/arm/mm/alignment.c Mon Feb 24 11:06:08 2003
@@ -400,7 +400,7 @@
* For alignment faults on the ARM922T/ARM920T the MMU makes
* the FSR (and hence addr) equal to the updated base address
* of the multiple access rather than the restored value.
- * Switch this messsage off if we've got a ARM92[02], otherwise
+ * Switch this message off if we've got a ARM92[02], otherwise
* [ls]dm alignment faults are noisy!
*/
#if !(defined CONFIG_CPU_ARM922T) && !(defined CONFIG_CPU_ARM920T)
diff -Nru a/arch/cris/boot/compressed/misc.c b/arch/cris/boot/compressed/misc.c
--- a/arch/cris/boot/compressed/misc.c Mon Feb 24 11:06:13 2003
+++ b/arch/cris/boot/compressed/misc.c Mon Feb 24 11:06:13 2003
@@ -13,7 +13,7 @@
*/
/* where the piggybacked kernel image expects itself to live.
- * it is the same adress we use when we network load an uncompressed
+ * it is the same address we use when we network load an uncompressed
* image into DRAM, and it is the address the kernel is linked to live
* at by etrax100.ld.
*/
diff -Nru a/arch/cris/drivers/eeprom.c b/arch/cris/drivers/eeprom.c
--- a/arch/cris/drivers/eeprom.c Mon Feb 24 11:06:09 2003
+++ b/arch/cris/drivers/eeprom.c Mon Feb 24 11:06:09 2003
@@ -802,7 +802,7 @@
return 1;
}
-/* Reads from current adress. */
+/* Reads from current address. */
static int read_from_eeprom(char * buf, int count)
{
diff -Nru a/arch/cris/drivers/serial.c b/arch/cris/drivers/serial.c
--- a/arch/cris/drivers/serial.c Mon Feb 24 11:06:12 2003
+++ b/arch/cris/drivers/serial.c Mon Feb 24 11:06:12 2003
@@ -1904,7 +1904,7 @@
}
#ifdef SERIAL_DEBUG_INTR
- printk("** OK, disabling ser_interupts\n");
+ printk("** OK, disabling ser_interrupts\n");
#endif
e100_disable_serial_data_irq(info);
diff -Nru a/arch/i386/Kconfig b/arch/i386/Kconfig
--- a/arch/i386/Kconfig Mon Feb 24 11:06:08 2003
+++ b/arch/i386/Kconfig Mon Feb 24 11:06:08 2003
@@ -83,18 +83,16 @@
If you don't have such a system, you should say N here.
-# Visual Workstation support is utterly broken.
-# If you want to see it working mail an VW540 to hch@infradead.org 8)
-#config X86_VISWS
-# bool "SGI 320/540 (Visual Workstation)"
-# help
-# The SGI Visual Workstation series is an IA32-based workstation
-# based on SGI systems chips with some legacy PC hardware attached.
-#
-# Say Y here to create a kernel to run on the SGI 320 or 540.
-#
-# A kernel compiled for the Visual Workstation will not run on PCs
-# and vice versa. See for details.
+config X86_VISWS
+ bool "SGI 320/540 (Visual Workstation)"
+ help
+ The SGI Visual Workstation series is an IA32-based workstation
+ based on SGI systems chips with some legacy PC hardware attached.
+
+ Say Y here to create a kernel to run on the SGI 320 or 540.
+
+ A kernel compiled for the Visual Workstation will not run on PCs
+ and vice versa. See for details.
endchoice
@@ -433,7 +431,7 @@
config X86_UP_APIC
bool "Local APIC support on uniprocessors" if !SMP
- depends on !X86_VOYAGER
+ depends on !(X86_VISWS || X86_VOYAGER)
---help---
A local APIC (Advanced Programmable Interrupt Controller) is an
integrated interrupt controller in the CPU. If you have a single-CPU
@@ -956,158 +954,7 @@
a work-around for a number of buggy BIOSes. Switch this option on if
your computer crashes instead of powering off properly.
-config CPU_FREQ
- bool "CPU Frequency scaling"
- help
- Clock scaling allows you to change the clock speed of CPUs on the
- fly. This is a nice method to save battery power on notebooks,
- because the lower the clock speed, the less power the CPU consumes.
-
- For more information, take a look at linux/Documentation/cpufreq or
- at
-
- If in doubt, say N.
-
-config CPU_FREQ_PROC_INTF
- tristate "/proc/cpufreq interface (DEPRECATED)"
- depends on CPU_FREQ && PROC_FS
- help
- This enables the /proc/cpufreq interface for controlling
- CPUFreq. Please note that it is recommended to use the sysfs
- interface instead (which is built automatically).
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config CPU_FREQ_24_API
- bool "/proc/sys/cpu/ interface (2.4. / OLD)"
- depends on CPU_FREQ
- help
- This enables the /proc/sys/cpu/ sysctl interface for controlling
- CPUFreq, as known from the 2.4.-kernel patches for CPUFreq. 2.5
- uses a sysfs interface instead. Please note that some drivers do
- not work well with the 2.4. /proc/sys/cpu sysctl interface,
- so if in doubt, say N here.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config CPU_FREQ_TABLE
- tristate "CPU frequency table helpers"
- depends on CPU_FREQ
- default y
- help
- Many CPUFreq drivers use these helpers, so only say N here if
- the CPUFreq driver of your choice doesn't need these helpers.
-
- If in doubt, say Y.
-
-config X86_ACPI_CPUFREQ
- tristate "ACPI Processor P-States driver"
- depends on CPU_FREQ_TABLE && ACPI_PROCESSOR
- help
- This driver adds a CPUFreq driver which utilizes the ACPI
- Processor Performance States.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_POWERNOW_K6
- tristate "AMD Mobile K6-2/K6-3 PowerNow!"
- depends on CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for mobile AMD K6-2+ and mobile
- AMD K6-3+ processors.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_POWERNOW_K7
- tristate "AMD Mobile Athlon/Duron PowerNow!"
- depends on CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for mobile AMD K7 mobile processors.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config ELAN_CPUFREQ
- tristate "AMD Elan"
- depends on CPU_FREQ_TABLE && MELAN
- ---help---
- This adds the CPUFreq driver for AMD Elan SC400 and SC410
- processors.
-
- You need to specify the processor maximum speed as boot
- parameter: elanfreq=maxspeed (in kHz) or as module
- parameter "max_freq".
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_LONGHAUL
- tristate "VIA Cyrix III Longhaul"
- depends on CPU_FREQ
- help
- This adds the CPUFreq driver for VIA Samuel/CyrixIII,
- VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
- processors.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_SPEEDSTEP
- tristate "Intel Speedstep"
- depends on CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for certain mobile Intel Pentium III
- (Coppermine), all mobile Intel Pentium III-M (Tulatin) and all
- mobile Intel Pentium 4 P4-Ms.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_P4_CLOCKMOD
- tristate "Intel Pentium 4 clock modulation"
- depends on CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for Intel Pentium 4 / XEON
- processors.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_LONGRUN
- tristate "Transmeta LongRun"
- depends on CPU_FREQ
- help
- This adds the CPUFreq driver for Transmeta Crusoe processors which
- support LongRun.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
-config X86_GX_SUSPMOD
- tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
- depends on CPU_FREQ
- help
- This add the CPUFreq driver for NatSemi Geode processors which
- support suspend modulation.
-
- For details, take a look at linux/Documentation/cpufreq.
-
- If in doubt, say N.
-
+source "arch/i386/kernel/cpu/cpufreq/Kconfig"
endmenu
@@ -1180,7 +1027,7 @@
config PCI_DIRECT
bool
- depends on !X86_VISWS && PCI && (PCI_GODIRECT || PCI_GOANY)
+ depends on PCI && ((PCI_GODIRECT || PCI_GOANY) || X86_VISWS)
default y
config SCx200
@@ -1673,7 +1520,7 @@
config X86_MPPARSE
bool
- depends on X86_LOCAL_APIC
+ depends on X86_LOCAL_APIC && !X86_VISWS
default y
endmenu
@@ -1691,15 +1538,15 @@
config X86_HT
bool
- depends on SMP && !X86_VOYAGER
+ depends on SMP && !(X86_VISWS || X86_VOYAGER)
default y
config X86_BIOS_REBOOT
bool
- depends on !X86_VOYAGER
+ depends on !(X86_VISWS || X86_VOYAGER)
default y
config X86_TRAMPOLINE
bool
- depends on SMP
+ depends on SMP || X86_VISWS
default y
diff -Nru a/arch/i386/Makefile b/arch/i386/Makefile
--- a/arch/i386/Makefile Mon Feb 24 11:06:09 2003
+++ b/arch/i386/Makefile Mon Feb 24 11:06:09 2003
@@ -17,7 +17,7 @@
LDFLAGS := -m elf_i386
OBJCOPYFLAGS := -O binary -R .note -R .comment -S
-LDFLAGS_vmlinux := -e stext
+LDFLAGS_vmlinux :=
LDFLAGS_BLOB := --format binary --oformat elf32-i386
CFLAGS += -pipe
@@ -27,6 +27,8 @@
# prevent gcc from keeping the stack 16 byte aligned
CFLAGS += $(call check_gcc,-mpreferred-stack-boundary=2,)
+align := $(subst -functions=0,,$(call check_gcc,-falign-functions=0,-malign-functions=0))
+
cflags-$(CONFIG_M386) += -march=i386
cflags-$(CONFIG_M486) += -march=i486
cflags-$(CONFIG_M586) += -march=i586
@@ -37,15 +39,13 @@
cflags-$(CONFIG_MPENTIUMIII) += $(call check_gcc,-march=pentium3,-march=i686)
cflags-$(CONFIG_MPENTIUM4) += $(call check_gcc,-march=pentium4,-march=i686)
cflags-$(CONFIG_MK6) += $(call check_gcc,-march=k6,-march=i586)
-cflags-$(CONFIG_MK7) += $(call check_gcc,-march=athlon,-march=i686 -malign-functions=4)
-cflags-$(CONFIG_MK8) += $(call check_gcc,-march=k8,$(call check_gcc,-march=athlon,-march=i686 -malign-functions=4))
-cflags-$(CONFIG_MCRUSOE) += -march=i686 -malign-functions=0 -malign-jumps=0 -malign-loops=0
+cflags-$(CONFIG_MK7) += $(call check_gcc,-march=athlon,-march=i686 $(align)-functions=4)
+cflags-$(CONFIG_MK8) += $(call check_gcc,-march=k8,$(call check_gcc,-march=athlon,-march=i686 $(align)-functions=4))
+cflags-$(CONFIG_MCRUSOE) += -march=i686 $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
cflags-$(CONFIG_MWINCHIPC6) += $(call check_gcc,-march=winchip-c6,-march=i586)
cflags-$(CONFIG_MWINCHIP2) += $(call check_gcc,-march=winchip2,-march=i586)
cflags-$(CONFIG_MWINCHIP3D) += -march=i586
-cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-march=c3,-march=i486)
-# The alignment flags change with gcc 3.2
-cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-falign-functions=0 -falign-jumps=0 -falign-loops=0,-malign-functions=0 -malign-jumps=0 -malign-loops=0)
+cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0
cflags-$(CONFIG_MVIAC3_2) += $(call check_gcc,-march=c3-2,-march=i686)
CFLAGS += $(cflags-y)
diff -Nru a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
--- a/arch/i386/kernel/Makefile Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/Makefile Mon Feb 24 11:06:08 2003
@@ -6,7 +6,8 @@
obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o vm86.o \
ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_i386.o \
- pci-dma.o i386_ksyms.o i387.o dmi_scan.o bootflag.o
+ pci-dma.o i386_ksyms.o i387.o dmi_scan.o bootflag.o \
+ doublefault.o
obj-y += cpu/
obj-y += timers/
@@ -24,7 +25,6 @@
obj-$(CONFIG_X86_IO_APIC) += io_apic.o
obj-$(CONFIG_SOFTWARE_SUSPEND) += suspend.o suspend_asm.o
obj-$(CONFIG_X86_NUMAQ) += numaq.o
-obj-$(CONFIG_PROFILING) += profile.o
obj-$(CONFIG_EDD) += edd.o
obj-$(CONFIG_MODULES) += module.o
obj-y += sysenter.o
diff -Nru a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
--- a/arch/i386/kernel/apic.c Mon Feb 24 11:06:14 2003
+++ b/arch/i386/kernel/apic.c Mon Feb 24 11:06:14 2003
@@ -50,9 +50,21 @@
/* Using APIC to generate smp_local_timer_interrupt? */
int using_apic_timer = 0;
-int prof_multiplier[NR_CPUS] = { 1, };
-int prof_old_multiplier[NR_CPUS] = { 1, };
-DEFINE_PER_CPU(int, prof_counter) = 1;
+static DEFINE_PER_CPU(int, prof_multiplier) = 1;
+static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
+static DEFINE_PER_CPU(int, prof_counter) = 1;
+
+void enable_NMI_through_LVT0 (void * dummy)
+{
+ unsigned int v, ver;
+
+ ver = apic_read(APIC_LVR);
+ ver = GET_APIC_VERSION(ver);
+ v = APIC_DM_NMI; /* unmask and set to NMI */
+ if (!APIC_INTEGRATED(ver)) /* 82489DX */
+ v |= APIC_LVT_LEVEL_TRIGGER;
+ apic_write_around(APIC_LVT0, v);
+}
int get_maxlvt(void)
{
@@ -974,7 +986,7 @@
* accordingly.
*/
for (i = 0; i < NR_CPUS; ++i)
- prof_multiplier[i] = multiplier;
+ per_cpu(prof_multiplier, i) = multiplier;
return 0;
}
@@ -1006,12 +1018,14 @@
*
* Interrupts are already masked off at this point.
*/
- per_cpu(prof_counter, cpu) = prof_multiplier[cpu];
- if (per_cpu(prof_counter, cpu) != prof_old_multiplier[cpu]) {
+ per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
+ if (per_cpu(prof_counter, cpu) !=
+ per_cpu(prof_old_multiplier, cpu)) {
__setup_APIC_LVTT(
calibration_result/
per_cpu(prof_counter, cpu));
- prof_old_multiplier[cpu] = per_cpu(prof_counter, cpu);
+ per_cpu(prof_old_multiplier, cpu) =
+ per_cpu(prof_counter, cpu);
}
#ifdef CONFIG_SMP
diff -Nru a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
--- a/arch/i386/kernel/cpu/common.c Mon Feb 24 11:06:07 2003
+++ b/arch/i386/kernel/cpu/common.c Mon Feb 24 11:06:07 2003
@@ -490,6 +490,10 @@
load_TR_desc();
load_LDT(&init_mm.context);
+ /* Set up doublefault TSS pointer in the GDT */
+ __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
+ cpu_gdt_table[cpu][GDT_ENTRY_DOUBLEFAULT_TSS].b &= 0xfffffdff;
+
/* Clear %fs and %gs. */
asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
diff -Nru a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig Mon Feb 24 11:06:14 2003
@@ -0,0 +1,152 @@
+#
+# CPU Frequency scaling
+#
+
+menu "CPU Frequency scaling"
+
+config CPU_FREQ
+ bool "CPU Frequency scaling"
+ help
+ Clock scaling allows you to change the clock speed of CPUs on the
+ fly. This is a nice method to save battery power on notebooks,
+ because the lower the clock speed, the less power the CPU consumes.
+
+ For more information, take a look at linux/Documentation/cpufreq or
+ at
+
+ If in doubt, say N.
+
+source "drivers/cpufreq/Kconfig"
+
+config CPU_FREQ_24_API
+ bool "/proc/sys/cpu/ interface (2.4. / OLD)"
+ depends on CPU_FREQ
+ help
+ This enables the /proc/sys/cpu/ sysctl interface for controlling
+ CPUFreq, as known from the 2.4.-kernel patches for CPUFreq. 2.5
+ uses a sysfs interface instead. Please note that some drivers do
+ not work well with the 2.4. /proc/sys/cpu sysctl interface,
+ so if in doubt, say N here.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config CPU_FREQ_TABLE
+ tristate "CPU frequency table helpers"
+ depends on CPU_FREQ
+ default y
+ help
+ Many CPUFreq drivers use these helpers, so only say N here if
+ the CPUFreq driver of your choice doesn't need these helpers.
+
+ If in doubt, say Y.
+
+comment "CPUFreq processor drivers"
+ depends on CPU_FREQ
+
+config X86_ACPI_CPUFREQ
+ tristate "ACPI Processor P-States driver"
+ depends on CPU_FREQ_TABLE && ACPI_PROCESSOR
+ help
+ This driver adds a CPUFreq driver which utilizes the ACPI
+ Processor Performance States.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config ELAN_CPUFREQ
+ tristate "AMD Elan"
+ depends on CPU_FREQ_TABLE && MELAN
+ ---help---
+ This adds the CPUFreq driver for AMD Elan SC400 and SC410
+ processors.
+
+ You need to specify the processor maximum speed as boot
+ parameter: elanfreq=maxspeed (in kHz) or as module
+ parameter "max_freq".
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_POWERNOW_K6
+ tristate "AMD Mobile K6-2/K6-3 PowerNow!"
+ depends on CPU_FREQ_TABLE
+ help
+ This adds the CPUFreq driver for mobile AMD K6-2+ and mobile
+ AMD K6-3+ processors.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_POWERNOW_K7
+ tristate "AMD Mobile Athlon/Duron PowerNow!"
+ depends on CPU_FREQ_TABLE
+ help
+ This adds the CPUFreq driver for mobile AMD K7 mobile processors.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_GX_SUSPMOD
+ tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
+ depends on CPU_FREQ
+ help
+ This add the CPUFreq driver for NatSemi Geode processors which
+ support suspend modulation.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_SPEEDSTEP
+ tristate "Intel Speedstep"
+ depends on CPU_FREQ_TABLE
+ help
+ This adds the CPUFreq driver for certain mobile Intel Pentium III
+ (Coppermine), all mobile Intel Pentium III-M (Tulatin) and all
+ mobile Intel Pentium 4 P4-Ms.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_P4_CLOCKMOD
+ tristate "Intel Pentium 4 clock modulation"
+ depends on CPU_FREQ_TABLE
+ help
+ This adds the CPUFreq driver for Intel Pentium 4 / XEON
+ processors.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_LONGRUN
+ tristate "Transmeta LongRun"
+ depends on CPU_FREQ
+ help
+ This adds the CPUFreq driver for Transmeta Crusoe processors which
+ support LongRun.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+config X86_LONGHAUL
+ tristate "VIA Cyrix III Longhaul"
+ depends on CPU_FREQ
+ help
+ This adds the CPUFreq driver for VIA Samuel/CyrixIII,
+ VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
+ processors.
+
+ For details, take a look at linux/Documentation/cpufreq.
+
+ If in doubt, say N.
+
+endmenu
diff -Nru a/arch/i386/kernel/cpu/cpufreq/longrun.c b/arch/i386/kernel/cpu/cpufreq/longrun.c
--- a/arch/i386/kernel/cpu/cpufreq/longrun.c Mon Feb 24 11:06:12 2003
+++ b/arch/i386/kernel/cpu/cpufreq/longrun.c Mon Feb 24 11:06:12 2003
@@ -1,7 +1,7 @@
/*
- * $Id: longrun.c,v 1.14 2002/10/31 21:17:40 db Exp $
+ * $Id: longrun.c,v 1.22 2003/02/10 17:31:50 db Exp $
*
- * (C) 2002 Dominik Brodowski
+ * (C) 2002 - 2003 Dominik Brodowski
*
* Licensed under the terms of the GNU GPL License version 2.
*
@@ -18,7 +18,7 @@
#include
#include
-static struct cpufreq_driver *longrun_driver;
+static struct cpufreq_driver longrun_driver;
/**
* longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
@@ -39,9 +39,6 @@
{
u32 msr_lo, msr_hi;
- if (!longrun_driver)
- return;
-
rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
if (msr_lo & 0x01)
policy->policy = CPUFREQ_POLICY_PERFORMANCE;
@@ -72,7 +69,7 @@
u32 msr_lo, msr_hi;
u32 pctg_lo, pctg_hi;
- if (!longrun_driver || !policy)
+ if (!policy)
return -EINVAL;
pctg_lo = (policy->min - longrun_low_freq) /
@@ -117,13 +114,16 @@
*/
static int longrun_verify_policy(struct cpufreq_policy *policy)
{
- if (!policy || !longrun_driver)
+ if (!policy)
return -EINVAL;
policy->cpu = 0;
cpufreq_verify_within_limits(policy,
- longrun_driver->policy[0].cpuinfo.min_freq,
- longrun_driver->policy[0].cpuinfo.max_freq);
+ policy->cpuinfo.min_freq,
+ policy->cpuinfo.max_freq);
+
+ if (policy->policy == CPUFREQ_POLICY_GOVERNOR)
+ policy->policy = longrun_driver.policy[0].policy;
return 0;
}
@@ -221,59 +221,59 @@
}
-/**
- * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
- *
- * Initializes the LongRun support.
- */
-static int __init longrun_init(void)
+static int longrun_cpu_init(struct cpufreq_policy *policy)
{
- int result;
- struct cpufreq_driver *driver;
+ int result = 0;
struct cpuinfo_x86 *c = cpu_data;
+ /* capability check */
+ if (policy->cpu != 0)
+ return -ENODEV;
if (c->x86_vendor != X86_VENDOR_TRANSMETA ||
!cpu_has(c, X86_FEATURE_LONGRUN))
- return 0;
+ return -ENODEV;
- /* initialization of main "cpufreq" code*/
- driver = kmalloc(sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL);
- if (!driver)
- return -ENOMEM;
- memset(driver, 0, sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy));
-
- driver->policy = (struct cpufreq_policy *) (driver + 1);
-
- if (longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq)) {
- kfree(driver);
- return -EIO;
- }
- driver->policy[0].cpuinfo.min_freq = longrun_low_freq;
- driver->policy[0].cpuinfo.max_freq = longrun_high_freq;
- driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+ /* detect low and high frequency */
+ result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
+ if (result)
+ return result;
+
+ /* cpuinfo and default policy values */
+ policy->cpuinfo.min_freq = longrun_low_freq;
+ policy->cpuinfo.max_freq = longrun_high_freq;
+ policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+ longrun_get_policy(policy);
+
+#ifdef CONFIG_CPU_FREQ_24_API
+ longrun_driver.cpu_cur_freq[policy->cpu] = longrun_low_freq; /* dummy value */
+#endif
- strncpy(driver->name, "longrun", CPUFREQ_NAME_LEN);
+ return 0;
+}
- longrun_get_policy(&driver->policy[0]);
-#ifdef CONFIG_CPU_FREQ_24_API
- driver->cpu_cur_freq[0] = longrun_high_freq; /* dummy value */
-#endif
+static struct cpufreq_driver longrun_driver = {
+ .verify = longrun_verify_policy,
+ .setpolicy = longrun_set_policy,
+ .init = longrun_cpu_init,
+ .name = "longrun",
+};
- driver->verify = &longrun_verify_policy;
- driver->setpolicy = &longrun_set_policy;
- longrun_driver = driver;
+/**
+ * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
+ *
+ * Initializes the LongRun support.
+ */
+static int __init longrun_init(void)
+{
+ struct cpuinfo_x86 *c = cpu_data;
- result = cpufreq_register(driver);
- if (result) {
- longrun_driver = NULL;
- kfree(driver);
- }
+ if (c->x86_vendor != X86_VENDOR_TRANSMETA ||
+ !cpu_has(c, X86_FEATURE_LONGRUN))
+ return -ENODEV;
- return result;
+ return cpufreq_register_driver(&longrun_driver);
}
@@ -282,15 +282,13 @@
*/
static void __exit longrun_exit(void)
{
- if (longrun_driver) {
- cpufreq_unregister();
- kfree(longrun_driver);
- }
+ cpufreq_unregister_driver(&longrun_driver);
}
MODULE_AUTHOR ("Dominik Brodowski ");
MODULE_DESCRIPTION ("LongRun driver for Transmeta Crusoe processors.");
MODULE_LICENSE ("GPL");
+
module_init(longrun_init);
module_exit(longrun_exit);
diff -Nru a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c Mon Feb 24 11:06:13 2003
+++ b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c Mon Feb 24 11:06:13 2003
@@ -1,5 +1,6 @@
/*
* Pentium 4/Xeon CPU on demand clock modulation/speed scaling
+ * (C) 2002 - 2003 Dominik Brodowski
* (C) 2002 Zwane Mwaikambo
* (C) 2002 Arjan van de Ven
* (C) 2002 Tora T. Engstad
@@ -45,11 +46,10 @@
#define DC_ENTRIES 8
-static int has_N44_O17_errata;
+static int has_N44_O17_errata[NR_CPUS];
static int stock_freq;
-MODULE_PARM(stock_freq, "i");
-static struct cpufreq_driver *cpufreq_p4_driver;
+static struct cpufreq_driver p4clockmod_driver;
static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
@@ -107,17 +107,17 @@
rdmsr(MSR_IA32_THERM_STATUS, l, h);
if (l & 0x01)
- printk(KERN_DEBUG PFX "CPU#%d currently thermal throttled\n", cpu);
+// printk(KERN_DEBUG PFX "CPU#%d currently thermal throttled\n", cpu);
- if (has_N44_O17_errata && (newstate == DC_25PT || newstate == DC_DFLT))
+ if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
newstate = DC_38PT;
rdmsr(MSR_IA32_THERM_CONTROL, l, h);
if (newstate == DC_DISABLE) {
- printk(KERN_INFO PFX "CPU#%d disabling modulation\n", cpu);
+// printk(KERN_INFO PFX "CPU#%d disabling modulation\n", cpu);
wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
} else {
- printk(KERN_INFO PFX "CPU#%d setting duty cycle to %d%%\n", cpu, ((125 * newstate) / 10));
+// printk(KERN_INFO PFX "CPU#%d setting duty cycle to %d%%\n", cpu, ((125 * newstate) / 10));
/* bits 63 - 5 : reserved
* bit 4 : enable/disable
* bits 3-1 : duty cycle
@@ -155,14 +155,16 @@
};
-static int cpufreq_p4_setpolicy(struct cpufreq_policy *policy)
+static int cpufreq_p4_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
{
unsigned int newstate = DC_RESV;
- if (cpufreq_frequency_table_setpolicy(policy, &p4clockmod_table[0], &newstate))
+ if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
return -EINVAL;
- cpufreq_p4_setdc(policy->cpu, newstate);
+ cpufreq_p4_setdc(policy->cpu, p4clockmod_table[newstate].index);
return 0;
}
@@ -174,39 +176,30 @@
}
-static int __init cpufreq_p4_init(void)
-{
- struct cpuinfo_x86 *c = cpu_data;
- int cpuid;
- int ret;
- struct cpufreq_driver *driver;
+static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
+{
+ struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
+ int cpuid = 0;
unsigned int i;
- /*
- * THERM_CONTROL is architectural for IA32 now, so
- * we can rely on the capability checks
- */
+ /* capability check */
if (c->x86_vendor != X86_VENDOR_INTEL)
return -ENODEV;
-
if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
- !test_bit(X86_FEATURE_ACC, c->x86_capability))
+ !test_bit(X86_FEATURE_ACC, c->x86_capability))
return -ENODEV;
-
- /* Errata workarounds */
+
+ /* Errata workaround */
cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
switch (cpuid) {
- case 0x0f07:
- case 0x0f0a:
- case 0x0f11:
- case 0x0f12:
- has_N44_O17_errata = 1;
- default:
- break;
+ case 0x0f07:
+ case 0x0f0a:
+ case 0x0f11:
+ case 0x0f12:
+ has_N44_O17_errata[policy->cpu] = 1;
}
-
- printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
-
+
+ /* get frequency */
if (!stock_freq) {
if (cpu_khz)
stock_freq = cpu_khz;
@@ -216,70 +209,68 @@
}
}
- driver = kmalloc(sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL);
- if (!driver)
- return -ENOMEM;
- memset(driver, 0, sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy));
-
- driver->policy = (struct cpufreq_policy *) (driver + 1);
-
/* table init */
for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
- if ((i<2) && (has_N44_O17_errata))
+ if ((i<2) && (has_N44_O17_errata[policy->cpu]))
p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
else
p4clockmod_table[i].frequency = (stock_freq * i)/8;
}
-
+ /* cpuinfo and default policy values */
+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
+ policy->cpuinfo.transition_latency = 1000;
#ifdef CONFIG_CPU_FREQ_24_API
- for (i=0;icpu_cur_freq[i] = stock_freq;
- }
+ p4clockmod_driver.cpu_cur_freq[policy->cpu] = stock_freq;
#endif
- driver->verify = &cpufreq_p4_verify;
- driver->setpolicy = &cpufreq_p4_setpolicy;
- strncpy(driver->name, "p4-clockmod", CPUFREQ_NAME_LEN);
-
- for (i=0;ipolicy[i].cpu = i;
- ret = cpufreq_frequency_table_cpuinfo(&driver->policy[i], &p4clockmod_table[0]);
- if (ret) {
- kfree(driver);
- return ret;
- }
- driver->policy[i].policy = CPUFREQ_POLICY_PERFORMANCE;
- driver->policy[i].cpuinfo.transition_latency = CPUFREQ_ETERNAL;
- }
+ return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
+}
- cpufreq_p4_driver = driver;
-
- ret = cpufreq_register(driver);
- if (ret) {
- cpufreq_p4_driver = NULL;
- kfree(driver);
- }
- return ret;
+static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
+{
+ return cpufreq_p4_setdc(policy->cpu, DC_DISABLE);
+}
+
+
+static struct cpufreq_driver p4clockmod_driver = {
+ .verify = cpufreq_p4_verify,
+ .target = cpufreq_p4_target,
+ .init = cpufreq_p4_cpu_init,
+ .exit = cpufreq_p4_cpu_exit,
+ .name = "p4-clockmod",
+};
+
+
+static int __init cpufreq_p4_init(void)
+{
+ struct cpuinfo_x86 *c = cpu_data;
+
+ /*
+ * THERM_CONTROL is architectural for IA32 now, so
+ * we can rely on the capability checks
+ */
+ if (c->x86_vendor != X86_VENDOR_INTEL)
+ return -ENODEV;
+
+ if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
+ !test_bit(X86_FEATURE_ACC, c->x86_capability))
+ return -ENODEV;
+
+ printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
+
+ return cpufreq_register_driver(&p4clockmod_driver);
}
static void __exit cpufreq_p4_exit(void)
{
- unsigned int i;
-
- if (cpufreq_p4_driver) {
- for (i=0; i");
MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
diff -Nru a/arch/i386/kernel/cpu/cpufreq/speedstep.c b/arch/i386/kernel/cpu/cpufreq/speedstep.c
--- a/arch/i386/kernel/cpu/cpufreq/speedstep.c Mon Feb 24 11:06:07 2003
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep.c Mon Feb 24 11:06:07 2003
@@ -1,8 +1,8 @@
/*
- * $Id: speedstep.c,v 1.58 2002/11/11 15:35:46 db Exp $
+ * $Id: speedstep.c,v 1.68 2003/01/20 17:31:47 db Exp $
*
* (C) 2001 Dave Jones, Arjan van de ven.
- * (C) 2002 Dominik Brodowski
+ * (C) 2002 - 2003 Dominik Brodowski
*
* Licensed under the terms of the GNU GPL License version 2.
* Based upon reverse engineered information, and on Intel documentation
@@ -30,7 +30,7 @@
#include
-static struct cpufreq_driver *speedstep_driver;
+static struct cpufreq_driver speedstep_driver;
/* speedstep_chipset:
* It is necessary to know which chipset is used. As accesses to
@@ -208,7 +208,7 @@
pm2_blk &= 0xfe;
outb(pm2_blk, (pmbase + 0x20));
- /* check if transition was sucessful */
+ /* check if transition was successful */
value = inb(pmbase + 0x50);
/* Enable IRQs */
@@ -217,7 +217,7 @@
dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
if (state == (value & 0x1)) {
- dprintk (KERN_INFO "cpufreq: change to %u MHz succeded\n", (freqs.new / 1000));
+ dprintk (KERN_INFO "cpufreq: change to %u MHz succeeded\n", (freqs.new / 1000));
} else {
printk (KERN_ERR "cpufreq: change failed - I/O error\n");
}
@@ -311,7 +311,7 @@
pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev);
if (rev < 5) {
- dprintk(KERN_INFO "cpufreq: hostbrige does not support speedstep\n");
+ dprintk(KERN_INFO "cpufreq: hostbridge does not support speedstep\n");
speedstep_chipset_dev = NULL;
return 0;
}
@@ -573,11 +573,13 @@
*
* Sets a new CPUFreq policy.
*/
-static int speedstep_setpolicy (struct cpufreq_policy *policy)
+static int speedstep_target (struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
{
unsigned int newstate = 0;
- if (cpufreq_frequency_table_setpolicy(policy, &speedstep_freqs[0], &newstate))
+ if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
return -EINVAL;
speedstep_set_state(newstate, 1);
@@ -599,6 +601,42 @@
}
+static int speedstep_cpu_init(struct cpufreq_policy *policy)
+{
+ int result = 0;
+ unsigned int speed;
+
+ /* capability check */
+ if (policy->cpu != 0)
+ return -ENODEV;
+
+ /* detect low and high frequency */
+ result = speedstep_detect_speeds();
+ if (result)
+ return result;
+
+ /* get current speed setting */
+ result = speedstep_get_state(&speed);
+ if (result)
+ return result;
+
+ speed = (speed == SPEEDSTEP_LOW) ? speedstep_low_freq : speedstep_high_freq;
+ dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n",
+ (speed == speedstep_low_freq) ? "low" : "high",
+ (speed / 1000));
+
+ /* cpuinfo and default policy values */
+ policy->policy = (speed == speedstep_low_freq) ?
+ CPUFREQ_POLICY_POWERSAVE : CPUFREQ_POLICY_PERFORMANCE;
+ policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+#ifdef CONFIG_CPU_FREQ_24_API
+ speedstep_driver.cpu_cur_freq[policy->cpu] = speed;
+#endif
+
+ return cpufreq_frequency_table_cpuinfo(policy, &speedstep_freqs[0]);
+}
+
+
#ifndef MODULE
/**
* speedstep_setup speedstep command line parameter parsing
@@ -608,7 +646,7 @@
* if the CPU in your notebook is a SpeedStep-capable Intel
* Pentium III Coppermine. These processors cannot be detected
* automatically, as Intel continues to consider the detection
- * alogrithm as proprietary material.
+ * algorithm as proprietary material.
*/
static int __init speedstep_setup(char *str)
{
@@ -618,6 +656,15 @@
__setup("speedstep_coppermine=", speedstep_setup);
#endif
+
+static struct cpufreq_driver speedstep_driver = {
+ .name = "speedstep",
+ .verify = speedstep_verify,
+ .target = speedstep_target,
+ .init = speedstep_cpu_init,
+};
+
+
/**
* speedstep_init - initializes the SpeedStep CPUFreq driver
*
@@ -627,11 +674,6 @@
*/
static int __init speedstep_init(void)
{
- int result;
- unsigned int speed;
- struct cpufreq_driver *driver;
-
-
/* detect chipset */
speedstep_chipset = speedstep_detect_chipset();
@@ -644,70 +686,13 @@
return -ENODEV;
}
- dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) support $Revision: 1.58 $\n");
- dprintk(KERN_DEBUG "cpufreq: chipset 0x%x - processor 0x%x\n",
- speedstep_chipset, speedstep_processor);
+ dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) support $Revision: 1.68 $\n");
/* activate speedstep support */
- result = speedstep_activate();
- if (result)
- return result;
-
- /* detect low and high frequency */
- result = speedstep_detect_speeds();
- if (result)
- return result;
-
- /* get current speed setting */
- result = speedstep_get_state(&speed);
- if (result)
- return result;
-
- speed = (speed == SPEEDSTEP_LOW) ? speedstep_low_freq : speedstep_high_freq;
-
- dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n",
- (speed == speedstep_low_freq) ? "low" : "high",
- (speed / 1000));
-
- /* initialization of main "cpufreq" code*/
- driver = kmalloc(sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy), GFP_KERNEL);
- if (!driver)
- return -ENOMEM;
- memset(driver, 0, sizeof(struct cpufreq_driver) +
- NR_CPUS * sizeof(struct cpufreq_policy));
-
- driver->policy = (struct cpufreq_policy *) (driver + 1);
-
- driver->policy[0].cpu = 0;
- result = cpufreq_frequency_table_cpuinfo(&driver->policy[0], &speedstep_freqs[0]);
- if (result) {
- kfree(driver);
- return result;
- }
-
-#ifdef CONFIG_CPU_FREQ_24_API
- driver->cpu_cur_freq[0] = speed;
-#endif
-
- driver->verify = &speedstep_verify;
- driver->setpolicy = &speedstep_setpolicy;
- strncpy(driver->name, "speedstep", CPUFREQ_NAME_LEN);
-
- driver->policy[0].cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-
- driver->policy[0].policy = (speed == speedstep_low_freq) ?
- CPUFREQ_POLICY_POWERSAVE : CPUFREQ_POLICY_PERFORMANCE;
-
- speedstep_driver = driver;
-
- result = cpufreq_register(driver);
- if (result) {
- speedstep_driver = NULL;
- kfree(driver);
- }
+ if (speedstep_activate())
+ return -EINVAL;
- return result;
+ return cpufreq_register_driver(&speedstep_driver);
}
@@ -718,17 +703,15 @@
*/
static void __exit speedstep_exit(void)
{
- if (speedstep_driver) {
- cpufreq_unregister();
- kfree(speedstep_driver);
- }
+ cpufreq_unregister_driver(&speedstep_driver);
}
+MODULE_PARM (speedstep_coppermine, "i");
+
MODULE_AUTHOR ("Dave Jones , Dominik Brodowski ");
MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors.");
MODULE_LICENSE ("GPL");
+
module_init(speedstep_init);
module_exit(speedstep_exit);
-
-MODULE_PARM (speedstep_coppermine, "i");
diff -Nru a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
--- a/arch/i386/kernel/cpu/cyrix.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/cpu/cyrix.c Mon Feb 24 11:06:08 2003
@@ -74,7 +74,7 @@
/*
* Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old
- * BIOSes for compatability with DOS games. This makes the udelay loop
+ * BIOSes for compatibility with DOS games. This makes the udelay loop
* work correctly, and improves performance.
*
* FIXME: our newer udelay uses the tsc. We dont need to frob with SLOP
diff -Nru a/arch/i386/kernel/cpu/mtrr/if.c b/arch/i386/kernel/cpu/mtrr/if.c
--- a/arch/i386/kernel/cpu/mtrr/if.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/cpu/mtrr/if.c Mon Feb 24 11:06:08 2003
@@ -1,6 +1,5 @@
#include
#include
-#include
#include
#include
#include
@@ -300,8 +299,6 @@
# endif /* CONFIG_PROC_FS */
-static devfs_handle_t devfs_handle;
-
char * attrib_to_str(int x)
{
return (x <= 6) ? mtrr_strings[x] : "?";
@@ -337,7 +334,6 @@
attrib_to_str(type), usage_table[i]);
}
}
- devfs_set_file_size(devfs_handle, len);
return 0;
}
@@ -350,11 +346,6 @@
proc_root_mtrr->owner = THIS_MODULE;
proc_root_mtrr->proc_fops = &mtrr_fops;
}
-#endif
-#ifdef USERSPACE_INTERFACE
- devfs_handle = devfs_register(NULL, "cpu/mtrr", DEVFS_FL_DEFAULT, 0, 0,
- S_IFREG | S_IRUGO | S_IWUSR,
- &mtrr_fops, NULL);
#endif
return 0;
}
diff -Nru a/arch/i386/kernel/doublefault.c b/arch/i386/kernel/doublefault.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/i386/kernel/doublefault.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,65 @@
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define DOUBLEFAULT_STACKSIZE (1024)
+static unsigned long doublefault_stack[DOUBLEFAULT_STACKSIZE];
+#define STACK_START (unsigned long)(doublefault_stack+DOUBLEFAULT_STACKSIZE)
+
+#define ptr_ok(x) ((x) > 0xc0000000 && (x) < 0xc1000000)
+
+static void doublefault_fn(void)
+{
+ struct Xgt_desc_struct gdt_desc = {0, 0};
+ unsigned long gdt, tss;
+
+ __asm__ __volatile__("sgdt %0": "=m" (gdt_desc): :"memory");
+ gdt = gdt_desc.address;
+
+ printk("double fault, gdt at %08lx [%d bytes]\n", gdt, gdt_desc.size);
+
+ if (ptr_ok(gdt)) {
+ gdt += GDT_ENTRY_TSS << 3;
+ tss = *(u16 *)(gdt+2);
+ tss += *(u8 *)(gdt+4) << 16;
+ tss += *(u8 *)(gdt+7) << 24;
+ printk("double fault, tss at %08lx\n", tss);
+
+ if (ptr_ok(tss)) {
+ struct tss_struct *t = (struct tss_struct *)tss;
+
+ printk("eip = %08lx, esp = %08lx\n", t->eip, t->esp);
+
+ printk("eax = %08lx, ebx = %08lx, ecx = %08lx, edx = %08lx\n",
+ t->eax, t->ebx, t->ecx, t->edx);
+ printk("esi = %08lx, edi = %08lx\n",
+ t->esi, t->edi);
+ }
+ }
+
+ for (;;) /* nothing */;
+}
+
+struct tss_struct doublefault_tss __cacheline_aligned = {
+ .esp0 = STACK_START,
+ .ss0 = __KERNEL_DS,
+ .ldt = 0,
+ .bitmap = INVALID_IO_BITMAP_OFFSET,
+ .io_bitmap = { [0 ... IO_BITMAP_SIZE ] = ~0 },
+
+ .eip = (unsigned long) doublefault_fn,
+ .eflags = 0x00000082,
+ .esp = STACK_START,
+ .es = __USER_DS,
+ .cs = __KERNEL_CS,
+ .ss = __KERNEL_DS,
+ .ds = __USER_DS,
+
+ .__cr3 = __pa(swapper_pg_dir)
+};
diff -Nru a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
--- a/arch/i386/kernel/entry.S Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/entry.S Mon Feb 24 11:06:08 2003
@@ -41,7 +41,6 @@
*/
#include
-#include
#include
#include
#include
@@ -174,9 +173,10 @@
ENTRY(ret_from_fork)
- # NOTE: this function takes a parameter but it's unused on x86.
+ pushl %eax
call schedule_tail
GET_THREAD_INFO(%ebp)
+ popl %eax
jmp syscall_exit
/*
@@ -252,7 +252,7 @@
pushl %eax
SAVE_ALL
GET_THREAD_INFO(%ebp)
- cmpl $(NR_syscalls), %eax
+ cmpl $(nr_syscalls), %eax
jae syscall_badsys
testb $_TIF_SYSCALL_TRACE,TI_FLAGS(%ebp)
@@ -276,7 +276,7 @@
pushl %eax # save orig_eax
SAVE_ALL
GET_THREAD_INFO(%ebp)
- cmpl $(NR_syscalls), %eax
+ cmpl $(nr_syscalls), %eax
jae syscall_badsys
# system call tracing in operation
testb $_TIF_SYSCALL_TRACE,TI_FLAGS(%ebp)
@@ -339,7 +339,7 @@
xorl %edx,%edx
call do_syscall_trace
movl ORIG_EAX(%esp), %eax
- cmpl $(NR_syscalls), %eax
+ cmpl $(nr_syscalls), %eax
jnae syscall_call
jmp syscall_exit
@@ -500,10 +500,6 @@
pushl $do_coprocessor_segment_overrun
jmp error_code
-ENTRY(double_fault)
- pushl $do_double_fault
- jmp error_code
-
ENTRY(invalid_TSS)
pushl $do_invalid_TSS
jmp error_code
@@ -801,8 +797,15 @@
.long sys_epoll_wait
.long sys_remap_file_pages
.long sys_set_tid_address
-
-
- .rept NR_syscalls-(.-sys_call_table)/4
- .long sys_ni_syscall
- .endr
+ .long sys_timer_create
+ .long sys_timer_settime /* 260 */
+ .long sys_timer_gettime
+ .long sys_timer_getoverrun
+ .long sys_timer_delete
+ .long sys_clock_settime
+ .long sys_clock_gettime /* 265 */
+ .long sys_clock_getres
+ .long sys_clock_nanosleep
+
+
+nr_syscalls=(.-sys_call_table)/4
diff -Nru a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S
--- a/arch/i386/kernel/head.S Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/head.S Mon Feb 24 11:06:08 2003
@@ -38,11 +38,37 @@
#define X86_VENDOR_ID CPU_PARAMS+28
/*
+ * Initialize page tables
+ */
+#define INIT_PAGE_TABLES \
+ movl $pg0 - __PAGE_OFFSET, %edi; \
+ /* "007" doesn't mean with license to kill, but PRESENT+RW+USER */ \
+ movl $007, %eax; \
+2: stosl; \
+ add $0x1000, %eax; \
+ cmp $empty_zero_page - __PAGE_OFFSET, %edi; \
+ jne 2b;
+
+/*
* swapper_pg_dir is the main page directory, address 0x00101000
*
* On entry, %esi points to the real-mode code as a 32-bit pointer.
*/
-startup_32:
+ENTRY(startup_32)
+
+#ifdef CONFIG_X86_VISWS
+/*
+ * On SGI Visual Workstations boot CPU starts in protected mode.
+ */
+ orw %bx, %bx
+ jnz 1f
+ INIT_PAGE_TABLES
+ movl $swapper_pg_dir - __PAGE_OFFSET, %eax
+ movl %eax, %cr3
+ lgdt boot_gdt
+1:
+#endif
+
/*
* Set segments to known values
*/
@@ -79,17 +105,7 @@
jmp 3f
1:
#endif
-/*
- * Initialize page tables
- */
- movl $pg0-__PAGE_OFFSET,%edi /* initialize page tables */
- movl $007,%eax /* "007" doesn't mean with license to kill, but
- PRESENT+RW+USER */
-2: stosl
- add $0x1000,%eax
- cmp $empty_zero_page-__PAGE_OFFSET,%edi
- jne 2b
-
+ INIT_PAGE_TABLES
/*
* Enable paging
*/
@@ -412,7 +428,7 @@
/*
* The Global Descriptor Table contains 28 quadwords, per-CPU.
*/
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) || defined(CONFIG_X86_VISWS)
/*
* The boot_gdt_table must mirror the equivalent in setup.S and is
* used only by the trampoline for booting other CPUs
@@ -459,6 +475,13 @@
.quad 0x00409a0000000000 /* 0xb8 APM CS code */
.quad 0x00009a0000000000 /* 0xc0 APM CS 16 code (16 bit) */
.quad 0x0040920000000000 /* 0xc8 APM DS data */
+
+ .quad 0x0000000000000000 /* 0xd0 - unused */
+ .quad 0x0000000000000000 /* 0xd8 - unused */
+ .quad 0x0000000000000000 /* 0xe0 - unused */
+ .quad 0x0000000000000000 /* 0xe8 - unused */
+ .quad 0x0000000000000000 /* 0xf0 - unused */
+ .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */
#if CONFIG_SMP
.fill (NR_CPUS-1)*GDT_ENTRIES,8,0 /* other CPU's GDT */
diff -Nru a/arch/i386/kernel/i386_ksyms.c b/arch/i386/kernel/i386_ksyms.c
--- a/arch/i386/kernel/i386_ksyms.c Mon Feb 24 11:06:14 2003
+++ b/arch/i386/kernel/i386_ksyms.c Mon Feb 24 11:06:14 2003
@@ -104,6 +104,7 @@
/* Networking helper routines. */
EXPORT_SYMBOL(csum_partial_copy_generic);
/* Delay loops */
+EXPORT_SYMBOL(__ndelay);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__delay);
EXPORT_SYMBOL(__const_udelay);
@@ -182,8 +183,6 @@
EXPORT_SYMBOL(rtc_lock);
-EXPORT_SYMBOL_GPL(register_profile_notifier);
-EXPORT_SYMBOL_GPL(unregister_profile_notifier);
EXPORT_SYMBOL_GPL(set_nmi_callback);
EXPORT_SYMBOL_GPL(unset_nmi_callback);
diff -Nru a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c
--- a/arch/i386/kernel/i8259.c Mon Feb 24 11:06:13 2003
+++ b/arch/i386/kernel/i8259.c Mon Feb 24 11:06:13 2003
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
@@ -47,7 +48,7 @@
void mask_and_ack_8259A(unsigned int);
-static unsigned int startup_8259A_irq(unsigned int irq)
+unsigned int startup_8259A_irq(unsigned int irq)
{
enable_8259A_irq(irq);
return 0; /* never anything pending */
@@ -71,11 +72,7 @@
/*
* This contains the irq mask for both 8259A irq controllers,
*/
-static unsigned int cached_irq_mask = 0xffff;
-
-#define __byte(x,y) (((unsigned char *)&(y))[x])
-#define cached_21 (__byte(0,cached_irq_mask))
-#define cached_A1 (__byte(1,cached_irq_mask))
+unsigned int cached_irq_mask = 0xffff;
/*
* Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
diff -Nru a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
--- a/arch/i386/kernel/io_apic.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/kernel/io_apic.c Mon Feb 24 11:06:09 2003
@@ -222,7 +222,7 @@
# endif
extern unsigned long irq_affinity [NR_IRQS];
-unsigned long __cacheline_aligned irq_balance_mask [NR_IRQS];
+int __cacheline_aligned pending_irq_balance_apicid [NR_IRQS];
static int irqbalance_disabled __initdata = 0;
static int physical_balance = 0;
@@ -441,7 +441,7 @@
Dprintk("irq = %d moved to cpu = %d\n", selected_irq, min_loaded);
/* mark for change destination */
spin_lock(&desc->lock);
- irq_balance_mask[selected_irq] = target_cpu_mask;
+ pending_irq_balance_apicid[selected_irq] = cpu_to_logical_apicid(min_loaded);
spin_unlock(&desc->lock);
/* Since we made a change, come back sooner to
* check for more variation.
@@ -500,7 +500,7 @@
if (cpu != new_cpu) {
irq_desc_t *desc = irq_desc + irq;
spin_lock(&desc->lock);
- irq_balance_mask[irq] = cpu_to_logical_apicid(new_cpu);
+ pending_irq_balance_apicid[irq] = cpu_to_logical_apicid(new_cpu);
spin_unlock(&desc->lock);
}
}
@@ -515,7 +515,7 @@
/* push everything to CPU 0 to give us a starting point. */
for (i = 0 ; i < NR_IRQS ; i++)
- irq_balance_mask[i] = 1 << 0;
+ pending_irq_balance_apicid[i] = cpu_to_logical_apicid(0);
for (;;) {
set_current_state(TASK_INTERRUPTIBLE);
time_remaining = schedule_timeout(time_remaining);
@@ -580,9 +580,9 @@
static inline void move_irq(int irq)
{
/* note - we hold the desc->lock */
- if (unlikely(irq_balance_mask[irq])) {
- set_ioapic_affinity(irq, irq_balance_mask[irq]);
- irq_balance_mask[irq] = 0;
+ if (unlikely(pending_irq_balance_apicid[irq])) {
+ set_ioapic_affinity(irq, pending_irq_balance_apicid[irq]);
+ pending_irq_balance_apicid[irq] = 0;
}
}
@@ -1745,25 +1745,25 @@
*/
static struct hw_interrupt_type ioapic_edge_irq_type = {
- "IO-APIC-edge",
- startup_edge_ioapic_irq,
- shutdown_edge_ioapic_irq,
- enable_edge_ioapic_irq,
- disable_edge_ioapic_irq,
- ack_edge_ioapic_irq,
- end_edge_ioapic_irq,
- set_ioapic_affinity,
+ .typename = "IO-APIC-edge",
+ .startup = startup_edge_ioapic_irq,
+ .shutdown = shutdown_edge_ioapic_irq,
+ .enable = enable_edge_ioapic_irq,
+ .disable = disable_edge_ioapic_irq,
+ .ack = ack_edge_ioapic_irq,
+ .end = end_edge_ioapic_irq,
+ .set_affinity = set_ioapic_affinity,
};
static struct hw_interrupt_type ioapic_level_irq_type = {
- "IO-APIC-level",
- startup_level_ioapic_irq,
- shutdown_level_ioapic_irq,
- enable_level_ioapic_irq,
- disable_level_ioapic_irq,
- mask_and_ack_level_ioapic_irq,
- end_level_ioapic_irq,
- set_ioapic_affinity,
+ .typename = "IO-APIC-level",
+ .startup = startup_level_ioapic_irq,
+ .shutdown = shutdown_level_ioapic_irq,
+ .enable = enable_level_ioapic_irq,
+ .disable = disable_level_ioapic_irq,
+ .ack = mask_and_ack_level_ioapic_irq,
+ .end = end_level_ioapic_irq,
+ .set_affinity = set_ioapic_affinity,
};
static inline void init_IO_APIC_traps(void)
@@ -1821,26 +1821,14 @@
static void end_lapic_irq (unsigned int i) { /* nothing */ }
static struct hw_interrupt_type lapic_irq_type = {
- "local-APIC-edge",
- NULL, /* startup_irq() not used for IRQ0 */
- NULL, /* shutdown_irq() not used for IRQ0 */
- enable_lapic_irq,
- disable_lapic_irq,
- ack_lapic_irq,
- end_lapic_irq
+ .typename = "local-APIC-edge",
+ .startup = NULL, /* startup_irq() not used for IRQ0 */
+ .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */
+ .enable = enable_lapic_irq,
+ .disable = disable_lapic_irq,
+ .ack = ack_lapic_irq,
+ .end = end_lapic_irq
};
-
-void enable_NMI_through_LVT0 (void * dummy)
-{
- unsigned int v, ver;
-
- ver = apic_read(APIC_LVR);
- ver = GET_APIC_VERSION(ver);
- v = APIC_DM_NMI; /* unmask and set to NMI */
- if (!APIC_INTEGRATED(ver)) /* 82489DX */
- v |= APIC_LVT_LEVEL_TRIGGER;
- apic_write_around(APIC_LVT0, v);
-}
static void setup_nmi (void)
{
diff -Nru a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
--- a/arch/i386/kernel/mpparse.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/kernel/mpparse.c Mon Feb 24 11:06:09 2003
@@ -1027,8 +1027,19 @@
while ((void *) entry < madt_end) {
if (entry->header.type == ACPI_MADT_INT_SRC_OVR &&
- acpi_fadt.sci_int == entry->global_irq)
- return;
+ acpi_fadt.sci_int == entry->bus_irq) {
+ /*
+ * See the note at the end of ACPI 2.0b section
+ * 5.2.10.8 for what this is about.
+ */
+ if (entry->bus_irq != entry->global_irq) {
+ acpi_fadt.sci_int = entry->global_irq;
+ irq = entry->global_irq;
+ break;
+ }
+ else
+ return;
+ }
entry = (struct acpi_table_int_src_ovr *)
((unsigned long) entry + entry->header.length);
diff -Nru a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
--- a/arch/i386/kernel/process.c Mon Feb 24 11:06:07 2003
+++ b/arch/i386/kernel/process.c Mon Feb 24 11:06:07 2003
@@ -423,8 +423,12 @@
* so the performance issues may eventually be a valid point.
* More important, however, is the fact that this allows us much
* more flexibility.
+ *
+ * The return value (in %eax) will be the "prev" task after
+ * the task-switch, and shows up in ret_from_fork in entry.S,
+ * for example.
*/
-void __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
+struct task_struct * __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
{
struct thread_struct *prev = &prev_p->thread,
*next = &next_p->thread;
@@ -495,6 +499,7 @@
*/
tss->bitmap = INVALID_IO_BITMAP_OFFSET;
}
+ return prev_p;
}
asmlinkage int sys_fork(struct pt_regs regs)
diff -Nru a/arch/i386/kernel/profile.c b/arch/i386/kernel/profile.c
--- a/arch/i386/kernel/profile.c Mon Feb 24 11:06:13 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,45 +0,0 @@
-/*
- * linux/arch/i386/kernel/profile.c
- *
- * (C) 2002 John Levon
- *
- */
-
-#include
-#include
-#include
-#include
-#include
-
-static struct notifier_block * profile_listeners;
-static rwlock_t profile_lock = RW_LOCK_UNLOCKED;
-
-int register_profile_notifier(struct notifier_block * nb)
-{
- int err;
- write_lock_irq(&profile_lock);
- err = notifier_chain_register(&profile_listeners, nb);
- write_unlock_irq(&profile_lock);
- return err;
-}
-
-
-int unregister_profile_notifier(struct notifier_block * nb)
-{
- int err;
- write_lock_irq(&profile_lock);
- err = notifier_chain_unregister(&profile_listeners, nb);
- write_unlock_irq(&profile_lock);
- return err;
-}
-
-
-void x86_profile_hook(struct pt_regs * regs)
-{
- /* we would not even need this lock if
- * we had a global cli() on register/unregister
- */
- read_lock(&profile_lock);
- notifier_call_chain(&profile_listeners, 0, regs);
- read_unlock(&profile_lock);
-}
diff -Nru a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
--- a/arch/i386/kernel/setup.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/kernel/setup.c Mon Feb 24 11:06:09 2003
@@ -92,7 +92,6 @@
extern int root_mountflags;
extern char _text, _etext, _edata, _end;
extern int blk_nohighio;
-void __init visws_get_board_type_and_rev(void);
unsigned long saved_videomode;
diff -Nru a/arch/i386/kernel/time.c b/arch/i386/kernel/time.c
--- a/arch/i386/kernel/time.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/kernel/time.c Mon Feb 24 11:06:09 2003
@@ -135,6 +135,7 @@
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
write_sequnlock_irq(&xtime_lock);
+ clock_was_set();
}
/*
diff -Nru a/arch/i386/kernel/trampoline.S b/arch/i386/kernel/trampoline.S
--- a/arch/i386/kernel/trampoline.S Mon Feb 24 11:06:09 2003
+++ b/arch/i386/kernel/trampoline.S Mon Feb 24 11:06:09 2003
@@ -46,8 +46,8 @@
movl $0xA5A5A5A5, trampoline_data - r_base
# write marker for master knows we're running
- lidt idt_48 - r_base # load idt with 0, 0
- lgdt gdt_48 - r_base # load gdt with whatever is appropriate
+ lidt boot_idt - r_base # load idt with 0, 0
+ lgdt boot_gdt - r_base # load gdt with whatever is appropriate
xor %ax, %ax
inc %ax # protected mode (PE) bit
@@ -57,7 +57,7 @@
ljmpl $__BOOT_CS, $0x00100000
# jump to startup_32 in arch/i386/kernel/head.S
-idt_48:
+boot_idt:
.word 0 # idt limit = 0
.word 0, 0 # idt base = 0L
@@ -65,8 +65,7 @@
# NOTE: here we actually use CPU#0's GDT - but that is OK, we reload
# the proper GDT shortly after booting up the secondary CPUs.
#
-
-gdt_48:
+ENTRY(boot_gdt)
.word __BOOT_DS + 7 # gdt limit
.long boot_gdt_table-__PAGE_OFFSET # gdt base = gdt (first SMP CPU)
diff -Nru a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
--- a/arch/i386/kernel/traps.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/kernel/traps.c Mon Feb 24 11:06:08 2003
@@ -73,7 +73,6 @@
asmlinkage void bounds(void);
asmlinkage void invalid_op(void);
asmlinkage void device_not_available(void);
-asmlinkage void double_fault(void);
asmlinkage void coprocessor_segment_overrun(void);
asmlinkage void invalid_TSS(void);
asmlinkage void segment_not_present(void);
@@ -349,8 +348,6 @@
DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
-DO_VM86_ERROR( 7, SIGSEGV, "device not available", device_not_available)
-DO_ERROR( 8, SIGSEGV, "double fault", double_fault)
DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
@@ -775,7 +772,7 @@
}
#endif
-#define _set_gate(gate_addr,type,dpl,addr) \
+#define _set_gate(gate_addr,type,dpl,addr,seg) \
do { \
int __d0, __d1; \
__asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
@@ -785,7 +782,7 @@
:"=m" (*((long *) (gate_addr))), \
"=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
:"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
- "3" ((char *) (addr)),"2" (__KERNEL_CS << 16)); \
+ "3" ((char *) (addr)),"2" ((seg) << 16)); \
} while (0)
@@ -797,22 +794,27 @@
*/
void set_intr_gate(unsigned int n, void *addr)
{
- _set_gate(idt_table+n,14,0,addr);
+ _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
}
static void __init set_trap_gate(unsigned int n, void *addr)
{
- _set_gate(idt_table+n,15,0,addr);
+ _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
}
static void __init set_system_gate(unsigned int n, void *addr)
{
- _set_gate(idt_table+n,15,3,addr);
+ _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
}
static void __init set_call_gate(void *a, void *addr)
{
- _set_gate(a,12,3,addr);
+ _set_gate(a,12,3,addr,__KERNEL_CS);
+}
+
+static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
+{
+ _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
}
@@ -843,7 +845,7 @@
set_system_gate(5,&bounds);
set_trap_gate(6,&invalid_op);
set_trap_gate(7,&device_not_available);
- set_trap_gate(8,&double_fault);
+ set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
set_trap_gate(9,&coprocessor_segment_overrun);
set_trap_gate(10,&invalid_TSS);
set_trap_gate(11,&segment_not_present);
diff -Nru a/arch/i386/lib/delay.c b/arch/i386/lib/delay.c
--- a/arch/i386/lib/delay.c Mon Feb 24 11:06:13 2003
+++ b/arch/i386/lib/delay.c Mon Feb 24 11:06:13 2003
@@ -41,3 +41,8 @@
{
__const_udelay(usecs * 0x000010c6); /* 2**32 / 1000000 */
}
+
+void __ndelay(unsigned long nsecs)
+{
+ __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
+}
diff -Nru a/arch/i386/mach-visws/Makefile b/arch/i386/mach-visws/Makefile
--- a/arch/i386/mach-visws/Makefile Mon Feb 24 11:06:13 2003
+++ b/arch/i386/mach-visws/Makefile Mon Feb 24 11:06:13 2003
@@ -4,8 +4,7 @@
EXTRA_CFLAGS += -I../kernel
-obj-y := setup.o traps.o
+obj-y := setup.o traps.o reboot.o
-obj-$(CONFIG_PCI) += pci-visws.o
obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o
obj-$(CONFIG_X86_LOCAL_APIC) += mpparse.o
diff -Nru a/arch/i386/mach-visws/mpparse.c b/arch/i386/mach-visws/mpparse.c
--- a/arch/i386/mach-visws/mpparse.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/mach-visws/mpparse.c Mon Feb 24 11:06:08 2003
@@ -1,17 +1,15 @@
-#include
-#include
-#include
-#include
+
#include
-#include
-#include
-#include
-#include
+#include
+#include
#include
-#include
+#include
#include
-#include
+#include
+
+#include "cobalt.h"
+#include "mach_apic.h"
/* Have we found an MP table */
int smp_found_config;
@@ -43,25 +41,84 @@
/* Processor that is doing the boot up */
unsigned int boot_cpu_physical_apicid = -1U;
unsigned int boot_cpu_logical_apicid = -1U;
+
/* Internal processor count */
static unsigned int num_processors;
/* Bitmask of physically existing CPUs */
unsigned long phys_cpu_present_map;
+u8 raw_phys_apicid[NR_CPUS] = { [0 ... NR_CPUS - 1] = BAD_APICID };
+
/*
* The Visual Workstation is Intel MP compliant in the hardware
* sense, but it doesn't have a BIOS(-configuration table).
* No problem for Linux.
*/
+
+void __init MP_processor_info (struct mpc_config_processor *m)
+{
+ int ver, logical_apicid;
+
+ if (!(m->mpc_cpuflag & CPU_ENABLED))
+ return;
+
+ logical_apicid = m->mpc_apicid;
+ printk(KERN_INFO "%sCPU #%d %ld:%ld APIC version %d\n",
+ m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
+ m->mpc_apicid,
+ (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
+ (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
+ m->mpc_apicver);
+
+ if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
+ boot_cpu_physical_apicid = m->mpc_apicid;
+ boot_cpu_logical_apicid = logical_apicid;
+ }
+
+ num_processors++;
+
+ if (m->mpc_apicid > MAX_APICS) {
+ printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
+ m->mpc_apicid, MAX_APICS);
+ --num_processors;
+ return;
+ }
+ ver = m->mpc_apicver;
+
+ phys_cpu_present_map |= apicid_to_cpu_present(m->mpc_apicid);
+ /*
+ * Validate version
+ */
+ if (ver == 0x0) {
+ printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
+ "fixing up to 0x10. (tell your hw vendor)\n",
+ m->mpc_apicid);
+ ver = 0x10;
+ }
+ apic_version[m->mpc_apicid] = ver;
+ raw_phys_apicid[num_processors - 1] = m->mpc_apicid;
+}
+
void __init find_smp_config(void)
{
- smp_found_config = 1;
+ struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
+ unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
+
+ if (ncpus > CO_CPU_MAX) {
+ printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
+ ncpus, mp);
- phys_cpu_present_map |= 2; /* or in id 1 */
- apic_version[1] |= 0x10; /* integrated APIC */
- apic_version[0] |= 0x10;
+ ncpus = CO_CPU_MAX;
+ }
+
+ smp_found_config = 1;
+ while (ncpus--)
+ MP_processor_info(mp++);
mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
}
+void __init get_smp_config (void)
+{
+}
diff -Nru a/arch/i386/mach-visws/pci-visws.c b/arch/i386/mach-visws/pci-visws.c
--- a/arch/i386/mach-visws/pci-visws.c Mon Feb 24 11:06:12 2003
+++ /dev/null Wed Dec 31 16:00:00 1969
@@ -1,141 +0,0 @@
-/*
- * Low-Level PCI Support for SGI Visual Workstation
- *
- * (c) 1999--2000 Martin Mares
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include
-
-#include "pci-i386.h"
-
-unsigned int pci_probe = 0;
-
-/*
- * The VISWS uses configuration access type 1 only.
- */
-
-#define CONFIG_CMD(dev, where) (0x80000000 | (dev->bus->number << 16) | (dev->devfn << 8) | (where & ~3))
-
-static int pci_conf1_read_config_byte(struct pci_dev *dev, int where, u8 *value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- *value = inb(0xCFC + (where&3));
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_read_config_word(struct pci_dev *dev, int where, u16 *value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- *value = inw(0xCFC + (where&2));
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_read_config_dword(struct pci_dev *dev, int where, u32 *value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- *value = inl(0xCFC);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_write_config_byte(struct pci_dev *dev, int where, u8 value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- outb(value, 0xCFC + (where&3));
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_write_config_word(struct pci_dev *dev, int where, u16 value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- outw(value, 0xCFC + (where&2));
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_conf1_write_config_dword(struct pci_dev *dev, int where, u32 value)
-{
- outl(CONFIG_CMD(dev,where), 0xCF8);
- outl(value, 0xCFC);
- return PCIBIOS_SUCCESSFUL;
-}
-
-#undef CONFIG_CMD
-
-static struct pci_ops visws_pci_ops = {
- pci_conf1_read_config_byte,
- pci_conf1_read_config_word,
- pci_conf1_read_config_dword,
- pci_conf1_write_config_byte,
- pci_conf1_write_config_word,
- pci_conf1_write_config_dword
-};
-
-static void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev, *p;
- u8 pin;
- int irq;
-
- pci_for_each_dev(dev) {
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- dev->irq = 0;
- if (!pin)
- continue;
- pin--;
- if (dev->bus->parent) {
- p = dev->bus->parent->self;
- pin = (pin + PCI_SLOT(dev->devfn)) % 4;
- } else
- p = dev;
- irq = visws_get_PCI_irq_vector(p->bus->number, PCI_SLOT(p->devfn), pin+1);
- if (irq >= 0)
- dev->irq = irq;
- DBG("PCI IRQ: %s pin %d -> %d\n", dev->slot_name, pin, irq);
- }
-}
-
-void __init pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_read_bridge_bases(b);
-}
-
-#if 0
-static struct resource visws_pci_bus_resources[2] = {
- { "Host bus 1", 0xf4000000, 0xf7ffffff, 0 },
- { "Host bus 2", 0xf0000000, 0xf3ffffff, 0 }
-};
-#endif
-
-void __init pcibios_init(void)
-{
- unsigned int sec_bus = li_pcib_read16(LI_PCI_BUSNUM) & 0xff;
-
- printk("PCI: Probing PCI hardware on host buses 00 and %02x\n", sec_bus);
- pci_scan_bus(0, &visws_pci_ops, NULL);
- pci_scan_bus(sec_bus, &visws_pci_ops, NULL);
- pcibios_fixup_irqs();
- pcibios_resource_survey();
-}
-
-char * __init pcibios_setup(char *str)
-{
- return str;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- return pcibios_enable_resources(dev, mask);
-}
-
-void __init pcibios_penalize_isa_irq(irq)
-{
-}
diff -Nru a/arch/i386/mach-visws/reboot.c b/arch/i386/mach-visws/reboot.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/i386/mach-visws/reboot.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,48 @@
+
+#include
+#include
+#include
+
+#include
+#include "piix4.h"
+
+void (*pm_power_off)(void);
+
+int reboot_thru_bios;
+int reboot_smp;
+
+void machine_restart(char * __unused)
+{
+#ifdef CONFIG_SMP
+ smp_send_stop();
+#endif
+
+ /*
+ * Visual Workstations restart after this
+ * register is poked on the PIIX4
+ */
+ outb(PIIX4_RESET_VAL, PIIX4_RESET_PORT);
+}
+
+void machine_power_off(void)
+{
+ unsigned short pm_status;
+ extern unsigned int pci_bus0;
+
+ while ((pm_status = inw(PMSTS_PORT)) & 0x100)
+ outw(pm_status, PMSTS_PORT);
+
+ outw(PM_SUSPEND_ENABLE, PMCNTRL_PORT);
+
+ mdelay(10);
+
+#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
+ (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
+
+ outl(PCI_CONF1_ADDRESS(pci_bus0, SPECIAL_DEV, SPECIAL_REG), 0xCF8);
+ outl(PIIX_SPECIAL_STOP, 0xCFC);
+}
+
+void machine_halt(void)
+{
+}
diff -Nru a/arch/i386/mach-visws/setup.c b/arch/i386/mach-visws/setup.c
--- a/arch/i386/mach-visws/setup.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/mach-visws/setup.c Mon Feb 24 11:06:08 2003
@@ -9,67 +9,26 @@
#include
#include
-#include
#include
#include
+#include "cobalt.h"
+#include "piix4.h"
char visws_board_type = -1;
char visws_board_rev = -1;
-#define PIIX_PM_START 0x0F80
-
-#define SIO_GPIO_START 0x0FC0
-
-#define SIO_PM_START 0x0FC8
-
-#define PMBASE PIIX_PM_START
-#define GPIREG0 (PMBASE+0x30)
-#define GPIREG(x) (GPIREG0+((x)/8))
-#define PIIX_GPI_BD_ID1 18
-#define PIIX_GPI_BD_REG GPIREG(PIIX_GPI_BD_ID1)
-
-#define PIIX_GPI_BD_SHIFT (PIIX_GPI_BD_ID1 % 8)
-
-#define SIO_INDEX 0x2e
-#define SIO_DATA 0x2f
-
-#define SIO_DEV_SEL 0x7
-#define SIO_DEV_ENB 0x30
-#define SIO_DEV_MSB 0x60
-#define SIO_DEV_LSB 0x61
-
-#define SIO_GP_DEV 0x7
-
-#define SIO_GP_BASE SIO_GPIO_START
-#define SIO_GP_MSB (SIO_GP_BASE>>8)
-#define SIO_GP_LSB (SIO_GP_BASE&0xff)
-
-#define SIO_GP_DATA1 (SIO_GP_BASE+0)
-
-#define SIO_PM_DEV 0x8
-
-#define SIO_PM_BASE SIO_PM_START
-#define SIO_PM_MSB (SIO_PM_BASE>>8)
-#define SIO_PM_LSB (SIO_PM_BASE&0xff)
-#define SIO_PM_INDEX (SIO_PM_BASE+0)
-#define SIO_PM_DATA (SIO_PM_BASE+1)
-
-#define SIO_PM_FER2 0x1
-
-#define SIO_PM_GP_EN 0x80
-
void __init visws_get_board_type_and_rev(void)
{
int raw;
visws_board_type = (char)(inb_p(PIIX_GPI_BD_REG) & PIIX_GPI_BD_REG)
>> PIIX_GPI_BD_SHIFT;
-/*
- * Get Board rev.
- * First, we have to initialize the 307 part to allow us access
- * to the GPIO registers. Let's map them at 0x0fc0 which is right
- * after the PIIX4 PM section.
- */
+ /*
+ * Get Board rev.
+ * First, we have to initialize the 307 part to allow us access
+ * to the GPIO registers. Let's map them at 0x0fc0 which is right
+ * after the PIIX4 PM section.
+ */
outb_p(SIO_DEV_SEL, SIO_INDEX);
outb_p(SIO_GP_DEV, SIO_DATA); /* Talk to GPIO regs. */
@@ -82,11 +41,11 @@
outb_p(SIO_DEV_ENB, SIO_INDEX);
outb_p(1, SIO_DATA); /* Enable GPIO registers. */
-/*
- * Now, we have to map the power management section to write
- * a bit which enables access to the GPIO registers.
- * What lunatic came up with this shit?
- */
+ /*
+ * Now, we have to map the power management section to write
+ * a bit which enables access to the GPIO registers.
+ * What lunatic came up with this shit?
+ */
outb_p(SIO_DEV_SEL, SIO_INDEX);
outb_p(SIO_PM_DEV, SIO_DATA); /* Talk to GPIO regs. */
@@ -99,18 +58,18 @@
outb_p(SIO_DEV_ENB, SIO_INDEX);
outb_p(1, SIO_DATA); /* Enable PM registers. */
-/*
- * Now, write the PM register which enables the GPIO registers.
- */
+ /*
+ * Now, write the PM register which enables the GPIO registers.
+ */
outb_p(SIO_PM_FER2, SIO_PM_INDEX);
outb_p(SIO_PM_GP_EN, SIO_PM_DATA);
-/*
- * Now, initialize the GPIO registers.
- * We want them all to be inputs which is the
- * power on default, so let's leave them alone.
- * So, let's just read the board rev!
- */
+ /*
+ * Now, initialize the GPIO registers.
+ * We want them all to be inputs which is the
+ * power on default, so let's leave them alone.
+ * So, let's just read the board rev!
+ */
raw = inb_p(SIO_GP_DATA1);
raw &= 0x7f; /* 7 bits of valid board revision ID. */
@@ -128,10 +87,10 @@
visws_board_rev = raw;
}
- printk(KERN_INFO "Silicon Graphics %s (rev %d)\n",
- visws_board_type == VISWS_320 ? "320" :
+ printk(KERN_INFO "Silicon Graphics Visual Workstation %s (rev %d) detected\n",
+ (visws_board_type == VISWS_320 ? "320" :
(visws_board_type == VISWS_540 ? "540" :
- "unknown"), visws_board_rev);
+ "unknown")), visws_board_rev);
}
void __init pre_intr_init_hook(void)
@@ -150,11 +109,16 @@
{
visws_get_board_type_and_rev();
}
-static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL};
+
+static struct irqaction irq0 = {
+ .handler = timer_interrupt,
+ .flags = SA_INTERRUPT,
+ .name = "timer",
+};
void __init time_init_hook(void)
{
- printk("Starting Cobalt Timer system clock\n");
+ printk(KERN_INFO "Starting Cobalt Timer system clock\n");
/* Set the countdown value */
co_cpu_write(CO_CPU_TIMEVAL, CO_TIME_HZ/HZ);
@@ -166,5 +130,5 @@
co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK);
/* Wire cpu IDT entry to s/w handler (and Cobalt APIC to IDT) */
- setup_irq(CO_IRQ_TIMER, &irq0);
+ setup_irq(0, &irq0);
}
diff -Nru a/arch/i386/mach-visws/traps.c b/arch/i386/mach-visws/traps.c
--- a/arch/i386/mach-visws/traps.c Mon Feb 24 11:06:12 2003
+++ b/arch/i386/mach-visws/traps.c Mon Feb 24 11:06:12 2003
@@ -3,132 +3,68 @@
#include
#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
+#include
+#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
-
-#include
#include
#include
+#include
+#include "cobalt.h"
+#include "lithium.h"
-#ifdef CONFIG_X86_VISWS_APIC
-#include
-#include
-#include
-#endif
-
-#ifdef CONFIG_X86_VISWS_APIC
-
-/*
- * On Rev 005 motherboards legacy device interrupt lines are wired directly
- * to Lithium from the 307. But the PROM leaves the interrupt type of each
- * 307 logical device set appropriate for the 8259. Later we'll actually use
- * the 8259, but for now we have to flip the interrupt types to
- * level triggered, active lo as required by Lithium.
- */
-
-#define REG 0x2e /* The register to read/write */
-#define DEV 0x07 /* Register: Logical device select */
-#define VAL 0x2f /* The value to read/write */
-static void
-superio_outb(int dev, int reg, int val)
-{
- outb(DEV, REG);
- outb(dev, VAL);
- outb(reg, REG);
- outb(val, VAL);
-}
+#define A01234 (LI_INTA_0 | LI_INTA_1 | LI_INTA_2 | LI_INTA_3 | LI_INTA_4)
+#define BCD (LI_INTB | LI_INTC | LI_INTD)
+#define ALLDEVS (A01234 | BCD)
-static int __attribute__ ((unused))
-superio_inb(int dev, int reg)
+static __init void lithium_init(void)
{
- outb(DEV, REG);
- outb(dev, VAL);
- outb(reg, REG);
- return inb(VAL);
-}
-
-#define FLOP 3 /* floppy logical device */
-#define PPORT 4 /* parallel logical device */
-#define UART5 5 /* uart2 logical device (not wired up) */
-#define UART6 6 /* uart1 logical device (THIS is the serial port!) */
-#define IDEST 0x70 /* int. destination (which 307 IRQ line) reg. */
-#define ITYPE 0x71 /* interrupt type register */
-
-/* interrupt type bits */
-#define LEVEL 0x01 /* bit 0, 0 == edge triggered */
-#define ACTHI 0x02 /* bit 1, 0 == active lo */
+ set_fixmap(FIX_LI_PCIA, LI_PCI_A_PHYS);
+ set_fixmap(FIX_LI_PCIB, LI_PCI_B_PHYS);
-static __init void
-superio_init(void)
-{
- if (visws_board_type == VISWS_320 && visws_board_rev == 5) {
- superio_outb(UART6, IDEST, 0); /* 0 means no intr propagated */
- printk("SGI 320 rev 5: disabling 307 uart1 interrupt\n");
+ if ((li_pcia_read16(PCI_VENDOR_ID) != PCI_VENDOR_ID_SGI) ||
+ (li_pcia_read16(PCI_DEVICE_ID) != PCI_VENDOR_ID_SGI_LITHIUM)) {
+ printk(KERN_EMERG "Lithium hostbridge %c not found\n", 'A');
+ panic("This machine is not SGI Visual Workstation 320/540");
}
-}
-static __init void
-lithium_init(void)
-{
- set_fixmap(FIX_LI_PCIA, LI_PCI_A_PHYS);
- printk("Lithium PCI Bridge A, Bus Number: %d\n",
- li_pcia_read16(LI_PCI_BUSNUM) & 0xff);
- set_fixmap(FIX_LI_PCIB, LI_PCI_B_PHYS);
- printk("Lithium PCI Bridge B (PIIX4), Bus Number: %d\n",
- li_pcib_read16(LI_PCI_BUSNUM) & 0xff);
+ if ((li_pcib_read16(PCI_VENDOR_ID) != PCI_VENDOR_ID_SGI) ||
+ (li_pcib_read16(PCI_DEVICE_ID) != PCI_VENDOR_ID_SGI_LITHIUM)) {
+ printk(KERN_EMERG "Lithium hostbridge %c not found\n", 'B');
+ panic("This machine is not SGI Visual Workstation 320/540");
+ }
- /* XXX blindly enables all interrupts */
- li_pcia_write16(LI_PCI_INTEN, 0xffff);
- li_pcib_write16(LI_PCI_INTEN, 0xffff);
+ li_pcia_write16(LI_PCI_INTEN, ALLDEVS);
+ li_pcib_write16(LI_PCI_INTEN, ALLDEVS);
}
-static __init void
-cobalt_init(void)
+static __init void cobalt_init(void)
{
/*
* On normal SMP PC this is used only with SMP, but we have to
* use it and set it up here to start the Cobalt clock
*/
set_fixmap(FIX_APIC_BASE, APIC_DEFAULT_PHYS_BASE);
- printk("Local APIC ID %lx\n", apic_read(APIC_ID));
- printk("Local APIC Version %lx\n", apic_read(APIC_LVR));
+ setup_local_APIC();
+ printk(KERN_INFO "Local APIC Version %#lx, ID %#lx\n",
+ apic_read(APIC_LVR), apic_read(APIC_ID));
set_fixmap(FIX_CO_CPU, CO_CPU_PHYS);
- printk("Cobalt Revision %lx\n", co_cpu_read(CO_CPU_REV));
-
set_fixmap(FIX_CO_APIC, CO_APIC_PHYS);
- printk("Cobalt APIC ID %lx\n", co_apic_read(CO_APIC_ID));
+ printk(KERN_INFO "Cobalt Revision %#lx, APIC ID %#lx\n",
+ co_cpu_read(CO_CPU_REV), co_apic_read(CO_APIC_ID));
/* Enable Cobalt APIC being careful to NOT change the ID! */
- co_apic_write(CO_APIC_ID, co_apic_read(CO_APIC_ID)|CO_APIC_ENABLE);
+ co_apic_write(CO_APIC_ID, co_apic_read(CO_APIC_ID) | CO_APIC_ENABLE);
- printk("Cobalt APIC enabled: ID reg %lx\n", co_apic_read(CO_APIC_ID));
+ printk(KERN_INFO "Cobalt APIC enabled: ID reg %#lx\n",
+ co_apic_read(CO_APIC_ID));
}
-#endif
-void __init trap_init_hook()
+void __init trap_init_hook(void)
{
-#ifdef CONFIG_X86_VISWS_APIC
- superio_init();
lithium_init();
cobalt_init();
-#endif
}
diff -Nru a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c
--- a/arch/i386/mach-visws/visws_apic.c Mon Feb 24 11:06:07 2003
+++ b/arch/i386/mach-visws/visws_apic.c Mon Feb 24 11:06:07 2003
@@ -1,5 +1,5 @@
/*
- * linux/arch/i386/kernel/visws_apic.c
+ * linux/arch/i386/mach_visws/visws_apic.c
*
* Copyright (C) 1999 Bent Hagemark, Ingo Molnar
*
@@ -10,234 +10,180 @@
* hardware in the system uses this controller directly. Legacy devices
* are connected to the PIIX4 which in turn has its 8259(s) connected to
* a of the Cobalt APIC entry.
+ *
+ * 09/02/2000 - Updated for 2.4 by jbarnes@sgi.com
+ *
+ * 25/11/2002 - Updated for 2.5 by Andrey Panin
*/
-#include
-#include
+#include
#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
+#include
#include
#include
-#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-
-#include
-
-/*
- * This is the PIIX4-based 8259 that is wired up indirectly to Cobalt
- * -- not the manner expected by the normal 8259 code in irq.c.
- *
- * there is a 'master' physical interrupt source that gets sent to
- * the CPU. But in the chipset there are various 'virtual' interrupts
- * waiting to be handled. We represent this to Linux through a 'master'
- * interrupt controller type, and through a special virtual interrupt-
- * controller. Device drivers only see the virtual interrupt sources.
- */
-
-#define CO_IRQ_BASE 0x20 /* This is the 0x20 in init_IRQ()! */
-
-static void startup_piix4_master_irq(unsigned int irq);
-static void shutdown_piix4_master_irq(unsigned int irq);
-static void do_piix4_master_IRQ(unsigned int irq, struct pt_regs * regs);
-#define enable_piix4_master_irq startup_piix4_master_irq
-#define disable_piix4_master_irq shutdown_piix4_master_irq
+#include
+#include
-static struct hw_interrupt_type piix4_master_irq_type = {
- "PIIX4-master",
- startup_piix4_master_irq,
- shutdown_piix4_master_irq,
- do_piix4_master_IRQ,
- enable_piix4_master_irq,
- disable_piix4_master_irq
-};
-
-static void enable_piix4_virtual_irq(unsigned int irq);
-static void disable_piix4_virtual_irq(unsigned int irq);
-#define startup_piix4_virtual_irq enable_piix4_virtual_irq
-#define shutdown_piix4_virtual_irq disable_piix4_virtual_irq
-
-static struct hw_interrupt_type piix4_virtual_irq_type = {
- "PIIX4-virtual",
- startup_piix4_virtual_irq,
- shutdown_piix4_virtual_irq,
- 0, /* no handler, it's never called physically */
- enable_piix4_virtual_irq,
- disable_piix4_virtual_irq
-};
-
-/*
- * This is the SGI Cobalt (IO-)APIC:
- */
+#include "cobalt.h"
+#include "irq_vectors.h"
-static void do_cobalt_IRQ(unsigned int irq, struct pt_regs * regs);
-static void enable_cobalt_irq(unsigned int irq);
-static void disable_cobalt_irq(unsigned int irq);
-static void startup_cobalt_irq(unsigned int irq);
-#define shutdown_cobalt_irq disable_cobalt_irq
-static spinlock_t irq_controller_lock = SPIN_LOCK_UNLOCKED;
+int irq_vector[NR_IRQS] = { FIRST_EXTERNAL_VECTOR, 0 };
-static struct hw_interrupt_type cobalt_irq_type = {
- "Cobalt-APIC",
- startup_cobalt_irq,
- shutdown_cobalt_irq,
- do_cobalt_IRQ,
- enable_cobalt_irq,
- disable_cobalt_irq
-};
+static spinlock_t cobalt_lock = SPIN_LOCK_UNLOCKED;
/*
- * Not an __init, needed by the reboot code
+ * Set the given Cobalt APIC Redirection Table entry to point
+ * to the given IDT vector/index.
*/
-void disable_IO_APIC(void)
+static inline void co_apic_set(int entry, int irq)
{
- /* Nop on Cobalt */
-}
+ co_apic_write(CO_APIC_LO(entry), CO_APIC_LEVEL | irq_vector[irq]);
+ co_apic_write(CO_APIC_HI(entry), 0);
+}
/*
* Cobalt (IO)-APIC functions to handle PCI devices.
*/
-
-static void disable_cobalt_irq(unsigned int irq)
+static inline int co_apic_ide0_hack(void)
{
- /* XXX undo the APIC entry here? */
+ extern char visws_board_type;
+ extern char visws_board_rev;
- /*
- * definitely, we do not want to have IRQ storms from
- * unused devices --mingo
- */
+ if (visws_board_type == VISWS_320 && visws_board_rev == 5)
+ return 5;
+ return CO_APIC_IDE0;
}
-static void enable_cobalt_irq(unsigned int irq)
+static int is_co_apic(unsigned int irq)
{
+ if (IS_CO_APIC(irq))
+ return CO_APIC(irq);
+
+ switch (irq) {
+ case 0: return CO_APIC_CPU;
+ case CO_IRQ_IDE0: return co_apic_ide0_hack();
+ case CO_IRQ_IDE1: return CO_APIC_IDE1;
+ default: return -1;
+ }
}
+
/*
- * Set the given Cobalt APIC Redirection Table entry to point
- * to the given IDT vector/index.
+ * This is the SGI Cobalt (IO-)APIC:
*/
-static void co_apic_set(int entry, int idtvec)
+
+static void enable_cobalt_irq(unsigned int irq)
{
- co_apic_write(CO_APIC_LO(entry), CO_APIC_LEVEL | (CO_IRQ_BASE+idtvec));
- co_apic_write(CO_APIC_HI(entry), 0);
+ co_apic_set(is_co_apic(irq), irq);
+}
- printk("Cobalt APIC Entry %d IDT Vector %d\n", entry, idtvec);
+static void disable_cobalt_irq(unsigned int irq)
+{
+ int entry = is_co_apic(irq);
+
+ co_apic_write(CO_APIC_LO(entry), CO_APIC_MASK);
+ co_apic_read(CO_APIC_LO(entry));
}
/*
* "irq" really just serves to identify the device. Here is where we
* map this to the Cobalt APIC entry where it's physically wired.
- * This is called via request_irq -> setup_x86_irq -> irq_desc->startup()
+ * This is called via request_irq -> setup_irq -> irq_desc->startup()
*/
-static void startup_cobalt_irq(unsigned int irq)
+static unsigned int startup_cobalt_irq(unsigned int irq)
{
- /*
- * These "irq"'s are wired to the same Cobalt APIC entries
- * for all (known) motherboard types/revs
- */
- switch (irq) {
- case CO_IRQ_TIMER: co_apic_set(CO_APIC_CPU, CO_IRQ_TIMER);
- return;
+ unsigned long flags;
- case CO_IRQ_ENET: co_apic_set(CO_APIC_ENET, CO_IRQ_ENET);
- return;
+ spin_lock_irqsave(&cobalt_lock, flags);
+ if ((irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING)))
+ irq_desc[irq].status &= ~(IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING);
+ enable_cobalt_irq(irq);
+ spin_unlock_irqrestore(&cobalt_lock, flags);
+ return 0;
+}
- case CO_IRQ_SERIAL: return; /* XXX move to piix4-8259 "virtual" */
+static void ack_cobalt_irq(unsigned int irq)
+{
+ unsigned long flags;
- case CO_IRQ_8259: co_apic_set(CO_APIC_8259, CO_IRQ_8259);
- return;
-
- case CO_IRQ_IDE:
- switch (visws_board_type) {
- case VISWS_320:
- switch (visws_board_rev) {
- case 5:
- co_apic_set(CO_APIC_0_5_IDE0, CO_IRQ_IDE);
- co_apic_set(CO_APIC_0_5_IDE1, CO_IRQ_IDE);
- return;
- case 6:
- co_apic_set(CO_APIC_0_6_IDE0, CO_IRQ_IDE);
- co_apic_set(CO_APIC_0_6_IDE1, CO_IRQ_IDE);
- return;
- }
- case VISWS_540:
- switch (visws_board_rev) {
- case 2:
- co_apic_set(CO_APIC_1_2_IDE0, CO_IRQ_IDE);
- return;
- }
- }
- break;
- default:
- panic("huh?");
- }
+ spin_lock_irqsave(&cobalt_lock, flags);
+ disable_cobalt_irq(irq);
+ apic_write(APIC_EOI, APIC_EIO_ACK);
+ spin_unlock_irqrestore(&cobalt_lock, flags);
}
+static void end_cobalt_irq(unsigned int irq)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&cobalt_lock, flags);
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_cobalt_irq(irq);
+ spin_unlock_irqrestore(&cobalt_lock, flags);
+}
+
+static struct hw_interrupt_type cobalt_irq_type = {
+ .typename = "Cobalt-APIC",
+ .startup = startup_cobalt_irq,
+ .shutdown = disable_cobalt_irq,
+ .enable = enable_cobalt_irq,
+ .disable = disable_cobalt_irq,
+ .ack = ack_cobalt_irq,
+ .end = end_cobalt_irq,
+};
+
+
/*
- * This is the handle() op in do_IRQ()
+ * This is the PIIX4-based 8259 that is wired up indirectly to Cobalt
+ * -- not the manner expected by the code in i8259.c.
+ *
+ * there is a 'master' physical interrupt source that gets sent to
+ * the CPU. But in the chipset there are various 'virtual' interrupts
+ * waiting to be handled. We represent this to Linux through a 'master'
+ * interrupt controller type, and through a special virtual interrupt-
+ * controller. Device drivers only see the virtual interrupt sources.
*/
-static void do_cobalt_IRQ(unsigned int irq, struct pt_regs * regs)
+static unsigned int startup_piix4_master_irq(unsigned int irq)
{
- struct irqaction * action;
- irq_desc_t *desc = irq_desc + irq;
+ init_8259A(0);
- spin_lock(&irq_controller_lock);
- {
- unsigned int status;
- /* XXX APIC EOI? */
- status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
- action = NULL;
- if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
- action = desc->action;
- status |= IRQ_INPROGRESS;
- }
- desc->status = status;
- }
- spin_unlock(&irq_controller_lock);
+ return startup_cobalt_irq(irq);
+}
- /* Exit early if we had no action or it was disabled */
- if (!action)
- return;
-
- handle_IRQ_event(irq, regs, action);
-
- (void)co_cpu_read(CO_CPU_REV); /* Sync driver ack to its h/w */
- apic_write(APIC_EOI, APIC_EIO_ACK); /* Send EOI to Cobalt APIC */
-
- spin_lock(&irq_controller_lock);
- {
- unsigned int status = desc->status & ~IRQ_INPROGRESS;
- desc->status = status;
- if (!(status & IRQ_DISABLED))
- enable_cobalt_irq(irq);
- }
- spin_unlock(&irq_controller_lock);
+static void end_piix4_master_irq(unsigned int irq)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&cobalt_lock, flags);
+ enable_cobalt_irq(irq);
+ spin_unlock_irqrestore(&cobalt_lock, flags);
}
+static struct hw_interrupt_type piix4_master_irq_type = {
+ .typename = "PIIX4-master",
+ .startup = startup_piix4_master_irq,
+ .ack = ack_cobalt_irq,
+ .end = end_piix4_master_irq,
+};
+
+
+static struct hw_interrupt_type piix4_virtual_irq_type = {
+ .typename = "PIIX4-virtual",
+ .startup = startup_8259A_irq,
+ .shutdown = disable_8259A_irq,
+ .enable = enable_8259A_irq,
+ .disable = disable_8259A_irq,
+};
+
+
/*
- * PIIX4-8259 master/virtual functions to handle:
- *
- * floppy
- * parallel
- * serial
- * audio (?)
+ * PIIX4-8259 master/virtual functions to handle interrupt requests
+ * from legacy devices: floppy, parallel, serial, rtc.
*
* None of these get Cobalt APIC entries, neither do they have IDT
* entries. These interrupts are purely virtual and distributed from
@@ -250,161 +196,112 @@
* enable_irq gets the right irq. This 'master' irq is never directly
* manipulated by any driver.
*/
-
-static void startup_piix4_master_irq(unsigned int irq)
+static void piix4_master_intr(int irq, void *dev_id, struct pt_regs * regs)
{
- /* ICW1 */
- outb(0x11, 0x20);
- outb(0x11, 0xa0);
+ int realirq;
+ irq_desc_t *desc;
+ unsigned long flags;
- /* ICW2 */
- outb(0x08, 0x21);
- outb(0x70, 0xa1);
+ spin_lock_irqsave(&i8259A_lock, flags);
- /* ICW3 */
- outb(0x04, 0x21);
- outb(0x02, 0xa1);
-
- /* ICW4 */
- outb(0x01, 0x21);
- outb(0x01, 0xa1);
-
- /* OCW1 - disable all interrupts in both 8259's */
- outb(0xff, 0x21);
- outb(0xff, 0xa1);
-
- startup_cobalt_irq(irq);
-}
+ /* Find out what's interrupting in the PIIX4 master 8259 */
+ outb(0x0c, 0x20); /* OCW3 Poll command */
+ realirq = inb(0x20);
-static void shutdown_piix4_master_irq(unsigned int irq)
-{
/*
- * [we skip the 8259 magic here, not strictly necessary]
+ * Bit 7 == 0 means invalid/spurious
*/
+ if (unlikely(!(realirq & 0x80)))
+ goto out_unlock;
- shutdown_cobalt_irq(irq);
-}
-
-static void do_piix4_master_IRQ(unsigned int irq, struct pt_regs * regs)
-{
- int realirq, mask;
+ realirq &= 7;
- /* Find out what's interrupting in the PIIX4 8259 */
+ if (unlikely(realirq == 2)) {
+ outb(0x0c, 0xa0);
+ realirq = inb(0xa0);
- spin_lock(&irq_controller_lock);
- outb(0x0c, 0x20); /* OCW3 Poll command */
- realirq = inb(0x20);
+ if (unlikely(!(realirq & 0x80)))
+ goto out_unlock;
- if (!(realirq & 0x80)) {
- /*
- * Bit 7 == 0 means invalid/spurious
- */
- goto out_unlock;
+ realirq = (realirq & 7) + 8;
}
- realirq &= 0x7f;
- /*
- * mask and ack the 8259
- */
- mask = inb(0x21);
- if ((mask >> realirq) & 0x01)
- /*
- * This IRQ is masked... ignore
- */
- goto out_unlock;
+ /* mask and ack interrupt */
+ cached_irq_mask |= 1 << realirq;
+ if (unlikely(realirq > 7)) {
+ inb(0xa1);
+ outb(cached_A1, 0xa1);
+ outb(0x60 + (realirq & 7), 0xa0);
+ outb(0x60 + 2, 0x20);
+ } else {
+ inb(0x21);
+ outb(cached_21, 0x21);
+ outb(0x60 + realirq, 0x20);
+ }
- outb(mask | (1<action != NULL))
+ handle_IRQ_event(realirq, regs, desc->action);
+
+ if (!(desc->status & IRQ_DISABLED))
+ enable_8259A_irq(realirq);
- if (!(desc->status & IRQ_DISABLED))
- enable_piix4_virtual_irq(realirq);
- }
- spin_unlock(&irq_controller_lock);
return;
out_unlock:
- spin_unlock(&irq_controller_lock);
+ spin_unlock_irqrestore(&i8259A_lock, flags);
return;
}
-static void enable_piix4_virtual_irq(unsigned int irq)
-{
- /*
- * assumes this irq is one of the legacy devices
- */
-
- unsigned int mask = inb(0x21);
- mask &= ~(1 << irq);
- outb(mask, 0x21);
- enable_cobalt_irq(irq);
-}
-
-/*
- * assumes this irq is one of the legacy devices
- */
-static void disable_piix4_virtual_irq(unsigned int irq)
-{
- unsigned int mask;
-
- disable_cobalt_irq(irq);
+static struct irqaction master_action = {
+ .handler = piix4_master_intr,
+ .name = "PIIX4-8259",
+};
- mask = inb(0x21);
- mask &= ~(1 << irq);
- outb(mask, 0x21);
-}
+static struct irqaction cascade_action = {
+ .handler = no_action,
+ .name = "cascade",
+};
-static struct irqaction master_action =
- { no_action, 0, 0, "PIIX4-8259", NULL, NULL };
void init_VISWS_APIC_irqs(void)
{
int i;
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < CO_IRQ_APIC0 + CO_APIC_LAST + 1; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- /*
- * Cobalt IRQs are mapped to standard ISA
- * interrupt vectors:
- */
- switch (i) {
- /*
- * Only CO_IRQ_8259 will be raised
- * externally.
- */
- case CO_IRQ_8259:
+ if (i == 0) {
+ irq_desc[i].handler = &cobalt_irq_type;
+ }
+ else if (i == CO_IRQ_IDE0) {
+ irq_desc[i].handler = &cobalt_irq_type;
+ }
+ else if (i == CO_IRQ_IDE1) {
+ irq_desc[i].handler = &cobalt_irq_type;
+ }
+ else if (i == CO_IRQ_8259) {
irq_desc[i].handler = &piix4_master_irq_type;
- break;
- case CO_IRQ_FLOPPY:
- case CO_IRQ_PARLL:
+ }
+ else if (i < CO_IRQ_APIC0) {
irq_desc[i].handler = &piix4_virtual_irq_type;
- break;
- default:
+ }
+ else if (IS_CO_APIC(i)) {
irq_desc[i].handler = &cobalt_irq_type;
- break;
}
+ irq_vector[i] = i + FIRST_EXTERNAL_VECTOR;
}
- /*
- * The master interrupt is always present:
- */
- setup_x86_irq(CO_IRQ_8259, &master_action);
+ setup_irq(CO_IRQ_8259, &master_action);
+ setup_irq(2, &cascade_action);
}
-
diff -Nru a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c
--- a/arch/i386/mach-voyager/voyager_smp.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/mach-voyager/voyager_smp.c Mon Feb 24 11:06:09 2003
@@ -234,9 +234,9 @@
static __u32 trampoline_base;
/* The per cpu profile stuff - used in smp_local_timer_interrupt */
-static unsigned int prof_multiplier[NR_CPUS] __cacheline_aligned = { 1, };
-static unsigned int prof_old_multiplier[NR_CPUS] __cacheline_aligned = { 1, };
-static DEFINE_PER_CPU(unsigned int, prof_counter) = 1;
+static DEFINE_PER_CPU(int, prof_multiplier) = 1;
+static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
+static DEFINE_PER_CPU(int, prof_counter) = 1;
/* the map used to check if a CPU has booted */
static __u32 cpu_booted_map;
@@ -1318,10 +1318,12 @@
*
* Interrupts are already masked off at this point.
*/
- per_cpu(prof_counter,cpu) = prof_multiplier[cpu];
- if (per_cpu(prof_counter, cpu) != prof_old_multiplier[cpu]) {
+ per_cpu(prof_counter,cpu) = per_cpu(prof_multiplier, cpu);
+ if (per_cpu(prof_counter, cpu) !=
+ per_cpu(prof_old_multiplier, cpu)) {
/* FIXME: need to update the vic timer tick here */
- prof_old_multiplier[cpu] = per_cpu(prof_counter, cpu);
+ per_cpu(prof_old_multiplier, cpu) =
+ per_cpu(prof_counter, cpu);
}
update_process_times(user_mode(regs));
@@ -1406,7 +1408,7 @@
* accounting.
*/
for (i = 0; i < NR_CPUS; ++i)
- prof_multiplier[i] = multiplier;
+ per_cpu(prof_multiplier, i) = multiplier;
return 0;
}
diff -Nru a/arch/i386/mm/hugetlbpage.c b/arch/i386/mm/hugetlbpage.c
--- a/arch/i386/mm/hugetlbpage.c Mon Feb 24 11:06:13 2003
+++ b/arch/i386/mm/hugetlbpage.c Mon Feb 24 11:06:13 2003
@@ -71,8 +71,6 @@
return (pte_t *) pmd;
}
-#define mk_pte_huge(entry) {entry.pte_low |= (_PAGE_PRESENT | _PAGE_PSE);}
-
static void set_huge_pte(struct mm_struct *mm, struct vm_area_struct *vma, struct page *page, pte_t * page_table, int write_access)
{
pte_t entry;
diff -Nru a/arch/i386/pci/Makefile b/arch/i386/pci/Makefile
--- a/arch/i386/pci/Makefile Mon Feb 24 11:06:11 2003
+++ b/arch/i386/pci/Makefile Mon Feb 24 11:06:11 2003
@@ -3,6 +3,8 @@
obj-$(CONFIG_PCI_BIOS) += pcbios.o
obj-$(CONFIG_PCI_DIRECT) += direct.o
+obj-$(CONFIG_X86_VISWS) += visws.o
+
ifdef CONFIG_X86_NUMAQ
obj-y += numa.o
else
@@ -11,8 +13,15 @@
ifdef CONFIG_ACPI_PCI
obj-y += acpi.o
endif
-obj-y += legacy.o
+ifndef CONFIG_X86_VISWS
+obj-y += legacy.o
+endif
endif # CONFIG_X86_NUMAQ
-obj-y += irq.o common.o
+
+ifndef CONFIG_X86_VISWS
+obj-y += irq.o
+endif
+
+obj-y += common.o
diff -Nru a/arch/i386/pci/common.c b/arch/i386/pci/common.c
--- a/arch/i386/pci/common.c Mon Feb 24 11:06:09 2003
+++ b/arch/i386/pci/common.c Mon Feb 24 11:06:09 2003
@@ -180,13 +180,8 @@
return NULL;
}
#endif
- else if (!strcmp(str, "rom")) {
- pci_probe |= PCI_ASSIGN_ROMS;
- return NULL;
- } else if (!strcmp(str, "assign-busses")) {
- pci_probe |= PCI_ASSIGN_ALL_BUSSES;
- return NULL;
- } else if (!strcmp(str, "usepirqmask")) {
+#ifndef CONFIG_X86_VISWS
+ else if (!strcmp(str, "usepirqmask")) {
pci_probe |= PCI_USE_PIRQ_MASK;
return NULL;
} else if (!strncmp(str, "irqmask=", 8)) {
@@ -194,6 +189,14 @@
return NULL;
} else if (!strncmp(str, "lastbus=", 8)) {
pcibios_last_bus = simple_strtol(str+8, NULL, 0);
+ return NULL;
+ }
+#endif
+ else if (!strcmp(str, "rom")) {
+ pci_probe |= PCI_ASSIGN_ROMS;
+ return NULL;
+ } else if (!strcmp(str, "assign-busses")) {
+ pci_probe |= PCI_ASSIGN_ALL_BUSSES;
return NULL;
}
return str;
diff -Nru a/arch/i386/pci/direct.c b/arch/i386/pci/direct.c
--- a/arch/i386/pci/direct.c Mon Feb 24 11:06:08 2003
+++ b/arch/i386/pci/direct.c Mon Feb 24 11:06:08 2003
@@ -83,7 +83,7 @@
PCI_FUNC(devfn), where, size, value);
}
-static struct pci_ops pci_direct_conf1 = {
+struct pci_ops pci_direct_conf1 = {
.read = pci_conf1_read,
.write = pci_conf1_write,
};
@@ -196,21 +196,35 @@
static int __devinit pci_sanity_check(struct pci_ops *o)
{
u32 x = 0;
- struct pci_bus bus; /* Fake bus and device */
- struct pci_dev dev;
+ int retval = 0;
+ struct pci_bus *bus; /* Fake bus and device */
+ struct pci_dev *dev;
if (pci_probe & PCI_NO_CHECKS)
return 1;
- bus.number = 0;
- dev.bus = &bus;
- for(dev.devfn=0; dev.devfn < 0x100; dev.devfn++)
- if ((!o->read(&bus, dev.devfn, PCI_CLASS_DEVICE, 2, &x) &&
+
+ bus = kmalloc(sizeof(*bus), GFP_ATOMIC);
+ dev = kmalloc(sizeof(*dev), GFP_ATOMIC);
+ if (!bus || !dev) {
+ printk(KERN_ERR "Out of memory in %s\n", __FUNCTION__);
+ goto exit;
+ }
+
+ bus->number = 0;
+ dev->bus = bus;
+ for(dev->devfn=0; dev->devfn < 0x100; dev->devfn++)
+ if ((!o->read(bus, dev->devfn, PCI_CLASS_DEVICE, 2, &x) &&
(x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
- (!o->read(&bus, dev.devfn, PCI_VENDOR_ID, 2, &x) &&
- (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
- return 1;
+ (!o->read(bus, dev->devfn, PCI_VENDOR_ID, 2, &x) &&
+ (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ))) {
+ retval = 1;
+ goto exit;
+ }
DBG("PCI: Sanity check failed\n");
- return 0;
+exit:
+ kfree(dev);
+ kfree(bus);
+ return retval;
}
static int __init pci_direct_init(void)
diff -Nru a/arch/i386/pci/legacy.c b/arch/i386/pci/legacy.c
--- a/arch/i386/pci/legacy.c Mon Feb 24 11:06:13 2003
+++ b/arch/i386/pci/legacy.c Mon Feb 24 11:06:13 2003
@@ -12,28 +12,39 @@
static void __devinit pcibios_fixup_peer_bridges(void)
{
int n;
- struct pci_bus bus;
- struct pci_dev dev;
+ struct pci_bus *bus;
+ struct pci_dev *dev;
u16 l;
if (pcibios_last_bus <= 0 || pcibios_last_bus >= 0xff)
return;
DBG("PCI: Peer bridge fixup\n");
+
+ bus = kmalloc(sizeof(*bus), GFP_ATOMIC);
+ dev = kmalloc(sizeof(*dev), GFP_ATOMIC);
+ if (!bus || !dev) {
+ printk(KERN_ERR "Out of memory in %s\n", __FUNCTION__);
+ goto exit;
+ }
+
for (n=0; n <= pcibios_last_bus; n++) {
if (pci_bus_exists(&pci_root_buses, n))
continue;
- bus.number = n;
- bus.ops = pci_root_ops;
- dev.bus = &bus;
- for(dev.devfn=0; dev.devfn<256; dev.devfn += 8)
- if (!pci_read_config_word(&dev, PCI_VENDOR_ID, &l) &&
+ bus->number = n;
+ bus->ops = pci_root_ops;
+ dev->bus = bus;
+ for (dev->devfn=0; dev->devfn<256; dev->devfn += 8)
+ if (!pci_read_config_word(dev, PCI_VENDOR_ID, &l) &&
l != 0x0000 && l != 0xffff) {
- DBG("Found device at %02x:%02x [%04x]\n", n, dev.devfn, l);
+ DBG("Found device at %02x:%02x [%04x]\n", n, dev->devfn, l);
printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n);
pci_scan_bus(n, pci_root_ops, NULL);
break;
}
}
+exit:
+ kfree(dev);
+ kfree(bus);
}
static int __init pci_legacy_init(void)
diff -Nru a/arch/i386/pci/visws.c b/arch/i386/pci/visws.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/i386/pci/visws.c Mon Feb 24 11:06:12 2003
@@ -0,0 +1,111 @@
+/*
+ * Low-Level PCI Support for SGI Visual Workstation
+ *
+ * (c) 1999--2000 Martin Mares
+ */
+
+#include
+#include
+#include
+#include
+
+#include "cobalt.h"
+#include "lithium.h"
+
+#include "pci.h"
+
+
+int broken_hp_bios_irq9;
+
+extern struct pci_ops pci_direct_conf1;
+
+static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; }
+
+int (*pcibios_enable_irq)(struct pci_dev *dev) = &pci_visws_enable_irq;
+
+void __init pcibios_penalize_isa_irq(int irq) {}
+
+
+unsigned int pci_bus0, pci_bus1;
+
+static inline u8 bridge_swizzle(u8 pin, u8 slot)
+{
+ return (((pin - 1) + slot) % 4) + 1;
+}
+
+static u8 __init visws_swizzle(struct pci_dev *dev, u8 *pinp)
+{
+ u8 pin = *pinp;
+
+ while (dev->bus->self) { /* Move up the chain of bridges. */
+ pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
+ dev = dev->bus->self;
+ }
+ *pinp = pin;
+
+ return PCI_SLOT(dev->devfn);
+}
+
+static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq, bus = dev->bus->number;
+
+ pin--;
+
+ /* Nothing usefull at PIIX4 pin 1 */
+ if (bus == pci_bus0 && slot == 4 && pin == 0)
+ return -1;
+
+ /* PIIX4 USB is on Bus 0, Slot 4, Line 3 */
+ if (bus == pci_bus0 && slot == 4 && pin == 3) {
+ irq = CO_IRQ(CO_APIC_PIIX4_USB);
+ goto out;
+ }
+
+ /* First pin spread down 1 APIC entry per slot */
+ if (pin == 0) {
+ irq = CO_IRQ((bus == pci_bus0 ? CO_APIC_PCIB_BASE0 :
+ CO_APIC_PCIA_BASE0) + slot);
+ goto out;
+ }
+
+ /* lines 1,2,3 from any slot is shared in this twirly pattern */
+ if (bus == pci_bus1) {
+ /* lines 1-3 from devices 0 1 rotate over 2 apic entries */
+ irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((slot + (pin - 1)) % 2));
+ } else { /* bus == pci_bus0 */
+ /* lines 1-3 from devices 0-3 rotate over 3 apic entries */
+ if (slot == 0)
+ slot = 3; /* same pattern */
+ irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((3 - slot) + (pin - 1) % 3));
+ }
+out:
+ printk(KERN_DEBUG "PCI: Bus %d Slot %d Line %d -> IRQ %d\n", bus, slot, pin, irq);
+ return irq;
+}
+
+void __init pcibios_update_irq(struct pci_dev *dev, int irq)
+{
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
+
+static int __init pcibios_init(void)
+{
+ /* The VISWS supports configuration access type 1 only */
+ pci_probe = (pci_probe | PCI_PROBE_CONF1) &
+ ~(PCI_PROBE_BIOS | PCI_PROBE_CONF2);
+
+ pci_bus0 = li_pcib_read16(LI_PCI_BUSNUM) & 0xff;
+ pci_bus1 = li_pcia_read16(LI_PCI_BUSNUM) & 0xff;
+
+ printk(KERN_INFO "PCI: Lithium bridge A bus: %u, "
+ "bridge B (PIIX4) bus: %u\n", pci_bus1, pci_bus0);
+
+ pci_scan_bus(pci_bus0, &pci_direct_conf1, NULL);
+ pci_scan_bus(pci_bus1, &pci_direct_conf1, NULL);
+ pci_fixup_irqs(visws_swizzle, visws_map_irq);
+ pcibios_resource_survey();
+ return 0;
+}
+
+subsys_initcall(pcibios_init);
diff -Nru a/arch/i386/vmlinux.lds.S b/arch/i386/vmlinux.lds.S
--- a/arch/i386/vmlinux.lds.S Mon Feb 24 11:06:08 2003
+++ b/arch/i386/vmlinux.lds.S Mon Feb 24 11:06:08 2003
@@ -6,7 +6,7 @@
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
-ENTRY(_start)
+ENTRY(startup_32)
jiffies = jiffies_64;
SECTIONS
{
diff -Nru a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
--- a/arch/ia64/hp/sim/simeth.c Mon Feb 24 11:06:11 2003
+++ b/arch/ia64/hp/sim/simeth.c Mon Feb 24 11:06:11 2003
@@ -149,7 +149,7 @@
static inline int
netdev_attach(int fd, int irq, unsigned int ipaddr)
{
- /* this puts the host interface in the right mode (start interupting) */
+ /* this puts the host interface in the right mode (start interrupting) */
return ia64_ssc(fd, ipaddr, 0,0, SSC_NETDEV_ATTACH);
}
diff -Nru a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
--- a/arch/ia64/ia32/sys_ia32.c Mon Feb 24 11:06:11 2003
+++ b/arch/ia64/ia32/sys_ia32.c Mon Feb 24 11:06:11 2003
@@ -4063,7 +4063,7 @@
return err;
}
-/* Handle adjtimex compatability. */
+/* Handle adjtimex compatibility. */
struct timex32 {
u32 modes;
diff -Nru a/arch/ia64/sn/io/l1.c b/arch/ia64/sn/io/l1.c
--- a/arch/ia64/sn/io/l1.c Mon Feb 24 11:06:14 2003
+++ b/arch/ia64/sn/io/l1.c Mon Feb 24 11:06:14 2003
@@ -2734,7 +2734,7 @@
* bigger.
*
* Be careful using the same buffer for both cmd and resp; it could get
- * hairy if there were ever an L1 command reqeuest that spanned multiple
+ * hairy if there were ever an L1 command request that spanned multiple
* packets. (On the other hand, that would require some additional
* rewriting of the L1 command interface anyway.)
*/
diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c
--- a/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c Mon Feb 24 11:06:14 2003
+++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c Mon Feb 24 11:06:14 2003
@@ -3505,7 +3505,7 @@
} else
xio_port = pcibr_dmamap->bd_xio_port;
- /* If this DMA is to an addres that
+ /* If this DMA is to an address that
* refers back to this Bridge chip,
* reduce it back to the correct
* PCI MEM address.
diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c
--- a/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c Mon Feb 24 11:06:07 2003
+++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_error.c Mon Feb 24 11:06:07 2003
@@ -1874,7 +1874,7 @@
BRIDGE_ERRUPPR_ADDRMASK) << 32)));
/*
- * need to ensure that the xtalk adress in ioe
+ * need to ensure that the xtalk address in ioe
* maps to PCI error address read from bridge.
* How to convert PCI address back to Xtalk address ?
* (better idea: convert XTalk address to PCI address
diff -Nru a/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c
--- a/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c Mon Feb 24 11:06:14 2003
+++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_rrb.c Mon Feb 24 11:06:14 2003
@@ -272,7 +272,7 @@
* the old do_pcibr_rrb_free() code only clears the enable bit
* but I say we should clear the whole rrb (ie):
* reg = reg & ~(RRB_MASK << (RRB_SIZE * rrb_index));
- * But to be compatable with old code we'll only clear enable.
+ * But to be compatible with old code we'll only clear enable.
*/
reg = reg & ~(RRB_ENABLE_BIT(bridge) << (RRB_SIZE * rrb_index));
clr = clr | (enable_bit << (RRB_SIZE * rrb_index));
diff -Nru a/arch/ia64/sn/io/xbow.c b/arch/ia64/sn/io/xbow.c
--- a/arch/ia64/sn/io/xbow.c Mon Feb 24 11:06:07 2003
+++ b/arch/ia64/sn/io/xbow.c Mon Feb 24 11:06:07 2003
@@ -305,7 +305,7 @@
/*
* get the name of this xbow vertex and keep the info.
- * This is needed during errors and interupts, but as
+ * This is needed during errors and interrupts, but as
* long as we have it, we can use it elsewhere.
*/
s = dev_to_name(vhdl, devnm, MAXDEVNAME);
diff -Nru a/arch/ia64/sn/io/xtalk.c b/arch/ia64/sn/io/xtalk.c
--- a/arch/ia64/sn/io/xtalk.c Mon Feb 24 11:06:08 2003
+++ b/arch/ia64/sn/io/xtalk.c Mon Feb 24 11:06:08 2003
@@ -890,7 +890,7 @@
widget_info->w_einfo = 0;
/*
* get the name of this xwidget vertex and keep the info.
- * This is needed during errors and interupts, but as
+ * This is needed during errors and interrupts, but as
* long as we have it, we can use it elsewhere.
*/
s = dev_to_name(widget,devnm,MAXDEVNAME);
diff -Nru a/arch/m68k/ifpsp060/src/fpsp.S b/arch/m68k/ifpsp060/src/fpsp.S
--- a/arch/m68k/ifpsp060/src/fpsp.S Mon Feb 24 11:06:14 2003
+++ b/arch/m68k/ifpsp060/src/fpsp.S Mon Feb 24 11:06:14 2003
@@ -22147,7 +22147,7 @@
add_ext:
addq.l &1,FTEMP_LO(%a0) # add 1 to l-bit
bcc.b xcc_clr # test for carry out
- addq.l &1,FTEMP_HI(%a0) # propogate carry
+ addq.l &1,FTEMP_HI(%a0) # propagate carry
bcc.b xcc_clr
roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
roxr.w FTEMP_HI+2(%a0) # mant is 0 so restore v-bit
@@ -22167,7 +22167,7 @@
add_dbl:
add.l &ad_1_dbl, FTEMP_LO(%a0) # add 1 to lsb
bcc.b dcc_clr # no carry
- addq.l &0x1, FTEMP_HI(%a0) # propogate carry
+ addq.l &0x1, FTEMP_HI(%a0) # propagate carry
bcc.b dcc_clr # no carry
roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
diff -Nru a/arch/m68k/ifpsp060/src/isp.S b/arch/m68k/ifpsp060/src/isp.S
--- a/arch/m68k/ifpsp060/src/isp.S Mon Feb 24 11:06:08 2003
+++ b/arch/m68k/ifpsp060/src/isp.S Mon Feb 24 11:06:08 2003
@@ -2625,7 +2625,7 @@
addx.l %d7, %d4 # add carry to hi(result)
# the result is saved to the register file.
-# for '040 compatability, if Dl == Dh then only the hi(result) is
+# for '040 compatibility, if Dl == Dh then only the hi(result) is
# saved. so, saving hi after lo accomplishes this without need to
# check Dl,Dh equality.
mul64_done:
diff -Nru a/arch/m68k/ifpsp060/src/pfpsp.S b/arch/m68k/ifpsp060/src/pfpsp.S
--- a/arch/m68k/ifpsp060/src/pfpsp.S Mon Feb 24 11:06:08 2003
+++ b/arch/m68k/ifpsp060/src/pfpsp.S Mon Feb 24 11:06:08 2003
@@ -6269,7 +6269,7 @@
add_ext:
addq.l &1,FTEMP_LO(%a0) # add 1 to l-bit
bcc.b xcc_clr # test for carry out
- addq.l &1,FTEMP_HI(%a0) # propogate carry
+ addq.l &1,FTEMP_HI(%a0) # propagate carry
bcc.b xcc_clr
roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
roxr.w FTEMP_HI+2(%a0) # mant is 0 so restore v-bit
@@ -6289,7 +6289,7 @@
add_dbl:
add.l &ad_1_dbl, FTEMP_LO(%a0) # add 1 to lsb
bcc.b dcc_clr # no carry
- addq.l &0x1, FTEMP_HI(%a0) # propogate carry
+ addq.l &0x1, FTEMP_HI(%a0) # propagate carry
bcc.b dcc_clr # no carry
roxr.w FTEMP_HI(%a0) # mant is 0 so restore v-bit
diff -Nru a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
--- a/arch/m68k/kernel/head.S Mon Feb 24 11:06:14 2003
+++ b/arch/m68k/kernel/head.S Mon Feb 24 11:06:14 2003
@@ -92,7 +92,7 @@
* mmu_map was written for two key reasons. First, it was clear
* that it was very difficult to read the previous code for mapping
* regions of memory. Second, the Macintosh required such extensive
- * memory allocations that it didn't make sense to propogate the
+ * memory allocations that it didn't make sense to propagate the
* existing code any further.
* mmu_map requires some parameters:
*
diff -Nru a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
--- a/arch/m68knommu/Kconfig Mon Feb 24 11:06:12 2003
+++ b/arch/m68knommu/Kconfig Mon Feb 24 11:06:12 2003
@@ -379,11 +379,6 @@
help
Set RAM size to be 4MiB.
-config RAM4MB
- bool "4MiB"
- help
- Set RAM size to be 4MiB.
-
config RAM8MB
bool "8MiB"
help
diff -Nru a/arch/m68knommu/kernel/init_task.c b/arch/m68knommu/kernel/init_task.c
--- a/arch/m68knommu/kernel/init_task.c Mon Feb 24 11:06:09 2003
+++ b/arch/m68knommu/kernel/init_task.c Mon Feb 24 11:06:09 2003
@@ -13,6 +13,7 @@
static struct fs_struct init_fs = INIT_FS;
static struct files_struct init_files = INIT_FILES;
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
struct mm_struct init_mm = INIT_MM(init_mm);
/*
diff -Nru a/arch/m68knommu/kernel/signal.c b/arch/m68knommu/kernel/signal.c
--- a/arch/m68knommu/kernel/signal.c Mon Feb 24 11:06:11 2003
+++ b/arch/m68knommu/kernel/signal.c Mon Feb 24 11:06:11 2003
@@ -783,7 +783,7 @@
/* Restart the system call the same way as
if the process were not traced. */
struct k_sigaction *ka =
- ¤t->sig->action[signr-1];
+ ¤t->sighand->action[signr-1];
int has_handler =
(ka->sa.sa_handler != SIG_IGN &&
ka->sa.sa_handler != SIG_DFL);
@@ -819,7 +819,7 @@
}
}
- ka = ¤t->sig->action[signr-1];
+ ka = ¤t->sighand->action[signr-1];
if (ka->sa.sa_handler == SIG_IGN) {
if (signr != SIGCHLD)
continue;
@@ -848,8 +848,7 @@
case SIGSTOP:
current->state = TASK_STOPPED;
current->exit_code = signr;
- if (!(current->parent->sig->action[SIGCHLD-1]
- .sa.sa_flags & SA_NOCLDSTOP))
+ if (!(current->parent->sighand->action[SIGCHLD-1].sa.sa_flags & SA_NOCLDSTOP))
notify_parent(current, SIGCHLD);
schedule();
continue;
diff -Nru a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile
--- a/arch/m68knommu/mm/Makefile Mon Feb 24 11:06:14 2003
+++ b/arch/m68knommu/mm/Makefile Mon Feb 24 11:06:14 2003
@@ -2,4 +2,4 @@
# Makefile for the linux m68knommu specific parts of the memory manager.
#
-obj-y += init.o fault.o memory.o kmap.o
+obj-y += init.o fault.o memory.o kmap.o extable.o
diff -Nru a/arch/m68knommu/mm/extable.c b/arch/m68knommu/mm/extable.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/m68knommu/mm/extable.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,30 @@
+/*
+ * linux/arch/m68knommu/mm/extable.c
+ */
+
+#include
+#include
+#include
+#include
+
+/* Simple binary search */
+const struct exception_table_entry *
+search_extable(const struct exception_table_entry *first,
+ const struct exception_table_entry *last,
+ unsigned long value)
+{
+ while (first <= last) {
+ const struct exception_table_entry *mid;
+ long diff;
+
+ mid = (last - first) / 2 + first;
+ diff = mid->insn - value;
+ if (diff == 0)
+ return mid;
+ else if (diff < 0)
+ first = mid+1;
+ else
+ last = mid-1;
+ }
+ return NULL;
+}
diff -Nru a/arch/m68knommu/platform/5307/vectors.c b/arch/m68knommu/platform/5307/vectors.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/m68knommu/platform/5307/vectors.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,94 @@
+/***************************************************************************/
+
+/*
+ * linux/arch/m68knommu/platform/5307/vectors.c
+ *
+ * Copyright (C) 1999-2003, Greg Ungerer
+ */
+
+/***************************************************************************/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/***************************************************************************/
+
+#ifdef TRAP_DBG_INTERRUPT
+
+asmlinkage void dbginterrupt_c(struct frame *fp)
+{
+ extern void dump(struct pt_regs *fp);
+ printk("%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__);
+ dump((struct pt_regs *) fp);
+ asm("halt");
+}
+
+#endif
+
+/***************************************************************************/
+
+extern e_vector *_ramvec;
+
+void set_evector(int vecnum, void (*handler)(void))
+{
+ if (vecnum >= 0 && vecnum <= 255)
+ _ramvec[vecnum] = handler;
+}
+
+/***************************************************************************/
+
+/* Assembler routines */
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void system_call(void);
+asmlinkage void inthandler(void);
+
+void __init coldfire_trap_init(void)
+{
+ int i;
+
+ /*
+ * There is a common trap handler and common interrupt
+ * handler that handle almost every vector. We treat
+ * the system call and bus error special, they get their
+ * own first level handlers.
+ */
+ for (i = 3; (i <= 23); i++)
+ _ramvec[i] = trap;
+ for (i = 33; (i <= 63); i++)
+ _ramvec[i] = trap;
+ for (i = 24; (i <= 31); i++)
+ _ramvec[i] = inthandler;
+ for (i = 64; (i < 255); i++)
+ _ramvec[i] = inthandler;
+ _ramvec[255] = 0;
+
+ _ramvec[2] = buserr;
+ _ramvec[32] = system_call;
+
+#ifdef TRAP_DBG_INTERRUPT
+ _ramvec[12] = dbginterrupt;
+#endif
+}
+
+/***************************************************************************/
+
+void coldfire_reset(void)
+{
+ HARD_RESET_NOW();
+}
+
+/***************************************************************************/
diff -Nru a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
--- a/arch/m68knommu/platform/68328/entry.S Mon Feb 24 11:06:08 2003
+++ b/arch/m68knommu/platform/68328/entry.S Mon Feb 24 11:06:08 2003
@@ -95,7 +95,7 @@
Luser_return:
/* only allow interrupts when we are really the last one on the*/
/* kernel stack, otherwise stack overflow can occur during*/
- /* heavy interupt load*/
+ /* heavy interrupt load*/
andw #ALLOWINT,%sr
movel %sp,%d1 /* get thread_info pointer */
diff -Nru a/arch/m68knommu/platform/68328/pilot/crt0_rom.S b/arch/m68knommu/platform/68328/pilot/crt0_rom.S
--- a/arch/m68knommu/platform/68328/pilot/crt0_rom.S Mon Feb 24 11:06:14 2003
+++ b/arch/m68knommu/platform/68328/pilot/crt0_rom.S Mon Feb 24 11:06:14 2003
@@ -1,4 +1,6 @@
-/* linux/arch/m68knommu/kernel/head.S: A startup file for the MC68332
+/*
+ * linux/arch/m68knommu/platform/68328/pilot/crt0_rom.S
+ * - A startup file for the MC68332
*
* Copyright (C) 1998 D. Jeff Dionne ,
* Kenneth Albanowski ,
@@ -16,8 +18,6 @@
#include
.global _stext
-.global __bss_start
-
.global _start
.global _rambase
@@ -81,30 +81,28 @@
movew #0x0800, 0xfffff906 /* Ignore CTS */
movew #0x010b, 0xfffff902 /* BAUD to 9600 */
- movew #0x2410, 0xfffff200 /* PLLCR */
- movew #0x123, 0xfffff202 /* PLLFSR */
+ movew #0x2410, 0xfffff200 /* PLLCR */
+ movew #0x123, 0xfffff202 /* PLLFSR */
#ifdef CONFIG_PILOT
- moveb #0, 0xfffffA27 /* LCKCON */
+ moveb #0, 0xfffffA27 /* LCKCON */
movel #_start, 0xfffffA00 /* LSSA */
- moveb #0xa, 0xfffffA05 /* LVPW */
- movew #0x9f, 0xFFFFFa08 /* LXMAX */
- movew #0x9f, 0xFFFFFa0a /* LYMAX */
- moveb #9, 0xfffffa29 /* LBAR */
- moveb #0, 0xfffffa25 /* LPXCD */
- moveb #0x04, 0xFFFFFa20 /* LPICF */
- moveb #0x58, 0xfffffA27 /* LCKCON */
- moveb #0x85, 0xfffff429 /* PFDATA */
- moveb #0xd8, 0xfffffA27 /* LCKCON */
- moveb #0xc5, 0xfffff429 /* PFDATA */
- moveb #0xd5, 0xfffff429 /* PFDATA */
+ moveb #0xa, 0xfffffA05 /* LVPW */
+ movew #0x9f, 0xFFFFFa08 /* LXMAX */
+ movew #0x9f, 0xFFFFFa0a /* LYMAX */
+ moveb #9, 0xfffffa29 /* LBAR */
+ moveb #0, 0xfffffa25 /* LPXCD */
+ moveb #0x04, 0xFFFFFa20 /* LPICF */
+ moveb #0x58, 0xfffffA27 /* LCKCON */
+ moveb #0x85, 0xfffff429 /* PFDATA */
+ moveb #0xd8, 0xfffffA27 /* LCKCON */
+ moveb #0xc5, 0xfffff429 /* PFDATA */
+ moveb #0xd5, 0xfffff429 /* PFDATA */
moveal #0x00100000, %a3
moveal #0x100ffc00, %a4
-
#endif /* CONFIG_PILOT */
-
#endif /* CONFIG_M68328 */
movew #0x2700, %sr
@@ -126,7 +124,7 @@
movel #__ramvec, %d7
addl #16, %d7
moveal %d7, %a0
- moveal #end, %a1
+ moveal #_ebss, %a1
lea %a1@(512), %a2
DBG_PUTC('C')
@@ -139,9 +137,9 @@
bhi L2
/* Copy data segment from ROM to RAM */
- moveal #__data_rom_start, %a0
- moveal #__data_start, %a1
- moveal #__data_end, %a2
+ moveal #_etext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
DBG_PUTC('D')
@@ -154,8 +152,8 @@
DBG_PUTC('E')
- moveal #__bss_start, %a0
- moveal #end, %a1
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@@ -166,7 +164,7 @@
DBG_PUTC('F')
/* Copy command line from end of bss to command line */
- moveal #end, %a0
+ moveal #_ebss, %a0
moveal #command_line, %a1
lea %a1@(512), %a2
@@ -180,17 +178,17 @@
bhi L3
movel #_sdata, %d0
- movel %d0, _rambase
- movel #end, %d0
- movel %d0, _ramstart
+ movel %d0, _rambase
+ movel #_ebss, %d0
+ movel %d0, _ramstart
- movel %a4, %d0
- subl #4096, %d0 /* Reserve 4K of stack */
+ movel %a4, %d0
+ subl #4096, %d0 /* Reserve 4K of stack */
moveq #79, %d7
- movel %d0, _ramend
+ movel %d0, _ramend
- movel %a3, %d0
- movel %d0, rom_length
+ movel %a3, %d0
+ movel %d0, rom_length
pea 0
pea env
@@ -200,12 +198,10 @@
DBG_PUTC('H')
#ifdef CONFIG_PILOT
-
- movel #penguin_bits, 0xFFFFFA00
- moveb #10, 0xFFFFFA05
- movew #160, 0xFFFFFA08
- movew #160, 0xFFFFFA0A
-
+ movel #penguin_bits, 0xFFFFFA00
+ moveb #10, 0xFFFFFA05
+ movew #160, 0xFFFFFA08
+ movew #160, 0xFFFFFA0A
#endif /* CONFIG_PILOT */
DBG_PUTC('I')
diff -Nru a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c
--- a/arch/m68knommu/platform/68360/commproc.c Mon Feb 24 11:06:13 2003
+++ b/arch/m68knommu/platform/68360/commproc.c Mon Feb 24 11:06:13 2003
@@ -90,7 +90,7 @@
while (pquicc->cp_cr & CMD_FLAG);
/* On the recommendation of the 68360 manual, p. 7-60
- * - Set sdma interupt service mask to 7
+ * - Set sdma interrupt service mask to 7
* - Set sdma arbitration ID to 4
*/
pquicc->sdma_sdcr = 0x0740;
diff -Nru a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
--- a/arch/m68knommu/platform/68360/entry.S Mon Feb 24 11:06:12 2003
+++ b/arch/m68knommu/platform/68360/entry.S Mon Feb 24 11:06:12 2003
@@ -91,7 +91,7 @@
Luser_return:
/* only allow interrupts when we are really the last one on the*/
/* kernel stack, otherwise stack overflow can occur during*/
- /* heavy interupt load*/
+ /* heavy interrupt load*/
andw #ALLOWINT,%sr
movel %sp,%d1 /* get thread_info pointer */
diff -Nru a/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S b/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S
--- a/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S Mon Feb 24 11:06:14 2003
+++ b/arch/m68knommu/platform/68360/uCquicc/crt0_ram.S Mon Feb 24 11:06:14 2003
@@ -15,7 +15,6 @@
#include
.global _stext
-.global __bss_start
.global _start
.global _rambase
@@ -26,7 +25,6 @@
.global _quicc_base
.global _periph_base
-.global _dprbase
#define REGB 0x1000
#define PEPAR (_dprbase + REGB + 0x0016)
@@ -94,63 +92,62 @@
#include
-/* By the time this RAM specific code begins to execute, DPRAM
- * and DRAM should already be mapped and accessible. */
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
.text
_start:
_stext:
- nop
- ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
- /* We should not need to setup the boot stack the reset should do it. */
- movea.l #_boot_stack, %sp /*set up stack at the end of DRAM:*/
-
+ nop
+ ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
+ /* We should not need to setup the boot stack the reset should do it. */
+ movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/
set_mbar_register:
- moveq.l #0x07, %d1 /* Setup MBAR */
- movec %d1, %dfc
+ moveq.l #0x07, %d1 /* Setup MBAR */
+ movec %d1, %dfc
- lea.l MCU_SIM_MBAR_ADRS, %a0
- move.l #_dprbase, %d0
- andi.l #MCU_SIM_MBAR_BA_MASK, %d0
- ori.l #MCU_SIM_MBAR_AS_MASK, %d0
- moves.l %d0, %a0@
+ lea.l MCU_SIM_MBAR_ADRS, %a0
+ move.l #_dprbase, %d0
+ andi.l #MCU_SIM_MBAR_BA_MASK, %d0
+ ori.l #MCU_SIM_MBAR_AS_MASK, %d0
+ moves.l %d0, %a0@
- moveq.l #0x05, %d1
- movec.l %d1, %dfc
+ moveq.l #0x05, %d1
+ movec.l %d1, %dfc
-/* Now we can begin to access registers in DPRAM */
+ /* Now we can begin to access registers in DPRAM */
set_sim_mcr:
- /* Set Module Configuration Register */
- move.l #MCU_SIM_MCR, MCR
-
-/* to do: Determine cause of reset */
+ /* Set Module Configuration Register */
+ move.l #MCU_SIM_MCR, MCR
+ /* to do: Determine cause of reset */
- /*
- * configure system clock MC68360 p. 6-40
- * (value +1)*osc/128 = system clock
- */
+ /*
+ * configure system clock MC68360 p. 6-40
+ * (value +1)*osc/128 = system clock
+ */
set_sim_clock:
- move.w #MCU_SIM_PLLCR, PLLCR
- move.b #MCU_SIM_CLKOCR, CLKOCR
- move.w #MCU_SIM_CDVCR, CDVCR
+ move.w #MCU_SIM_PLLCR, PLLCR
+ move.b #MCU_SIM_CLKOCR, CLKOCR
+ move.w #MCU_SIM_CDVCR, CDVCR
- // Wait for the PLL to settle
- move.w #16384, %d0
+ /* Wait for the PLL to settle */
+ move.w #16384, %d0
pll_settle_wait:
- subi.w #1, %d0
- bne pll_settle_wait
+ subi.w #1, %d0
+ bne pll_settle_wait
- /* Setup the system protection register, and watchdog timer register */
+ /* Setup the system protection register, and watchdog timer register */
+ move.b #MCU_SIM_SWIV, SWIV
+ move.w #MCU_SIM_PICR, PICR
+ move.w #MCU_SIM_PITR, PITR
+ move.w #MCU_SIM_SYPCR, SYPCR
- move.b #MCU_SIM_SWIV, SWIV
- move.w #MCU_SIM_PICR, PICR
- move.w #MCU_SIM_PITR, PITR
- move.w #MCU_SIM_SYPCR, SYPCR
-
-/* Clear DPRAM - system + parameter */
+ /* Clear DPRAM - system + parameter */
movea.l #_dprbase, %a0
movea.l #_dprbase+0x2000, %a1
@@ -161,72 +158,68 @@
bhi clear_dpram
configure_memory_controller:
- /*
- * Set up Global Memory Register (GMR)
- */
- move.l #MCU_SIM_GMR, %d0
- move.l %d0, GMR
+ /* Set up Global Memory Register (GMR) */
+ move.l #MCU_SIM_GMR, %d0
+ move.l %d0, GMR
configure_chip_select_0:
- move.l #__ramend, %d0
- subi.l #__ramstart, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR0_MASK, %d0
- move.l %d0, OR0
-
- move.l #__ramstart, %d0
- ori.l #SIM_BR0_MASK, %d0
- move.l %d0, BR0
-
+ move.l #__ramend, %d0
+ subi.l #__ramstart, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR0_MASK, %d0
+ move.l %d0, OR0
+
+ move.l #__ramstart, %d0
+ ori.l #SIM_BR0_MASK, %d0
+ move.l %d0, BR0
configure_chip_select_1:
- move.l #__flashend, %d0
- subi.l #__flashstart, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR1_MASK, %d0
- move.l %d0, OR1
-
- move.l #__flashstart, %d0
- ori.l #SIM_BR1_MASK, %d0
- move.l %d0, BR1
-
-
- move.w #MCU_SIM_PEPAR, PEPAR
-
-/* point to vector table: */
- move.l #_romvec, %a0
- move.l #_ramvec, %a1
+ move.l #__rom_end, %d0
+ subi.l #__rom_start, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR1_MASK, %d0
+ move.l %d0, OR1
+
+ move.l #__rom_start, %d0
+ ori.l #SIM_BR1_MASK, %d0
+ move.l %d0, BR1
+
+ move.w #MCU_SIM_PEPAR, PEPAR
+
+ /* point to vector table: */
+ move.l #_romvec, %a0
+ move.l #_ramvec, %a1
copy_vectors:
- move.l %a0@, %d0
- move.l %d0, %a1@
- move.l %a0@, %a1@
- addq.l #0x04, %a0
- addq.l #0x04, %a1
- cmp.l #_start, %a0
- blt copy_vectors
+ move.l %a0@, %d0
+ move.l %d0, %a1@
+ move.l %a0@, %a1@
+ addq.l #0x04, %a0
+ addq.l #0x04, %a1
+ cmp.l #_start, %a0
+ blt copy_vectors
- move.l #_ramvec, %a1
- movec %a1, %vbr
+ move.l #_ramvec, %a1
+ movec %a1, %vbr
/* Copy data segment from ROM to RAM */
- moveal #__data_rom_start, %a0
- moveal #__data_start, %a1
- moveal #__data_end, %a2
+ moveal #_stext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
/* Copy %a0 to %a1 until %a1 == %a2 */
LD1:
- move.l %a0@, %d0
- addq.l #0x04, %a0
- move.l %d0, %a1@
- addq.l #0x04, %a1
- cmp.l #__data_end, %a1
- blt LD1
+ move.l %a0@, %d0
+ addq.l #0x04, %a0
+ move.l %d0, %a1@
+ addq.l #0x04, %a1
+ cmp.l #_edata, %a1
+ blt LD1
- moveal #__bss_start, %a0
- moveal #end, %a1
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@@ -235,21 +228,21 @@
bhi L1
load_quicc:
- move.l #_dprbase, _quicc_base
+ move.l #_dprbase, _quicc_base
store_ram_size:
- /* Set ram size information */
- move.l #_sdata, _rambase
- move.l #end, _ramstart
- move.l #__ramend, %d0
- sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
- move.l %d0, _ramend /* Different from __ramend.*/
+ /* Set ram size information */
+ move.l #_sdata, _rambase
+ move.l #_ebss, _ramstart
+ move.l #__ramend, %d0
+ sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
+ move.l %d0, _ramend /* Different from __ramend.*/
store_flash_size:
- /* Set rom size information */
- move.l #__flashend, %d0
- sub.l #__flashstart, %d0
- move.l %d0, rom_length
+ /* Set rom size information */
+ move.l #__rom_end, %d0
+ sub.l #__rom_start, %d0
+ move.l %d0, rom_length
pea 0
pea env
@@ -260,17 +253,14 @@
lea 0x2000(%a2), %sp
lp:
- jsr start_kernel
- /* jmp lp */
+ jsr start_kernel
_exit:
-
jmp _exit
-
.data
- .align 4
+ .align 4
env:
.long 0
_quicc_base:
@@ -278,13 +268,16 @@
_periph_base:
.long 0
_ramvec:
- .long 0
+ .long 0
_rambase:
- .long 0
+ .long 0
_ramstart:
- .long 0
+ .long 0
_ramend:
- .long 0
+ .long 0
+_dprbase:
+ .long 0xffffe000
+
.text
/*
@@ -293,7 +286,7 @@
*/
.section ".data.initvect","awx"
- .long _boot_stack /* Reset: Initial Stack Pointer - 0. */
+ .long __ramend /* Reset: Initial Stack Pointer - 0. */
.long _start /* Reset: Initial Program Counter - 1. */
.long buserr /* Bus Error - 2. */
.long trap /* Address Error - 3. */
diff -Nru a/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S b/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S
--- a/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S Mon Feb 24 11:06:14 2003
+++ b/arch/m68knommu/platform/68360/uCquicc/crt0_rom.S Mon Feb 24 11:06:14 2003
@@ -11,11 +11,10 @@
* Copyright (C) 1998 D. Jeff Dionne ,
*
*/
-#define ASSEMBLY
#include
.global _stext
-.global __bss_start
+.global _sbss
.global _start
.global _rambase
@@ -26,7 +25,6 @@
.global _quicc_base
.global _periph_base
-.global _dprbase
#define REGB 0x1000
#define PEPAR (_dprbase + REGB + 0x0016)
@@ -78,7 +76,6 @@
#define SIM_OR0_MASK 0x20000000
#define SIM_BR0_MASK 0x00000001
-
/* Defines for chip select one - the RAM */
#define SIM_OR1_MASK 0x10000000
#define SIM_BR1_MASK 0x00000001
@@ -107,66 +104,66 @@
#include
-/* By the time this RAM specific code begins to execute, DPRAM
- * and DRAM should already be mapped and accessible. */
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
.text
_start:
_stext:
- nop
- ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
- /* We should not need to setup the boot stack the reset should do it. */
- movea.l #_boot_stack, %sp /*set up stack at the end of DRAM:*/
+ nop
+ ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
+ /* We should not need to setup the boot stack the reset should do it. */
+ movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/
set_mbar_register:
- moveq.l #0x07, %d1 /* Setup MBAR */
- movec %d1, %dfc
+ moveq.l #0x07, %d1 /* Setup MBAR */
+ movec %d1, %dfc
- lea.l MCU_SIM_MBAR_ADRS, %a0
- move.l #_dprbase, %d0
- andi.l #MCU_SIM_MBAR_BA_MASK, %d0
- ori.l #MCU_SIM_MBAR_AS_MASK, %d0
- moves.l %d0, %a0@
+ lea.l MCU_SIM_MBAR_ADRS, %a0
+ move.l #_dprbase, %d0
+ andi.l #MCU_SIM_MBAR_BA_MASK, %d0
+ ori.l #MCU_SIM_MBAR_AS_MASK, %d0
+ moves.l %d0, %a0@
- moveq.l #0x05, %d1
- movec.l %d1, %dfc
+ moveq.l #0x05, %d1
+ movec.l %d1, %dfc
-/* Now we can begin to access registers in DPRAM */
+ /* Now we can begin to access registers in DPRAM */
set_sim_mcr:
- /* Set Module Configuration Register */
- move.l #MCU_SIM_MCR, MCR
-
-/* to do: Determine cause of reset */
+ /* Set Module Configuration Register */
+ move.l #MCU_SIM_MCR, MCR
+ /* to do: Determine cause of reset */
- /*
- * configure system clock MC68360 p. 6-40
- * (value +1)*osc/128 = system clock
- * or
- * (value + 1)*osc = system clock
- * You do not need to divide the oscillator by 128 unless you want to.
- */
+ /*
+ * configure system clock MC68360 p. 6-40
+ * (value +1)*osc/128 = system clock
+ * or
+ * (value + 1)*osc = system clock
+ * You do not need to divide the oscillator by 128 unless you want to.
+ */
set_sim_clock:
- move.w #MCU_SIM_PLLCR, PLLCR
- move.b #MCU_SIM_CLKOCR, CLKOCR
- move.w #MCU_SIM_CDVCR, CDVCR
+ move.w #MCU_SIM_PLLCR, PLLCR
+ move.b #MCU_SIM_CLKOCR, CLKOCR
+ move.w #MCU_SIM_CDVCR, CDVCR
- // Wait for the PLL to settle
- move.w #16384, %d0
+ /* Wait for the PLL to settle */
+ move.w #16384, %d0
pll_settle_wait:
- subi.w #1, %d0
- bne pll_settle_wait
+ subi.w #1, %d0
+ bne pll_settle_wait
- /* Setup the system protection register, and watchdog timer register */
+ /* Setup the system protection register, and watchdog timer register */
+ move.b #MCU_SIM_SWIV, SWIV
+ move.w #MCU_SIM_PICR, PICR
+ move.w #MCU_SIM_PITR, PITR
+ move.w #MCU_SIM_SYPCR, SYPCR
- move.b #MCU_SIM_SWIV, SWIV
- move.w #MCU_SIM_PICR, PICR
- move.w #MCU_SIM_PITR, PITR
- move.w #MCU_SIM_SYPCR, SYPCR
-
-/* Clear DPRAM - system + parameter */
+ /* Clear DPRAM - system + parameter */
movea.l #_dprbase, %a0
movea.l #_dprbase+0x2000, %a1
@@ -177,65 +174,63 @@
bhi clear_dpram
configure_memory_controller:
- /*
- * Set up Global Memory Register (GMR)
- */
- move.l #MCU_SIM_GMR, %d0
- move.l %d0, GMR
+ /* Set up Global Memory Register (GMR) */
+ move.l #MCU_SIM_GMR, %d0
+ move.l %d0, GMR
configure_chip_select_0:
- move.l #0x00400000, %d0
- subq.l #0x01, %d0
- eori.l #SIM_OR_MASK, %d0
- ori.l #SIM_OR0_MASK, %d0
- move.l %d0, OR0
-
- move.l #__flashstart, %d0
- ori.l #SIM_BR0_MASK, %d0
- move.l %d0, BR0
-
- move.l #0x0, BR1
- move.l #0x0, BR2
- move.l #0x0, BR3
- move.l #0x0, BR4
- move.l #0x0, BR5
- move.l #0x0, BR6
- move.l #0x0, BR7
-
- move.w #MCU_SIM_PEPAR, PEPAR
-
-/* point to vector table: */
- move.l #_romvec, %a0
- move.l #_ramvec, %a1
+ move.l #0x00400000, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR0_MASK, %d0
+ move.l %d0, OR0
+
+ move.l #__rom_start, %d0
+ ori.l #SIM_BR0_MASK, %d0
+ move.l %d0, BR0
+
+ move.l #0x0, BR1
+ move.l #0x0, BR2
+ move.l #0x0, BR3
+ move.l #0x0, BR4
+ move.l #0x0, BR5
+ move.l #0x0, BR6
+ move.l #0x0, BR7
+
+ move.w #MCU_SIM_PEPAR, PEPAR
+
+ /* point to vector table: */
+ move.l #_romvec, %a0
+ move.l #_ramvec, %a1
copy_vectors:
- move.l %a0@, %d0
- move.l %d0, %a1@
- move.l %a0@, %a1@
- addq.l #0x04, %a0
- addq.l #0x04, %a1
- cmp.l #_start, %a0
- blt copy_vectors
+ move.l %a0@, %d0
+ move.l %d0, %a1@
+ move.l %a0@, %a1@
+ addq.l #0x04, %a0
+ addq.l #0x04, %a1
+ cmp.l #_start, %a0
+ blt copy_vectors
- move.l #_ramvec, %a1
- movec %a1, %vbr
+ move.l #_ramvec, %a1
+ movec %a1, %vbr
/* Copy data segment from ROM to RAM */
- moveal #__data_rom_start, %a0
- moveal #__data_start, %a1
- moveal #__data_end, %a2
+ moveal #_etext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
/* Copy %a0 to %a1 until %a1 == %a2 */
LD1:
- move.l %a0@, %d0
- addq.l #0x04, %a0
- move.l %d0, %a1@
- addq.l #0x04, %a1
- cmp.l #__data_end, %a1
- blt LD1
+ move.l %a0@, %d0
+ addq.l #0x04, %a0
+ move.l %d0, %a1@
+ addq.l #0x04, %a1
+ cmp.l #_edata, %a1
+ blt LD1
- moveal #__bss_start, %a0
- moveal #end, %a1
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@@ -244,21 +239,21 @@
bhi L1
load_quicc:
- move.l #_dprbase, _quicc_base
+ move.l #_dprbase, _quicc_base
store_ram_size:
- /* Set ram size information */
- move.l #_sdata, _rambase
- move.l #end, _ramstart
- move.l #__ramend, %d0
- sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
- move.l %d0, _ramend /* Different from __ramend.*/
+ /* Set ram size information */
+ move.l #_sdata, _rambase
+ move.l #_ebss, _ramstart
+ move.l #__ramend, %d0
+ sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
+ move.l %d0, _ramend /* Different from __ramend.*/
store_flash_size:
- /* Set rom size information */
- move.l #__flashend, %d0
- sub.l #__flashstart, %d0
- move.l %d0, rom_length
+ /* Set rom size information */
+ move.l #__rom_end, %d0
+ sub.l #__rom_start, %d0
+ move.l %d0, rom_length
pea 0
pea env
@@ -269,17 +264,14 @@
lea 0x2000(%a2), %sp
lp:
- jsr start_kernel
- /* jmp lp */
+ jsr start_kernel
_exit:
-
jmp _exit
-
.data
- .align 4
+ .align 4
env:
.long 0
_quicc_base:
@@ -287,13 +279,17 @@
_periph_base:
.long 0
_ramvec:
- .long 0
+ .long 0
_rambase:
- .long 0
+ .long 0
_ramstart:
- .long 0
+ .long 0
_ramend:
- .long 0
+ .long 0
+_dprbase:
+ .long 0xffffe000
+
+
.text
/*
@@ -302,7 +298,7 @@
*/
.section ".data.initvect","awx"
- .long _boot_stack /* Reset: Initial Stack Pointer - 0. */
+ .long __ramend /* Reset: Initial Stack Pointer - 0. */
.long _start /* Reset: Initial Program Counter - 1. */
.long buserr /* Bus Error - 2. */
.long trap /* Address Error - 3. */
diff -Nru a/arch/m68knommu/platform/68VZ328/ucdimm/config.c b/arch/m68knommu/platform/68VZ328/ucdimm/config.c
--- /dev/null Wed Dec 31 16:00:00 1969
+++ b/arch/m68knommu/platform/68VZ328/ucdimm/config.c Mon Feb 24 11:06:14 2003
@@ -0,0 +1,119 @@
+/*
+ * linux/arch/m68knommu/platform/68VZ328/ucdimm/config.c
+ *
+ * Copyright (C) 1993 Hamish Macdonald
+ * Copyright (C) 1999 D. Jeff Dionne
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include